Abstract: An electrified vehicle having a first inverter having a DC terminal and a plurality of legs respectively connected to one end of each of a plurality of coils of a motor, a second inverter connected to the DC terminal, and including a plurality of legs connected to the other ends of the plurality of coils, respectively, a plurality of transfer switches respectively having one end connected to a neutral terminal for the plurality of coils and the other end connected to the other end of each coil, an overvoltage protection circuit including a clamping switch, a resistor, and a capacitor, and connected to the neutral terminal and the DC terminal, and a controller controlling a turned-on state of the plurality of transfer switches according to the motor driving mode. When the motor is driven, the controller controls a turned-on state of the clamping switch.

Abstract: A motor vehicle, having an externally excited synchronous machine and an inverter associated with the synchronous machine and connected to a high-voltage network and an exciter circuit associated with the synchronous machine to energize an exciter winding of the synchronous machine, comprising a power electronics layout having at least one intermediate circuit capacitor at the high-voltage network side, wherein the motor vehicle comprises a cooling device for cooling the power electronics layout and a voltage surge protection circuit is associated with the intermediate circuit capacitor, comprising at least one varistor, which becomes electrically conducting by the voltage imposed on it when a voltage threshold value is exceeded, wherein at least the one varistor of the voltage surge protection circuit forms part of an exciter module comprising the exciter circuit and a housing, which is thermally coupled to a cooling element of the cooling device for cooling the exciter module.

Abstract: The present invention refers to a starting method with two-levels modified and discrete fixed-time or fixed-frequency hysteresis current controller, under high load conditions, of a BLDC motor (10) with trapezoidal-shaped induced voltages, wherein the BLDC motor (10) is driven by an inverter bridge (30) with only one current sensor (20) positioned in the busbar, controlled by means of a processing unit associated to an analog-digital converter, wherein the novelty basically comprises the fact that: the intensity of the BLDC motor current (Im) is controlled by means of the two-levels and discrete fixed-time or fixed-frequency hysteresis current controller.

Abstract: A motor control apparatus controls a brake motor. The motor control apparatus includes a first motor driving portion, a first control portion, a second motor driving portion, and a second control portion. The second control portion is connected to the first control portion. The second control portion has s self-diagnosis function not provided to the first control portion. The second control portion monitors a state of a phase current in the first motor driving portion. For example, the second control portion determines that the first control portion is abnormal in a case where the waveform of the phase current in the first motor driving portion is outside a range of an expected current waveform.

Abstract: A drive device is provided. The drive device includes an electric motor, a power control device, an oil circuit that cools the electric motor with oil, a water circuit that cools the power control device with water, a heat exchanger that exchanges heat between the oil circuit and the water circuit, and a control device. The control device drives the power control device for heat generation, when a temperature regarding the oil is equal to or lower than a first threshold value.

Abstract: A motor control device includes temperature detection elements that are mounted on a circuit board on which a first power conversion circuit and a second power conversion circuit are mounted and are arranged at a position between the first power conversion circuit and the second power conversion circuit.

Abstract: The invention is directed to a photovoltaic multilayer laminate, to a method for preparing a photovoltaic multilayer laminate, to a method for preparing a photovoltaic roadway, and to a photovoltaic roadway. The photovoltaic multilayer laminate of the invention comprises multiple flexible photovoltaic foil elements laminated at least to a carrier layer comprising electrical interconnections for said flexible photovoltaic foil elements, wherein said multiple flexible photovoltaic elements are arranged transversely to the longitudinal direction of the laminate, wherein a stretchable or compressible space is provided between each pair of multiple flexible photovoltaic foil elements.

Abstract: A universal mounting system for supporting a plurality of photovoltaic modules on a sloped support surface, such as a sloped roof, is disclosed herein. The universal mounting system may include one or more support surface attachment devices, each support surface attachment device configured to attach one or more photovoltaic modules to a support surface; and one or more module coupling devices, each module coupling device configured to couple a plurality of photovoltaic modules to one another.

Abstract: A roof-mounted solar power system for generating electrical power that includes a plurality of solar modules adapted for generating electrical power from sunlight, and with each of the plurality of solar modules having substantially the same size, aspect ratio and surface coloring. The plurality of solar modules are mounted on the deck of a roof to form a bank of solar modules having at least one irregular edge. The solar power system further includes one or more non-power generating edge treatments having substantially the same size, aspect ratio and surface coloring as the solar modules and that are adapted for installation along the irregular edge. Each edge treatment is adapted for a cutting away of at least one corner thereof to smooth the irregular edge of the bank of solar modules to a regular edge.

Abstract: The invention relates to a system and a method for mounting at least one solar panel on a substantially flat mounting surface. The system comprises thereto a base element, a support structure configured for supporting at least part of at least one solar panel, which is connected to the base element and wherein the support structure comprises a retaining element for retaining at least part of an upper edge of the solar panel and a clamping element configured for clampingly engaging at least part of a lower edge the solar panel.

Abstract: The present invention provides a solar photovoltaic rotation device installed the top of a pole so as to rotate a solar panel array, the solar photovoltaic rotation device comprising: a first tubular body connected to the solar panel array; a second tubular body coupled to the lower portion of the first tubular body and fixed to the top of the pole; a gear unit for transferring a rotation force to the first tubular body; and a driving motor fixed in the second tubular body so as to provide a rotation force to the gear unit, wherein the gear unit is formed as a planet gear set comprising: a sun gear connected to a rotating shaft of the driving motor; multiple PL gears disposed at predetermined intervals around the sun gear so as to be able to mesh with the sun gear; and a ring gear disposed outside the multiple PL gears so as to be able to mesh with the PL gears, the ring gear being fixed to the first tubular body, and at least one among the sun gear, the PL gears, and the ring gear has inclined teeth formed o

Abstract: A photovoltaic module mounting system may include a module clamp that includes a central section that includes two first walls connected at the top of each first wall by a first connecting surface. The central section may have a first cross-sectional height corresponding to a height of each of the first walls and a first width corresponding to a distance between the two first walls. The module clamp may have ends that include two second walls connected at the top of each second wall by a second connecting surface in which each of the ends has a second cross-sectional height that is shorter than the first cross-sectional height and a second width that is wider than the first width. The central section may be connected to each of the ends such that the first connecting surface and the second connecting surface are bridged and form a bowtie shape.

Abstract: A bifurcated bearing housing for use within a torque tube interface may include a first component defining a first portion of an aperture configured to house a first portion of a rotating bearing, a second component defining a second portion of the aperture configured to house a second portion of the rotating bearing, and a connection interface between the first and second components, wherein, when the first and second components are in an attached configuration, the connection interface lies below a centerpoint of the aperture defined by the first and second components. The bifurcated bearing housing may include one or more of ridges, gussets, and/or hems to increase the structural integrity and rigidity of the bearing housing.

Abstract: A photovoltaic system includes a collection of photovoltaic modules, a base supporting the collection of photovoltaic modules, and a damper coupled between the collection of photovoltaic modules and the base. The damper resists movement of the photovoltaic modules relative to the base. The damper has a first damping ratio when the collection of photovoltaic modules moves at a first rate relative to the base and a second damping ratio when the collection of photovoltaic modules moves at a second rate relative to the base, and the damper passively transitions from the first damping ratio to the second damping ratio.

Abstract: A solar module for industrial applications is disclosed that includes a solar panel coupled to a damper. The damper provides support against static and dynamic loads with reduced risk of damage to the solar cells in applications such as architectural, marine, aeronautical, terrestrial and/or other structural panels, and to reduce noise, vibration and harshness for industrial utility. The solar panel electrical terminations may be housed in one or more junction boxes formed from flexible material of the damper, and having simplified electrical connections with strain relief. The solar module with integrated solar panel, damper and junction boxes constitutes a lightweight, durable body panel with a reduced number of components that may be manufactured in high volume and at low cost.

Abstract: A cable hanger including a body defining a support coupling and a number of supported element couplings. The support coupling is a rigid element support coupling.

Abstract: Systems and methods for mounting one or more framed solar modules are disclosed. A solar module mounting system can include a plurality of support members configured to support one or more framed solar modules above a mounting surface, such as the ground or the roof of a building. The support members can include rails formed from a rigid material, such as steel. The solar module mounting system can also include a plurality of attachment mechanisms each configured to secure a portion of a framed solar module to a portion of a respective one of the support members.

Abstract: A solar module skirt assembly includes a skirt that is attached to a frame of a solar module, and a clip to attach the skirt to the solar module. The clip includes a first portion to attach to a frame of the solar module and to the skirt, a second portion to hold a portion of the frame of the solar module and a portion of the skirt, and a fastener to affix the clip to the frame of the solar module and the portion of the skirt.

Abstract: A solar array system. The system includes a plurality of foldable solar panels. At least some of the panels can be folder onto other panels by a drive mechanism under the control of a control unit. The control unit responds to environmental conditions, such as weather and time of day, and controls the drive mechanism to fold and unfold selected panels based on such conditions.

Abstract: A solar power generation system includes a string, an inverter, and first and second shut-off devices. The string includes a plurality of solar cell module groups. The first shut-off device cuts off the connections between the plurality of solar cell module groups of a first electric path in response to a first control signal. The second shut-off device cuts off the connections between the plurality of solar cell module groups in a second electric path in response to a second control signal output by a different communication system. The first shut-off device includes a first open-close unit, a first semiconductor switching device connected in series to the first open-close unit and a power supply unit configured to generate power to drive the first open-close unit. The first semiconductor switching device enters an OFF state if the amount of generated power is smaller than a predetermined threshold value.

Abstract: A solar power generation system includes a string, an inverter, a first shut-off device, and a second shut-off device. The string includes a plurality of solar cell module groups. The first shut-off device is connected to a first electric path. The second shut-off device is connected to a second electric path. The first shut-off device cuts off the connection between a plurality of solar cell module groups connected to the first electric path in response to a first control signal. The second shut-off device is driven by the power supplied from the first shut-off device, and cuts off the connection between a plurality of the solar cell module groups connected to the second electric path in response to a second control signal. The first shut-off device includes a first semiconductor switching device and a first open-close unit connected in series to the first semiconductor switching device.

Abstract: The solar power generation system includes a string, an inverter, and primary and secondary shut-off devices. The primary shut-off device cuts off the string and the inverter in response to a first control signal. The secondary shut-off device cuts off a solar cell module group and another solar cell module or the inverter in response to a second control signal from the primary shut-off device. The secondary shut-off device includes a first secondary-device open-close unit in a first electric pathway, a semiconductor switching device disposed between the first secondary-device open-close unit and a solar cell module group, and a power supply unit having an anode-side terminal connected between a solar cell module group and the semiconductor switching device, which generates power to drive the third open-close unit. The semiconductor switching device enters an OFF state when power generated by the solar cell module groups falls below a predetermined threshold.

Abstract: Various solar panels and bifacial, solar panel assemblies are described. One solar panel includes a substrate having a first side and a second side opposite the first side. A first solar cell having a first orientation and a second solar cell having a second orientation disposed on the first side of the substrate are disposed on the first side of the substrate. The second orientation is different from the first orientation. An electrical conductor connecting the first solar cell and the second solar cell. The solar panel may be connected with other solar panels to form a bifacial, solar panel assembly.

Abstract: A monitoring system that is configured to monitor a property is disclosed. The monitoring system includes a sensor that is configured to generate sensor data that reflects an attribute of the property; a solar panel that is configured to generate and output power; and a monitor control unit. The monitor control unit is configured to: monitor the power outputted by the solar panel; determine that the power outputted by the solar panel has deviated from an expected power range; based on determining that the power outputted by the solar panel has deviated from the expected power range, access the sensor data; based on the power outputted by the solar panel and the sensor data, determine a likely cause of the deviation from the expected power range; and determine an action to perform to remediate the likely cause of the deviation from the expected power range.

Abstract: A method for visual inspection of a photovoltaic module, including: turning on a first light source located above the photovoltaic module, and recording, by an image collector, first coordinates and second coordinates of edge intersections at ends of the film strips; turning on a second light source located below the photovoltaic module, and recording, by the image collector, third coordinates and fourth coordinates of overlapping points among edges of the solar cells, the ends of the film strips, and the cell gaps or the string gaps; and analyzing, by the image collector, differences between the first coordinates and the third coordinates and between the second coordinates and the fourth coordinates along width directions of the cell gaps or the string gaps, wherein the differences are overlap spacings between the film strips and the solar cells.

Abstract: The present invention relates to the monitoring of photovoltaic systems, and in particular provides a system for determining the operating state of a solar photovoltaic module that include means for acquiring a voltage signal, operatively connected to a voltage output of said solar photovoltaic module; and a processor operatively connected to said means for acquiring said output voltage signal which, by using Fourier transforms and reference spectra, determines the operating state of the solar photovoltaic module. The present invention further provides a method for determining the operating state of solar photovoltaic modules.

Abstract: The present invention relates to an organic solar cell for a current-voltage test and a preparation method thereof. The disclosed organic solar cell for the current-voltage test comprises a substrate with a preset ITO pattern, wherein ITO on the substrate with the preset ITO pattern is used as the anode layer, and a hole transport layer, an active layer, an electron transport layer and a cathode layer are stacked successively to form a solar cell. A plurality of cell positions are designed on the substrate in the present invention. Each cell has an independent cathode test site and an anode test site. The distance between the test site of each cell and the cell is kept the same and the distance is short enough; and the cells are distributed evenly on the substrate discretely. The present invention has high substrate utilization rate, high data accuracy and good parallelism.

Abstract: An oscillator circuit includes a bulk acoustic wave resonator, a differential active inductor circuit, and a gain circuit. The differential active inductor circuit is configured to bias the bulk acoustic wave resonator. The differential active inductor circuit is coupled between the bulk acoustic wave resonator and a power supply terminal. The gain circuit is coupled to the bulk acoustic wave resonator.

Abstract: A SSB (single sideband) mixer is configured to mix a first signal with a second signal, both the first signal and the second signal being a four-phase signal, and comprises eight gated inverters, each receiving a respective phase of the first signal and conditionally outputting a respective current in accordance with a control of a respective phase of the second signal, wherein currents output from the eight gated inverters are summed to establish a third signal that is a two-phase signal.

Abstract: Methods and apparatuses for facilitating wide bandwidth power amplification with high efficiency for analog RF signals. A passive load modulated balanced amplifier (LMBA) device comprises a balanced power amplifier (BPA) and a directional coupler. The BPA comprises a first power amplifier (PA) configured to amplify a first portion of an input power, a second PA configured to amplify a second portion of the input power, an isolation port, and an output port that outputs the amplified first and second portions of the input power as an output power. The directional coupler is configured to provide a portion of the output power from the output port to the isolation port to modulate a load impedance of the first and second PAs.

Abstract: A circuit with a pseudo class-AB structure is shown. The circuit has an output stage, a first capacitor, and a first impedance component. The output stage has a first PMOS (p-type Metal-Oxide-Semiconductor Field-Effect Transistor) and a first NMOS (n-type MOSFET). The first connection node between the drain terminal of the first PMOS and the drain terminal of the first NMOS is coupled to the first output terminal of the circuit. The first capacitor is coupled between the gate terminal of the first PMOS and the gate terminal of the first NMOS. The first impedance component is coupled in parallel with the first capacitor between the gate terminal of the first PMOS and the gate terminal of the first NMOS.

Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.

Abstract: An apparatus is disclosed for waveform-tailored average power tracking. In an example aspect, the apparatus includes an amplifier, a power converter, and an average power tracking module. The amplifier is configured to amplify radio-frequency signals using a supply voltage. The radio-frequency signals have different waveforms. The power converter is coupled to the amplifier and configured to provide the supply voltage. The average power tracking module is coupled to the power converter and configured to adjust the supply voltage according to the different waveforms to cause the supply voltage to vary across at least two waveforms of the different waveforms for related average output powers.

Abstract: An amplifier includes an amplifier circuit 10 having a characteristic changing in accordance with a thermal history, and a bias circuit 20 that includes an element subjected to a thermal history corresponding to the thermal history of the amplifier circuit, and supplies a bias voltage to the amplifier circuit. The bias voltage changes based on a characteristic of the element that changes in accordance with the thermal history of the element.

Abstract: A broadband low noise amplifier (LNA) structure (10) includes a main LNA (12), an offset LNA (14), an input splitter (16), and an output combiner (18). The input splitter (16) is configured to split a radio frequency (RF) input signal into a first RF input signal and a second RF input signal with difference phases, which are fed to the main LNA (12) and the offset LNA (14), respectively. Based on the first RF input signal, the main LNA (12) is configured to provide a first RF output signal, and based on the second RF input signal, the offset LNA (14) is configured to provide a second RF output signal. The output combiner (18) is configured to realign the first RF output signal and the second RF output signal, and configured to combine the first and second RF output signals to provide a combined RF output signal.

Abstract: A circuit for inductive peaking may include a driver, an inverter, a resistor between an output node of the driver and an input node of the inverter and a switch. For example, a first node of the resistor may be connected to the output node of the driver and a second node of the resistor may be connected to the input node of the inverter. The switch may be connected between an output node of the inverter and the first node of the resistor. An input node of the driver may correspond to an input node of the circuit and the output node of the driver may correspond to an output node of the circuit.

Abstract: A power amplifier includes an amplifier circuit configured to amplify a radio frequency input signal, a bias circuit configured to output a bias current to the amplifier circuit, and a bias suppression circuit configured to suppress the bias current based on the radio frequency input signal. The bias circuit includes a first transistor including a collector and a base that are electrically connected to a first node to be input with a current and an emitter electrically connected to a second node, a second transistor including a collector and a base that are electrically connected to the second node, and a third transistor including a base electrically connected to the first node and an emitter, the third transistor being configured to output a bias current from the emitter. The bias suppression circuit draws a current from the second node of the bias circuit based on the radio frequency input signal.

Abstract: A negative resistance amplifier including a negative resistance network where the negative resistance network may be any known circuit element characterized by a negative ratio of the voltage a between its output terminals and to the current flowing through the element: a reactance network resonant at the center frequency of the amplifier where the reactive network may contain a varactor for tuning of the resonant frequency of the reactance network: and a circulator whose port 1 is the input terminal of the amplifier, whose port 3 is the output port of the amplifier and whose port 2 is connected to the combination of the negative resistance network and the reactance network.

Abstract: A manufacturing method for a compound semiconductor device, a semiconductor laminate structure, including an electron transit layer and an electron supply layer that are formed from compound semiconductor. A source electrode, a gate electrode, and a drain electrode are provided above the semiconductor laminate structure and arranged in a first direction. A first insulating film having a first internal stress is formed over the semiconductor laminate structure and between the gate electrode and the drain electrode. A slit extending in the first direction is defined in the first insulating film. An amplifier with a compensating circuit compensates distortion of an input signal of the semiconductor device.

Abstract: A radio-frequency power amplifier device includes: a carrier amplifier semiconductor device and a peak amplifier semiconductor device on a multilayer submount substrate; a bias power supply semiconductor device; second radio-frequency signal wiring that transmits a radio-frequency signal to the carrier amplifier semiconductor device and the peak amplifier semiconductor device; and carrier-amplifier bias power supply wiring that is wired in a third wiring layer and supplies a bias power supply voltage. The second radio-frequency signal wiring and the carrier-amplifier bias power supply wiring intersect in a plan view. The radio-frequency power amplifier device includes: a shield pattern that is located in a second wiring layer between a first wiring layer and the third wiring layer; and one or more connection vias disposed in an extension direction of the carrier-amplifier bias power supply wiring. The one or more connection vias are connected to the shield pattern.

Abstract: The present disclosure provides a receiving circuit for adaptive impedance matching and an operating method thereof. The receiving circuit includes: a first amplification module configured to amplify an input signal input from an input end of the first amplification module to generate a first amplified signal; a frequency mixing module, an input end of which is connected to an output end of the first amplification module, and configured to down-convert the first amplified signal to generate a down-converted signal; and a second amplification module, an input end of which is connected to an output end of the frequency mixing module, and configured to amplify the down-converted signal to generate an output signal, wherein the first amplification module includes an active negative feedback structure for providing adaptive impedance matching in a first bandwidth range.

Abstract: An electronic device includes: at least one antenna; and a power amplifier electrically connected to the at least one antenna. The power amplifier includes: a first amplification circuit; a first transformer; a first switch; a second amplification circuit; a second transformer; a second switch; the power combiner; and the third switch configured to electrically connect at least one of the first switch, the second switch, or an output port of the power combiner with the at least one antenna.

Abstract: Deterioration of characteristics is reduced. A radio-frequency module includes a first power amplifier circuit, a second power amplifier circuit, and a substrate. The first power amplifier circuit includes a first amplifier component and a first transformer. The second power amplifier circuit includes a second amplifier component and a second transformer. The radio-frequency module further includes a long bump disposed on one main surface of the substrate. The first amplifier component is disposed on the one main surface of the substrate with the long bump interposed between the first amplifier component and the one main surface of the substrate. The long bump is located between the first transformer and the second transformer when viewed in plan in a thickness direction of the substrate.

Abstract: The present disclosure relates to an amplifier arrangement (1, 100, 200) comprising a first amplifier device (2, 102, 202) and a second amplifier device (3, 103, 203) where each amplifier device (2, 3; 102, 103; 202, 203) is connected to an input circuit (8, 108) and has a first type output terminal (4, 6; D) and a second type output terminal (5, 7; S), where the output terminals (4, 6, D; 5, 7, S) are connected to an output circuit (9, 109, 109?). The first type output terminal (4, D) of the first amplifier device (2, 102, 202) is connected to the second type output terminal (7, S) of the second amplifier device (3, 103, 203) by means of a first connection (10, 110), and the first type output terminal (6, D) of the second amplifier device (3, 103, 203) is connected to the second type output terminal (5, S) of the first amplifier device (2, 102, 202) by means of a second connection (11, 111).

Abstract: A differential amplifier includes a first differential amplifier circuit as a first stage, a second differential amplifier circuit having a common mode feedback circuit in a second stage, and a feedback differential circuit configured to multiply a differential signal between a differential output of the first differential amplifier circuit and a differential input of the second differential amplifier circuit by a magnitude of a differential output of the common mode feedback circuit.

Abstract: The present application discloses an amplification circuit. The amplification circuit includes an amplifier, a feedback unit, a second feedback unit, a first correlated double sampling unit, and a second correlated double sampling unit. The amplifier has a first positive input terminal, a second positive input terminal, a first negative input terminal, a second negative input terminal, a positive output terminal, and a negative output terminal. First terminals of the first feedback unit and the second feedback unit are coupled to the positive output terminal. The first correlated double sampling unit is coupled to the first negative input terminal and a second terminal of the first feedback unit, and performs a sample operation and an output operation. The second correlated double sampling unit is coupled to the second negative input terminal and a second terminal of the second feedback unit, and performs the sample operation and the output operation.

Abstract: Disclosed is an operational amplifier, including: a loading input transistor pair; a differential input transistor pair, which is connected with the loading input transistor pair, has a non-inverting input terminal receiving a non-inverting input signal, and has an inverting input terminal receiving an inverting input signal; a controller unit, generating a first control signal according to the non-inverting input signal and a second control signal according to the inverting input signal; a regulator unit, connected between the differential input transistor pair and ground, controlled by the first control signal and the second control signal, and select an on/off state of the regulator unit itself according to a voltage difference between the non-inverting and inverting input signals, which is withstood by a MOS transistor with high withstand voltage, thus allowing a source-drain voltage of the input transistor pair to be within a voltage range accepted by process.

Abstract: An equalizer circuit includes a variable gain equalizer circuit. A third transistor MN for gain adjustment is coupled between a source of a first transistor that constitutes an input differential pair of the variable gain equalizer circuit, and a first current source IB. A fourth transistor MN for gain adjustment is coupled between a source of a second transistor that constitutes the input differential pair, and a second current source IB. A first bias voltage Vb is supplied to the gates of the third transistor MN and the fourth transistor MN, so as to enable DC gain control of the variable gain equalizer circuit.

Abstract: According to the present disclosure, a circuit for cancelling an off-set voltage included in an output voltage of an electronic component includes: a first resistor having one end connected to a bias voltage terminal; a second resistor connected to the first resistor, and having one end connected to the bias voltage terminal; a third resistor having one end connected to the first resistor and the other end connected to a ground terminal; and a transistor having one end connected to the second resistor and the other end connected to the ground terminal, and applied with an output voltage including an off-set voltage from a sensor.

Abstract: A measurement system has a data acquisition architecture in one or more channels with storage in multiple sensor ranges. At least one sensor channel provides an analog measurement input signal, which is split into first and second amplifier-ADC paths, where a first path has relatively higher gain and smaller range than a second path. The digitized data is subject to cross-channel calibration that can serve as a trigger for the transfer of the two data streams into nonvolatile memory. The incoming data are temporarily stored for a specified period in a circular buffer, so that the trigger can also facilitate transfer of pre-trigger data from the buffer into the memory. A processor determines the presence or absence of any clipping of the higher-gain/smaller-range data and selects analysis of that smaller range data if no clipping is detected, but of the larger range data if clipping is detected.