With Significant Flow Manipulation Or Condition, Other Than Merely Specifying The Components Or Their Sequence Or Both Patents (Class 117/102)
  • Patent number: 10913656
    Abstract: A method for sealing an access opening to a cavity comprises the following steps: providing a layer arrangement having a first layer structure and a cavity arranged adjacent to the first layer structure, wherein the first layer structure has an access opening to the cavity, performing a CVD layer deposition for forming a first covering layer having a layer thickness on the first layer structure having the access opening, and performing an HDP layer deposition with a first and second substep for forming a second covering layer on the first covering layer, wherein the first substep comprises depositing a liner material layer on the first covering layer, wherein the second substep comprises partly backsputtering the liner material layer and furthermore the first covering layer in the region of the access opening, and wherein the first and second substeps are carried out alternately and repeatedly a number of times.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: February 9, 2021
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Metzger-Brueckl, Alfons Dehe, Uwe Hoeckele, Johann Strasser, Arnaud Walther
  • Patent number: 10854719
    Abstract: The present invention provides a metal nitride platform for semiconductor devices, including, a pre-defined array of catalyst sites, disposed on a substrate. Metal nitride islands with lateral to vertical size ratios of at least greater than one (1) are disposed on the array of catalyst sites, where the surfaces of the metal nitride islands are with reduced dislocation densities and side walls with bending of dislocations. The platform of metal nitride islands is further used to build electrically and optically-active devices. The present invention also provides a process for the preparation of a metal nitride platform, selectively, on the array of catalyst sites, in the presence of a reactive gas and precursors and under preferred reaction conditions, to grow metal nitride islands with lateral to vertical size ratios of at least greater than one (1).
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: December 1, 2020
    Assignee: Indian Institute of Science
    Inventors: Srinivasan Raghavan, Hareesh Chandrasekar, Nagaboopathy Mohan, Dhayalan Shakthivel
  • Patent number: 10801128
    Abstract: A SiC epitaxial growth apparatus includes: a susceptor having a mounting surface on which a wafer is placable; a heater which is provided apart from the susceptor on a side opposite to the mounting surface of the susceptor; and an annular radiation member which is in contact with a back surface of the susceptor opposite to the mounting surface and is located at a position which is overlapped with an outer peripheral portion of the wafer placed on the susceptor in a plan view, in which the radiation member has a higher emissivity than that of the susceptor and has an exposed portion as viewed from the heater.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: October 13, 2020
    Assignee: SHOWA DENKO K.K.
    Inventors: Yasunori Motoyama, Yoshishige Okuno, Yoshikazu Umeta, Keisuke Fukada
  • Patent number: 10774444
    Abstract: This method of producing a SiC epitaxial wafer having an epitaxial layer on a SiC single crystal substrate, and includes: when performing crystal growth of the epitaxial layer, a step of forming a part of an epitaxial layer under first conditions at an initial stage where the crystal growth is started; and a step of forming a part of a SiC epitaxial layer under second conditions in which a Cl/Si ratio is decreased and a C/Si ratio is increased in comparison to those in the first conditions, wherein the C/Si ratio is equal to or less than 0.6 and the Cl/Si ratio is equal to or more than 5.0 in the first conditions.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: September 15, 2020
    Assignee: SHOWA DENKO K.K.
    Inventors: Daisuke Muto, Akira Miyasaka
  • Patent number: 10559714
    Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: February 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana
  • Patent number: 10519544
    Abstract: A method for atomic layer deposition of high temperature materials from single source precursors includes placing a substrate in a reaction zone in gas isolation from other reaction zones and contacting the substrate in the reaction zone with a reactant to allow atoms in the reactant to combine with reaction sites on the substrate to form a layer of the reactant on the substrate. The substrate is then placed in a purge zone and purged with a flowing inert gas. The substrate is then placed in a final reaction zone in gas isolation from the other zones wherein the final reaction zone has an atmosphere and temperature to decompose adsorbed reactant and/or form desired phases with crystallinity to form a layer of material. The substrate is then placed in a purge zone and the process is repeated until a layer of material of desired thickness is formed on the substrate.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: December 31, 2019
    Assignee: United Technologies Corporation
    Inventors: Paul Sheedy, Neal Magdefrau
  • Patent number: 10483498
    Abstract: A source of material for use in a deposition system includes one or more baffles or equivalent structures within the source. The baffles provide for increased concentration of material entrained in a carrier gas that is passed through and emitted by the source.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: November 19, 2019
    Assignee: Universal Display Corporation
    Inventors: William E. Quinn, Gregory McGraw
  • Patent number: 10392704
    Abstract: A method of providing a coating on a conductor. The coating has a first layer containing palladium and a second layer containing gold from the conductor side. The first layer has an inner layer on the conductor side and an outer layer arranged nearer to the second layer than the inner layer, and the outer layer has a higher phosphorus concentration than the inner layer.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: August 27, 2019
    Assignee: TDK CORPORATION
    Inventors: Kenichi Yoshida, Yuhei Horikawa, Atsushi Sato, Hisayuki Abe
  • Patent number: 10358743
    Abstract: A composition, reactor apparatus, method, and control system for growing epitaxial layers of group III-nitride alloys. Super-atmospheric pressure is used as a process parameter to control the epitaxial layer growth where the identity of alloy layers differ within a heterostructure stack of two or more layers.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: July 23, 2019
    Assignee: Georgia State University Research Foundation, Inc.
    Inventor: Nikolaus Dietz
  • Patent number: 10272537
    Abstract: A polishing processing method using a CMP method for polishing a surface of a crystal material to be smooth by using a loose polishing abrasive grain type polishing pad in the presence of a polishing liquid and a plurality of polishing abrasive grains, in which the crystal material is a single crystal of GaN, and the polishing liquid is an oxidizing polishing liquid having an oxidation-reduction potential between Ehmin (determined by Eq. (1)) mV and Ehmax (determined by Eq. (2)) mV and pH between 0.1 and 6.5: Ehmin (mV)=?33.9 pH+750 . . . (1) Ehmax (mV)=?82.1 pH+1491 . . . (2).
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: April 30, 2019
    Assignee: NORITAKE CO., LIMITED
    Inventors: Makoto Sato, Wataru Omori, Maiko Takahashi
  • Patent number: 10170320
    Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: January 1, 2019
    Assignee: Lam Research Corporation
    Inventors: Deqi Wang, Anand Chandrashekar, Raashina Humayun, Michal Danek
  • Patent number: 10119194
    Abstract: Apparatus for use in a substrate processing chamber are provided herein. In some embodiments, an indexed jet injector may include a body having a substantially cylindrical central volume, a gas input port disposed on a first surface of the body, a gas distribution channel formed in the body and fluidly coupled to the gas input port and to the cylindrical central volume, a gas distribution drum disposed within the cylindrical central volume and rotatably coupled to the body, the gas distribution drum having a plurality of jet channels formed through the gas distribution drum, and a plurality of indexer output ports formed on a second surface of the body, wherein each of the plurality of jet channels fluidly couple the gas input port to at least one of the plurality of indexer output ports at least once per 360° rotation of the gas distribution drum.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: November 6, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventor: David K. Carlson
  • Patent number: 10078059
    Abstract: A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d1?d2|/d2 obtained from the plane spacing d1 at the X-ray penetration depth of 0.3 ?m and the plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 2.1×10?3.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: September 18, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Ishibashi, Tokiko Kaji, Seiji Nakahata, Takayuki Nishiura
  • Patent number: 10066319
    Abstract: A disc-like GaN substrate is a substrate produced by a tiling method and having an angel between the normal line and m-axis on the main surface of the substrate of 0 to 20° inclusive and a diameter of 45 to 55 mm, to 4 or less. In a preferred embodiment, a disc-like GaN substrate has a first main surface and a second main surface that is opposite to the first main surface, and which has an angle between the normal line and m-axis on the first main surface of 0 to 20° inclusive and a diameter of 45 mm or more. The disc-like GaN substrate comprises at least four crystalline regions each being exposed to both of the first main surface and the second main surface, wherein the four crystalline regions are arranged in line along the direction of the orthogonal projection of c-axis on the first main surface.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: September 4, 2018
    Assignee: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yusuke Tsukada, Satoru Nagao, Kazunori Kamada, Masayuki Tashiro, Kenji Fujito, Hideo Fujisawa, Yutaka Mikawa, Tetsuharu Kajimoto, Takashi Fukada
  • Patent number: 10023976
    Abstract: A periodic table Group 13 metal nitride crystals grown with a non-polar or semi-polar principal surface have numerous stacking faults. The purpose of the present invention is to provide a period table Group 13 metal nitride crystal wherein the occurrence of stacking faults of this kind are suppressed. The present invention achieves the foregoing by a periodic table Group 13 metal nitride crystal being characterized in that, in a Qx direction intensity profile that includes a maximum intensity and is derived from an isointensity contour plot obtained by x-ray reciprocal lattice mapping of (100) plane of the periodic table Group 13 metal nitride crystal, a Qx width at 1/300th of peak intensity is 6×10?4 rlu or less.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: July 17, 2018
    Assignee: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yuuki Enatsu, Satoru Nagao, Shuichi Kubo, Hirotaka Ikeda, Kenji Fujito
  • Patent number: 10017877
    Abstract: A silicon carbide growth method for growing a silicon carbide crystal on a substrate in a hot wall reaction chamber heated to a temperature between 1600° C. and 2000° C. Process gases enter the reaction chamber utilizing at least a primary gas flow, a secondary gas flow, and a shower gas flow. The shower gas flow is fed substantially perpendicularly to the primary and secondary gas flows and is directed towards the substrate. The primary and secondary gas flows are oriented substantially parallel to the surface of the substrate. A silicon precursor gas is entered by the primary gas flow. A hydrocarbon precursor gas is entered in at least one of the primary gas flow, the secondary gas flow, or the shower gas flow. Hydrogen is entered primarily in the secondary flow and the shower head flow. A CVD reactor chamber for use in processing the method.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: July 10, 2018
    Assignee: EPILUVAC AB
    Inventors: Erik Janzén, Olof Kordina
  • Patent number: 9982362
    Abstract: In a rotating disk reactor for growing epitaxial layers on substrate or other CVD reactor system, gas directed toward the substrates at gas inlets at different radial distances from the axis of rotation of the disk has both substantially the same gas flow rate/velocity and substantially the same gas density at each inlet. The gas directed toward portions of the disk remote from the axis may include a higher concentration of a reactant gas than the gas directed toward portions of the disk close to the axis, so that portions of the substrate surfaces at different distances from the axis receive substantially the same amount of reactant gas per unit area, and a combination of carrier gases with different relative molecular weights at different radial distances from the axis of rotation are employed to substantially make equal the gas density in each region of the reactor.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: May 29, 2018
    Assignee: Veeco Instruments Inc.
    Inventors: Bojan Mitrovic, Alexander I. Gurary, William E. Quinn, Eric A. Armour
  • Patent number: 9920451
    Abstract: An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize deposition on the chamber walls. Sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: March 20, 2018
    Assignee: Crystal Solar Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Kedarnath Sangam, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong
  • Patent number: 9909215
    Abstract: A method of CVD plasma processing for depositing at least one of diamond, diamond-like-carbon, or graphene includes forming a vacuum chamber comprising a conduit and a process chamber. A gas is introduced into the vacuum chamber. An RF electromagnetic field is applied to a magnetic core to form a toroidal plasma loop discharge in the vacuum chamber. A workpiece is positioned in the process chamber for plasma processing at a distance from a hot plasma core to a surface of the workpiece that is in a range from 0.1 cm to 5 cm. A gas comprising hydrogen is introduced to the workpiece so that the toroidal plasma loop discharge generates atomic hydrogen.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 6, 2018
    Assignee: Plasmability, LLC
    Inventors: William Holber, Robert J. Basnett
  • Patent number: 9834860
    Abstract: Embodiments of the invention generally relate processes for epitaxial growing Group III/V materials at high growth rates, such as about 30 ?m/hr or greater, for example, about 40 ?m/hr, about 50 ?m/hr, about 55 ?m/hr, about 60 ?m/hr, or greater. The deposited Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: December 5, 2017
    Assignee: ALTA DEVICES, INC.
    Inventors: Lori D. Washington, David P. Bour, Gregg Higashi, Gang He
  • Patent number: 9803282
    Abstract: A vapor phase growth apparatus of an embodiment includes: a reaction chamber; a shower plate disposed in the upper portion of the reaction chamber to supply a gas into the reaction chamber; and a support portion disposed below the shower plate inside the reaction chamber to place a substrate thereon. Then, the shower plate includes a plurality of first and second lateral gas passages disposed within different horizontal planes and first and second gas ejection holes connected to the first and second lateral gas passages. Further, the shower plate includes a center lateral gas passage that passes through a position directly above the rotation center of the support portion and third gas ejection holes connected to the center lateral gas passage. Then, the gases ejected from the first and second gas ejection holes and the center gas ejection holes are independently controllable.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: October 31, 2017
    Assignee: NuFlare Technology, Inc.
    Inventors: Takumi Yamada, Yuusuke Sato
  • Patent number: 9732439
    Abstract: A method for manufacturing a cubic silicon carbide film includes: a first step of introducing a carbon-containing gas onto a silicon substrate and rapidly heating the silicon substrate to an epitaxial growth temperature of cubic silicon carbide so as to carbonize a surface of the silicon substrate and form a cubic silicon carbide film; and a second step of introducing a carbon-containing gas and a silicon-containing gas onto the cubic silicon carbide film while maintaining the cubic silicon carbide film at the epitaxial growth temperature of cubic silicon carbide, so as to allow further epitaxial growth of the cubic silicon carbide film.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: August 15, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Yukimune Watanabe
  • Patent number: 9725804
    Abstract: A processing apparatus includes a plurality of first gas supply channels configured to supply a plurality of gases to the process chamber, a second gas supply channel configured to supply a gas to the process chamber, the gas being used in processing the target substrate, a plurality of first valves configured to open and close the plurality of first gas supply channels, a second valve configured to open and close the second gas supply channel, and a controller. One of the plurality of first valves is a follow-up target valve. The controller controls opening/closing operation of the plurality of first valves such that opening durations of the plurality of first valves do not overlap with each other, and controls opening/closing operation of the second valve such that opening duration of the second valve has a predetermined time relationship with opening duration of the follow-up target valve.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: August 8, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Katsuhito Hirose, Toshio Miyazawa
  • Patent number: 9719167
    Abstract: Methods of depositing Co-containing layers on substrates are disclosed. The vapor of a Co-containing film forming composition is introduced into a reactor having a substrate disposed therein. The Co-containing film forming compositions comprise a silylamide-containing precursor selected from Co[N(SiMe3)2]2(NMe2Et), Co[N(SiMe3)2]2(NMeEt2), or combinations thereof. At least part of the silylamide-containing precursor is deposited onto the substrate to form the Co-containing layer using a vapor deposition method.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: August 1, 2017
    Assignee: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des procédés Georges Claude
    Inventors: Satoko Gatineau, Mikiko Kimura, Christian Dussarrat, Jean-Marc Girard, Nicolas Blasco
  • Patent number: 9681557
    Abstract: A heating apparatus includes a gas supply for providing a base gas, a generator configured to excite the base gas to produce a metastable gas mixture that includes a metastable gas, and a housing. The housing includes a wall shaped to contain the metastable gas mixture and selectively enclose a reactive element of a target component. Interaction between the metastable gas and at least one of a coupling material and the reactive element transfers energy to selectively heat the at least one of the coupling material and the target component.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: June 13, 2017
    Assignee: Elwha LLC
    Inventors: Tom Driscoll, William D. Duncan, Roderick A. Hyde, Muriel Y. Ishikawa, Jordin T. Kare, Robert C. Petroski, Clarence T. Tegreene, David B. Tuckerman, Charles Whitmer, Lowell L. Wood, Jr., Victoria Y. H. Wood
  • Patent number: 9670582
    Abstract: Atomic layer deposition (ALD) type processes for producing metal containing thin films comprise feeding into a reaction space vapor phase pulses of metal containing cyclopentadienyl precursors as a metal source material. In preferred embodiments the metal containing cyclopentadienyl reactant comprises a metal atom that is not directly bonded to an oxygen or halide atom. In other embodiments the metal atom is bonded to a cyclopentadienyl compound and separately bonded to at least one ligand via a nitrogen atom. In still other embodiments the metal containing cyclopentadienyl compound comprises a nitrogen-bridged ligand.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: June 6, 2017
    Assignee: ASM IP HOLDING B.V.
    Inventors: Sean T. Barry, Yamile A. M. Wasslen, Antti H. Rahtu
  • Patent number: 9611545
    Abstract: A ZnO film production method includes: disposing a substrate on an installation base; and, while supplying chlorine gas from a chlorine gas supply source to a first raw material storing part R1 and supplying oxygen gas from a third gas supply source (oxygen gas supply source) G3 into a reaction container, controlling heating units (heaters H1, H2 and H3) with a control device CONT such that temperature T1 of the first raw material storing part R1, temperature T2 of a second raw material storing part R2 and temperature T3 of the installation base on which the substrate is disposed satisfy a relationship of T1<T2<T3. Thus, according to the production method of the present disclosure, it is possible to produce a high-quality ZnO film.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: April 4, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Song yun Kang, Yoshinao Kumagai, Akinori Koukitu
  • Patent number: 9506144
    Abstract: A method for atomic layer deposition includes providing a substrate in a reaction chamber; and performing at least one atomic layer deposition cycle to form a film on a surface of the substrate. The atomic layer deposition cycle includes passing first precursors into the reaction chamber to let first atoms included in the first precursors combine with reaction sites of the substrate; and passing second precursors into the reaction chamber to let second atoms included in the second precursors combine with the reaction sites uncombined with the first atoms or substitute at least part of the first atoms to combine with the reaction sites of the substrate. The above-mentioned method for atomic layer deposition is capable of preparing large area and uniformity of doping film without annealing process or with low temperature annealing process.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: November 29, 2016
    Assignee: National Synchrotron Radiation Research Center
    Inventors: Ching-Shun Ku, Hsin-Yi Lee
  • Patent number: 9499925
    Abstract: A group III nitride crystal substrate is provided in which a uniform distortion at a surface layer of the crystal substrate represented by a value of |d1?d2|/d2 obtained from a plane spacing d1 at the X-ray penetration depth of 0.3 ?m and a plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 1.9×10?3, and the main surface has a plane orientation inclined in the <10-10> direction at an angle equal to or greater than 10° and equal to or smaller than 80° with respect to one of (0001) and (000-1) planes of the crystal substrate. A group III nitride crystal substrate suitable for manufacturing a light emitting device with a blue shift of an emission suppressed, an epilayer-containing group III nitride crystal substrate, a semiconductor device and a method of manufacturing the same can thereby be provided.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: November 22, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Ishibashi, Yusuke Yoshizumi
  • Patent number: 9472377
    Abstract: Method and apparatus for characterizing metal oxide reduction using metal oxide films formed in an anneal chamber are disclosed. Oxygen is provided into an anneal chamber. A substrate including a metal seed layer is exposed to the oxygen and exposed to a heated substrate support in the anneal chamber to form a metal oxide of the metal seed layer. The oxidized substrate can be stored for later use or transferred to a processing chamber for reducing the metal oxide to metal. The oxidized substrates formed in this manner provide metal oxides that are repeatable, uniform, and stable. The oxidized substrate is exposed to a reducing treatment under conditions that reduce the metal oxide to metal in the form of a film integrated with the metal seed layer.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: October 18, 2016
    Assignee: Lam Research Corporation
    Inventors: Edward C. Opocensky, Tighe A. Spurlin, Jonathan D. Reid
  • Patent number: 9385033
    Abstract: A metal precursor and a method comprising decomposing a metal precursor on an integrated circuit device; and forming a metal from the metal precursor, wherein the metal precursor is selected from the group consisting of (i) a Co2(CO)6(R1C?CR2), wherein R1 and R2 are individually selected from a straight or branched monovalent hydrocarbon group have one to six carbon atoms that may be interrupted and substituted; (ii) a mononuclear cobalt carbonyl nitrosyl; (iii) a cobalt carbonyl bonded to one of a boron, indium, germanium and tin moiety; (iv) a cobalt carbonyl bonded to a mononuclear or binuclear allyl; and (v) a cobalt(II) complex comprising nitrogen-based supporting ligands.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: July 5, 2016
    Assignee: Intel Corporation
    Inventors: James M. Blackwell, Scott B. Clendenning, John J. Plombon, Patricio E. Romero
  • Patent number: 9353227
    Abstract: A method and a device produce short-chain halogenated polysilanes and/or short-chain halogenated polysilanes and halide-containing silicon by thermolytic decomposition of long-chain halogenated polysilanes. The thermolytic decomposition of long-chain halogenated polysilanes diluted with low-molecular halosilanes is carried out under an atmosphere of halosilanes, thereby ensuring the production of such products at industrial scale in a simple and cost-effective manner.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: May 31, 2016
    Assignee: Spawnt Private S.à.r.l.
    Inventors: Christian Bauch, Sven Holl, Rumen Deltschew, Javad Mohsseni, Gerd Lippold, René Towara
  • Patent number: 9334583
    Abstract: An epitaxial growth method for preventing auto-doping effect is presented. This method starts with the removal of impurities from the semiconductor substrate and the reaction chamber to be used. Then the semiconductor substrate is loaded in the cleaned reaction chamber to be pre-baked under vacuum conditions before the extraction of the dopant atoms desorbed from the surface of the semiconductor substrate. Next, under high temperature and low gas flow conditions, a first intrinsic epitaxial layer is formed on the surface of said semiconductor substrate. Following this, under low temperature and high gas flow conditions, a second epitaxial layer of required thickness is formed on the structural surface of the grown intrinsic epitaxial layer. Last, silicon wafer is unloaded after cooling. This method can prevent auto-doping effect during the epitaxial growth on semiconductor substrate and thus ensure the performance and enhance the reliability of the devices in peripheral circuit region.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: May 10, 2016
    Assignee: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCES
    Inventors: Chao Zhang, Zhitang Song, Xudong Wan, Bo Liu, Guanping Wu, Ting Zhang, Zuoya Yang, Zhifeng Xie
  • Patent number: 9275839
    Abstract: A plasma chamber for activating a process gas, including at least four legs forming a toroidal plasma channel, each leg having a cross-sectional area, and an outlet formed on one leg, the outlet having a greater cross-sectional area than the cross-sectional area of the other legs. The plasma chamber further includes an inlet for receiving the process gas and a plenum for introducing the process gas over a broad area of the leg opposing the outlet to reduce localized high plasma impedance and gas flow instability, wherein the leg opposing the outlet defines a plurality of holes for providing a helical gas rotation in the plasma channel.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: March 1, 2016
    Assignee: MKS Instruments, Inc.
    Inventors: Xing Chen, Andrew Cowe
  • Patent number: 9243329
    Abstract: A composition, reactor apparatus, method, and control system for growing epitaxial layers of group III-nitride alloys. Super-atmospheric pressure is used as a process parameter to control the epitaxial layer growth where the identity of alloy layers differ within a heterostructure stack of two or more layers.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: January 26, 2016
    Assignee: Georgia State University Research Foundation, Inc.
    Inventor: Nikolaus Dietz
  • Patent number: 9240517
    Abstract: Structures for transitioning between two layers of differing lattice parameters are disclosed. In some embodiments, the structures are in the form of a superlattice that serves as a strain relieving transition between two layers of differing lattice parameters. By controlling the properties of the superlattice, the superlattice can exhibit desirable properties such as transparency to light and lattice matching to one of the two layers of differing lattice parameters. Optoelectronic devices such as light emitting diodes including such superlattices are also disclosed.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: January 19, 2016
    Assignee: OSRAM SYLVANIA INC.
    Inventors: David W. Johnston, Richard Speer, Joseph Laski, Kailash C. Mishra
  • Patent number: 9039834
    Abstract: Non-polar (11 20) a-plane gallium nitride (GaN) films with planar surfaces are grown on (1 102) r-plane sapphire substrates by employing a low temperature nucleation layer as a buffer layer prior to a high temperature growth of the non-polar (11 20) a-plane GaN thin films.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 26, 2015
    Assignee: The Regents of the University of California
    Inventors: Michael D. Craven, James Stephen Speck
  • Publication number: 20150114282
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 30, 2015
    Applicant: SUMCO CORPORATION
    Inventors: Masayuki ISHIBASHI, John F. KRUEGER, Takayuki DOHI, Daizo HORIE, Takashi FUJIKAWA
  • Publication number: 20150107511
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 23, 2015
    Applicant: SUMCO CORPORATION
    Inventors: Masayuki ISHIBASHI, John F. KRUEGER, Takayuki DOHI, Daizo HORIE, Takashi FUJIKAWA
  • Publication number: 20150093318
    Abstract: A periodic table Group 13 metal nitride crystals grown with a non-polar or semi-polar principal surface have numerous stacking faults. The purpose of the present invention is to provide a period table Group 13 metal nitride crystal wherein the occurrence of stacking faults of this kind are suppressed. The present invention achieves the foregoing by a periodic table Group 13 metal nitride crystal being characterized in that, in a Qx direction intensity profile that includes a maximum intensity and is derived from an isointensity contour plot obtained by x-ray reciprocal lattice mapping of (100) plane of the periodic table Group 13 metal nitride crystal, a Qx width at 1/300th of peak intensity is 6×10?4 rlu or less.
    Type: Application
    Filed: September 30, 2014
    Publication date: April 2, 2015
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yuuki ENATSU, Satoru NAGAO, Shuichi KUBO, Hirotaka IKEDA, Kenji FUJITO
  • Publication number: 20150075422
    Abstract: The present invention provides an epitaxial SiC monocrystalline substrate having a high quality epitaxial film suppressed in occurrence of step bunching in epitaxial growth using a substrate with an off angle of 6° or less and a method of production of the same, that is, an epitaxial silicon carbide monocrystalline substrate comprised of a silicon carbide monocrystalline substrate with an off angle of 6° or less on which a silicon carbide monocrystalline thin film is formed, the epitaxial silicon carbide monocrystalline substrate characterized in that the silicon carbide monocrystalline thin film has a surface with a surface roughness (Ra value) of 0.5 nm or less and a method of production of the same.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 19, 2015
    Inventors: Takashi Aigo, Hiroshi Tsuge, Taizo Hoshino, Tatsuo Fujimoto, Masakasu Katsuno, Masashi Nakabayashi, Hirokatsu Yashiro
  • Patent number: 8980002
    Abstract: Methods are disclosed for growing group III-nitride semiconductor compounds with advanced buffer layer technique. In an embodiment, a method includes providing a suitable substrate in a processing chamber of a hydride vapor phase epitaxy processing system. The method includes forming an AlN buffer layer by flowing an ammonia gas into a growth zone of the processing chamber, flowing an aluminum halide containing precursor to the growth zone and at the same time flowing additional hydrogen halide or halogen gas into the growth zone of the processing chamber. The additional hydrogen halide or halogen gas that is flowed into the growth zone during buffer layer deposition suppresses homogeneous AlN particle formation. The hydrogen halide or halogen gas may continue flowing for a time period while the flow of the aluminum halide containing precursor is turned off.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Yuriy Melnik, Lu Chen, Hidehiro Kojiri
  • Publication number: 20150059641
    Abstract: The present disclosure generally relates to systems and methods for growing group III-V nitride crystals. In particular the systems and methods include diffusing constituent species of the crystals through a porous body composed of the constituent species, where the species freely nucleate to grow large nitride crystals.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 5, 2015
    Inventors: Jason Schmitt, Peng Lu, Jeremy Jones
  • Publication number: 20150064098
    Abstract: The present invention provides a process for producing a two-dimensional nanomaterial by chemical vapour deposition (CVD), the process comprising contacting a substrate in a reaction chamber with a first flow which contains hydrogen and a second flow which contains a precursor for said material, wherein the contacting takes place under conditions such that the precursor reacts in the chamber to form said material on a surface of the substrate, wherein the ratio of the flow rate of the first flow to the flow rate of the second flow is at least 5:1. Two-dimensional nanomaterials obtainable by said process are also provided, as well as devices comprising said nanomaterials.
    Type: Application
    Filed: March 28, 2013
    Publication date: March 5, 2015
    Applicant: Isis Innovation Limited
    Inventors: Nicole Grobert, Adrian Timothy Murdock, Antal Adolf Koós
  • Publication number: 20150050482
    Abstract: Method for synthesizing large single-crystal graphene films by suppressing evaporative substrate loss in chemical vapor deposition, and graphene films synthesized thereby. The substrate may be configured as a tube prior to exposure to an organic compound at high temperature. Low flow rate of the gaseous carbon source may be employed, and this flow rate may be increased after an initial nucleation period.
    Type: Application
    Filed: August 14, 2013
    Publication date: February 19, 2015
    Inventors: Rodney S. Ruoff, Shanshan Chen
  • Patent number: 8945304
    Abstract: A system and method A method of growing an elongate nanoelement from a growth surface includes: a) cleaning a growth surface on a base element; b) providing an ultrahigh vacuum reaction environment over the cleaned growth surface; c) generating a reactive gas of an atomic material to be used in forming the nanoelement; d) projecting a stream of the reactive gas at the growth surface within the reactive environment while maintaining a vacuum of at most 1×10?4 Pascal; e) growing the elongate nanoelement from the growth surface within the environment while maintaining the pressure of step c); f) after a desired length of nanoelement is attained within the environment, stopping direction of reactive gas into the environment; and g) returning the environment to an ultrahigh vacuum condition.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: February 3, 2015
    Assignee: The Board of Regents of the Nevada System of Higher Education on behalf of the University of Nevada, Las Vegas University of Nevada
    Inventors: Biswajit Das, Myung B. Lee
  • Patent number: 8945302
    Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Mosaic Crystals Ltd.
    Inventor: Moshe Einav
  • Patent number: 8936681
    Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 20, 2015
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Publication number: 20150013595
    Abstract: A silicon carbide growth method for growing a silicon carbide crystal on a substrate in a hot wall reaction chamber heated to a temperature between 1600° C. and 2000° C. Process gases enter the reaction chamber utilizing at least a primary gas flow, a secondary gas flow, and a shower gas flow. The shower gas flow is fed substantially perpendicularly to the primary and secondary gas flows and is directed towards the substrate. The primary and secondary gas flows are oriented substantially parallel to the surface of the substrate. A silicon precursor gas is entered by the primary gas flow. A hydrocarbon precursor gas is entered in at least one of the primary gas flow, the secondary gas flow, or the shower gas flow. Hydrogen is entered primarily in the secondary flow and the shower head flow. A CVD reactor chamber for use in processing the method.
    Type: Application
    Filed: January 29, 2013
    Publication date: January 15, 2015
    Inventors: Erik Janzén, Olof Kordina
  • Publication number: 20150013594
    Abstract: A vapor phase growth apparatus of an embodiment includes: a reaction chamber; a first gas supply path configured to supply a first process gas including organic metal and a carrier gas into the reaction chamber; a second gas supply path configured to supply a second process gas including ammonia into the reaction chamber; a first carrier gas supply path configured to supply a first carrier gas of a hydrogen or inert gas into the first gas supply path while being connected to the first gas supply path and including a first mass flow controller; and a second carrier gas supply path configured to supply a second carrier gas of a hydrogen or inert gas different from the first carrier gas into the first gas supply path while being connected to the first gas supply path and including a second mass flow controller.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 15, 2015
    Applicant: NuFlare Technology, Inc.
    Inventors: Takumi YAMADA, Yuusuke SATO