With Significant Flow Manipulation Or Condition, Other Than Merely Specifying The Components Or Their Sequence Or Both Patents (Class 117/102)
  • Patent number: 7141115
    Abstract: A method of fabricating a high-quality relaxed SiGe-on-insulator substrate material is provided in which a prefabricated silicon-on-insulator substrate is first exposed to an unstrained Ge-containing source and then heated (annealed/oxidized) to cause Ge diffusion and thermal mixing of Ge within a single-crystal Si-containing layer of the prefabricated silicon-on-insulator substrate. The unstrained Ge-containing source can comprise a solid Ge-containing source, a gaseous Ge-containing source, or ions of Ge.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: November 28, 2006
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Keith E. Fogel, Devendra K. Sadana
  • Patent number: 7128787
    Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first precursor gas is flowed to the substrate within the atomic layer deposition chamber effective to form a first monolayer on the substrate. After forming the first monolayer, a reactive intermediate gas is flowed to the substrate within the deposition chamber. The reactive intermediate gas is capable of reaction with an intermediate reaction by-product from the first precursor flowing under conditions of the reactive intermediate gas flowing. After flowing the reactive intermediate gas, a second precursor gas is flowed to the substrate within the deposition chamber effective to form a second monolayer on the first monolayer. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: October 31, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Paul J. Castovillo, Cem Basceri, Garo J. Derderian, Gurtej S. Sandhu
  • Patent number: 7128785
    Abstract: The invention relates to a device and to a method for depositing especially crystalline layers from the gas phase onto especially crystalline substrates. The device comprises a heated reaction chamber with a substrate support that receives at least one substrate; one or more heated sources where a gaseous halide is formed by chemical reaction of a halogen, especially HCl, fed to the source together with a substrate gas, and a metal, for example GA, In, Al associated with the source, which is transported through a gas inlet section to a substrate supported by the substrate support; and a hydride supply for supplying a hydride, especially NH3, AsH3 or PH3 into the reaction chamber. A plurality of rotationally driven substrate supports is disposed in an annular arrangement on a substrate support carrier, the sources being disposed in the center of said substrate carrier.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: October 31, 2006
    Assignee: Aixtron AG
    Inventors: Johannes Kaeppeler, Michael Heuken, Rainer Beccard, Gerhard Karl Strauch
  • Patent number: 7105054
    Abstract: A method and an apparatus for growing a thin film onto a substrate by the ALD process. The apparatus comprises a reaction chamber into which the substrate can be disposed; a plurality of inlet channels communicating with said reaction chamber, said inlet channels being suited for feeding the reactants employed in a thin-film growth process in the form of vapor-phase pulses into said reaction chamber; at least one outlet channel communicating with said reaction chamber, said outlet channel being suited for the outflow of reaction products and excess amounts of reactants from said reaction space; and a pre-reaction chamber arranged immediately upstream of the reaction chamber, said pre-reaction chamber forming a first reaction zone, in which the reactants of successive vapor-phase pulses can be reacted with each other in the vapor phase to form a solid product, whereas said reaction chamber forming a second reaction zone can be operated under conditions conducive to ALD growth of a thin film.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: September 12, 2006
    Assignee: ASM International N.V.
    Inventor: Sven Lindfors
  • Patent number: 7094289
    Abstract: A method for manufacturing a highly-crystallized oxide powder, wherein an oxide powder is produced by ejecting a starting material powder containing at least one metal element and/or semimetal element, which will become a constituent component of the oxide, into a reaction vessel together with a carrier gas through a nozzle; and heating the starting material powder at a temperature higher than the decomposition temperature or reaction temperature thereof and not lower than (Tm/2)° C., where Tm° C. stands for a melting point of the oxide, in a state in which the starting material powder is dispersed in a gas phase at a concentration of not higher than 10 g/L. In the above method, the starting material powder may be mixed and dispersed in the carrier gas by using a dispersing machine prior to being ejected into the reaction vessel through a nozzle.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: August 22, 2006
    Assignee: Shoei Chemical Inc.
    Inventors: Yuji Akimoto, Masami Nakamura, Kazuro Nagashima
  • Patent number: 7083679
    Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: August 1, 2006
    Assignee: Nichia Corporation
    Inventors: Hiroyuki Kiyoku, Shuji Nakamura, Tokuya Kozaki, Naruhito Iwasa, Kazuyuki Chocho
  • Patent number: 7084049
    Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: August 1, 2006
    Assignees: Osaka Prefecture, Hosiden Corporation
    Inventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
  • Patent number: 7077902
    Abstract: An aluminum-containing material deposition method includes depositing a first precursor on a substrate in the substantial absence of a second precursor. The first precursor can contain a chelate of Al(NR1R2)x(NR3(CH2)zNR4R5)y or Al(NR1R2)x(NR3(CH2)zOR4)y; where x is 0, 1, or 2; y is 3?x; z is an integer 2 to 8; and R1 to R5 are independently selected from among hydrocarbyl groups containing 1 to 10 carbon atoms with silicon optionally substituted for one or more carbon atoms. The method includes depositing the second precursor on the first deposited precursor, the second precursor containing a nitrogen source or an oxidant. A deposition product of the first and second precursors includes at least one of an aluminum nitride or an aluminum oxide. The deposition method can be atomic layer deposition where the first and second precursors are chemisorbed or reacted as monolayers. The first precursor can further be non-pyrophoric.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: July 18, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7060132
    Abstract: A method and apparatus for growing a thin film onto a substrate is disclosed. According to one embodiment, a plurality of substrates, each having a width and a length, are placed in a reaction space and the substrates are subjected to surface reactions of vapor-phase reactants according to the ALD method to form a thin film on the surfaces of the substrates. The reaction space comprises an elongated gas channel having a cross-section with a width greater that the height and which has a length which is at least 2 times greater than the length of one substrate in the direction of the gas flow in the channel, the channel having a folded configuration with at least one approximately 180 degree turn in the direction of the gas flow.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: June 13, 2006
    Assignee: ASM International N.V.
    Inventors: Sven Lindfors, Ivo Raaijmakers
  • Patent number: 7041170
    Abstract: A method for minimizing particle generation during deposition of a graded Si1-xGex layer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded Si1-xGex layer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cm2 on the substrate.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: May 9, 2006
    Assignee: AmberWave Systems Corporation
    Inventors: Eugene A. Fitzgerald, Richard Westhoff, Matthew T. Currie, Christopher J. Vineis, Thomas A. Langdo
  • Patent number: 7037372
    Abstract: The present invention relates to the production of thin films. In particular, the invention concerns a method of growing a thin film onto a substrate, in which method the substrate is placed in a reaction chamber and is subjected to surface reactions of a plurality of vapor-phase reactants according to the ALD method. The present invention is based on replacing the mechanical valves conventionally used for regulating the pulsing of the reactants, which valves tend to wear and intrude metallic particles into the process flow, with an improved precursor dosing system. The invention is characterized by choking the reactant flow between the vapour-phase pulses while still allowing a minimum flow of said reactant, and redirecting the reactant at these times to an other destination than the reaction chamber. The redirection is performed with an inactive gas, which is also used for ventilating the reaction chamber between the vapour-phase pulses.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: May 2, 2006
    Assignee: ASM International N.V.
    Inventors: Sven Lindfors, Pekka T. Soininen
  • Patent number: 7033436
    Abstract: Methods of crystal growth for semiconductor materials, such as nitride semiconductors, and methods of manufacturing semiconductor devices are provided. The method of crystal growth includes forming a number of island crystal regions during a first crystal growth phase and continuing growth of the island crystal regions during a second crystal growth phase while bonding of boundaries of the island crystal regions occurs. The second crystal growth phase can include a crystal growth rate that is higher than the crystal growth rate of the first crystal growth phase and/or a temperature that is lower than the first crystal growth phase. This can reduce the density of dislocations, thereby improving the performance and service life of a semiconductor device which is formed on a nitride semiconductor made in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: April 25, 2006
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7018469
    Abstract: A substrate is positioned within a deposition chamber. Trimethylsilane is flowed to the chamber and a first inert gas is flowed to the chamber under conditions effective to chemisorb a first species monolayer comprising silicon onto the substrate. The first inert gas is flowed at a first rate. After forming the first species monolayer, an oxidant is flowed to the chamber and a second inert gas is flowed to the chamber under conditions effective to react the oxidant with the chemisorbed first species and form a monolayer comprising silicon dioxide on the substrate. The second inert gas flowing is at a second rate which is less than the first rate. The a) trimethylsilane and first inert gas flowing and the b) oxidant and second inert gas flowing are successively repeated effective to form a silicon dioxide comprising layer on the substrate. Other implementations and aspects are contemplated.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: March 28, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Li Li, Weimin Li, Gurtej S. Sandhu
  • Patent number: 7014710
    Abstract: A method of growing single crystal Gallium Nitride on silicon substrate is disclosed including: removing oxide layer of silicon substrate, growing buffer layer of Silicon Carbon Nitride (SiCN), and growing single crystalline Gallium Nitride thin film, characterized in that a buffer layer of SiCN is grown to avoid lattice mismatch which appears when Gallium Nitride is grown directly on silicon substrate, and that Rapid Thermal Chemical Vapor Deposition is adopted to grow SiCN buffer layer, and that Metalorganic Chemical Vapor Deposition is adopted to grow single crystalline GaN thin film.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: March 21, 2006
    Assignee: National Cheng-Kung University
    Inventors: Yean Kuen Fang, Wen Rong Chang, Shyh Fann Ting, Hon Kuan, Cheng Nan Chang
  • Patent number: 6972050
    Abstract: The invention relates to a method for depositing especially, crystalline layers onto especially, crystalline substrates, in a process chamber of a CVD reactor. At least one first and one second reaction gas are each led into a gas outlet area in an input area of the process chamber, by means of separate delivery lines. The gas outlet areas lie one above the other between the floor of the process chamber and the cover of the process chamber and have different heights. The first reaction gas flows out of the gas outlet area that is situated next to the process chamber floor, optionally together with a carrier gas. A carrier gas is added at least to the second reaction gas, which flows out of the gas outlet area lying further away from the process chamber floor.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: December 6, 2005
    Assignee: Aixtron AG
    Inventors: Michael Bremser, Martin Dauelsberg, Gerhard Karl Strauch
  • Patent number: 6962624
    Abstract: The invention relates to a method and a device for depositing especially, organic layers. In a heated reactor, a non-gaseous starting material that is stored in a source in the form of a container is transported from said source to a substrate by a carrier gas in gaseous form and is deposited on said substrate. The rate of production of the gaseous starting material by the source is unpredictable due to a heat input that cannot be regulated in a reproducible manner and due to cooling resulting from the carrier gas. The invention therefore provides that the preheated carrier gas washes through the starting material from bottom to top, the starting material being kept essentially isothermal in relation to the carrier gas by the heated container walls.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 8, 2005
    Assignee: Aixtron AG
    Inventors: Holger Jürgensen, Gerhard Karl Strauch, Markus Schwambera
  • Patent number: 6942731
    Abstract: The invention relates to a method for improving the efficiency of epitaxially grown quantum dot semiconductor components having at least one quantum dot layer. The efficiency of semiconductor components containing an active medium consisting of quantum dots is often significantly below the theoretically possible values. The inventive method enables the efficiency of the relevant component to be clearly increased without substantially changing the growth parameters of the various epitaxial layers. In order to improve the efficiency of the component, the crystal is morphologically changed when the growth of the component is interrupted at the point in the overall process at which the quantum dots of a layer have just been covered. The growth front is smoothed at the same time, leading to, for example, a reduction in waveguide loss as the thickness of the waveguide is more homogeneous if the relevant component has one such waveguide.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: September 13, 2005
    Assignee: Technische Universitaet Berlin
    Inventors: Roman Sellin, Nikolai N. Ledenstov, Dieter Bimberg
  • Patent number: 6936103
    Abstract: A method of suppression of Indium carry-over in the MOCVD growth of thin InGaAsP quantum wells, with low Indium content, on top of thick GaInAsP, with high Indium content. These quantum wells are essential in the stimulated emission of 808 to 880 nm phosphorous-based laser structures. The Indium carryover effect is larger in large multi wafer reactors and therefore is this invention focused on large multiwafer MOCVD reactors. This invention improves the quality of the quantum well, as measured by photo-luminescence spectra and uniformity of wavelength radiation.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: August 30, 2005
    Assignee: Spectra-Physics, Inc.
    Inventor: Frank Reinhardt
  • Patent number: 6932866
    Abstract: The invention relates to a method and a device for depositing especially crystalline layers on especially crystalline substrates in a process chamber of a reactor housing having a water-cooled wall. The floor of said process chamber is heated. At least one reaction gas as a process gas, and hydrogen as a carrier gas, are centrally introduced into the process chamber, and are extracted by a gas evacuation ring surrounding the process chamber. A flush gas flows between the cover of the reactor and the cover of the process chamber. Said flush gas and the flush gas which flushes the area between the reactor wall and the gas evacuation ring are introduced into the outer region of the process chamber, via a gap between the cover of the reactor and the gas evacuation ring which can be lowered for loading the process chamber, in order to be sucked through the openings in the gas evacuation ring with the process gas.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: August 23, 2005
    Assignee: Aixtron AG
    Inventor: Martin Dauelsberg
  • Patent number: 6923860
    Abstract: The present invention is a tunneling magnetoresistive (TMR) stack configured to operate in a current-perpendicular-to-plane (CPP) mode, wherein a sense current flows substantially perpendicular to a longitudinal plane of the barrier layer. The TMR stack has a plurality of layers including a barrier layer. The barrier layer may made of titanium and may be oxidized with an aggressive oxidation method, such as with UV illumination, for a predetermined time period. The barrier layer may be formed on a first ferromagnetic layer before oxidation, and then a second ferromagnetic layer may be formed on the oxidized barrier layer. The TMR stack exhibits an increased magnetoresistive (MR) ratio, a lower RA product, a higher breakdown voltage of the TMR stack, and greater thermal stability.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: August 2, 2005
    Assignee: Seagate Technology LLC
    Inventors: Brian W. Karr, Mark T. Kief, Janusz J. Nowak
  • Patent number: 6902620
    Abstract: Atomic layer deposition systems and methods are disclosed utilizing a multi-wafer sequential processing chamber. The process gases are sequentially rotated among the wafer stations to deposit a portion of a total deposition thickness on each wafer at each station. A rapid rotary switching of the process gases eliminates having to divert the process gases to a system vent and provides for atomic layer film growth sufficient for high-volume production applications. Conventional chemical vapor deposition can also be performed concurrently with atomic layer deposition within the multi-wafer sequential processing chamber.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: June 7, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Thomas R. Omstead, Karl B. Levy
  • Patent number: 6896730
    Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A fixed volume first precursor gas charge is provided within a gas flow path to the deposition chamber. A fixed volume purge gas charge is provided within the gas flow path serially upstream of the first precursor gas charge. The first precursor gas charge and the purge gas charge are serially flowed along the gas flow path to the substrate within the deposition chamber effective to form a monolayer on the substrate and purge at least some of the first precursor gas from the substrate. Apparatus are also disclosed.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: May 24, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Cem Basceri, Gurtej S. Sandhu, Demetrius Sarigiannis
  • Patent number: 6893503
    Abstract: A method of producing a semiconductor device which removes catalyst elements from a silicon-containing semiconductor film while maintaining the advantage of low temperature process is provided. The method comprises the steps of: forming an amorphous semiconductor film containing silicon on a glass substrate to crystallize it by using a catalyst element; selectively introducing into the amorphous semiconductor film an impurity belonging to Group 15 to form gettering regions and regions to be gettered; and causing the catalyst element in the silicon film to move to the gettering regions by heat treatment. Through the gettering process, the crystalline silicon film can be obtained in which the concentration of nickel contained therein is sufficiently reduced.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: May 17, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Shunpei Yamazaki, Setsuo Nakajima, Hisashi Ohtani
  • Patent number: 6884291
    Abstract: An optical semiconductor device operable in a 0.6 ?m band includes an active layer of GaInNP sandwiched by a pair of GaInP layers each having a thickness of about 2 molecular layers or less.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: April 26, 2005
    Assignee: Ricoh Company, Ltd.
    Inventors: Naoto Jikutani, Shunichi Sato, Takashi Takahashi
  • Patent number: 6881263
    Abstract: The present invention relates to the production of thin films. In particular, the invention concerns a method of growing a thin film onto a substrate, in which method the substrate is placed in a reaction chamber and is subjected to surface reactions of a plurality of vapor-phase reactants according to the ALD method. The present invention is based on replacing the mechanical valves conventionally used for regulating the pulsing of the reactants, which valves tend to wear and intrude metallic particles into the process flow, with an improved precursor dosing system. The invention is characterized by choking the reactant flow between the vapour-phase pulses while still allowing a minimum flow of said reactant, and redirecting the reactant at these times to an other destination than the reaction chamber. The redirection is performed with an inactive gas, which is also used for ventilating the reaction chamber between the vapour-phase pulses.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: April 19, 2005
    Assignee: ASM Microchemistry Oy
    Inventors: Sven Lindfors, Pekka T. Soininen
  • Patent number: 6875272
    Abstract: In a method for growing a GaN based compound semiconductor on a front surface of a substrate to obtain the GaN based compound semiconductor crystal in one body, because the gas for reducing and decomposing the substrate is supplied to the rear surface of the substrate and a heat treatment is carried out in a gas atmosphere in which the nitrogen partial pressure is not less than a predetermined value, in order to remove the substrate, it can be prevented that cracks are caused in the crystal, or fracture or warp is caused by causing strain of the GaN based compound semiconductor crystal in a cooling step.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: April 5, 2005
    Assignee: Nikko Materials Co., Ltd.
    Inventors: Keiji Kainosho, Shinichi Sasaki
  • Patent number: 6869481
    Abstract: A method and a device for regulating a pressure in an epitaxy reactor, wherein the epitaxy reactor has a wafer handling chamber WHC, a process chamber PC, and a gate valve GV connecting the two chambers. The wafer handling chamber is continuously purged with inert gas. The pressure difference between the wafer handling chamber and the process chamber is measured, and the resulting measurement signal is used in a control circuit to regulate the pressure in the wafer handling chamber. In this case the pressure in the wafer handling chamber is reduced if the pressure difference is above a predetermined value and the pressure in the wafer handling chamber is increased if the pressure difference is below a predetermined value. The predetermined pressure difference is defined as a pressure being between 5 and 500 PA. The WHC and the PC each have a gas discharge line and a gas input line.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: March 22, 2005
    Assignee: Siltronic AG
    Inventors: Anton Schatzeder, Georg Brenninger
  • Patent number: 6863727
    Abstract: This invention concerns a method for depositing transition metal nitride thin films by an Atomic Layer Deposition (ALD) type process. According to the method vapor-phase pulse of a source material, a reducing agent capable of reducing metal source material, and a nitrogen source material capable of reacting with the reduced metal source material are alternately and sequentially fed into a reaction space and contacted with the substrate. According to the invention as the reducing agent is used a boron compound which is capable of forming gaseous reaction byproducts when reacting with the metal source material.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: March 8, 2005
    Assignee: ASM International N.V.
    Inventors: Kai-Erik Elers, Suvi Päivikki Haukka, Ville Antero Saanila, Sari Johanna Kaipio, Pekka Juha Soininen
  • Patent number: 6863726
    Abstract: A vapor phase growth method of an oxide dielectric film for forming an oxide dielectric film having a perovskite crystal structure expressed by ABO3 on a substrate according to the present invention includes a first step of sequentially and alternately supplying an A-site layer element material and a B-site layer element material to grow an atomic layer on the substrate to form an early layer or early core, at a first substrate temperature, and a second step of raising the temperature to a second substrate temperature that is higher than the first substrate temperature to crystallize the early layer or early core formed in the first step and simultaneously supplying both the A-site layer element material and the B-site layer element material to form an ABO3 film.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: March 8, 2005
    Assignee: NEC Electronics Corporation
    Inventor: Takashi Hase
  • Patent number: 6860943
    Abstract: Disclosed is a method for producing a Group III nitride compound semiconductor including a pit formation step in which a portion of an uppermost layer of a first Group III nitride compound semiconductor layer containing one or more sub-layers, the portion containing lattice defects, is subjected to treatment by use of a solution or vapor which corrodes the portion more easily than it corrodes a portion of the uppermost layer containing no lattice defects, the first Group III nitride compound semiconductor layer not being accompanied by a substrate therefor as a result of removal therefrom, or being accompanied by a substrate such that the semiconductor layer is formed with or without intervention of a buffer layer provided on the substrate; and a lateral growth step of growing a second Group III nitride compound semiconductor layer through vertical and lateral epitaxial overgrowth around nuclei as seeds for crystal growth which are on flat portions of the uppermost layer of the first Group III nitride compoun
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: March 1, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Hiroshi Watanabe
  • Patent number: 6860138
    Abstract: A method of preventing the scrapping of semiconductor substrates due to improper deposition of thin films in a thin film vaporization system is disclosed. This is accomplished by providing a method of self-calibrating and testing the flow of liquid precursors in the vaporization system prior to the start of the deposition process. The vaporization of the liquid precursor in the deposition chamber and the concomitant pressure change in the chamber are correlated. This correlation is then used as a real time monitoring mechanism for self-calibrating and testing the flow of liquid precursors through the vaporization system. That the pressure change due to vaporization in the chamber is used as the key parameter, the thin film deposition is hence monitored by that parameter which directly predicts the film deposition characteristics. Consequently, each thin film run is assured of a successful run.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: March 1, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chung-Ju Hsieh, Hsi-Wen Liao, Kai-Hsin Liu, Tsu-Kuang Hou
  • Patent number: 6858081
    Abstract: In a selective growth method, growth interruption is performed at the time of selective growth of a crystal layer on a substrate. Even if the thickness distribution of the crystal layer becomes non-uniform at the time of growth of the crystal layer, the non-uniformity of the thickness distribution of the crystal layer can be corrected by inserting the growth interruption. As a result of growth interruption, an etching rate at a thick portion becomes higher than that at a thin portion, to eliminate the difference in thickness between the thick portion and the thin portion, thereby solving the problem associated with degradation of characteristics due to a variation in thickness of the crystal layer, for example, an active layer. The selective growth method is applied to fabrication of a semiconductor light emitting device including an active layer as a crystal layer formed on a crystal layer having a three-dimensional shape by selective growth.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: February 22, 2005
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama
  • Patent number: 6852160
    Abstract: The present invention relates to oxides on suitable substrates, as converted from nitride precursors.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: February 8, 2005
    Assignee: Applied Thin Films, Inc.
    Inventors: Sankar Sambasivan, Scott A. Barnett, Ilwon Kim, John Rechner
  • Patent number: 6849241
    Abstract: The invention relates to a device and method for depositing one or more layers onto at least one substrate placed inside a reaction chamber. The layers are deposited while using a liquid or solid starting material for one of the reaction gases utilized, which are fed via a gas admission unit to the reaction chamber where they condense or epitaxially grow on the substrate. The gas admission unit comprises a multitude of buffer volumes in which the reaction gasses enter separate of one another, and exit through closely arranged outlet openings while also being spatially separate of one another. The temperature of reaction gases is moderated while passing through the gas admission unit.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: February 1, 2005
    Assignee: Aixtron AG.
    Inventors: Martin Dauelsberg, Marcus Schumacher, Holger Juergensen, Gerd Strauch, Piotr Strzyzewski
  • Patent number: 6849122
    Abstract: A CVD method deposits conformal metal layers on small features of a substrate surface. The method includes three principal operations: depositing a thin conformal layer of precursor over some or all of the substrate surface; oxidizing the precursor to convert it to a conformal layer of metal oxide; and reducing some or all of the metal oxide to convert it to a conformal layer of the metal itself. The conformal layer of precursor may form a “monolayer” on the substrate surface. Examples of metals for deposition include copper, cobalt, ruthenium, indium, and rhodium.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: February 1, 2005
    Assignee: Novellus Systems, Inc.
    Inventor: James A. Fair
  • Patent number: 6841002
    Abstract: Carbon nanotubes are formed on a surface of a substrate using a plasma chemical deposition process. After the nanotubes have been grown, a post-treatment step is performed on the newly formed nanotube structures. The post-treatment removes graphite and other carbon particles from the walls of the grown nanotubes and controls the thickness of the nanotube layer. The post-treatment is performed with the plasma at the same substrate temperature. For the post-treatment, the hydrogen containing gas is used as a plasma source gas. During the transition from the nanotube growth step to the post-treatment step, the pressure in the plasma process chamber is stabilized with the aforementioned purifying gas without shutting off the plasma in the chamber. This eliminates the need to purge and evacuate the plasma process chamber.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: January 11, 2005
    Assignee: cDream Display Corporation
    Inventors: Sung Gu Kang, Craig Bae
  • Patent number: 6841003
    Abstract: Carbon nanotubes are formed on a surface of a substrate using a plasma chemical deposition process. After the nanotubes have been grown, a purification step is performed on the newly formed nanotube structures. The purification removes graphite and other carbon particles from the walls of the grown nanotubes and controls the thickness of the nanotube layer. The purification is performed with the plasma at the same substrate temperature. For the purification, the hydrogen containing gas added as an additive to the source gas for the plasma chemical deposition is used as the plasma source gas. Because the source gas for the purification plasma is added as an additive to the source gas for the chemical plasma deposition, the grown carbon nanotubes are purified by reacting with the continuous plasma which is sustained in the plasma process chamber. This eliminates the need to purge and evacuate the plasma process chamber as well as to stabilize the pressure with the purification plasma source gas.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: January 11, 2005
    Assignee: cDream Display Corporation
    Inventors: Sung Gu Kang, Craig Bae
  • Patent number: 6828218
    Abstract: The present invention provides a method of forming a thin film using atomic layer deposition (ALD). An ALD reactor having a single reaction space is provided. A batch of substrates is concurrently loaded into the single reaction space of the ALD reactor. Then, a gas containing reactants is introduced into the single reaction space, and a portion of the reactants is chemisorbed on top surfaces of the batch of substrates within the single reaction space. Non-chemically adsorbed reactants are then removed from the single reaction space. In accordance with one embodiment of the present invention, after introducing the gas containing reactants, non-chemically adsorbed reactants are diluted in the single reaction space to facilitate the removal of non-chemically adsorbed reactants.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: December 7, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong-Kwan Kim, Young-Wook Park, Seung-Hwan Lee
  • Patent number: 6821340
    Abstract: To provide a method of manufacturing silicon carbide by forming silicon carbide on a substrate surface from an atmosphere containing a silicon carbide feedstock gas comprising at least a silicon source gas and a carbon source gas under condition 1 or 2 below: Condition 1: the partial pressure ps of silicon source gas is constant (with ps>0), the partial pressure of carbon source gas consists of a state pc1 and a state pc2 that are repeated in alternating fashion, wherein pc1 and pc2 denote partial pressures of carbon source gas, pc1>pc2, and pc1/ps falls within a range of 1-10 times the attachment coefficient ratio (Ss/Sc), pc2/ps falls within a range of less than one time Ss/Sc; Condition 2: the partial pressure pc of carbon source gas is constant (with pc>0), the partial pressure of silicon source gas consists of a state ps1 and a state ps2 that are repeated in alternating fashion, wherein ps1 and ps2 denote partial pressures of silicon source gas, ps1<ps2, and pc/ps1 falls within a range of 1
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: November 23, 2004
    Assignee: Hoya Corporation
    Inventors: Hiroyuki Nagasawa, Takamitsu Kawahara, Kuniaki Yagi
  • Patent number: 6810897
    Abstract: To provide a process gas supply mechanism for ALCVD systems that enables the high speed switching of process gases without accompanying particulate contamination of the treatment substrate. The ALCVD system is provided with a CVD treatment section and a process gas supply section. The process gas supply section contains a reactant gas line and a carrier gas line; these are combined to form a joint flow line. A vent line is connected to the reactant gas line upstream from the joint flow position. A stop valve SV and a needle valve NV are disposed in the vent line. This needle valve NV functions as a setting means in order to set the flow rate of the gas flowing in the vent line. The stop valve SV is driven through repetitive switching operations by a drive control element, thereby effecting supply and nonsupply of the reactant gas.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: November 2, 2004
    Assignee: L'Air Liquide, Societe Anonyme a Directoire et Conseil de Surveillance pour l'Etude et l'Exploitation des Procedes Georges Claude
    Inventors: Jean-Marc Girard, Takako Kimura
  • Patent number: 6783590
    Abstract: A method of growing a thin film onto a substrate placed in a reaction chamber according to the ALD method by subjecting the substrate to alternate and successive surface reactions. The method includes providing a first reactant source and providing an inactive gas source. A first reactant is fed from the first reactant source in the form of repeated alternating pulses to a reaction chamber via a first conduit. The first reactant is allowed to react with the surface of the substrate in the reaction chamber. Inactive gas is fed from the inactive gas source into the first conduit via a second conduit that is connected to the first conduit at a first connection point so as to create a gas phase barrier between the repeated alternating pulses of the first reactant entering the reaction chamber. The inactive gas is withdrawn from said first conduit via a third conduit connected to the first conduit at a second connection point.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: August 31, 2004
    Assignee: ASM International N.V.
    Inventors: Sven Lindfors, Pekka T. Soininen
  • Patent number: 6780241
    Abstract: The present invention provides methods of manufacturing and integrating optical devices. In one embodiment, a method of integrating an optical device may include forming a first device over a substrate, and forming a second device over the substrate and adjacent the first device with a deposition gas having an etchant selective to a deposited component of the deposition gas.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: August 24, 2004
    Assignee: TriQuint Technology Holding Co.
    Inventors: Abdallah Ougazzaden, Justin Larry Peticolas, Jr., Andrei Sirenko
  • Patent number: 6773507
    Abstract: Method and apparatus for depositing layers by atomic layer deposition. A virtual shower curtain is established between the substrate support and chamber to minimize the volume in which the reactants are distributed. A showerhead may be used to allow closer placement of the substrate thereto, further reducing the reaction volume. Zero dead space volume valves with close placement to the chamber lid and fast cycle times also improve the cycle times of the process.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: August 10, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Ravi Jallepally, Shih-Hung Li, Alain Duboust, Jun Zhao, Liang-Yuh Chen, Daniel A. Carl
  • Patent number: 6767402
    Abstract: A vaporizing and supplying method for controlling a liquid CVD material in flow rate with liquid flow rate controllers, supplying a vaporizer with the material, vaporizing the same, and supplying a semiconductor manufacturing apparatus with the vaporized material, which includes installing in parallel, a plurality of liquid flow rate controllers, preferably each having a different controllable range of flow rate, and supplying the vaporizer with the material at a variable flow rate thereof by altering the single use of any of the controllers to the simultaneous use of a plurality thereof or vice versa, and/or switching any of the controllers one after another.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: July 27, 2004
    Assignee: Japan Pionics Co., Ltd.
    Inventors: Yukichi Takamatsu, Takeo Yoneyama, Mitsuhiro Iwata, Koji Kiriyama, Kiichirou Araya
  • Patent number: 6764546
    Abstract: An improved apparatus and method for substrate layer deposition in which substrate layers are grown by carrier gas delivery of sequential pulses of reactants to the substrate surface. At least one of the reactants comprises excited species, e.g., radicals. In a specific embodiment, the apparatus of this invention provides sequential repeated pulses of reactants in a flow of carrier gas for reaction at a substrate surface. The reactant pulses are delivered with sufficient intervening delay times to minimize undesirable reaction between reactants in adjacent pulses in the gas phase or undesired uncontrolled reactions on the substrate surface.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: July 20, 2004
    Assignee: ASM International N.V.
    Inventor: Ivo Raaijmakers
  • Patent number: 6730164
    Abstract: A method of forming (and apparatus for forming) a layer, such as a strontium titanate, barium titanate, or barium-strontium titanate layer, on a substrate by employing a vapor deposition method, particularly a multi-cycle atomic layer deposition process.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Stefan Uhlenbrock
  • Patent number: 6730163
    Abstract: An aluminum-containing material deposition method includes depositing a first precursor on a substrate in the substantial absence of a second precursor. The first precursor can contain a chelate of Al(NR1R2)x(NR3(CH2)zNR4R5)y or Al(NR1R2)x(NR3(CH2)zOR4)y; where x is 0, 1, or 2; y is 3−x; z is an integer 2 to 8; and R1 to R5 are independently selected from among hydrocarbyl groups containing 1 to 10 carbon atoms with silicon optionally substituted for one or more carbon atoms. The method includes depositing the second precursor on the first deposited precursor, the second precursor containing a nitrogen source or an oxidant. A deposition product of the first and second precursors includes at least one of an aluminum nitride or an aluminum oxide. The deposition method can be atomic layer deposition where the first and second precursors are chemisorbed or reacted as monolayers. The first precursor can further be non-pyrophoric.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 6716284
    Abstract: An apparatus and process for atomic layer deposition that minimizes mixing of the chemicals and reactive gases is disclosed. The first precursor and second precursor are only mixed with other chemicals and reactive gases when and where desired by installing and monitoring a dispensing fore-line. Also, independent and dedicated chamber outlets, isolation valves, exhaust fore-lines, and exhaust pumps are provided that are activated for the specific gas when needed.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: April 6, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Philip H. Campbell, David J. Kubista
  • Publication number: 20040055530
    Abstract: A micro electron gun that is capable of extracting electrons from a semiconductor utilizing a quantum size effect and that can be mounted individually for each of pixels is disclosed, as well as a picture display apparatus using such electron guns which is high in quantum efficiency, of high brightness and thin, as well as methods of manufacture thereof. Conduction electrons from a n-type semiconductor substrate (2) are accelerated under an electric field through a layer or layers (4) of quantum size effect micro particles (3) formed on surfaces of the n-type semiconductor substrate (2) and passed therethrough without undergoing phonon scattering, so that they when arriving at an electrode (5) may possess an amount of energy not less than the work function of the electrode (5) and are thus allowed to spring out into a vacuum.
    Type: Application
    Filed: September 23, 2003
    Publication date: March 25, 2004
    Applicant: JAPAN SCIENCE AND TECHNOLOGY CORPORATION
    Inventors: Shunri Oda, Xinwei Zhao, Katsuhiko Nishiguchi
  • Patent number: RE38937
    Abstract: It was an objective of the present invention to provide a susceptor which can prevent a increasing phenomenon of the dopant concentration of the epitaxial layer at the peripheral portion of the wafer. By providing a through-hole 7 passing through to a rear side at the outer peripheral side of the wafer inside the wafer pocket 6, a down flow of a reacting source gas from the upper surface of the susceptor 5 is formed, so that the unwanted flow of the dopant species being exhausted at the rear surface onto the wafer surface can be avoided. As a result, a raise in the dopant concentration at the outer peripheral portion of the epitaxial layer 9 can be controlled.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: January 24, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Osamu Nakamura