Abstract: Apparatus for processing a substrate are provided herein. In some embodiments a showerhead assembly includes a gas distribution plate having a plurality of apertures; a holder having a wall, an radially inwardly extending flange extending from a lower portion of the wall and coupled to the gas distribution plate, and a radially outwardly extending flange extending from an upper portion of the wall, wherein the wall has a thickness between about 0.015 inches and about 0.2 inches; and a heating apparatus disposed above and spaced apart from the gas distribution plate, wherein the heating apparatus includes a heater configured to heat the gas distribution plate.

Abstract: A fluid treatment system includes a reactor chamber fluidly coupled with a fluid inlet and a fluid outlet. The reactor chamber is defined by one or more chamber walls. The system includes a UV LED, and a light pipe. The light pipe extends into the reactor chamber through at least one of the chamber walls. The light pipe has a proximal end disposed outside of the reactor chamber. The proximal end is coupled with the UV LED to transmit UV light into the reactor chamber through the light pipe. To that end, the light pipe also has a distal end, opposite the proximal end, that is disposed within an interior volume of the reactor chamber. The light pipe includes a central section disposed between the proximal end and the distal end. The central section is configured to transmit the UV light from UV LED to the distal end.

Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

Abstract: A process for fabricating a heterostructure made of semiconductor materials having a crystalline structure of wurtzite type, includes the following steps: structuring a surface of a zinc oxide monocrystalline substrate into mesas; depositing by epitaxy at least one layer of semiconductor materials having a crystalline structure of wurtzite type, forming the heterostructure, on top of the structured surface. Heterostructure obtained by such a process. A process for fabricating at least one electronic or optoelectronic device from such a heterostructure is also provided.

Abstract: In various embodiments, single-crystal aluminum nitride boules and substrates are formed from the vapor phase with controlled levels of impurities such as carbon. Single-crystal aluminum nitride may be heat treated via quasi-isothermal annealing and controlled cooling to improve its ultraviolet absorption coefficient and/or Urbach energy.

Abstract: An apparatus for manufacturing compound single crystal includes a crystal growth section to hold a seed crystal, a gas supply section to supply a metal-contained gas and a reactant gas toward the seed crystal, and a heating section to heat the seed crystal and a metal source. The gas supply section includes a crucible holding the metal source, a carrier gas supply unit, and a reactant gas supply unit. A porous baffle plate is provided in an opening of the crucible. The porous baffle plate satisfies a relationship of 80%?(1?VH/VB)×100<100% and a relationship of 0.0003<a2/L<1.1. VB is an apparent volume of the porous baffle plate, VH is a total volume of the through-holes contained in the porous baffle plate, “a” is a diameter of the through-hole, and L is a length of the through-hole.

Abstract: In a method provided herein for forming a chalcogenide film on a substrate, an elemental solid is exposed to a hydrogen halide gas in a heated reaction environment at a temperature at which the hydrogen halide gas promotes the elemental solid to evolve into an elemental halide-based gas. The elemental halide-based gas is then exposed to a chalcogen gas provided in the heated reaction environment, at a temperature at which the elemental halide-based gas is reactive with the chalcogen gas to produce a solid chalcogenide reaction product. A substrate is provided in the heated reaction environment for deposition thereon of a solid film of the solid chalcogenide reaction product that results from exposure of the elemental halide-based gas to the chalcogen gas in the heated reaction environment.

Abstract: A method for producing a bonded SOI wafer by bonding a bond wafer and a base wafer, each being formed of a silicon single crystal, together with a silicon oxide film placed therebetween, the method including: preparing, as the base wafer, a silicon single crystal wafer whose resistivity is 100 ?·cm or more and initial interstitial oxygen concentration is 10 ppma or less; forming, on the front surface of the base wafer, a silicon oxide film by performing, on the base wafer, heat treatment in an oxidizing atmosphere at a temperature of 700° C. or higher and 1000° C. or lower for 5 hours or more; bonding the base wafer and the bond wafer together with the silicon oxide film placed therebetween; and thinning the bonded bond wafer to form an SOI layer.

Abstract: A semiconductor structure comprising III-N materials, includes: a support substrate; a main layer of III-N material, the main layer comprising a first section disposed on the support substrate and a second section disposed on the first section; an inter-layer of III-N material, disposed between the first section and the second section in order to compress the second section of the main layer, wherein the structure's inter-layer consists of a lower layer disposed on the first section and an upper layer disposed on the lower layer and formed by a superlattice.

Abstract: A method of selectively depositing a capping layer structure on a semiconductor device structure is disclosure. The method may include; providing a partially fabricated semiconductor device structure comprising a surface including a metallic interconnect material, a metallic barrier material, and a dielectric material. The method may also include; selectively depositing a first metallic capping layer over the metallic barrier material and over the metallic interconnect material relative to the dielectric material; and selectively depositing a second metallic capping layer over the first metallic capping layer relative to the dielectric material. Semiconductor device structures including a capping layer structure are also disclosed.

Abstract: There is provided a template comprising a substrate comprising sapphire and at least one III-N crystal layer, wherein III denotes at least one element of the main group III of the periodic table of the elements, selected from the group of Al, Ga and In, wherein in a region of the at least one III-N layer above the substrate comprises a mask material as an interlayer, wherein the III-N crystal layer of the template is defined by one or both of the following values (i)/(ii) of the deformation ?xx: (i) at room temperature the ?xx value lies in the range of <0; and (ii) at growth temperature the ?xx value lies in the range of ?xx?0.

Abstract: A laminated body of an embodiment includes: a silicon layer; a first beryllium oxide layer on the silicon layer; and a diamond semiconductor layer on the first beryllium oxide layer.

Abstract: A process of forming a nucleus fanning layer in a nitride semiconductor epitaxial substrate is disclosed. The process includes steps of growing: a lower layer of the nucleus forming layer on a substrate; an upper layer of the nucleus thrilling layer on the lower layer; and a nitride semiconductor layer each by the metal organic chemical vapor deposition (MOCVD) technique. The growth of the nitride semiconductor layer is done at a temperature lower than a growth temperature for the upper layer, and the growth of the upper layer is done by supplying ammonia (NH3) at a flow rate greater than the flow rate of ammonia (NH3) timing the growth of the lower layer.

Abstract: Provided are a substrate processing apparatus and a substrate processing method using the same and, more particularly, a substrate processing apparatus capable of controlling deposition of a reactive-metal-containing precursor in an exhaust line, and a substrate processing method using the same.

Abstract: Gas-phase reactors and systems are disclosed. Exemplary reactors include a reaction chamber having a tapered height. Tapering the height of the reactor is thought to reduce a pressure drop along the flow of gasses through the reactor. Exemplary reactors can also include a spacer within a gap to control a flow of gas between a region and a reaction chamber.

Abstract: Methods for depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber are provided. The method may include: heating the substrate to a deposition temperature of less than 550° C.; simultaneously contacting the substrate with a silicon precursor, a n-type dopant precursor, and a p-type dopant precursor; and depositing the co-doped polysilicon film on the surface of the substrate. Related semiconductor structures are also disclosed.

Abstract: A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is famed. Density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm?2 in the epi principal surface.

Abstract: Provided is a method for controlling the rate of etching of a SiC substrate based on a composition of a storing container. The etching method of the present invention is for etching the SiC substrate by heating the SiC substrate under Si vapor pressure, in a state where the SiC substrate is stored in a crucible. The crucible is formed of a tantalum metal, and has a tantalum carbide layer provided on an internal space side of the tantalum metal, and a tantalum silicide layer provided on the side further toward the internal space side than the tantalum carbide layer. The rate of etching of the SiC substrate is controlled based on difference in a composition of the tantalum silicide layer.

Abstract: Embodiments of the present disclosure propose two methods for integrating vacancy centers (VCs) on semiconductor substrates for forming VC-based spin qubit devices. The first method is based on using a self-assembly process for integrating VC islands on a semiconductor substrate. The second method is based on using a buffer layer of a III-N semiconductor material over a semiconductor substrate, and then integrating VC islands in an insulating carbon-based material such as diamond that is either grown as a layer on the III-N buffer layer or grown in the openings formed in the III-N buffer layer. Integration of VC islands on semiconductor substrates typically used in semiconductor manufacturing according to any of these methods may provide a substantial improvement with respect to conventional approaches to building VC-based spin qubit devices and may promote wafer-scale integration of VC-based spin qubits for use in quantum computing devices.

Abstract: A semiconductor laser device includes an n-type nitride semiconductor layer; a first layer disposed above the n-type nitride semiconductor and composed of InaGa1-aN (0?a<1); a second layer disposed above the first layer and composed of InbGa1-bN (0<b<1, a<b), the second layer having a thickness smaller than that of the first layer and containing an n-type impurity; a third layer composed of IncGa1-cN (0?c<1, c<b) and having a thickness smaller than that of the second layer, the third layer being disposed on (i) a surface of the second layer on the active layer side and/or (ii) a surface of the second layer on the first layer side; an active layer disposed above the second layer and the third layer, and having a single quantum well structure or a multiple quantum well structure; and a p-type nitride semiconductor layer disposed above the active layer.

Abstract: There is provided a method of manufacturing a semiconductor device, comprising forming a film on a substrate in a process chamber by performing a cycle a predetermined number of times. The cycle includes alternately performing supplying a halogen-based first process gas to the substrate in the process chamber, and supplying a non-halogen-based second process gas to the substrate in the process chamber. Further, an internal pressure of the process chamber in the act of supplying the first process gas is set to be higher than an internal pressure of the process chamber in the act of supplying the second process gas.

Abstract: According to one embodiment, an epitaxial growth apparatus includes a processing chamber, an exhaust pipe, and an introducing pipe. The exhaust pipe is communicated with the processing chamber. The introducing pipe is communicated with the exhaust pipe and an alkaline gas is introduced into the exhaust pipe via the introducing pipe.

Abstract: According to one embodiment, an epitaxial growth apparatus includes a processing chamber, an exhaust pipe, and an introducing pipe. The exhaust pipe is communicated with the processing chamber. The introducing pipe is communicated with the exhaust pipe and an alkaline gas is introduced into the exhaust pipe via the introducing pipe.

Abstract: A diamond substrate is formed of diamond single crystals by preparing a base substrate; forming plural pillar-shaped diamonds formed of diamond single crystals on one side of the base substrate; causing a diamond single crystal to grow from a tip of each pillar-shaped diamond and coalescing the diamond single crystals growing from the tips of the pillar-shaped diamonds to form a diamond substrate layer; separating the diamond substrate layer from the base substrate; and manufacturing a diamond substrate from the diamond substrate layer, a shape in an in-plane direction of the diamond substrate is a circular shape or a circular shape having an orientation flat plane formed therein and has a diameter of two inches or more.

Abstract: Methods and apparatuses for a dual heterojunction multijunction solar cell are disclosed. A method in accordance with the present invention comprises growing a base material for a solar cell, growing at least one dual heterojunction on the base material, and growing an emitter on the at least one dual heterojunction. An apparatus in accordance with the present invention comprises a substrate, and a first subcell, coupled to the substrate, wherein the first subcell comprises a base region, coupled to the substrate, an emitter region, and at least one dual heterojunction, coupled between the base region and the emitter region, wherein the at least one dual heterojunction has a lower bandgap than the emitter region.

Abstract: The present invention proposes variations of the laser separation method allowing separating homoepitaxial films from the substrates made from the same crystalline material as the epitaxial film. This new method of laser separation is based on using the selective doping of the substrate and epitaxial film with fine donor and acceptor impurities. In selective doping, concentration of free carries in the epitaxial film and substrate may essentially differ and this can lead to strong difference between the light absorption factors in the infrared region near the residual beams region where free carriers and phonon-plasmon interaction of the optical phonons with free carriers make an essential contribution to infrared absorption of the optical phonons. With the appropriate selection of the doping levels and frequency of infrared laser radiation, it is possible to achieve that laser radiation is absorbed in general in the region of strong doping near the interface substrate-homoepitaxial film.

Abstract: The present invention provides a substrate (1) with a bulk layer (3) and a buffer layer (4) having a thickness of less than 2 ?m arranged on the bulk layer (3) for growth of a multitude of nanowires (2) oriented in the same direction on a surface (5) of the buffer layer (4). A nanowire structure, a nanowire light emitting diode comprising the substrate (1) and a production method for fabricating the nanowire structure is also provided. The production method utilizes non-epitaxial methods for forming the buffer layer (4).

Abstract: A method of manufacturing a silicon carbide single crystal includes steps of preparing a crucible, a source material disposed toward a bottom surface in the crucible, a seed crystal disposed to face the source material toward a top surface in the crucible, a resistive heater, and a heat insulator configured to be able to accommodate the crucible therein, measuring a mass of at least a portion of the heat insulator, comparing a measured value of the mass obtained in the measuring step with a threshold value, and growing a silicon carbide single crystal on the seed crystal by sublimation of the source material by heating the crucible placed in the heat insulator with the resistive heater. When the measured value of the mass is lower than the threshold value in the comparing step, the step of growing a silicon carbide single crystal is performed at least one or more times.

Abstract: Techniques for reducing the specific contact resistance of metal-semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low specific resistance metal-group IV semiconductor junctions find application as a low resistance electrode in semiconductor devices including electronic devices (e.g., transistors, diodes, etc.) and optoelectronic devices (e.g., lasers, solar cells, photodetectors, etc.) and/or as a metal source and/or drain region (or a portion thereof) in a field effect transistor (FET). The monolayers of group III and group V atoms are predominantly ordered layers of atoms formed on the surface of the group IV semiconductor and chemically bonded to the surface atoms of the group IV semiconductor.

Abstract: Single-crystal diamond is composed of carbon in which a concentration of a carbon isotope 12C is not lower than 99.9 mass % and a plurality of inevitable impurities other than carbon. The inevitable impurities include nitrogen, boron, hydrogen, and nickel, and a total content of nitrogen, boron, and hydrogen of the plurality of inevitable impurities is not higher than 0.01 mass %. In order to manufacture single-crystal diamond, initially, a hydrocarbon gas in which a concentration of the carbon isotope 12C is not lower than 99.9 mass % is subjected to denitrification.

Abstract: Disclosed is an apparatus for fabricating an ingot. The apparatus includes a crucible to receive a raw material, a holder disposed at an upper portion of the crucible to fix a seed, and a filter part in the crucible. The filter part is spaced apart from a surface of the raw material.

Abstract: A data retention reliability screen of integrated circuits including ferroelectric random access memory (FRAM) arrays. A reference voltage level is determined for each integrated circuit being tested, corresponding to the read of a high polarization capacitance data state. A number of FRAM cells in the integrated circuit are programmed to that data state, and then read at an elevated temperature, with the number of failing cells compared against a pass/fail threshold to determine whether the integrated circuit is vulnerable to long-term data retention failure.

Abstract: In a rotating disk reactor (1) for growing epitaxial layers on substrate (3), gas directed toward the substrates at different radial distances from the axis of rotation of the disk has substantially the same velocity. The gas directed toward portions of the disk remote from the axis (10a) may include a higher concentration of a reactant gas (4) than the gas directed toward portions of the disk close to the axis (10d), so that portions of the substrate surfaces at different distances from the axis (14) receive substantially the same amount of reactant gas (4) per unit area. A desirable flow pattern is achieved within the reactor while permitting uniform deposition and growth of epitaxial layers on the substrate.

Abstract: Various optical isolators are disclosed. One embodiment provides an optical isolator comprising a waveguide that includes polymer magneto-optical media. In a particular embodiment, the waveguide is dimensioned for single mode operation in the selected isolation range. A cross-section of the waveguide is inhomogeneous in terms of magneto-optical materials. Polymer magneto-optical material is a part of the optical waveguide structure. The inhomogeneity induces the propagation constant shift, which is propagation-direction-dependent. An embodiment is characterized by a cutoff frequency for forward propagating waves that is different than the cutoff frequency for reverse waves; the dimensions and direction of magnetization of the waveguide can be tailored so that, in a particular embodiment, the cutoff frequency for forward propagating waves is lower than the cutoff frequency for reverse waves.

Abstract: A method for etching a gate includes forming a high-k material layer over a substrate; forming an overlying layer over the high-k material layer; performing a first etching process for etching the overlying layer to form an overlying layer pattern; forming a spacer on a sidewall of the overlying layer pattern; and performing a second etching process using plasma including a etch gas and an additive gas, to etch the high-k material layer, wherein an amount of the additive gas is substantially the same as the main etch gas to increase an etch selectivity with respect to the substrate.

Abstract: A method of forming electrical contacts on a diamond substrate comprises producing a plasma ball using a microwave plasma source in the presence of a mixture of gases. The mixture of gases include a source of a p-type or an n-type dopant. The plasma ball is disposed at a first distance from the diamond substrate. The diamond substrate is maintained at a first temperature. The plasma ball is maintained at the first distance from the diamond substrate for a first time, and a UNCD film, which is doped with at least one of a p-type dopant and an n-type dopant, is disposed on the diamond substrate. The doped UNCD film is patterned to define UNCD electrical contacts on the diamond substrate.

Abstract: A method for etching a gate includes forming a high-k material layer over a substrate; forming an overlying layer over the high-k material layer; performing a first etching process for etching the overlying layer to form an overlying layer pattern; forming a spacer on a sidewall of the overlying layer pattern; and performing a second etching process using plasma including a etch gas and an additive gas, to etch the high-k material layer, wherein an amount of the additive gas is substantially the same as the main etch gas to increase an etch selectivity with respect to the substrate.

Abstract: There are provided methods for functionalizing a planar surface of a microelectronic structure, by exposing the surface to at least one vapor including at least one functionalization species, such as NO2 or CH3ONO, that non-covalently bonds to the surface while providing a functionalization layer of chemically functional groups, to produce a functionalized surface. The functionalized surface is exposed to at least one vapor stabilization species that reacts with the functionalization layer to form a stabilization layer that stabilizes the functionalization layer against desorption from the planar microelectronic surface while providing chemically functional groups. The stabilized surface is exposed to at least one material layer precursor species that deposits a material layer on the stabilized planar microelectronic surface. The stabilized planar microelectronic surface can be annealed at a peak annealing temperature that is less than about 700° C.

Abstract: A method for characterizing a carbon overcoat is provided. The method includes performing electron energy loss spectroscopy (EELS) spectrum imaging for an area of a preselected carbon-based material and an area of the carbon overcoat to generate a reference EELS dataset and a carbon overcoat EELS dataset, respectively, and determining a carbon bonding content of the carbon overcoat based on the reference EELS dataset and the carbon overcoat EELS dataset.

Abstract: The present invention proposes variations of the laser separation method allowing separating homoepitaxial films from the substrates made from the same crystalline material as the epitaxial film. This new method of laser separation is based on using the selective doping of the substrate and epitaxial film with fine donor and acceptor impurities. In selective doping, concentration of free carries in the epitaxial film and substrate may essentially differ and this can lead to strong difference between the light absorption factors in the infrared region near the residual beams region where free carriers and phonon-plasmon interaction of the optical phonons with free carriers make an essential contribution to infrared absorption of the optical phonons. With the appropriate selection of the doping levels and frequency of infrared laser radiation it is possible to achieve that laser radiation is absorbed in general in the region of strong doping near the interface substrate-homoepitaxial film.

Abstract: A method for producing a light-emitting device includes the steps of: forming a layer containing In on a substrate in a reactor in which a Mg-containing raw material has been used; and forming an active layer including a nitride semiconductor on the layer containing In.

Abstract: A single crystalline silicon carbide layer can be grown on a single crystalline sapphire substrate. Subsequently, a graphene layer can be formed by conversion of a surface layer of the single crystalline silicon layer during an anneal at an elevated temperature in an ultrahigh vacuum environment. Alternately, a graphene layer can be deposited on an exposed surface of the single crystalline silicon carbide layer. A graphene layer can also be formed directly on a surface of a sapphire substrate or directly on a surface of a silicon carbide substrate. Still alternately, a graphene layer can be formed on a silicon carbide layer on a semiconductor substrate. The commercial availability of sapphire substrates and semiconductor substrates with a diameter of six inches or more allows formation of a graphene layer on a commercially scalable substrate for low cost manufacturing of devices employing a graphene layer.

Abstract: A thin film forming method for forming a thin film on a workpiece accommodated within a reaction chamber includes a first operation of supplying a first source gas and a second source gas into the reaction chamber, and a second operation of stopping the supply of the first source gas, supplying the second source gas into the reaction chamber and setting an internal pressure of the reaction chamber higher than an internal pressure of the reaction chamber set in the first operation. The first operation and the second operation are alternately repeated a plurality of times.

Abstract: Methods and compositions for depositing a metal containing film on a substrate are disclosed. A reactor and at least one substrate disposed in the reactor are provided. A metal containing precursor is provided and introduced into the reactor, which is maintained at a temperature of at least 100° C. A metal is deposited on to the substrate through a deposition process to form a thin film on the substrate.

Abstract: Non-polar (11 20) a-plane gallium nitride (GaN) films with planar surfaces are grown on (1 102) r-plane sapphire substrates by employing a low temperature nucleation layer as a buffer layer prior to a high temperature growth of the non-polar (11 20) a-plane GaN thin films.

Abstract: A method to grow single phase group III-nitride articles including films, templates, free-standing substrates, and bulk crystals grown in semi-polar and non-polar orientations is disclosed. One or more steps in the growth process includes the use of additional free hydrogen chloride to eliminate undesirable phases, reduce surface roughness, and increase crystalline quality. The invention is particularly well-suited to the production of single crystal (11.2) GaN articles that have particular use in visible light emitting devices.

Abstract: The present disclosure generally provides for a solid-state battery, and methods of fabricating embodiments of the solid-state battery. Embodiments of the present disclosure may include an electrode for a solid-state battery, the electrode including: a current collector region including a conductive, lithium electroactive material; and a plurality of nanowires contacting the current collector region.

Abstract: To provide a method of manufacturing a single crystal 3C-SiC substrate that can dramatically reduce surface defects generated in a processing of epitaxial growth and can secure a quality as a semiconductor device while simplifying a post process. The method of manufacturing a single crystal 3C-SiC substrate where a single crystal 3C-SiC layer is formed on a base substrate by epitaxial growth is provided. A first growing stage of forming the single crystal 3C-SiC layer to have a surface state configured with a surface with high flatness and surface pits scattering in the surface is performed. A second growing stage of further epitaxially growing the single crystal 3C-SiC layer obtained in the first growing stage so as to fill the surface pits is performed.

Abstract: Methods are disclosed for growing group III-nitride semiconductor compounds with advanced buffer layer technique. In an embodiment, a method includes providing a suitable substrate in a processing chamber of a hydride vapor phase epitaxy processing system. The method includes forming an AlN buffer layer by flowing an ammonia gas into a growth zone of the processing chamber, flowing an aluminum halide containing precursor to the growth zone and at the same time flowing additional hydrogen halide or halogen gas into the growth zone of the processing chamber. The additional hydrogen halide or halogen gas that is flowed into the growth zone during buffer layer deposition suppresses homogeneous AlN particle formation. The hydrogen halide or halogen gas may continue flowing for a time period while the flow of the aluminum halide containing precursor is turned off.

Abstract: A structure including a substrate, an intermediate layer provided and formed directly onto the substrate, a transition region, and a group II-VI bulk crystal material provided and formed as an extension of the transition region. The transition region acts to change the structure from the underlying substrate to that of the bulk crystal. In a method of manufacture, a similar technique can be used for growing the transition region and the bulk crystal layer.