Using An Organic Precursor (e.g., Propane, Metal-organic, Mocvd, Movpe) Patents (Class 117/104)
  • Patent number: 7728323
    Abstract: A nitride-based semiconductor substrate has a substrate formed of a nitride-based semiconductor crystal having a mixed crystal composition with three elements or more. The substrate has a diameter of not less than 25 mm, and a thermal resistivity in a range of 0.02 Kcm2/W to 0.5 Kcm2/W in its thickness direction.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: June 1, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventor: Yuichi Oshima
  • Patent number: 7713874
    Abstract: Methods for performing periodic plasma annealing during atomic layer deposition are provided along with structures produced by such methods. The methods include contacting a substrate with a vapor-phase pulse of a metal source chemical and one or more plasma-excited reducing species for a period of time. Periodically, the substrate is contacted with a vapor phase pulse of one or more plasma-excited reducing species for a longer period of time. The steps are repeated until a metal thin film of a desired thickness is formed over the substrate.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: May 11, 2010
    Assignee: ASM America, Inc.
    Inventor: Robert B. Milligan
  • Patent number: 7682449
    Abstract: Disclosed herein are heterostructure semiconductor nanowires. The heterostructure semiconductor nanowires comprise semiconductor nanocrystal seeds and semiconductor nanocrystal wires grown in a selected direction from the surface of the semiconductor nanocrystal seeds wherein the semiconductor nanocrystal seeds have a composition different from that of the semiconductor nanocrystal wires. Further disclosed is a method for producing the heterostructure semiconductor nanowires.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun Joo Jang, Shin Ae Jun
  • Publication number: 20100064966
    Abstract: A method includes the steps of, using water vapor and a metalorganic compound not containing oxygen, (a) performing crystal growth at a low growth temperature and at a low growth pressure in the range of 1 kPa to 30 kPa to form a low-temperature grown single-crystal layer; and (b) performing crystal growth at a high growth temperature and at a pressure higher than the low growth pressure to form a high-temperature grown single-crystal layer on the low-temperature grown single-crystal layer.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 18, 2010
    Applicant: Stanley Electric Co., Ltd.
    Inventors: Naochika Horio, Masayuki Makishima
  • Patent number: 7678194
    Abstract: A method and apparatus for generating gas for a processing system is provided. In one embodiment, an apparatus for generating gas for a processing system includes a canister having at least one baffle disposed between two ports and containing a precursor material. The precursor material is adapted to produce a gas vapor when heated to a defined temperature at a defined pressure. The baffle forces a carrier gas to travel an extended mean path between the inlet and outlet ports. In another embodiment, an apparatus for generating gas includes a canister having a tube that directs a carrier gas flowing into the canister away from a precursor material disposed within the canister.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: March 16, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Seshadri Ganguli, Ling Chen, Vincent W. Ku
  • Patent number: 7670933
    Abstract: A method for growing high quality, nonpolar Group III nitrides using lateral growth from Group III nitride nanowires. The method of nanowire-templated lateral epitaxial growth (NTLEG) employs crystallographically aligned, substantially vertical Group III nitride nanowire arrays grown by metal-catalyzed metal-organic chemical vapor deposition (MOCVD) as templates for the lateral growth and coalescence of virtually crack-free Group III nitride films. This method requires no patterning or separate nitride growth step.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: March 2, 2010
    Assignee: Sandia Corporation
    Inventors: George T. Wang, Qiming Li, J. Randall Creighton
  • Publication number: 20100006023
    Abstract: Nitride semiconductor films, such as for use in solid state light emitting devices and electronic devices, are fabricated in an environment of relatively high nitrogen potential such that nitrogen vacancies in the growing film are reduced. A reactor design, and method for its use, provide high nitrogen precursor partial pressure, precracking of the precursor using a catalytic metal surface, prepyrolyzing the precursor, using catalytically-cracked molecular nitrogen as a nitrogen precursor, and/or exposing the surface to an ambient which is extremely rich in active nitrogen species. Improved efficiency for light emitting devices, particularly in the blue and green wavelengths and improve transport properties in nitride electronic devices, i.e., improved performance from nitride-based devices such as InGaAlN laser diodes, transistors, and light emitting diodes is thereby provided.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 14, 2010
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: David P. Bour, Peter Kiesel, Christopher L. Chua, Noble M. Johnson, Zhihong Yang, John E. Northrup
  • Publication number: 20100006024
    Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.
    Type: Application
    Filed: September 9, 2009
    Publication date: January 14, 2010
    Applicant: ASM AMERICA, INC.
    Inventors: Paul D. Brabant, Joseph P. Italiano, Chantal J. Arena, Pierre Tomasini, Ivo Raaijmakers, Matthias Bauer
  • Patent number: 7645339
    Abstract: Embodiments of the invention relate to methods for depositing silicon-containing materials on a substrate. In one example, a method for selectively and epitaxially depositing a silicon-containing material is provided which includes positioning and heating a substrate containing a crystalline surface and a non-crystalline surface within a process chamber, exposing the substrate to a process gas containing neopentasilane, and depositing an epitaxial layer on the crystalline surface. In another example, a method for blanket depositing a silicon-containing material is provide which includes positioning and heating a substrate containing a crystalline surface and feature surfaces within a process chamber and exposing the substrate to a process gas containing neopentasilane and a carbon source to deposit a silicon carbide blanket layer across the crystalline surface and the feature surfaces.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Paul B. Comita, Lance A. Scudder, David K. Carlson
  • Patent number: 7645481
    Abstract: The present invention relates to a method of lowering dielectric constant of an insulating film including Si, O and CH formed by a chemical vapor deposition process. A process gas containing hydrogen atoms is supplied into a reaction vessel. A microwave is introduced into the reaction vessel to supply a uniform electromagnetic wave, thereby a plasma containing a hydrogen radical is generated in the reaction vessel. The structure of the insulating film is modified by the hydrogen radical contained in the plasma irradiated to the insulating film, lowering the dielectric constant of the film. The microwave is supplied into the reaction vessel through a radial-slot antenna.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: January 12, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Masaru Sasaki, Satohiko Hoshino, Shinji Ide, Yusaku Kashiwagi
  • Patent number: 7638346
    Abstract: Semiconductor structures and devices based thereon include an aluminum nitride single-crystal substrate and at least one layer epitaxially grown thereover. The epitaxial layer may comprise at least one of AlN, GaN, InN, or any binary or tertiary alloy combination thereof, and have an average dislocation density within the semiconductor heterostructure is less than about 106 cm?2.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: December 29, 2009
    Assignee: Crystal IS, Inc.
    Inventors: Leo J. Schowalter, Joseph A. Smart, Shiwen Liu, Kenneth E. Morgan, Robert T. Bondokov, Timothy J. Bettles, Glen A. Slack
  • Publication number: 20090309189
    Abstract: The present application relates to a method for the growth of indium nitride on a substrate by means of MOVPE in the presence of a noble gas as growth vector.
    Type: Application
    Filed: July 16, 2007
    Publication date: December 17, 2009
    Applicants: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N., UNIVERSITE DE MONTPELLIER II
    Inventors: Sandra Clur Ruffenach, Olivier Briot, Bernard Gil
  • Patent number: 7632351
    Abstract: This invention is directed to processes for the formation of ruthenium-containing films on surfaces in atomic layer deposition (ALD) processes. The ALD process includes depositing a surface-activating group on the surface; exposing the deposit of the surface-activating complex to a ruthenium precursor to form a deposited ruthenium complex on the surface; and reacting the deposited ruthenium complex with a reducing agent to form a ruthenium-containing film on the surface. This invention is also directed to ruthenium complexes, RuL2L*, that can be used as ruthenium precursors in these processes.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: December 15, 2009
    Assignee: E. I. du Pont de Nemours and Company
    Inventor: Jeffery Scott Thompson
  • Publication number: 20090294775
    Abstract: A method of obtaining a hexagonal würtzite type epitaxial layer with a low impurity concentration of alkali-metal by using a hexagonal würtzite substrate possessing a higher impurity concentration of alkali-metal, wherein a surface of the substrate upon which the epitaxial layer is grown has a crystal plane which is different from the c-plane.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 3, 2009
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Makoto Saito, Shin-Ichiro Kawabata, Derrick S. Kamber, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 7625448
    Abstract: The invention relates to a device for depositing especially crystalline layers on at least one especially crystalline substrate in a process chamber comprising a top and a vertically opposing heated bottom for receiving the substrates. A gas-admittance body forming vertically superimposed gas-admittance regions is used to separately introduce at least one first and one second gaseous starting material, said starting materials flowing through the process chamber with a carrier gas in the horizontal direction. The gas flow homogenises in an admittance region directly adjacent to the gas-admittance body, and the starting materials are at least partially decomposed, forming decomposition products which are deposited on the substrates in a growth region adjacent to the admittance region, under continuous depletion of the gas flow. An additional gas-admittance region of the gas-admittance body is essential for one of the two starting materials, in order to reduce the horizontal extension of the admittance region.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: December 1, 2009
    Assignee: Aixtron AG
    Inventors: Martin Dauelsberg, Martin Conor, Gerhard Karl Strauch, Johannes Kaeppeler
  • Patent number: 7621999
    Abstract: An epitaxial growing method in which a crystal of AlxGa1-xN wherein x is a desirable constituent ratio can be grown on an Si substrate or sapphire substrate according to the HVPE process. Crystal of AlxGa1-xN is grown according to the HVPE process in which use is made of an aluminum material, a gallium material, an ammonia material and a carrier gas. The carrier gas consists of an inert gas and hydrogen, and the partial pressure of hydrogen is set so as to range from 0 to <0.1. As a result, the relationship between feeding ratio among materials and constituent ratio of grown crystal can be made linear, thereby enhancing the controllability of crystal composition.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: November 24, 2009
    Assignee: Tokyo University of Agriculture and Technology TLO Co., Ltd
    Inventors: Akinori Koukitu, Yoshinao Kumagai
  • Patent number: 7601217
    Abstract: A method of forming an epitaxially grown layer, preferably by providing a region of weakness in a support substrate and transferring a nucleation portion to the support substrate by bonding. A remainder portion of the support substrate is detached at the region of weakness and an epitaxial layer is grown on the nucleation portion. The remainder portion is separated or otherwise removed from the support portion.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: October 13, 2009
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruce Faure, Fabrice Letertre
  • Patent number: 7572331
    Abstract: The present invention relates to a method of manufacturing a wafer comprising a single crystalline bulk substrate of a first material and at least one epitaxial layer of a second material which has a lattice different from the lattice of the first material. The present invention provides a method for manufacturing a wafer in which a layer which is lattice-mismatched with the substrate can be grown on the substrate with a high effectiveness and high quality at a low cost. A roughening step is included for roughening the surface of the bulk substrate and a growing step is included for growing the second material on the rough surface with a reduced number of threading dislocations and an enhanced strain relaxation compared to a second material that is epitaxially grown on a polished surface.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: August 11, 2009
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Konstantin Bourdelle, Ian Cayrefourcq, Mark Kennard
  • Patent number: 7560086
    Abstract: Synthetic monocrystalline diamond compositions having one or more monocrystalline diamond layers formed by chemical vapor deposition, the layers including one or more layers having an increased concentration of one or more impurities (such as boron and/or isotopes of carbon), as compared to other layers or comparable layers without such impurities. Such compositions provide an improved combination of properties, including color, strength, velocity of sound, electrical conductivity, and control of defects. A related method for preparing such a composition is also described, as well as a system for use in performing such a method, and articles incorporating such a composition.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: July 14, 2009
    Assignee: Apollo Diamond, Inc.
    Inventors: Robert C. Linares, Patrick J Doering
  • Patent number: 7556977
    Abstract: There are provided preflow periods t11, t12 in which group III element materials TMG, TMA and TMI are not supplied from a group III element material container to a reaction region (reactor), while a group V element material PH3 and an Mg dopant material are supplied from a group V element material container and a dopant material container to the reaction region (reactor) after an Mg-undoped group III-V compound semiconductor layer is crystallinically grown and before an Mg-doped group III-V compound semiconductor layer is crystallinically grown. According to the semiconductor manufacturing method, an Mg doping profile can be accurately controlled.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: July 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kei Yamamoto, Junichi Nakamura
  • Patent number: 7556687
    Abstract: A low-distortion gallium nitride crystal substrate including low dislocation single crystal regions (Z) having a definite c-axis and a definite a-axis, C-plane growth regions (Y) having a c-axis and a-axis parallel to the c-axis and a-axis of the low dislocation single crystal regions (Z), voluminous defect accumulating regions (H) having a c-axis inverse to the c-axis of the low dislocation single crystal regions (Z) and an a-axis parallel with the a-axis of the low dislocation single crystal regions (Z), and 0.1/cm2 to 10/cm2 c-axis gross core regions (F) containing at least one crystal having a c-axis parallel to the c-axis of the low dislocation single crystal regions (Z) and an a-axis different from the a-axis of the low dislocation single crystal regions (Z).
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: July 7, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Fumitaka Sato, Seiji Nakahata
  • Patent number: 7553468
    Abstract: Provided is a production method for producing a solid product by a reaction of gaseous raw materials with a plurality of components including a step of conducting the reaction using a reactor disposed in a vertical direction; a step of feeding the gaseous raw materials with a plurality of components from the upper part of the reactor; a step of, in the lower part of the reactor, forming a seal gas layer composed of a gas having a high density and fed continuously from the lower part of the reactor; a step of discharging an exhaust gas containing a by-product gas generated by the reaction and unreacted gaseous raw materials from somewhere in the upper part of the formed seal gas layer; and a step of accommodating a solid product in the seal gas layer of the lower part.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: June 30, 2009
    Assignee: Chisso Corporation
    Inventors: Shuuichi Honda, Toru Tanaka, Satoshi Hayashida
  • Patent number: 7553370
    Abstract: Methods of crystal growth for semiconductor materials, such as nitride semiconductors, and methods of manufacturing semiconductor devices are provided. The method of crystal growth includes forming a number of island crystal regions during a first crystal growth phase and continuing growth of the island crystal regions during a second crystal growth phase while bonding of boundaries of the island crystal regions occurs. The second crystal growth phase can include a crystal growth rate that is higher than the crystal growth rate of the first crystal growth phase and/or a temperature that is lower than the first crystal growth phase. This can reduce the density of dislocations, thereby improving the performance and service life of a semiconductor device which is formed on a nitride semiconductor made in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: June 30, 2009
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20090162673
    Abstract: A polymer-assisted deposition process for deposition of epitaxial cubic metal nitride films and the like is presented. The process includes solutions of one or more metal precursor and soluble polymers having binding properties for the one or more metal precursor. After a coating operation, the resultant coating is heated at high temperatures under a suitable atmosphere to yield metal nitride films and the like. Such films can be used as templates for the development of high quality cubic GaN based electronic devices.
    Type: Application
    Filed: January 22, 2009
    Publication date: June 25, 2009
    Inventors: Anthony K. Burrell, Thomas Mark McCleskey, Quanxi Jia, Alexander H. Mueller, Hongmei Luo
  • Patent number: 7524373
    Abstract: The invention provides a method to enforce face-to-face stacking of organic semiconductors in the solid state that employs semiconductor co-crystal formers (SCCFs), to align semiconductor building blocks (SBBs). Single-crystal X-ray analysis reveals n-orbital overlap optimal for organic semiconductor device applications.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 28, 2009
    Assignee: University of Iowa Research Foundation
    Inventors: Leonard R. MacGillivray, Anatoliy N. Sokolov
  • Publication number: 20090038541
    Abstract: A method to grow a boule of silicon carbide is described. The method may include flowing a silicon-containing precursor and a carbon-containing precursor proximate to a heated filament array and forming the silicon carbide boule on a substrate from reactions of the heated silicon-containing and carbon-containing precursors. Also, an apparatus for growing a silicon carbide boule is described. The apparatus may include a deposition chamber to deposit silicon carbide on a substrate, and a precursor transport system for introducing silicon-containing and carbon-containing precursors into the deposition chamber. The apparatus may also include at least one filament or filament segment capable of being heated to a temperature that can activate the precursors, and a substrate pedestal to hold a deposition substrate upon which the silicon carbide boule is grown. The pedestal may be operable to change the distance between the substrate and the filament as the silicon carbide boule is grown.
    Type: Application
    Filed: August 5, 2008
    Publication date: February 12, 2009
    Applicant: SiC Systems, Inc.
    Inventors: Joshua Robbins, Michael Seman
  • Patent number: 7473316
    Abstract: What is described here is a process for the initial growth of nitrogenous semiconductor crystal materials in the form AXBYCZNVMW wherein A, B, C is an element of group II or III, N is nitrogen, M represents an element of group V or VI, and X, Y, Z, W denote the molar fraction of each element of this compound, using a, which are deposited on sapphire, SiC or Si, using various ramp functions permitting a continuous variation of the growth parameters during the initial growth.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: January 6, 2009
    Assignee: Aixtron AG
    Inventors: Bernd Schottker, Michael Heuken, Holger Jürgensen, Gerd Strauch, Bernd Wachtendorf
  • Publication number: 20090004093
    Abstract: Materials and Methods are provided for forming single crystal diamond growth using microwave plasma chemical vapor deposition (CVD) process in partial vacuum with a gaseous mixture containing a methane/hydrogen mixture with optional nitrogen, oxygen and xenon addition. The single crystal substrate can be ceramic material such as MgO, Al2O3, BaTiO3, and the like. A surface of the single crystal substrate is coated using an electron beam evaporation device with an alloy of iridium and a component selected from the group consisting of iron, cobalt, nickel, molybdenum, rhenium and a combination thereof. The alloy coated single crystal substrate is positioned in a microwave plasma CVD reactor and upon being subjected to a biased enhanced nucleation treatment in the presence of a gaseous mixture of methane, hydrogen, and other optional gases with a biased voltage of negative 100 to 400 volts supports the growth of a large single crystal diamond on its coated surface.
    Type: Application
    Filed: August 29, 2008
    Publication date: January 1, 2009
    Inventor: Han H. Nee
  • Publication number: 20080318418
    Abstract: A process for preparing a multi-layer substrate is described herein. In one embodiment, the process provides a multi-layer substrate comprising a first layer and a second layer where the process comprises the steps of providing the first layer comprising a barrier area and a copper area; and depositing the second layer comprising copper onto the first layer wherein the depositing provides the second layer comprising a first thickness ranging from about 20 Angstroms to about 2,000 Angstroms onto the barrier area and a second thickness ranging from about 0 Angstroms to about 1,000 Angstroms onto the copper area in the first layer wherein the first thickness is greater than the second thickness.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 25, 2008
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventor: John Anthony Thomas Norman
  • Patent number: 7465499
    Abstract: A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of a triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, where in each single crystal entity has a twining interface that forms an angle of 60° relative to a <110> crystal direction of the substrate.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: December 16, 2008
    Assignee: Showa Denko K.K.
    Inventors: Takashi Udagawa, Tamotsu Yamashita
  • Patent number: 7459023
    Abstract: The present invention provides a method for producing a Group III nitride compound semiconductor crystal, the semiconductor crystal being grown through the flux method employing a flux. At least a portion of a substrate on which the semiconductor crystal is to be grown is formed of a flux-soluble material. While the semiconductor crystal is grown on a surface of the substrate, the flux-soluble material is dissolved in the flux from a surface of the substrate that is opposite the surface on which the semiconductor crystal is grown. Alternatively, after the semiconductor crystal has been grown on a surface of the substrate, the flux-soluble material is dissolved in the flux from a surface of the substrate that is opposite the surface on which the semiconductor crystal has been grown. The flux-soluble material is formed of silicon.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: December 2, 2008
    Assignees: Toyoda Gosei Co., Ltd., NGK Insulators, Ltd., Osaka University
    Inventors: Shiro Yamazaki, Koji Hirata, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Masashi Yoshimura, Fumio Kawamura, Yuji Yamada
  • Publication number: 20080282970
    Abstract: Precursors suitable for chemical vapour deposition, especially ALD, of hafnium oxide or zirconium oxide, have the general formula: (R1Cp)2MR2 wherein Cp represents a cyclopentadienyl ligand, R1 is H or a substituting alkyl group, alkoxy group or amido group of the Cp ligand, R2 is an alkyl group, an alkoxy group or an amido group and M is hafnium or zirconium.
    Type: Application
    Filed: June 8, 2006
    Publication date: November 20, 2008
    Inventors: Peter Nicholas Heys, Paul Williams, Fuquan Song
  • Patent number: 7445672
    Abstract: Heat treatment is conducted at a predetermined temperature of not less than 1250° C. on an underlying substrate obtained by epitaxially forming a first group-III nitride crystal on a predetermined base as an underlying layer. Three-dimensional fine irregularities resulting from crystalline islands are created on the surface of the underlying layer. A second group-III nitride crystal is epitaxially formed on the underlying substrate as a crystal layer. There are a great many fine voids interposed at the interface between the crystal layer and underlying substrate. The presence of such voids suppresses propagation of dislocations from the underlying substrate, which reduces the dislocation density in the crystal layer. As a result, the crystal layer of good crystal quality can be obtained.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: November 4, 2008
    Assignees: NGK Insulators, Ltd., Dowa Mining Co., Ltd.
    Inventor: Tomohiko Shibata
  • Patent number: 7442252
    Abstract: The present invention provides methods for producing a multi-element oxide single crystal which contains Bi, which has high crystallinity independently of a preparation process, and which is represented by the formula (Bi2O2)Am?1BmO3m+1, wherein A is Sr, Ba, Ca, or Bi and B is Ti, Ta, or Nb. A flux layer, containing a composition satisfying the inequality 0<CuO/Bi2O3<2 and/or 0?TiO/Bi2O3<7/6 on a molar basis is deposited on a wafer and a single-crystalline thin-film is then deposited on the flux layer placed on the wafer. A melt of a composition which contains raw materials and a flux and which satisfies the above inequality is prepared and the melt is cooled such that a single crystal is grown. A CuO flux layer is deposited on a wafer and Bi—Ti—O is supplied to the flux layer using a Bi6Ti3O12, Bi7Ti3O12, or Bi8Ti3O12 target of which the Bi content is greater than that of an object film such that a Bi4Ti3O12 single-crystalline thin-film is formed above the wafer.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: October 28, 2008
    Assignee: Japan Science and Technology Agency
    Inventors: Hideomi Koinuma, Yuji Matsumoto, Ryota Takahashi
  • Patent number: 7425237
    Abstract: The deposition of material (3) on a growth area (4) may be highly temperature-sensitive. In order to reduce temperature inhomogeneities on the growth area (4) of a substrate wafer (1), a thermal radiation absorption layer (2) is applied on a rear side (5) of the substrate wafer (1) lying opposite to the growth area (4). The thermal radiation absorption layer (2) exhibits good radiation absorption in the spectral range of a heating source. Since the deposition of semiconductor materials, in particular AllnGaN, may lead to (depending on the deposition temperature) different emission wavelengths of the deposited material, the use of a thermal radiation absorption layer (2) may produce a narrower emission wavelength distribution of the deposited material (3).
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: September 16, 2008
    Assignee: Osram Opto Semiconductor GmbH
    Inventors: Stefan Bader, Hans-Jurgen Lugauer, Volker Haerle, Berthold Hahn
  • Patent number: 7393412
    Abstract: A method for manufacturing a compound semiconductor epitaxial substrate with few concave defects is provided. The method for manufacturing a compound semiconductor epitaxial substrate comprises a step of epitaxially growing an InGaAs layer on an InP single crystal substrate or on an epitaxial layer lattice-matched to the InP single crystal substrate under conditions of ratio of V/: 10-100, growth temperature: 630° C.-700° C., and growth rate: 0.6 ?m/h-2 ?m/h.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: July 1, 2008
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Kenji Kohiro, Tomoyuki Takada
  • Patent number: 7384481
    Abstract: Methods for forming compositions comprising a single-phase rare-earth dielectric disposed on a substrate are disclosed. In some embodiments, the method forms a semiconductor-on-insulator structure. Compositions and structures that are formed via the method provide the basis for forming high-performance devices and circuits.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: June 10, 2008
    Assignee: Translucent Photonics, Inc.
    Inventor: Petar Atanackovic
  • Patent number: 7384479
    Abstract: An optical semiconductor device operable in a 0.6 ?m band includes an active layer of GaInNP sandwiched by a pair of GaInP layer with a thickness of about 2 molecular layers or less.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: June 10, 2008
    Assignee: Ricoh Company, Ltd.
    Inventors: Naoto Jikutani, Shunichi Sato, Takashi Takahashi
  • Patent number: 7377976
    Abstract: A method is provided for growing thin oxide films on the surface of a substrate by alternatively reacting the surface of the substrate with a metal source material and an oxygen source material. The oxygen source material is preferably a metal alkoxide. The metal source material may be a metal halide, hydride, alkoxide, alkyl, a cyclopentadienyl compound, or a diketonate.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: May 27, 2008
    Inventors: Mikko Ritala, Antti Rahtu, Markku Leskela, Kaupo Kukli
  • Patent number: 7371282
    Abstract: A substrate and method for growing a semi-conductive crystal on an alloy film such as (AIN)x(SiC)(1-x) without any buffer layer is disclosed. The (AIN)x(SiC)(1-x) alloy film can be formed on a SiC substrate by a vapor deposition process using AlN and SiC powder as starting materials. The (AIN)x(SiC)(1-x) alloy film provides a better lattice match for GaN or SiC epitaxial growth and reduces defects in epitaxially grown GaN with better lattice match and chemistry.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: May 13, 2008
    Assignee: Northrop Grumman Corporation
    Inventors: Narsingh Bahadur Singh, Brian Wagner, Mike Aumer, Darren Thomson, David Kahler, Andre Berghmans, David J. Knuteson
  • Patent number: 7361222
    Abstract: A method and a device to grow from the vapor phase, a single crystal of either SiC, a group III-nitride, or alloys thereof, at a growth rate and for a period of time sufficient to produce a crystal of preferably several centimeters length. The diameter of the growing crystal may be controlled. To prevent the formation of undesirable polycrystalline deposits on surfaces in the downstream vicinity of the single crystal growth area, the local supersaturation of at least one component of the material grown is lowered by introducing a separate gas flow comprising at least one halogen element or a combination of said halogen and hydrogen species.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: April 22, 2008
    Assignee: Norstel AB
    Inventors: Erik Janzén, Peter Råback, Alexandre Ellison
  • Patent number: 7354477
    Abstract: A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: April 8, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kensaku Motoki, Ryu Hirota, Takuji Okahisa, Seiji Nakahata
  • Patent number: 7351285
    Abstract: A method and system for forming a variable thickness seed layer on a substrate for a subsequent metal electrochemical plating process, where the seed layer thickness profile improves uniformity of the electroplated metal layer compared to when using a constant thickness seed layer. The method includes providing a substrate in a process chamber containing a showerhead, with the center of the substrate generally aligned with an inner gas delivery zone of the showerhead and the edge of the substrate generally aligned with an outer gas delivery zone of the showerhead. The method further includes depositing a seed layer on the substrate by exposing the substrate to a first gas containing a metal-containing precursor flowed through the inner gas delivery zone, and exposing the substrate to a second gas flowed through the outer gas delivery zone, whereby the seed layer is deposited with a thickness at the edge of the substrate that is less than the thickness at the center of the substrate.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: April 1, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Tsukasa Matsuda
  • Patent number: 7341944
    Abstract: Methods for synthesizing metal nanowires are provided. A metalorganic layer is deposited on a substrate as a thin film. The thermal decomposition of the metalorganic thin film in the presence of air synthesizes metal nanowires. The metal can be varied to produce nanowires with different properties.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: March 11, 2008
    Assignee: Honda Motor Co., Ltd
    Inventor: Avetik Harutyunyan
  • Publication number: 20080017100
    Abstract: A GaN based substrate is obtained with a simple etching. The GaN based substrate is separate from another base substrate with the etching. The whole process is easy and costs low. The substrate is made of a material having a matching lattice length for a lattice structure so that the substrate has good characteristics. And the GaN based substrate has good heat dissipation so that the stability and life-time of GaN based devices on the GaN based substrate are enhanced even when they are constantly operated under a high power.
    Type: Application
    Filed: September 25, 2006
    Publication date: January 24, 2008
    Applicant: National Central University
    Inventors: Jen-Inn Chyi, Guan-Ting Chen
  • Publication number: 20080011223
    Abstract: A substrate and method for growing a semi-conductive crystal on an alloy film such as (AIN)x(SiC)(1-x) without any buffer layer is disclosed. The (AIN)x(SiC)(1-x) alloy film can be formed on a SiC substrate by a vapor deposition process using AlN and SiC powder as starting materials. The (AIN)x(SiC)(1-x) alloy film provides a better lattice match for GaN or SiC epitaxial growth and reduces defects in epitaxially grown GaN with better lattice match and chemistry.
    Type: Application
    Filed: July 12, 2006
    Publication date: January 17, 2008
    Inventors: Narsingh Bahadur Singh, Brian Wagner, Mike Aumer, Darren Thomson, David Kahler, Andre Berghmans, David J. Knuteson
  • Patent number: 7311777
    Abstract: A process for manufacturing a quartz crystal element consists of the steps of producing plural quartz layers on a surface of a crystalline substrate having a lattice constant differing from that of quartz crystal, in which each of the quartz layers consists of a crystalline phase and an amorphous phase, and percentage of the crystalline phase in the quartz layer farther from the substrate is larger than percentage of the crystalline phase in the quartz layer adjacent to the substrate; and producing an epitaxially grown quartz crystal film on the surface of the quartz layer farther from the substrate by a reaction between silicon alkoxide and oxygen.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: December 25, 2007
    Assignee: Humo Laboratory, Ltd
    Inventors: Naoyuki Takahashi, Takato Nakamura, Satoshi Nonaka, Yoshinori Kubo, Yoichi Shinriki, Katsumi Tamanuki
  • Patent number: 7309394
    Abstract: An object is to provide an ultraviolet light-emitting device in which a p-type semiconductor which has high conductivity and an emission peak in ultraviolet region, and emits light efficiently is used. The p-type semiconductor is prepared by supplying a p-type impurity raw material at the same time or after starting supply of predetermined types of crystal raw materials, besides before starting supply of other types of crystal raw materials than the predetermined types of crystal raw materials in one cycle wherein all the types of crystal raw materials of the plural types of crystal raw materials are supplied in one time each in case of making crystal growth by supplying alternately the plural types of crystal raw materials in a pulsed manner.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: December 18, 2007
    Assignee: Riken
    Inventors: Hideki Hirayama, Sohachi Iwai, Yoshinobu Aoyagi
  • Patent number: 7303632
    Abstract: A vapor transport growth process for bulk growth of high quality gallium nitride for semiconductor applications is disclosed. The method includes the steps of heating a gallium nitride source material, a substrate suitable for epitaxial growth of GaN thereon, ammonia, a transporting agent that will react with GaN to form gallium-containing compositions, and a carrier gas to a temperature sufficient for the transporting agent to form volatile Ga-containing compositions from the gallium nitride source material. The method is characterized by maintaining the temperature of the substrate sufficiently lower than the temperature of the source material to encourage the volatile gallium-containing compositions to preferentially form GaN on the substrate.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: December 4, 2007
    Assignee: Cree, Inc.
    Inventor: Gerald H. Negley
  • Patent number: RE40647
    Abstract: The first object of the present invention is to provide a PDP with improved panel brightness which is achieved by improving the efficiency in conversion from discharge energy to visible rays. The second object of the present invention is to provide a PDP with improved panel life which is achieved by improving the protecting layer protecting the dielectrics glass layer. To achieve the first object, the present invention sets the amount of xenon in the discharge gas to the range of 10% by volume to less than 100% by volume, and sets the charging pressure for the discharge gas to the range of 500 to 760 Torr which is higher than conventional charging pressures. With such construction, the panel brightness increases. Also, to achieve the second object, the present invention has, on the surface of the dielectric glass layer, a protecting layer consisting of an alkaline earth oxide with (100)-face or (110)-face orientation.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: March 10, 2009
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Aoki, Hideo Torii, Eiji Fujii, Mitsuhiro Ohtani, Takashi Inami, Hiroyuki Kawamura, Hiroyoshi Tanaka, Ryuichi Murai, Yasuhisa Ishikura, Yutaka Nishimura, Katsuyoshi Yamashita