Using An Organic Precursor (e.g., Propane, Metal-organic, Mocvd, Movpe) Patents (Class 117/104)
  • Patent number: 8540817
    Abstract: There are provided a method for manufacturing a Si(1-v-w-x)CwAlxNv substrate having a reduced number of cracks and high processability, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate at a temperature below 550° C.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: September 24, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Shinsuke Fujiwara, Hideaki Nakahata
  • Publication number: 20130240876
    Abstract: The present invention relates to a method for growing a novel non-polar (13 40) plane epitaxy layer of wurtzite structure, which comprises the following steps: providing a single crystal oxide with perovskite structure; using a plane of the single crystal oxide as a substrate; and forming a non-polar (13 40) plane epitaxy layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process. The present invention also provides an epitaxy layer having non-polar (13 40) plane obtained according to the aforementioned method.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 19, 2013
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Li CHANG, Yen-Teng HO
  • Publication number: 20130239615
    Abstract: The present application discloses the details of a microwave plasma chemical vapor deposition process that uses Nitrogen and Diborane simultaneously in combination along with the Methane and Hydrogen gases to grow white color diamonds. The invention embodies using nitrogen to avoid inclusions and impurities in the CVD diamond samples and Diborane for the color enhancement during the growth of diamond. It is also found that heating of the so grown diamonds to 2000 C results in significant color enhancement due to the compensation of Nitrogen and Boron centers in the samples. The origin of the various colors in diamond is explained on the basis of the band diagram of CVD diamond.
    Type: Application
    Filed: October 11, 2010
    Publication date: September 19, 2013
    Inventor: Devi Shanker Misra
  • Patent number: 8512471
    Abstract: In a physical vapor transport growth technique for silicon carbide a silicon carbide powder and a silicon carbide seed crystal are introduced into a physical vapor transport growth system and halosilane gas is introduced separately into the system. The source powder, the halosilane gas, and the seed crystal are heated in a manner that encourages physical vapor transport growth of silicon carbide on the seed crystal, as well as chemical transformations in the gas phase leading to reactions between halogen and chemical elements present in the growth system.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: August 20, 2013
    Assignee: II-VI Incorporated
    Inventors: Ilya Zwieback, Thomas E. Anderson, Avinash K. Gupta
  • Publication number: 20130209683
    Abstract: The present invention is directed towards methods for growing diamond nanowires via chemical vapor deposition and apparatuses that incorporate these diamond nanowires.
    Type: Application
    Filed: July 29, 2011
    Publication date: August 15, 2013
    Applicant: BROWN UNIVERSITY
    Inventor: Jingming Xu
  • Publication number: 20130187124
    Abstract: A light emitting device has a nanostructured layer with nanovoids. The nanostructured layer can be provided below and adjacent to active region or on a substrate or a template below an n-type layer for the active region, so as to reduce strain between epitaxial layers in the light emitting device. A method of manufacturing the same is provided.
    Type: Application
    Filed: January 25, 2012
    Publication date: July 25, 2013
    Applicant: INVENLUX LIMITED
    Inventors: JIANPING ZHANG, HONGMEI WANG, CHUNHUI YAN, WEN WANG, YING LIU
  • Patent number: 8465588
    Abstract: A high-quality, large-area seed crystal for ammonothermal GaN growth and method for fabricating. The seed crystal comprises double-side GaN growth on a large-area substrate. The seed crystal is of relatively low defect density and has flat surfaces free of bowing. The seed crystal is useful for producing large-volume, high-quality bulk GaN crystals by ammonothermal growth methods for eventual wafering into large-area GaN substrates for device fabrication.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: June 18, 2013
    Assignee: SORAA, Inc.
    Inventors: Christiane Poblenz, James S. Speck, Derrick S. Kamber
  • Patent number: 8465587
    Abstract: Hydride vapor-phase deposition (HVPE) systems are disclosed. An HVPE hydride vapor-phase deposition system may include a reactant source chamber and a growth chamber containing a susceptor coupled to the reactant source chamber. The reactant source chamber may be configured to create a reactant gas through a chemical reaction between a solid or liquid precursor and a different precursor gas. The reactant source chamber can be configured to operate at a temperature T(M) significantly above room temperature. The reactant gas can be chemically unstable at or near room temperature. The susceptor is configured to receive a substrate and maintain the substrate at a substrate temperature T(S). The growth chamber includes walls can be configured to operate at a temperature T(C) such that T(M), T(S) are greater than T(C).
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: June 18, 2013
    Assignee: CBL Technologies, Inc.
    Inventors: Glenn S. Solomon, David J. Miller
  • Patent number: 8455372
    Abstract: The present invention belongs to the technical field of semiconductor materials and specifically relates to a method for cleaning and passivizing gallium arsenide (GaAs) surface autologous oxide and depositing an Al2O3 dielectric. This method includes: use a new-type of sulfur passivant to react with the autologous oxide on the GaAs surface to clean it and generate a passive sulfide film to separate the GaAs from the outside environment, thus preventing the GaAs from oxidizing again; further cleaning the residuals such as autologous oxides and sulfides on the GaAs surface through the pretreatment reaction of the reaction source trimethyl aluminum (TMA) of the Al2O3 ALD with the GaAs surface, and then deposit high-quality Al2O3 dielectric through ALD as the gate dielectric which fully separates the GaAs from the outside environment. The present invention features a simple process and good effects, and can provide preconditions for manufacturing the GaAs devices.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: June 4, 2013
    Assignee: Fudan University
    Inventors: Qingqing Sun, Runchen Fang, Wen Yang, Pengfei Wang, Wei Zhang
  • Patent number: 8449675
    Abstract: A semiconductor wafer is formed of a substrate wafer of single crystal silicon doped with dopant atoms of the n type or p type, with a front surface and a back surface, contains a layer deposited epitaxially on the front surface of the substrate wafer. The substrate wafer additionally includes an n++ or p++ doped layer, which extends from the front surface of the substrate wafer into the substrate wafer and has a defined thickness. The semiconductor wafer is produced by a process in which dopant atoms of the n type or p type are introduced into the substrate wafer through the front surface of the substrate wafer, the dopant concentration in a layer which extends from the front surface of the substrate wafer into the substrate wafer being increased from the level n+ or p+ to the level n++ or p++, and an epitaxial layer is then deposited on this layer.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: May 28, 2013
    Assignee: Siltronic AG
    Inventors: Rupert Krautbauer, Gerhard Huettl, Andrej Lenz, Erwin-Peter Mayer, Rainer Winkler
  • Patent number: 8425681
    Abstract: A method for growing low-dislocation-density material atop a layer of the material with an initially higher dislocation density using a monolayer of spheroidal particles to bend and redirect or directly block vertically propagating threading dislocations, thereby enabling growth and coalescence to form a very-low-dislocation-density surface of the material, and the structures made by this method.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: April 23, 2013
    Assignee: Sandia Corporation
    Inventors: George T. Wang, Qiming Li
  • Patent number: 8409351
    Abstract: A method to grow a boule of silicon carbide is described. The method may include flowing a silicon-containing precursor and a carbon-containing precursor proximate to a heated filament array and forming the silicon carbide boule on a substrate from reactions of the heated silicon-containing and carbon-containing precursors. Also, an apparatus for growing a silicon carbide boule is described. The apparatus may include a deposition chamber to deposit silicon carbide on a substrate, and a precursor transport system for introducing silicon-containing and carbon-containing precursors into the deposition chamber. The apparatus may also include at least one filament or filament segment capable of being heated to a temperature that can activate the precursors, and a substrate pedestal to hold a deposition substrate upon which the silicon carbide boule is grown. The pedestal may be operable to change the distance between the substrate and the filament as the silicon carbide boule is grown.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: April 2, 2013
    Assignee: SiC Systems, Inc.
    Inventors: Joshua Robbins, Michael Seman
  • Patent number: 8394197
    Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 12, 2013
    Assignee: Sub-One Technology, Inc.
    Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman
  • Patent number: 8394196
    Abstract: Methods for formation epitaxial layers containing silicon and carbon doped with phosphorus are disclosed. The pressure is maintained equal to or above 100 torr during deposition. The methods result in the formation of a film including substitutional carbon. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: March 12, 2013
    Assignee: Applied Materials, Inc.
    Inventor: Yihwan Kim
  • Publication number: 20130049005
    Abstract: One or more layers are epitaxially grown on a bulk crystalline AlN substrate. The epitaxial layers include a surface which is the initial surface of epitaxial growth of the epitaxial layers. The AlN substrate is substantially removed over a majority of the initial surface of epitaxial growth.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christopher L. Chua, Brent S. Krusor, Thomas Wunderer, Noble M. Johnson
  • Patent number: 8382897
    Abstract: Methods for gas delivery to a process chamber are provided herein. In some embodiments, a method may include flowing a process gas through one or more gas conduits, each gas conduit having an inlet and an outlet for facilitating the flow of gas through the gas conduits and into a gas inlet funnel having a second volume, wherein each gas conduit has a first volume less than the second volume, and wherein each gas conduit has a cross-section that increases from a first cross-section proximate the inlet to a second cross-section proximate the outlet but excluding any intersection points between the gas inlet funnel and the gas conduit, and wherein the second cross-section is non-circular; and delivering the process gas to the substrate via the gas inlet funnel.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 26, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Kedarnath Sangam, Anh N. Nguyen
  • Patent number: 8372196
    Abstract: In a manufacturing apparatus for manufacturing an epitaxial wafer with a wafer being mounted substantially concentrically with a susceptor, a center rod is provided to extend in an up-and-down direction on a side of a non-mounting surface of the susceptor so that its upper end is adjacent to the center of the susceptor. With this arrangement, part of radiation light irradiated toward the susceptor is diffusely reflected by the center rod before reaching the central portion of the susceptor, thereby reducing the amount of the radiation light irradiated to the central portion of the susceptor as well as lowering the temperature of the portion. Since the center rod and the susceptor are not in surface contact, the center rod does not take the heat from the susceptor, thereby suppressing the temperature from decreasing locally at the central portion of the susceptor.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: February 12, 2013
    Assignee: Sumco Techxiv Corporation
    Inventors: Motonori Nakamura, Yoshinobu Mori, Takeshi Masuda, Hidenori Kobayashi, Kazuhiro Narahara
  • Patent number: 8357241
    Abstract: There is provided a method of vacuum evaporation comprising causing evaporated material (5) from vacuum evaporation source (20) furnished with container (1) with its one side open accommodating organic material (2) to form a film on opposed substrate (7), wherein the vacuum evaporation source has heating element (3) not fixed to the container, and being in contact with the surface of organic material held in the container, and wherein the organic material is evaporated by heating of the heating element only, the evaporated material released through at least one hole (6) or at least one slit made in the heating element.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: January 22, 2013
    Assignee: Canon Tokki Corporation
    Inventors: Eiichi Matsumoto, Yoshiko Abe, Yuji Yanagi
  • Publication number: 20130014694
    Abstract: A method of growing a semiconductor epitaxial thin film and a method of fabricating a semiconductor light emitting device using the same are provided. The method of growing a semiconductor epitaxial thin film, includes: disposing a plurality of wafers loaded in a wafer holder in a reaction chamber; and jetting a reactive gas including a chlorine organic metal compound to the wafers through a gas supply unit provided to extend in a direction in which the wafers are loaded, to grow a semiconductor epitaxial thin film on a surface of each of the wafers.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 17, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Sun MAENG, Bum Joon KIM, Hyun Seok RYU, Jung Hyun LEE, Ki Sung KIM
  • Patent number: 8334156
    Abstract: A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 ?m. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: December 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol Kyu Kim, Yung Ho Ryu, Soo Min Lee, Jong In Yang, Tae Hyung Kim
  • Patent number: 8328936
    Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 11, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8329253
    Abstract: A method for forming a transparent conductive film by atomic layer deposition includes providing more than one kind of oxide precursor which is individually introduced into atomic layer deposition equipment through different sources, wherein the oxide precursors are consecutively introduced into the atomic layer deposition equipment at the same time, so that the oxide precursors are simultaneously present in the atomic layer deposition equipment, to form a uniform mixture of oxide precursors in a single adsorbate layer for settling onto a substrate in the atomic layer deposition equipment. Then, an oxidant is provided to react with the oxide precursors to form a single multi-oxide atomic layer. The above mentioned steps are repeated to form a plurality of multi-oxide atomic layers.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: December 11, 2012
    Assignee: National Taiwan University
    Inventors: Feng-Yu Tsai, Chun-Ting Chou
  • Publication number: 20120285371
    Abstract: A method for making a flat substrate from incremental-width nanorods includes the steps of: providing a base layer, performing a lateral crystal growth process for a plurality of times, and forming a substrate. The base layer has a plurality of nanorods. Each time the lateral crystal growth process is performed, an additive reagent is added at a different concentration to enable lateral crystal growth and thereby increase the width of each nanorod incrementally. The incremental-width nanorods eventually bond with each other to form a substrate. The substrate may go through an annealing process so as to become a flat substrate.
    Type: Application
    Filed: October 7, 2011
    Publication date: November 15, 2012
    Applicant: Nanocrystal Asia Inc.
    Inventors: Chong Ming Lee, Andrew Eng Jia Lee
  • Publication number: 20120269717
    Abstract: The present application relates generally to methods for growth of high quality graphene films. In particular, a method is provided for forming a graphene film using a modified chemical vapor deposition process using an oxygen-containing hydrocarbon liquid precursor. Desirably, the graphene films are a single-layer and have a single grain continuity of at least 1 ?m2.
    Type: Application
    Filed: April 21, 2011
    Publication date: October 25, 2012
    Applicant: THE AEROSPACE CORPORATION
    Inventors: Gouri Radhakrishnan, Paul Michael Adams
  • Patent number: 8293592
    Abstract: A semiconductor device manufacturing method including: (a) loading into a chamber a substrate having at least an exposed silicon surface and an exposed surface of silicon oxide film or silicon nitride film on a substrate surface; (b) simultaneously supplying at least a first process gas containing silicon and a second process gas for etching into the chamber when the substrate inside the chamber is heated to a predetermined temperature; and (c) supplying into the chamber a third process gas having an etchability higher than the second process gas etchability. Steps (b) and (c) are performed at least once to selectively grow an epitaxial film on the exposed silicon surface of the substrate surface. A temperature of the substrate is maintained at the predetermined temperature from (b) to (c), and the temperature of the substrate is temporarily elevated above the predetermined temperature and then returned to the predetermined temperature in (c).
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: October 23, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Junichi Tanabe
  • Publication number: 20120247386
    Abstract: A method and apparatus for forming heterojunction stressor layers is described. A germanium precursor and a metal precursor are provided to a chamber, and an epitaxial layer of germanium-metal alloy formed on the substrate. The metal precursor is typically a metal halide, which may be provided by subliming a solid metal halide or by contacting a pure metal with a halogen gas. The precursors may be provided through a showerhead or through a side entry point, and an exhaust system coupled to the chamber may be separately heated to manage condensation of exhaust components.
    Type: Application
    Filed: July 28, 2011
    Publication date: October 4, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Errol Antonio C. Sanchez, David K. Carlson
  • Patent number: 8247887
    Abstract: An optical device, e.g., LED, laser. The device includes a non-polar gallium nitride substrate member having a slightly off-axis non-polar oriented crystalline surface plane. In a specific embodiment, the slightly off-axis non-polar oriented crystalline surface plane is up to about ?0.6 degrees in a c-plane direction, but can be others. In a specific embodiment, the present invention provides a gallium nitride containing epitaxial layer formed overlying the slightly off-axis non-polar oriented crystalline surface plane. In a specific embodiment, the device includes a surface region overlying the gallium nitride epitaxial layer that is substantially free of hillocks.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: August 21, 2012
    Assignee: Soraa, Inc.
    Inventors: James Raring, Christiane Poblenz
  • Patent number: 8241423
    Abstract: A semiconductor wafer for an epitaxial growth is disclosed comprising: a main face on which a vapor phase epitaxial layer grows; a back face provided on an opposite side of the wafer; a main chamfered part along a circumferential edge where the main face and a side face of the wafer meet; and a back chamfered part along a circumferential edge where the back face and the side face meet is provided. After a CVD layer formation process is conducted to form a layer at least on the back face and the back chamfered part, a machining process is conducted on the main face to remove a CVD layer at least partially formed thereon so as to polish the main face to a mirror finished surface with a maximum height of profile (Rz) not exceeding 0.3 ?m.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 14, 2012
    Assignee: Sumco Techxiv Corporation
    Inventors: Eisyun Ikubo, Naoto Hirano, Moritaka Iwasa
  • Patent number: 8236103
    Abstract: A method for producing a Group III nitride semiconductor crystal includes a first step of supplying a Group III raw material and a Group V raw material at a V/III ratio of 0 to 1,000 to form and grow a Group III nitride semiconductor on a heated substrate and a second step of vapor-phase-growing a Group III nitride semiconductor crystal on the substrate using a Group III raw material and a nitrogen raw material.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: August 7, 2012
    Assignee: Showa Denko K.K.
    Inventors: Hisayuki Miki, Tetsuo Sakurai, Mineo Okuyama
  • Patent number: 8226767
    Abstract: “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: July 24, 2012
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang H. Choi, Glen C. King, James R. Elliott
  • Publication number: 20120183809
    Abstract: A production method of a layered body having a single crystal layer including a group III nitride having a composition AlXGaYInZN (wherein, X, Y and Z are rational numbers respectively satisfying 0.9?X?1.0, 0.0?Y?0.1, 0.0?Z?0.1, and X+Y+Z=1.
    Type: Application
    Filed: September 28, 2010
    Publication date: July 19, 2012
    Applicant: TOKUYAMA CORPORATION
    Inventors: Toru Kinoshita, Kazuya Takada
  • Patent number: 8221548
    Abstract: A process for producing a diamond thin-film includes forming a diamond crystal thin-film on a substrate and firing the diamond crystal thin-film at a sufficient temperature under high pressure under which a diamond is stable. A diamond single-crystal substrate having a diamond single-crystal thin-film formed thereon is placed in an ultra-high-pressure and high-temperature firing furnace to anneal the diamond single-crystal thin-film under the conditions of 1200° C. and 6 GPa.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: July 17, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8221549
    Abstract: A silicon carbide single crystal wafer wherein a substrate is cut out at an OFF angle from a (0001) c plane of an ?-type silicon carbide single crystal of less than 2° and in an OFF direction in which a deviation from a (11-20) direction is less than 10°, the number of substantially triangular lamination defects exposed from a surface of a wafer which is epitaxial grown on the substrate is less than 4/cm2 over the entire surface of the wafer. The invention provides a producing method of a silicon carbide single crystal wafer capable of enhancing the utility ratio of the bulk silicon carbide single crystal, the element characteristics and the cleavage, as well as a silicon carbide single crystal wafer obtained by such a producing method.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: July 17, 2012
    Assignee: Bridgestone Corporation
    Inventor: Takayuki Maruyama
  • Patent number: 8216364
    Abstract: Direct resistive heating is used to grow nanotubes out of carbon and other materials. A growth-initiated array of nanotubes is provided using a CVD or ion implantation process. These processes use indirect heating to heat the catalysts to initiate growth. Once growth is initiated, an electrical source is connected between the substrate and a plate above the nanotubes to source electrical current through and resistively heat the nanotubes and their catalysts. A material source supplies the heated catalysts with carbon or another material to continue growth of the array of nanotubes. Once direct heating has commenced, the source of indirect heating can be removed or at least reduced. Because direct resistive heating is more efficient than indirect heating the total power consumption is reduced significantly.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: July 10, 2012
    Assignee: Raytheon Company
    Inventors: Delmar L. Barker, Mead M. Jordan, William R. Owens
  • Patent number: 8216367
    Abstract: A method for producing a silicon carbide layer on a surface of a silicon substrate includes the step of irradiating the surface of the silicon substrate heated in a high vacuum at a temperature in a range of from 500° C. to 1050° C. with a hydrocarbon-based gas as well as an electron beam to form a cubic silicon carbide layer on the silicon substrate surface.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: July 10, 2012
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Patent number: 8216368
    Abstract: A method of forming an epitaxially grown layer, preferably by providing a region of weakness in a support substrate and transferring a nucleation portion to the support substrate by bonding. A remainder portion of the support substrate is detached at the region of weakness and an epitaxial layer is grown on the nucleation portion. The remainder portion is separated or otherwise removed from the support portion.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: July 10, 2012
    Assignee: Soitec
    Inventors: Bruce Faure, Fabrice Letertre
  • Publication number: 20120167820
    Abstract: A method for making a flat substrate from incremental-width nanorods includes the steps of: providing a base layer, performing a lateral crystal growth process for a plurality of times, and forming a substrate. The base layer has a plurality of nanorods. Each time the lateral crystal growth process is performed, an additive reagent is added at a different concentration to enable lateral crystal growth and thereby increase the width of each nanorod incrementally. The incremental-width nanorods eventually bond with each other to form a substrate. The substrate may go through an annealing process so as to become a flat substrate.
    Type: Application
    Filed: October 7, 2011
    Publication date: July 5, 2012
    Applicant: Nanocrystal Asia Inc.
    Inventors: Chong Ming Lee, Andrew Eng Jia Lee
  • Patent number: 8198628
    Abstract: A semiconductor structure that is to be heated. The structure includes a substrate for the front face deposition of a useful layer intended to receive components for electronics, optics or optoelectronics. The structure contains doped elements that absorb infrared radiation so as to substantially increase infrared absorption by the structure so that the front face reaches a given temperature when a given infrared power is supplied to the structure. At least one part of the doped elements have insufficient electrical activity or localization in the structure, such that they cannot disturb the operation of the components. In addition, a method of producing this structure and a method of forming a useful layer of semiconductor material on the structure.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: June 12, 2012
    Assignee: Soitec
    Inventors: Robert Langer, Hacène Lahreche
  • Publication number: 20120118227
    Abstract: A layer deposition apparatus and method is provided. The layer deposition method comprises a load-lock chamber in which a substrate is loaded, a transfer chamber having a transfer robot that transfers the substrate, a reaction chamber that receives the substrate from the transfer robot and grows at least one epitaxial layer on the substrate, a process-separation reaction chamber that receives the substrate and forms at least one epitaxial layer on the substrate, and a gas distributor that supplies a processing gas to the reaction chamber and the process-separation reaction chamber.
    Type: Application
    Filed: August 12, 2010
    Publication date: May 17, 2012
    Inventor: Nam Jin Kim
  • Publication number: 20120112198
    Abstract: remove impurities from an exposed surface in the ultrahigh vacuum environment. A high qualify single crystalline or polycrystalline silicon carbide film can be grown directly on the sapphire substrate by chemical vapor deposition employing a silicon-containing reactant and a carbon-containing reactant. Formation of single crystalline silicon carbide has been verified by x-ray diffraction, secondary ion mass spectroscopy, and transmission electron microscopy.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 10, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jack O. Chu, Christos D. Dimitrakopoulos, Alfred Grill, Timothy J. McArdle, Katherine L. Saenger, Robert L. Wisnieff, Yu Zhu
  • Publication number: 20120104557
    Abstract: A method for manufacturing a group III nitride crystal includes a step of mixing a group III source material and ammonia in a reactor including quartz, and growing a group III nitride crystal on a support substrate by a vapor deposition. The group III source material is an organic metal source material containing Al. The organic metal source material is mixed with a hydrogen halide gas and the mixture of the organic metal source material and the hydrogen halide gas is supplied to the reactor.
    Type: Application
    Filed: August 24, 2011
    Publication date: May 3, 2012
    Applicant: Hitachi Cable, Ltd.
    Inventors: Takehiro Yoshida, Yuichi Oshima, Tadayoshi Tsuchiya
  • Publication number: 20120098102
    Abstract: A method of reducing threading dislocation densities in non-polar such as a-{11-20} plane and m-{1-100} plane or semi-polar such as {10-1n} plane III-Nitrides by employing lateral epitaxial overgrowth from sidewalls of etched template material through a patterned mask. The method includes depositing a patterned mask on a template material such as a non-polar or semi polar GaN template, etching the template material down to various depths through openings in the mask, and growing non-polar or semi-polar III-Nitride by coalescing laterally from the tops of the sidewalls before the vertically growing material from the trench bottoms reaches the tops of the sidewalls. The coalesced features grow through the openings of the mask, and grow laterally over the dielectric mask until a fully coalesced continuous film is achieved.
    Type: Application
    Filed: April 25, 2011
    Publication date: April 26, 2012
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Bilge M. Imer, James S. Speck, Steven P. DenBaars
  • Publication number: 20120085278
    Abstract: High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.
    Type: Application
    Filed: June 9, 2011
    Publication date: April 12, 2012
    Applicant: SOLEXEL INC.
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, Jay Ashjaee, George D. Kamian, David Mordo, Takao Yonehara
  • Publication number: 20120067275
    Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 22, 2012
    Applicants: HITACHI CABLE CO., LTD., FUJITSU LIMITED
    Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
  • Patent number: 8118934
    Abstract: A method for growing flat, low defect density, and strain-free thick non-polar III-V nitride materials and devices on any suitable foreign substrates using a fabricated nano-pores and nano-network compliant layer with an HVPE, MOCVD, and integrated HVPE/MOCVD growth process in a manner that minimum growth will occur in the nano-pores is provided. The method produces nano-networks made of the non-polar III-V nitride material and the substrate used to grow it where the network is continuous along the surface of the template, and where the nano-pores can be of any shape.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: February 21, 2012
    Inventor: Wang Nang Wang
  • Publication number: 20120035351
    Abstract: Sterically hindered imidazole ligands are described, along with their synthesis, which are capable of coordinating to Group 2 metals, such as: calcium, magnesium, strontium, in an eta-5 coordination mode which permits the formation of monomeric or dimeric volatile complexes. A compound comprising one or more polysubstituted imidazolate anions coordinated to a metal selected from the group consisting of barium, strontium, magnesium, radium or calcium or mixtures thereof. Alternatively, one anion can be substituted with and a second non-imidazolate anion.
    Type: Application
    Filed: January 28, 2011
    Publication date: February 9, 2012
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: John Anthony Thomas Norman, Melanie K. Perez, Moo-Sung Kim
  • Publication number: 20120024223
    Abstract: Cyclohexasilane is used in chemical vapor deposition methods to deposit epitaxial silicon-containing films over substrates. Such methods are useful in semiconductor manufacturing to provide a variety of advantages, including uniform deposition over heterogeneous surfaces, high deposition rates, and higher manufacturing productivity. Furthermore, the crystalline Si may be in situ doped to contain relatively high levels of substitutional carbon by carrying out the deposition at a relatively high flow rate using cyclohexasilane as a silicon source and a carbon-containing gas such as dodecalmethylcyclohexasilane or tetramethyldisilane under modified CVD conditions.
    Type: Application
    Filed: June 23, 2011
    Publication date: February 2, 2012
    Applicant: Matheson Tri-Gas, Inc.
    Inventors: Robert Torres, JR., Terry Arthur Francis, Satoshi Hasaka, Paul David Brabant
  • Patent number: 8088222
    Abstract: A novel approach for the growth of high-quality on-axis epitaxial silicon carbide (SiC) films and boules, using the Chemical Vapor Deposition (CVD) technique, is described here. The method includes a method of substrate preparation, which allows for the growth of “on-axis” SiC films, plus an approach giving the opportunity to grow silicon carbide on singular (a small-angle miscut) substrates, using halogenated carbon-containing precursors (carbon tetrachloride, CCl4, or halogenated hydrocarbons, CHCl3, CH2Cl2, or CH3Cl, or similar compounds or chemicals), or introducing other chlorine-containing species, in the gas phase, in the growth chamber. At gas mixtures greater than the critical amount, small clusters of SiC are etched, before they can become stable nuclei. The presence of chlorine and the formation of gas species allow an increased removal rate of these nuclei, in contrast to the growth without the presence of chlorine.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: January 3, 2012
    Assignee: Widetronix Inc.
    Inventors: Yuri Makarov, Michael Spencer
  • Patent number: 8071466
    Abstract: Zinc sulfide (ZnS) single crystals and multi-grain ZnS crystals are suitable for many applications. The disclosed method produces ZnS single crystals or multi-grain ZnS crystals. More specifically, ZnS single crystals or multi-grain ZnS crystals of pure or substantially pure hexagonal wurtzite structure with sufficiently high purity and crystalline perfection to be used to fabricate components and devices including but not limited to optical components (useful in the infrared (IR) & visible spectrum range of 0.34-14 ?m), photoluminescence devices, cathode luminescence devices, electroluminescence devices, semiconductor devices, and IR laser gain mediums (in the wave length range of 1-5 ?m).
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: December 6, 2011
    Assignee: Fairfield Crystal Technology, LLC
    Inventor: Shaoping Wang
  • Patent number: 8062421
    Abstract: Shaped nanocrystal particles and methods for making shaped nanocrystal particles are disclosed. One embodiment includes a method for forming a branched, nanocrystal particle. It includes (a) forming a core having a first crystal structure in a solution, (b) forming a first arm extending from the core having a second crystal structure in the solution, and (c) forming a second arm extending from the core having the second crystal structure in the solution.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: November 22, 2011
    Assignee: The Regents of the University of California
    Inventors: A. Paul Alivisatos, Erik C. Scher, Liberato Manna