With Electro-deposition Patents (Class 156/150)
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Publication number: 20100018633Abstract: Disclosed is a method of manufacturing a printed circuit board.Type: ApplicationFiled: March 20, 2009Publication date: January 28, 2010Inventors: Myung-Sam KANG, Jung-Hyun PARK, Jeong-Woo PARK, Ji-Eun KIM
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Publication number: 20100018634Abstract: A method of manufacturing a flex-rigid wiring board including disposing a flexible board comprising a flexible substrate and a conductor pattern formed over the flexible substrate and a non-flexible substrate adjacent to each other, covering a boundary between the flexible board and the non-flexible substrate with an insulating layer comprising an inorganic material, providing a conductor pattern on the insulating layer, forming a via hole opening which passes through the insulating layer and reaches the conductor pattern of the flexible board, and plating the via hole opening to form a via connecting the conductor pattern of the flexible board and the conductor pattern on the insulating layer.Type: ApplicationFiled: October 6, 2009Publication date: January 28, 2010Applicant: IBIDEN CO., LTD.Inventors: Michimasa TAKAHASHI, Masakazu Aoyama
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Publication number: 20100021695Abstract: An engraved plate which includes a substrate and an insulating layer on a surface of the substrate wherein a concave portion which increases in width toward an opening and to which the substrate is exposed is formed at the insulating layer, and an engraved plate, a substrate with conductor layer pattern manufactured by a transferring method using the engraved plate, and a conductor layer pattern are provided.Type: ApplicationFiled: December 27, 2007Publication date: January 28, 2010Inventors: Susumu Naoyuki, Hisashige Kanbara, Minoru Tosaka, Kyosuke Suzuki, Toshirou Okamura, Yoshihito Kikuhara, Masami Negishi, Tadayasu Fujieda, Kouichi Tsuyama
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Publication number: 20100014271Abstract: The capacitor material of the present invention is comprised by laminating a titanium dioxide layer and a titanate compound layer having perovskite crystals.Type: ApplicationFiled: January 25, 2008Publication date: January 21, 2010Applicant: Showa Denko K.K.Inventors: Akihiko Shirakawa, Ryuichi Mitsumoto, Koji Tokita
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Publication number: 20100006209Abstract: A process for protecting a porous structure includes providing a treatment fluid including nanoparticles including a sealant material coated with a metal ion to a face of the porous structure, and applying a sequence of DC voltage pulses to the porous structure in a position so as to drive the nanoparticles on the face of the porous structure into the porous structure. The metal ion coating of the nanoparticle separates from the sealant material within the porous structure to close pores within the porous structure.Type: ApplicationFiled: May 27, 2009Publication date: January 14, 2010Inventor: Paul Femmer
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Publication number: 20090325105Abstract: Disclosed herein is a printed circuit board with embedded capacitors therein which comprises inner via holes filled with a high dielectric polymer capacitor paste composed of a composite of BaTiO3 and an epoxy resin, and a process for manufacturing the printed circuit board.Type: ApplicationFiled: June 25, 2009Publication date: December 31, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seok-Kyu Lee, Byoung-Youl Min, Chang-Hyun Nam, Hyun-Ju Jin, Jang-Kyu Kang
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Publication number: 20090323299Abstract: An electronic device substrate having: a base material formed of a thin board; an electrical insulation layer formed on the base material and having plural openings in a thickness direction thereof; and a metal plating layer filled in the plural openings. The base material has a metal layer, a release layer formed contacting the metal layer, and a metal film formed contacting the release layer.Type: ApplicationFiled: September 3, 2009Publication date: December 31, 2009Applicants: HITACHI CABLE, LTD., NEC ELECTRONICS COPORATIONInventors: Nobuaki Miyamoto, Akira Chinda, Koki Hirasawa, Kenji Uchida
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Publication number: 20090320990Abstract: Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.Type: ApplicationFiled: April 28, 2009Publication date: December 31, 2009Inventors: Adam L. Cohen, Ananda H. Kumar, Michael S. Lockard, Dennis R. Smalley
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Publication number: 20090306692Abstract: Certain embodiments of the invention provide a variety of methods of manufacturing a liquid jet-forming surgical instrument. According to these methods, a nozzle assembly of the instrument is electroformed on a mandrel. The nozzle assembly includes a nozzle providing a jet-opening, wherein the nozzle is shaped to form a liquid jet. In some embodiments, the mandrel includes a first mandrel portion and a second mandrel portion. Once the nozzle assembly is formed, the mandrel may be removed from the nozzle assembly. The nozzle assembly may in certain embodiments be coupled to an outlet of the pressure tube. In certain embodiments, an inlet of an evacuation tube is positioned such that a jet-receiving opening of the evacuation tube is positioned opposite the jet-opening of the nozzle.Type: ApplicationFiled: April 25, 2007Publication date: December 10, 2009Applicant: HydroCision, Inc.Inventors: James E. Barrington, Kevin P. Staid
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Publication number: 20090294027Abstract: A circuit board process is provided. In the circuit board process, a first substrate and a second substrate are stacked to form a cavity for accommodating chips. The top of the cavity is covered by a third metal layer that serves as a mask. The first substrate has a base, a first metal layer, a second metal layer, and at least a first conductive structure passing through the base and electrically connected to the first metal layer and the second metal layer. The first metal layer is patterned to form a first circuit layer having a number of first pads. A third circuit layer having a number of third pads is formed on the second substrate. The first pads and the third pads are not on a same plane for wire bonding.Type: ApplicationFiled: April 30, 2009Publication date: December 3, 2009Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Chien-Hao Wang
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Publication number: 20090291296Abstract: A method of protecting sensitive components prior to, during or subsequent to advanced die packaging processing includes applying a metal stack layer such as titanium/copper (Ti/Cu) onto the front surface of a die assembly such that the die assembly front surface is covered with the metal stack layer. A layer of titanium/copper/titanium (Ti/Cu/Ti) or a solder alloy is also applied to the back surface of the die assembly such that the back surface of the die assembly is covered with the Ti/Cu/Ti layer or solder alloy. The front surface metal stack layer and the back surface Ti/Cu/Ti layer or solder alloy prevent degradation of die metallization prior to, during or subsequent to the advanced die packaging processing.Type: ApplicationFiled: May 21, 2008Publication date: November 26, 2009Applicant: GENERAL ELECTRIC COMPANYInventors: Paul Alan McConnelee, Arun Virupaksha Gowda, Elizabeth Ann Burke, Kevin Matthew Durocher
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Patent number: 7611599Abstract: The invention provides a method for production of a decorative article comprising a body having at least one engagement stage, and a decorative member made of a decoration material capable of being thermally softened and having at least one surface which is engageable with the engagement stage of the body. The said method comprises the steps by placing softened decoration material into a mold shaped and sized to correspond to the decorative member to be produced and having at least one surface that is brought into surface-contact with the engagement stage of the body and then press-molding; taking the semi-finished decorative member out of the mold to cool down slowly to room temperature; and placing the surface of the cooled semi-finished decorative member over the engagement stage of the body and splicing them together. By using the method of the present invention, a decorative article can be produced.Type: GrantFiled: February 29, 2008Date of Patent: November 3, 2009Assignee: Duty Free Group (China) LimitedInventor: Kwok Hung Aeneas Ho
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Publication number: 20090268372Abstract: When external electrodes of a multilayer ceramic capacitor are formed by performing direct plating on surfaces at which internal electrodes are exposed without forming paste electrode layers, bonding forces of plating layers are relatively weak, and in addition, when glass particles are included in the plating layers, blisters are often generated. To overcome these problems, a multilayer ceramic capacitor is formed by performing electrolytic plating using a plating bath including glass particles, electrolytic plating layers including glass particles dispersed therein are formed as the external electrodes.Type: ApplicationFiled: January 21, 2009Publication date: October 29, 2009Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Makoto OGAWA, Akihiro MOTOKI, Ichiro NAKAMURA, Norihiro YOSHIKAWA, Toshiyuki IWANAGA, Kenichi KAWASAKI, Shunsuke TAKEUCHI
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Publication number: 20090242016Abstract: A method of fabricating nanowires or microwires employs a robust conductive surface whose edges define electrodes for promoting electrochemical deposition of nanowire material at those edges. Controlled deposition times and thin conductive layers allow extremely small diameter wires to be created and then removed without destruction of the pattern and the wires to be applied to a second substrate or used for composite materials.Type: ApplicationFiled: January 23, 2009Publication date: October 1, 2009Inventor: Michael Zach
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Publication number: 20090212009Abstract: Embodiments of the present invention provide mesoscale or microscale three-dimensional structures (e.g. components, device, and the like). Embodiments relate to one or more of (1) the formation of such structures which incorporate sheets of dielectric material and/or wherein seed layer material used to allow electrodeposition over dielectric material is removed via planarization operations; (2) the formation of such structures wherein masks used for at least some selective patterning operations are obtained through transfer plating of masking material to a surface of a substrate or previously formed layer, and/or (3) the formation of such structures wherein masks used for forming at least portions of some layers are patterned on the build surface directly from data representing the mask configuration, e.g. in some embodiments mask patterning is achieved by selectively dispensing material via a computer controlled inkjet nozzle or array or via a computer controlled extrusion device.Type: ApplicationFiled: February 20, 2009Publication date: August 27, 2009Inventors: Michael S. Lockard, Dennis R. Smalley, Willa M. Larsen, Richard T. Chen
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Publication number: 20090159186Abstract: A deformable mirror formed out of two layers of a nanolaminate foil attached to a stiff substrate is introduced. Deformation is provided by an electrostatic force between two of the layers. The internal stiffness of the structure allows for high-spatial-frequency shapes. The nanolaminate foil of the present invention allows for a high-quality mirror surface. The device achieves high precision in the vertical direction by using foils with accurately controlled thicknesses, but does not require high precision in the lateral dimensions, allowing such mirrors to be fabricated using crude lithography techniques. Such techniques allow structures up to about the meter scale to be fabricated.Type: ApplicationFiled: January 30, 2009Publication date: June 25, 2009Inventors: Alexandros P Papavasiliou, Scot S. Olivier
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Publication number: 20090141376Abstract: SPR-compatible substrates for high density microarray fabrication and analyses are provided. Novel carbon-on-metal thin film substrate architecture permits the integration of surface plasmon resonance detection with photolithographically fabricated biomolecule arrays for the analysis of biomolecular interactions. The utility of the technology is shown in the analysis of specific DNA-DNA, DNA-RNA and DNA-protein binding interactions. These new substrates may be used to determine the secondary structure of RNA molecules, to probe the sequence-specific binding kinetics and affinity of proteins and small molecules, and as substrates for small-molecule combinatorial chemistry platforms for drug discovery applications.Type: ApplicationFiled: February 26, 2008Publication date: June 4, 2009Inventors: Lloyd M. Smith, Matthew R. Lockett, Michael R. Shortreed, Robert M. Corn, Stephen Weibel, Robert J. Hamers, Bin Sun
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Publication number: 20090127517Abstract: To provide a technique for producing a high-frequency substrate featuring a superior adhesion force of a conductor. The high-frequency substrate is constructed of a base member and a conductor adhered to the base member, and the base member is composed of a polymer which is a fluoropolymer having a conductor-affinitive monomer graftpolymerized at a grafting percentage of 1% or less by weight. After reactive sites necessary for graftpolymerization are formed on a film of a fluoropolymer under an oxygen-free atmosphere by irradiating the film with an electron beam or the like, the fluoropolymer film is introduced into a solution of a conductor-affinitive monomer so as to cause graftpolymerization, and a conductor is adhered thereto to thereby produce a substrate, with a grafting percentage of the monomer to the fluoropolymer being 1% or less by weight in the graftpolymerization.Type: ApplicationFiled: December 5, 2006Publication date: May 21, 2009Inventors: Masao Tamada, Noriaki Seko, Eiji Sakata, Naoki Itoh
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Publication number: 20090130403Abstract: The present invention provides an adhesive pad comprising a fibrous layer comprising a mixture of metal fibers and polymeric fibers, said fibrous layer having a thickness of at least 3 mm and having on at least one of its opposite major surfaces an adhesive layer, said adhesive layer being configured so as to allow electrical contact between said fibrous layer and a metal substrate when such metal substrate is adhered to said adhesive layer. The opposite major surfaces of the fibrous layer of the adhesive pad are generally planar and generally parallel to each other. In a particular embodiment, the adhesive pad is in the form of a sheet, for example rectangular, square, circular or oval or in the form of a web.Type: ApplicationFiled: October 18, 2006Publication date: May 21, 2009Inventors: Bernardus J. Sikkel, Bernard Vincent, Michael D. Swan
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Publication number: 20090092879Abstract: The present application is directed to a fabrication method to reduce Pt loading in fuel cells through the use of thin film electrodes by increasing Pt utilization and the use of more active Pt alloys that can be easily and inexpensively fabricated by sputter deposition. Pt and Pt alloy thin films were sputter deposited onto carbon/Nafion® decals and subsequently hot pressed with the catalyst thin film towards the membrane. The results show improved mass performance and catalyst utilization with Pt thin films and increased mass activities can be achieved with PtCo (76:24 atomic ratio) and PtCr (80:20 atomic ratio) as compared to pure Pt. Mass activity improvements of 14 mV and 8 mV were observed for the PtCo and PtCr alloys with respect to a pure Pt film with similar mass loading under 300/350 kPa hydrogen/oxygen operation.Type: ApplicationFiled: October 3, 2008Publication date: April 9, 2009Inventors: Eric Rolland KREIDLER, Ting HE
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Publication number: 20090075157Abstract: Provided are aligned carbon nanotubes for a fuel cell having a large surface area, a nanocomposite that includes the aligned carbon nanotubes loaded with highly dispersed nanoparticles of a metallic catalyst, methods of producing the carbon nanotubes and the nanocomposite, and a fuel cell including the nanocomposite. In the nanocomposite, nanoparticles of the metallic catalyst are uniformly distributed on external walls of the nanotubes. A fuel cell including the nanocomposite exhibits better performance.Type: ApplicationFiled: October 6, 2005Publication date: March 19, 2009Inventors: Chan-Ho Pak, Hyuk Chang, Sung-Ho Jin, Xiang-Rong Ye, Li-Han Chen
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Patent number: 7497916Abstract: When a separation layer is formed using a stamper between a substrate and the stamper on a thick substrate, on the surface of which a rewritable recording multilayer film provided with signal guide grooves or pits and the signal guide grooves or pits are transferred from the stamper to the surface, variations in the thickness of the separation layer are produced due to unevenness of the distance between the stamper and the substrate. The surface of the kth signal recording layer of the kth signal substrate is shaped parallel to the surface with the guide grooves and pits of the (k?1)th signal recording layer on the (k?1)th stamper, a (k?1)th separation layer is formed between the two and then the (k?1)th stamper is peeled off. The distance between the surface with the guide grooves and pits of the (k?1)th signal recording layer and the kth signal recording layer becomes uniform, and therefore the thickness of the (k?1)th separation layer can be kept uniform.Type: GrantFiled: February 26, 2003Date of Patent: March 3, 2009Assignee: Panasonic CorporationInventors: Kazuhiro Hayashi, Kazuya Hisada, Eiji Ohno
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Publication number: 20090050258Abstract: In one embodiment of the present disclosure a method for forming a PEM fuel cell electrode is provided. The method includes applying a hydrophilic wetting agent on an electrode surface. A catalyst layer is deposited on the wetted electrode surface by pulse electrodeposition, at least a portion of the catalyst penetrating the electrode surface. The electrode surface is heat treated.Type: ApplicationFiled: August 22, 2008Publication date: February 26, 2009Applicant: University of South CarolinaInventors: Branko N. Popov, Yoon-Seok Choi, Subasri M Ayyadurai, Jong-Won Lee
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Publication number: 20090044897Abstract: A temporary protective coating is provided over a coated glass substrate. The temporary protective coating is preferably applied in an aqueous dispersion then solidified on the substrate. In some instances, the temporary protective coating may be removed by treatment with a basic solution. In certain example embodiments, the temporary protective coating is applied after heat treatment before the coated substrate is coupled to another substrate to form a window unit such as an IG window unit or a laminated vehicle windshield.Type: ApplicationFiled: August 8, 2008Publication date: February 19, 2009Applicant: Guardian Industries Corp.Inventors: Scott V. Thomsen, Desaraju V. Varaprasad
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Publication number: 20080319493Abstract: The invention is directed to a method of bonding a hermetically sealed electronics package to an electrode or a flexible circuit and the resulting electronics package that is suitable for implantation in living tissue, such as for a retinal or cortical electrode array to enable restoration of sight to certain non-sighted individuals. The hermetically sealed electronics package is directly bonded to the flex circuit or electrode by electroplating a biocompatible material, such as platinum or gold, effectively forming a plated rivet-shaped connection, which bonds the flex circuit to the electronics package. The resulting electronic device is biocompatible and is suitable for long-term implantation in living tissue. The present invention is directed to a device comprising a substrate containing at least one contact, a flexible assembly containing at least one pad, and electroplated bonding between said contact and said pad that bonds said substrate and said flexible assembly together.Type: ApplicationFiled: June 21, 2007Publication date: December 25, 2008Inventors: Dao Min Zhou, James Singleton Little, Robert J. Greenberg
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Publication number: 20080314506Abstract: The invention is directed to a method of bonding a hermetically sealed electronics package to an electrode or a flexible circuit and the resulting electronics package that is suitable for implantation in living tissue, such as for a retinal or cortical electrode array to enable restoration of sight to certain non-sighted individuals. The hermetically sealed electronics package is directly bonded to the flex circuit or electrode by electroplating a biocompatible material, such as platinum or gold, effectively forming a plated rivet-shaped connection, which bonds the flex circuit to the electronics package. The resulting electronic device is biocompatible and is suitable for long-term implantation in living tissue. The present invention is directed to a device comprising a substrate containing at least one contact, a flexible assembly containing at least one pad, and electroplated bonding between said contact and said pad that bonds said substrate and said flexible assembly together.Type: ApplicationFiled: October 26, 2007Publication date: December 25, 2008Inventors: Dao Min Zhou, James Singleton Little, Robert J. Greenberg
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Publication number: 20080302468Abstract: Printed circuit boards have circuit layers with one or more via filled holes with copper wraps and methods of manufacturing the same. An embodiment of the present invention provides a method to enhance the consistency of the wraparound plating of through-hole vias of printed circuit boards with (requiring) via filling to provide extra reliability to the printed circuit boards and enables the designers and/or manufacturers of printed circuit boards to design and manufacture boards with relatively fine features and/or tight geometries.Type: ApplicationFiled: June 5, 2008Publication date: December 11, 2008Inventor: Rajwant Singh Sidhu
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Publication number: 20080257481Abstract: An ampoule contains a solution, e.g. an inhalation or injectable pharmaceutical, and an outer surface of the ampoule is coated with a metal or metal compound so as to reduce moisture egress from the ampoule and reduce contamination of ampoule contents from external sources. Labels are easily applied to the coating.Type: ApplicationFiled: May 9, 2008Publication date: October 23, 2008Applicant: Breath LimitedInventors: Ian Gardner Cameron McAffer, Peter Ernest Tasko
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Publication number: 20080257480Abstract: The object of the present invention is to provide: a method for manufacturing a multilayer printed wiring board which enables the dielectric layers to have excellent thickness uniformity, the capacitor circuits to have high registration accuracy and the unnecessary dielectric layer is removed as large as possible; and a multilayer printed wiring board with an embedded capacitor circuit manufactured by the method.Type: ApplicationFiled: August 9, 2005Publication date: October 23, 2008Applicant: MITSUI MINING & SMELTING CO., LTD.Inventor: Kensuke Nakamura
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Publication number: 20080230171Abstract: A method for producing a catalyst-layer-supporting substrate includes a lamination step of forming a laminate of metal catalyst layers and mixture layers on a substrate by repeating a first step and a second step plural times alternatively; and an acid treatment step of subjecting the laminate to an acid treatment, wherein the first step is a step of sputtering or depositing the metal catalyst layer that comprises a catalyst, and the second step is a step of sputtering or depositing the mixture layer of carbon and metal, the metal of the mixture layer including at least one element M selected from the group consisting of Sn, Al, Cu and Zn.Type: ApplicationFiled: March 19, 2008Publication date: September 25, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Wu MEI, Taishi Fukazawa, Takahiro Sato, Yoshihiko Nakano
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Publication number: 20080173388Abstract: A method for making an architectural laminate includes: (a) providing a sheet-like strip wound on a supplying roller; (b) conveying the sheet-like strip to pass through a deposition chamber; (c) depositing a face layer on the sheet-like strip through vapor deposition techniques; and (d) storing the deposited sheet-like strip on a take-up roller.Type: ApplicationFiled: January 18, 2008Publication date: July 24, 2008Applicant: XXENTRIA TECHNOLOGY MATERIALS CO., LTD.Inventors: Hsien-Sung Cheng, Hsien-Te Cheng
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Publication number: 20080104832Abstract: A method for manufacturing an electronic substrate including an electronic component bonded with adhesive to a base part, comprises (a) applying a droplet containing the adhesive to an area on the base part, the area facing to the electronic component, within a range substantially equal to a size of the electronic component by using a droplet ejection head moving in relatively to the base part, and (b) mounting the electronic component on the adhesive applied to the base part.Type: ApplicationFiled: November 6, 2007Publication date: May 8, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Tsuyoshi SHINTATE
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Publication number: 20080107865Abstract: Present invention provides an electrodeposited copper foil with carrier foil that assure high bonding strength between a surface of the bulk copper layer and a resin substrate layer even when surface roughness is low, and hardly occurs delamination even when pin holes and the like remain in a bulk copper layer or in the side wall of the through holes or via holes and the like after contact with a desmear solution and the like. To solve such a problem, electrodeposited copper foil with carrier foil with a primer resin layer comprising a bonding interface layer, a bulk copper layer, a plated Ni—Zn alloy layer and a primer resin layer which is formed in this order at least on one surface of the carrier foil is applied.Type: ApplicationFiled: September 9, 2005Publication date: May 8, 2008Applicant: MITSUI MINING & SMELTING CO., LTD.Inventors: Tetsuhiro Matsunaga, Toshifumi Matsushima, Tetsuro Sato, Kensuke Nakamura, Hiroyuki Kon, Kenichiro Iwakiri
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Publication number: 20080105362Abstract: A method for manufacturing a nano-particulate electrode for Dye Solar Cells including the steps of providing an electrically conductive substrate, formation of a nanoparticulate layer on the substrate, application of dye to the nanoparticulate layer and an additional step of electrolytic treatment of the nanoparticulate layer in an electrolyte.Type: ApplicationFiled: December 17, 2004Publication date: May 8, 2008Applicant: DYESOL LTD.Inventors: Igor Lvovich Skryabin, Graeme Leslie Evans
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Publication number: 20080102239Abstract: The present invention is directed to flocked articles comprising a porous film and methods of manufacturing such articles.Type: ApplicationFiled: July 27, 2006Publication date: May 1, 2008Inventor: Louis Brown Abrams
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Patent number: 7293353Abstract: Disclosed is a method of fabricating rigid flexible PCBs. In the method, a self-detachable adhesive tape is used to separate a wafer and a substrate from each other in the course of conventionally fabricating a semiconductor wafer, is employed to avoid inherent problems occurring in the conventional method of fabricating rigid flexible PCBs.Type: GrantFiled: March 30, 2005Date of Patent: November 13, 2007Assignee: Samsung Electro Mechanics Co., Ltd.Inventor: Norio Matsuda
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Patent number: 7282257Abstract: The present invention relates to resin compositions that are useful for preparing adhesive films, which are, in turn, useful for forming interlayer insulation layers for multi-layered printed wiring boards having an excellent mechanical strength and capable of being roughened by an oxidizing agent.Type: GrantFiled: June 25, 2004Date of Patent: October 16, 2007Assignee: Ajinomoto Co., Inc.Inventors: Hiroshi Orikabe, Kenji Kawai
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Patent number: 7192509Abstract: Process for producing a metal structure in foam form, including the steps of providing a nonconductive substrate having a foamed structure, applying conductive particles to the substrate, so that the conductive particles are fixed to the entire surface of the substrate, and in particular to each individual pore of the substrate, and introducing the pretreated substrate into an electroplating device, in which a homogenous metal layer is formed on the conductive particles.Type: GrantFiled: February 18, 2005Date of Patent: March 20, 2007Assignee: Infineon Technologies AGInventors: Andreas Karl, Andreas Muller-Hipper, Ewald Simmerlein-Erlbacher
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Patent number: 7189302Abstract: A fabricating method for a multi-layer printed circuit board is provided. The method may include attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to each of the releasing films and a resist layer to each of the first metal films to form a base member. A first connection portion may then be formed on each of the first metal films, and a second connection portion may be integrally formed on each of the first connection portions. A second metal film may then be formed on each of the second connection portions so as to be electrically connected to the connection portions, and, in turn, to the first metal films. Specific portions of the second metal films may be etched to form copper patterns. Upper and lower portions may then be separated by the releasing films to form separate multi-layer printed circuit boards.Type: GrantFiled: November 5, 2004Date of Patent: March 13, 2007Assignee: LG Electronics Inc.Inventors: Jung-Ho Hwang, Sung-Gue Lee, Sang-Min Lee, Joon-Wook Han, Tae-Sik Eo, Yu-Seock Yang
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Patent number: 7156640Abstract: A method for manufacturing an insert die with a pattern region to be transferred onto a molding part is provided. The method includes (a) adhering a first base member having the pattern region and a second base member with an adhesive material, and (b) sealing an exposed portion of the adhesive material by a metal film.Type: GrantFiled: December 22, 2004Date of Patent: January 2, 2007Assignee: Seiko Epson CorporationInventors: Noboru Furuya, Satoshi Kimura
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Patent number: 7156938Abstract: Methods for preparing a multi-layer acoustic transducer with reduced total electrical impedance. The methods are based on the stacking of individual piezoelectric layers with metallized surfaces to form a plate in which the metal layers are electrically connected to form interdigitated electrodes. The total electrical impedance of a multi-layer stack comprised of piezoelectric layers connected in this manner is inversely related to the square of the number of layers in the stack. This provides for better matching of the acoustic stack impedance to that of the electrical cable and improved acoustic element sensitivity.Type: GrantFiled: November 11, 2003Date of Patent: January 2, 2007Assignee: General Electric CompanyInventors: Charles E. Baumgartner, Robert S. Lewandowski
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Patent number: 7063762Abstract: A method of making a circuitized substrate such as a laminate chip carrier in which a polymer, e.g., Teflon, is used as a dielectric layer and a promotion adhesion layer of a polymer is used to securely adhere a conductive layer thereto which is deposited by plating. The resulting product is thus able to provide extremely narrow conductive circuitry for subsequent connections, e.g., to a semiconductor chip. Electroless plating is the preferred plating method with the dielectric immersed in a solution of conductive monomers, e.g., pyrrole monomer, the solution also possibly containing a seed material such as palladium-tin.Type: GrantFiled: August 20, 2003Date of Patent: June 20, 2006Assignee: Endicott Interconnect Technologies, Inc.Inventors: Elizabeth Foster, Gregory Kevern, Anita Sargent
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Patent number: 6984456Abstract: There is provided a flexible printed wiring board including an insulating layer having a high optical transmittance, a high adhesion strength and a high migration resistance, and suitable for a chip on film (hereafter referred to as COF). In a flexible printed wiring board for COF, having an insulating layer on which a conductive layer of an electrodeposited copper foil is laminated, and an optical transmittance of 50% or more of the insulating layer in the etched region when a circuit is formed by etching said conductive layer, electrodeposited copper foil was made to have a rust-proofing layer of a nickel-zinc alloy on the adhering surface to be adhered to the insulating layer; the surface roughness (Rz) of the adhering surface was made to be 0.05 to 1.5 ?m, and the specular gloss was made to be 250 or more when the incident angle is 60°.Type: GrantFiled: May 12, 2003Date of Patent: January 10, 2006Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Kazuyuki Okada, Yasuji Hara, Akira Uchiyama, Masaru Takahashi
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Patent number: 6926795Abstract: The present invention provides a plastic-coated metal plate for an automobile exterior plate which is a laminate metal plate coated on both faces or one face of the metal plate with a plastic layer, wherein the plastic layer has a surface tension of at least 30 mN/m, an elongation percentage of at least 30% at a tensile rate of 20 mm/minute/20° C. and a rupture strength of at least 600 kg/cm2 at a tensile rate of 20 mm/minute/20° C., and a part for a major external face side in a car body, wherein the above plastic-coated metal plate is cut, molded and joined to form the part for a major external face side in a car body, and a metal-exposed part thereof is coated by electrodeposition.Type: GrantFiled: November 25, 2002Date of Patent: August 9, 2005Assignee: Kansai Paint Co., Ltd.Inventors: Tadayoshi Hiraki, Takeshi Yawata, Akira Tominaga, Tadashi Watanabe
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Patent number: 6855625Abstract: Single-sided conductor patterned films are prepared, each of which has a conductor pattern formed only one side of a resin film and via hole filled with conductive paste. A single-sided conductor patterned film which has a conductor pattern formed only one side of a resin film and an opening formed in the resin film so as to expose an electrode is laminated on the single-sided conductor patterned films. Moreover, a cover layer with an opening to expose an electrode is laminated on a bottom surface of the single-sided conductor patterned films to form a laminate. Then, by pressing while heating the laminate, a multilayer substrate having the electrodes at both sides thereof can be produced.Type: GrantFiled: June 11, 2003Date of Patent: February 15, 2005Assignee: Denso CorporationInventors: Koji Kondo, Tetsuaki Kamiya, Toshikazu Harada, Ryuichi Onoda, Yasutaka Kamiya, Gentaro Masuda, Yoshitaro Yazaki, Tomohiro Yokochi
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Patent number: 6797098Abstract: The present invention provides a plastics-covered metal plate excellent in chipping resistance, corrosion resistance etc. made by covering one surface or both surfaces of a metal plate with at least two kinds of plastics layers whose rates of elongation are different and a process of covering a car body by using said covered metal plate.Type: GrantFiled: April 9, 2002Date of Patent: September 28, 2004Assignee: Kansai Paint Co., Ltd.Inventors: Tadashi Watanabe, Tadayoshi Hiraki, Akira Tominaga, Takeshi Yawata
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Patent number: 6682619Abstract: A structural dielectrically tailored prepreg panel includes structural materials having desired electrical qualities in one or more desired areas without loss of structural integrity or the addition of parasitic weight. In one method of manufacture an applicator such as a spray nozzle applies a first dielectric material to a first area not covered by a mask. In another method, the dielectric material includes a dry material, which is sprinkled upon a tacky impregnating resin in a controlled volume percentage to provide a dielectric gradient. In yet another embodiment an applicator arrangement includes a plurality of applicators arranged to form a multiple of applicator sets which communicates with a controller to selectively activate a particular applicator and dispense a desired dielectric resin in a desired location.Type: GrantFiled: July 17, 2001Date of Patent: January 27, 2004Assignee: Sikorsky Aircraft CorporationInventors: William Cermignani, Joseph Panalone, III, Leonard J. Doolin
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Publication number: 20040007312Abstract: Provided is a mounting method for bonding objects each having an electrode to each other by irradiating an energy wave or energy particle beam to an electrode of at least one of the objects to clean it, applying a nonconductive paste on the electrode while maintaining a special gas atmosphere, and bonding the electrode to an electrode of the other object fluxlessly with the nonconductive paste surface interposed therebetween. The primary and secondary oxidations of the electrodes of the objects are effectively prevented, thereby enabling fluxless bonding. The mounting steps are simplified and the quality of the bonded objects is improved.Type: ApplicationFiled: February 3, 2003Publication date: January 15, 2004Inventor: Akira Yamauchi
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Publication number: 20040000371Abstract: A method of making a set of metallic deposits includes injection molding a substrate, where a pattern of channels is in a surface of the substrate, applying a metallic layer on the surface, to form metallic deposits in the pattern, and removing a portion of the metallic layer, to expose a portion of the surface. The set of metallic deposits can form an electrode set for an electrochemical sensor strip.Type: ApplicationFiled: December 2, 2002Publication date: January 1, 2004Inventors: Raghbir S. Bhullar, Joseph C. Fjelstad
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Patent number: 6670308Abstract: An epitaxial article and method for forming the same includes a substrate having a textured surface, and an electrochemically deposited substantially single orientation epitaxial layer disposed on and in contact with the textured surface. The epitaxial article can include an electromagnetically active layer and an epitaxial buffer layer. The electromagnetically active layer and epitaxial buffer layer can also be deposited electrochemically.Type: GrantFiled: March 19, 2002Date of Patent: December 30, 2003Assignee: UT-Battelle, LLCInventor: Amit Goyal