With Plasma Generation Means Remote From Processing Chamber Patents (Class 156/345.35)
  • Patent number: 7411148
    Abstract: A plasma generation apparatus includes: a chamber having a chamber lid and defining an airtight reaction region; a susceptor in the chamber; a gas supplier supplying a process gas to the chamber; and a toroidal core vertically disposed with respect to the susceptor through the chamber lid, including: a toroidal ferromagnetic core combined with the chamber, the toroidal ferromagnetic core having a first portion outside the chamber and a second portion inside the chamber, the second portion having an opening portion; a radio frequency (RF) power supply connected to the chamber; an induction coil electrically connected to the RF power supply, the induction coil rolling the first portion; and a matching circuit matching an impedance between the RF power supply and the induction coil.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: August 12, 2008
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Gi-Chung Kwon, Sang-Won Lee, Sae-Hoon Uhm, Jae-Hyun Kim, Bo-Han Hong, Yong-Kwan Lee
  • Publication number: 20080185364
    Abstract: A plasma etching method etches an organic film formed on a target substrate by using a plasma of a processing gas via a silicon-containing mask. The processing gas is a gaseous mixture of an oxygen-containing gas, a rare gas and a carbon fluoride gas. A computer-executable control program controls a plasma etching apparatus to perform the plasma etching method. A computer-readable storage medium stores therein a computer-executable control program.
    Type: Application
    Filed: January 31, 2008
    Publication date: August 7, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshimitsu Kon, Yoshinobu Hayakawa
  • Publication number: 20080179286
    Abstract: A dielectric barrier discharge plasma generator includes a dielectric chamber. The chamber contains or incorporates a solid surface that is to be treated with non-thermal plasma. The dielectric chamber can be substantially sealed and confine an atmosphere therein. An atmosphere control system is provided for controlling the atmosphere within the chamber. At least one or two electrodes are located outside of the dielectric chamber. When actuated by an appropriate source of plasma generating electrical power the electrodes cause the generation of a solid surface modifying non-thermal plasma in a plasma zone within the dielectric chamber. A transport system is provided for moving the electrode and the dielectric chamber relative to one another. A plasma zone is confined within the dielectric chamber adjacent to the electrodes, and remains substantially stationary relative to the electrodes. The dielectric chamber carries the solid surface through the plasma zone.
    Type: Application
    Filed: January 29, 2007
    Publication date: July 31, 2008
    Inventor: Igor Murokh
  • Publication number: 20080179008
    Abstract: A reactor is provided for removing polymer from a backside of a workpiece. The reactor includes a vacuum chamber having a ceiling, a floor and a cylindrical side wall. A workpiece support apparatus within the chamber is configured to support a workpiece thereon, so that the workpiece has its front side facing the ceiling. The support apparatus leaves at least an annular periphery of the backside of the workpiece exposed. A confinement member defines a narrow gap with the outer edge of the workpiece, the narrow gap being on the order of about 1% of workpiece diameter, the narrow gap corresponding to a boundary dividing the chamber between an upper process zone and a lower process zone. A vacuum pump is coupled to the lower process zone. A lower external plasma-generating chamber introduces a plasma by-product into the lower process zone and a supply of a polymer etch precursor gas coupled to the lower external plasma-generating chamber.
    Type: Application
    Filed: March 14, 2007
    Publication date: July 31, 2008
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Andrew Nguyen, Ajit Balakrishna, David Palagashvili, James P. Cruse, Jennifer Y. Sun, Valentin N. Todorov, Shahid Rauf, Kartik Ramaswamy, Gerhard M. Schneider, Imad Yousif, Martin Jeffrey Salinas
  • Publication number: 20080179007
    Abstract: A reactor is provided for removing polymer from a backside of a workpiece. The reactor includes a vacuum chamber having a ceiling, a floor and a cylindrical side wall. The reactor further includes workpiece support apparatus within the chamber configured for a workpiece to be placed thereon with its front side facing the ceiling. The support apparatus is configured to leave at least an annular periphery of the backside of the workpiece exposed. A confinement member defines a narrow gap with an outer edge of the workpiece, the narrow gap being on the order of about 1% of the workpiece diameter, the narrow gap corresponding to a boundary dividing the chamber between an upper process zone and a lower process zone, the reactor further comprising a vacuum pump coupled to the lower process zone.
    Type: Application
    Filed: March 14, 2007
    Publication date: July 31, 2008
    Inventors: KENNETH S. COLLINS, Hiroji Hanawa, Andrew Nguyen, Ajit Balakrishna, David Palagashvili, James P. Cruse, Jennifer Y. Sun, Valentin N. Todorow, Shahid Rauf, Kartik Ramaswamy, Gerhard M. Schneider, Imad Yousif, Martin Jeffrey Salinas
  • Publication number: 20080179009
    Abstract: A reactor is provided for removing polymer from a backside of a workpiece. The reactor includes a vacuum chamber having a ceiling, a floor and a cylindrical side wall. A workpiece support apparatus within the chamber is configured to support a workpiece thereon so that the workpiece has its front side facing the ceiling. The support apparatus leaves at least an annular periphery of the backside of the workpiece exposed. A confinement member defines a narrow gap with the outer edge of the workpiece, the narrow gap being on the order of about 1% of the workpiece diameter, the narrow gap corresponding to a boundary dividing the chamber between an upper process zone and a lower process zone. A vacuum pump is coupled to the lower process zone.
    Type: Application
    Filed: March 14, 2007
    Publication date: July 31, 2008
    Inventors: KENNETH S. COLLINS, Hiroji Hanawa, Andrew Nguyen, Ajit Balakrishna, David Palagashvili, James P. Cruse, Jennifer Y. Sun, Valentin N. Todorow, Shahid Rauf, Kartik Ramaswamy, Gerhard M. Schneider, Imad Yousif, Martin Jeffrey Salinas
  • Publication number: 20080169065
    Abstract: A plasma processing apparatus having a processing chamber and a sample base, and processing a sample by using plasma generated inside the processing chamber, the processing chamber being located inside a vacuum container, the sample base being located inside the processing chamber, the sample being mounted on the sample base, the plasma processing apparatus including a component member configuring inner-side wall surface of the processing chamber, and having a dielectric portion on the inner-side wall surface, an exhaustion unit for exhausting the inside of the processing chamber, and an electric-field supply unit for supplying an electric field to the component member in a state where the plasma will not be generated inside the processing chamber, wherein magnitude of the electric field supplied from the electric-field supply unit is changed rapidly while exhausting the inside of the processing chamber by the exhaustion unit.
    Type: Application
    Filed: February 28, 2007
    Publication date: July 17, 2008
    Inventors: Kazue Takahashi, Hitoshi Tamura, Motohiro Tanaka, Motohiko Yoshigai
  • Patent number: 7392759
    Abstract: In a plasma CVD apparatus, a plate formed with a plurality of perforated holes is arranged to separate a plasma generation region and a processing region. The aperture ratio of the perforated holes to the plate is not greater than five percent. Plasma including radicals and excited species is generated from an oxygen (O2) gas in the plasma generation region, then the radicals and excited species flow into the processing region through the perforated holes. A monosilane (SiH4) gas is also supplied into the processing region, but the backward flow of the monosilane gas into the plasma generation region is suppressed by the plate. In the processing region, the radicals and the excited species and the monosilane gas result in a gas phase reaction that yields the silicon dioxide film formed on the substrate or the wafer with high quality.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: July 1, 2008
    Assignees: NEC Corporation, Canon Anelva Corporation
    Inventors: Katsuhisa Yuda, Hiroshi Nogami
  • Publication number: 20080142482
    Abstract: A method and apparatus for the decapsulation of integrated circuit packages. The apparatus includes a support member, the support member having an open region and an adjustable device coupled to the support member. The adjustable device can be adapted to hold a BGA package such that a surface region of the BGA package is spatially disposed to face a decapsulation source and a plurality of balls on the BGA package remain free from contact from the decapsulation source and free from contact from a thermal source capable of causing damage to one or more of the balls. The decapsulation source is provided to subject a portion of the surface region of the BGA package for removal of the portion of the BGA package.
    Type: Application
    Filed: December 23, 2006
    Publication date: June 19, 2008
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Chun Kui Ji, Shan An Liang, Zhi Rong Guo, Min Pan
  • Publication number: 20080138993
    Abstract: A dry etching apparatus comprises: a vacuum chamber where a processing target is disposed on a bottom wall side of an internal space; a coil for generating plasma that is disposed above and outside the vacuum chamber and has conductors disposed so that a gap is formed in a plane view; a top wall that closes the top of the internal space and has a transparent section at a position corresponding to the gap between conductors of the coil 36 in the plane view; and a camera that is disposed above the coil and can capture at least a part of the processing target in a field of view through the gap and the transparent section. The status of the processing target during plasma processing can be observed in real-time.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 12, 2008
    Inventors: Mitsuru Hiroshima, Sumio Miyake, Mitsuhiro Okune, Shozoh Watanabe, Hiroyuki Suzuki
  • Publication number: 20080132078
    Abstract: An ashing device and ashing method that can positively remove resist from a wafer while preventing degradation of the film material properties of exposed porous Low-K film on the wafer. The ashing device of the present invention introduces a gas to a dielectric plasma generating chamber 14, excites said gas to generate a plasma, and performs plasma processing using said gas plasma on a processing work S in use of a Low-K film. The ashing gas introduced from a gas regulator 20 is an inert gas to which H2 has been added. The configuration is formed so that plasma is generated from the gas blend, and the resist is removed by the hydrogen radicals generated.
    Type: Application
    Filed: December 14, 2004
    Publication date: June 5, 2008
    Inventor: Katsuhiro Yamazaki
  • Publication number: 20080110569
    Abstract: The invention provides a method and apparatus for performing plasma etching to form a gate electrode on a large-scale substrate while ensuring the in-plane uniformity of the CD shift of the gate electrode. The present invention measures a radical density distribution of plasma in the processing chamber, feeds processing gases into the processing chamber through multiple locations and controls either the flow rates or compositions of the respective processing gases or the in-plane temperature distribution of a stage on which the substrate is placed, or feeds processing gases into the processing chamber through multiple locations and controls both the flow rates or compositions of the processing gases and the in-plane temperature distribution of the stage on which the substrate is placed.
    Type: Application
    Filed: March 6, 2007
    Publication date: May 15, 2008
    Inventors: Go Miya, Junichi Tanaka, Seiichiro Kanno, Naoshi Itabashi, Hiroshi Akiyama, Kouhei Satou
  • Patent number: 7358192
    Abstract: Embodiments of a cluster tool, processing chamber and method for processing a film stack are provided. In one embodiment, a method for in-situ etching of silicon and metal layers of a film stack is provided that includes the steps of etching an upper metal layer of the film stack in a processing chamber to expose a portion of an underlying silicon layer, and etching a trench in the silicon layer without removing the substrate from the processing chamber. The invention is particularly useful for thin film transistor fabrication for flat panel displays.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: April 15, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Walter R. Merry, Quanyuan Shang, John M. White
  • Publication number: 20080081483
    Abstract: A plasma etching method includes preparing in a reaction chamber a semiconductor substrate on which a material layer to be etched is provided; and injecting an etching gas into the reaction chamber, the etching gas being ionized through an RF (Radio Frequency) power source to generate a plasma, wherein the RF power source outputs RF power in a pulse output mode. The plasma etching apparatus includes a reaction chamber adapted to contain an etching gas; and an RF power source adapted to output RF power for excitation of the etching gas to generate plasma, wherein the apparatus further include a pulse control circuit adapted to control the RF power source to output RF power in a pulse output mode. With the invention, the plasma for etching can be generated in a pulse output mode, thus improving a precision of an endpoint where the etching can be disabled.
    Type: Application
    Filed: December 29, 2006
    Publication date: April 3, 2008
    Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (Shanghai) CORPORATION
    Inventor: Hanming Wu
  • Patent number: 7338575
    Abstract: A process and apparatus for cooling a plasma tube generally includes flowing a hydrocarbon dielectric heat transfer fluid into a space defined by the plasma tube and a concentric tube surrounding the plasma tube. In one embodiment, the hydrocarbon fluid is selected to have a dissipation factor less than 0.002 and a thermal efficiency coefficient greater than or equal to 1.30 kJ/kg*K.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: March 4, 2008
    Assignee: Axcelis Technologies, Inc.
    Inventors: Richard E. Pingree, Jr., Michael Bruce Colson, Michael Silbert
  • Publication number: 20080038926
    Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with a hydrocarbon chemistry or hydrofluorocarbon chemistry or fluorocarbon chemistry or combination of two or more thereof prior to proceeding with the etching process.
    Type: Application
    Filed: August 7, 2006
    Publication date: February 14, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Peter L.G. Ventzek, Lee Chen, Akira Koshiishi, Ikuo Sawada
  • Publication number: 20080038930
    Abstract: Example embodiments relate to a method and an apparatus of ashing an object. The method may include converting a first reaction fluid into plasma, reacting the plasma with a second reaction fluid to generate radicals, and ashing the object using the radicals and the plasma.
    Type: Application
    Filed: June 11, 2007
    Publication date: February 14, 2008
    Inventors: Jae-Kyung Park, Won-Soon Lee, Young-Kyou Park, No-Hyun Huh, Yong-Ho Park
  • Publication number: 20080029483
    Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with an electron beam in the absence of an atomic halogen specie prior to proceeding with the etching process.
    Type: Application
    Filed: August 7, 2006
    Publication date: February 7, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Peter L.G. Ventzek, Lee Chen, Akira Koshiishi, Ikuo Sawada
  • Patent number: 7319295
    Abstract: A radio frequency power supply structure and a plasma CVD device comprising the same are provided in which reflection of radio frequency power at a connecting portion where an RF cable connects to an electrode is reduced so that incidence of the radio frequency power into the electrode increases. In the radio frequency power supply structure for use in a device generating plasma by charging a plate-like electrode with a radio frequency power, the radio frequency power supply structure supplying the electrode with the radio frequency power from an RF cable, the RF cable is positioned on an extended plane of a plane formed by the electrode to connect to the electrode at a connecting portion provided on an end peripheral portion of the electrode. The RF cable connects to the electrode substantially in the same plane as the plane formed by the electrode.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: January 15, 2008
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Hiroshi Mashima, Keisuke Kawamura, Akemi Takano, Yoshiaki Takeuchi, Tetsuro Shigemizu, Tatsufumi Aoi
  • Publication number: 20080000497
    Abstract: A method of removing organic-containing layers, such as photoresists, high temperature organic layers, or organic dielectric materials, from large surface area substrates by plasma treatment at or near atmospheric pressure, wherein said large surface area substrate is transported on a conveyor belt system during said plasma treatment. The plasma is typically principally comprised of a chemically non-reactive species, such as helium. The method can be integrated in-line with the wet strip and/or wet clean, or it can be used in a stand alone system. The apparatus for carrying out the method is also described.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventor: Steven Verhaverbeke
  • Publication number: 20070295356
    Abstract: The method and apparatus of the embodiments of the present invention employ an in-situ particle decontamination technique that allows for such decontamination while a wafer is a vacuum tool or deposition chamber, thereby eliminating the need for another device for performing decontamination. This in-situ decontamination is effective for particle contamination resulting, for example, from tool resident mechanical component. Furthermore, particle decontamination is performed in the presence of plasma, having a potential for helping to maximize a “self bias” voltage, under RF conditions, and is integrated into the vacuum process.
    Type: Application
    Filed: June 22, 2006
    Publication date: December 27, 2007
    Inventors: Paul Alejon Fontejon, Yunxiao Gao, Yinshi Liu, Ning Shi
  • Patent number: 7309842
    Abstract: A monolithic microplasma source includes a dielectric substrate having an outer surface that is exposed to a time varying electric field. A gap layer is positioned on an inner surface of the dielectric substrate. A shield including a slit is positioned on the gap layer. A relief structure is formed in at least one of the gap layer and the dielectric substrate. The dimensions of the gap layer, the slit in the shield, and the relief structure are chosen so as to prevent a formation of a continuous film across the relief structure. A chamber containing a gas is positioned adjacent to the shield so that the gas is ionized to form a microplasma when an electric field is induced in the chamber by the incident time varying electric field.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: December 18, 2007
    Assignee: Verionix Incorporated
    Inventor: Frank C. Doughty
  • Patent number: 7297637
    Abstract: A method for grounding a semiconductor substrate pedestal during a portion of a high voltage power bias oscillation cycle to reduce or eliminate the detrimental effects of feature charging during the operation of a plasma reactor.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: November 20, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chuck E. Hedberg, Kevin G. Donohoe
  • Publication number: 20070251919
    Abstract: In the bevel etching apparatus relating to the present invention, a substrate is inserted between electrically connected electrodes. A high-frequency power source is connected to the electrodes, and ground potential is applied to a support unit that supports the substrate. Gas (atmosphere) is supplied to the gap between the electrodes and the application of the high-frequency electric power to the electrodes causes the generation of atmospheric-pressure glow discharge between the electrode and the substrate. Bevel etching is performed by rotating the substrate along the circumferential direction in this condition. According to this construction, the bevel etching can be simultaneously performed to the front surface, the rear surface and the side of the substrate without causing any configuration change in the substrate.
    Type: Application
    Filed: April 27, 2007
    Publication date: November 1, 2007
    Inventor: Shin-ichi Imai
  • Publication number: 20070215282
    Abstract: A plasma processing apparatus including a chamber having an inner wall with a protective film thereon and a sample stage disposed in the chamber in which plasma is generated by supplying high-frequency wave energy to processing gas to conduct plasma processing for a sample on the sample stage using the plasma. The apparatus includes a control device which determines, based on monitor values of a wafer attracting current monitor (Ip) to monitor a current supplied from a wafer attracting power source, an impedance monitor (Zp) to monitor plasma impedance viewed from a plasma generating power source, and an impedance monitor (Zb) to monitor a plasma impedance viewed from a bias power supply, presence or absence of occurrence of an associated one of abnormal discharge in inner parts, deterioration in insulation of an insulating film of a wafer attracting electrode, and abnormal injection in a gas injection plate.
    Type: Application
    Filed: August 30, 2006
    Publication date: September 20, 2007
    Inventors: Naoshi Itabashi, Tsutomu Tetsuka, Seiichiro Kanno, Motohiko Yoshigai
  • Publication number: 20070209759
    Abstract: In performing plasma etching with the aim to form a gate electrode on a large-diameter substrate, it is difficult according to prior art methods to ensure the in-plane uniformity of CD shift of the gate electrode. The present invention solves the problem by supplying processing gases having different flow rates and compositions respectively through openings formed at positions opposing to the substrate and at the upper corner or side wall of the processing chamber.
    Type: Application
    Filed: August 10, 2006
    Publication date: September 13, 2007
    Inventors: Go Miya, Naoshi Itabashi, Seiichiro Kanno, Akitaka Makino, Hiroshi Akiyama
  • Publication number: 20070197040
    Abstract: A plasma etching method includes the step of performing a plasma etching on a silicon-containing dielectric layer formed on a substrate to be processed by using a plasma, while using an organic layer as a mask. The plasma is generated from a processing gas at least including a C6F6 gas, a rare gas and an oxygen gas, and a flow rate ratio of the oxygen gas to the C6F6 gas (an oxygen gas flow rate/a C6F6 gas flow rate) is set to be about 2.8 to 3.3.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 23, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akinori Kitamura, Masanobu Honda, Nozomi Hirai, Kumiko Yamazaki
  • Patent number: 7245084
    Abstract: An apparatus includes a vacuum chamber, an electrical transformer that surrounds the vacuum chamber to induce an electromagnetic field within the vacuum chamber, and an ignition circuit. The electrical transformer induces an electromagnetic field within the vacuum chamber. The transformer includes a primary winding and a plasma loop coupled to the vacuum chamber to perform as a secondary winding. The ignition circuit is coupled to an ignition core section of the vacuum chamber to ignite the vacuum chamber.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: July 17, 2007
    Assignee: Advanced Energy Industries, Inc.
    Inventors: Juan Jose Gonzalez, Andrew Shabalin, Steven J. Geissler, Fernando Gustavo Tomasel
  • Patent number: 7186313
    Abstract: A device and method for controlling the temperature of a plasma chamber inside wall or other surfaces exposed to the plasma by a plurality of temperature control systems. A plasma process within the plasma chamber can be controlled by independently controlling the temperature of segments of the wall or other surfaces.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: March 6, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Andrej S Mitrovic, Maolin Long, Paul Moroz, Steven T Fink, William D Jones
  • Patent number: 7166167
    Abstract: A laser CVD device capable of tightening adhesion of a film formed by laser CVD to a film formation face of a substrate and preventing cracks from occurring in the film itself is to be provided. The device comprises a plasma pretreating unit for turning pretreating gas into a plasma state by arc discharge and for supplying the plasma sate gas to the film formation face; and a film forming unit having means for sealing film forming gas while being isolated from an external atmosphere, means for radiating a laser beam to the film forming gas, wherein the film is formed over the film formation face of the substrate.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: January 23, 2007
    Assignee: Laserfront Technologies, Inc.
    Inventors: Yukio Morishige, Atsushi Ueda
  • Patent number: 7160813
    Abstract: A method is disclosed for removing a polysilicon layer from a semiconductor wafer, in which a downstream plasma source is used first to planarize the wafer, removing contours in the polysilicon layer caused by deposition over lithographic features, such as via holes. The planarizing process is followed by exposure to a plasma made by a direct, radio frequency plasma source, which may be in combination with the downstream plasma source, to perform the bulk etching of the polysilicon. The invention can produce planar surface topography after the top layer of the film is removed, in which the residual recess height of the polysilicon plug filling a via hole is less than about about 10 nm.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: January 9, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Cindy W. Chen, Eddie Chiu, Mavis J. Chaboya, Yuh-Jia Su
  • Patent number: 7137354
    Abstract: A plasma immersion ion implantation reactor for ion implanting a species into a surface layer of a workpiece includes an enclosure which has a side wall and a ceiling defining a chamber and a workpiece support pedestal within the chamber having a workpiece support surface facing the ceiling and defining a process region extending generally across the wafer support pedestal and confined laterally by the side wall and axially between the workpiece support pedestal and the ceiling. The enclosure has at least a first pair of openings at generally opposite sides of the process region and a first hollow conduit outside of the chamber having first and second ends connected to respective ones of the first pair of openings, so as to provide a first reentrant path extending through the conduit and across said process region.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: November 21, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo, Gonzalo Antonio Monroy
  • Patent number: 7094316
    Abstract: A plasma reactor for processing a workpiece, including an enclosure defining a vacuum chamber, a workpiece support within the enclosure facing an overlying portion of the enclosure, the enclosure having at least first and second openings therethrough near generally opposite sides of the workpiece support. At least one hollow conduit is connected to the first and second openings. A closed torroidal path is provided through the conduit and extending between the first and second openings across the wafer surface. A process gas supply is coupled to the interior of the chamber for supplying process gas to the torroidal path. A coil antenna is coupled to an RF power source and inductively, coupled to the interior of the hollow conduit and capable of maintaining a plasma in the torroidal path.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: August 22, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Hiroji Hanawa, Kenneth S Collins, Kartik Ramaswamy, Andrew Nguyen, Tsutomu Tanaka, Yan Ye
  • Patent number: 7052575
    Abstract: A system for regulating an etch process is provided. The system includes one or more light sources, each light source directing light to one or more features and/or gratings on a wafer. Light reflected from the features and/or gratings is collected by a measuring system, which processes the collected light. The collected light is indicative of the dimensions achieved at respective portions of the wafer. The measuring system provides etching related data to a processor that determines the acceptability of the etching of the respective portions of the wafer. The system also includes one or more etching devices, each such device corresponding to a portion of the wafer and providing for the etching thereof. The processor selectively controls the etching devices to regulate etching of the portions of the wafer.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: May 30, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Ramkumar Subramanian
  • Patent number: 7037376
    Abstract: A processing chamber may be effectively cleaned by a remote plasma flowed through the chamber in a direction opposite to the direction of gas flowed during wafer processing. Specifically, the remotely generated plasma may be introduced directly into the chamber through a processing gas exhaust or other port, and then be exhausted from the chamber by traveling through the gas distribution shower head to the foreline. In one embodiment of the present invention, this reverse flow of remote cleaning plasma is maintained for the duration of the chamber cleaning step. In an alternative embodiment, the direction of flow of the remote cleaning plasma through the chamber is alternated between this reverse flow and a conventional forward flow.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: May 2, 2006
    Assignee: Applied Materials Inc.
    Inventors: Keith Harvey, Karthik Janakiraman, Kirby Floyd
  • Patent number: 7022616
    Abstract: This invention provides the following high-rate silicon etching method. An object to be processed W having a silicon region is so set as to be in contact with a process space in a process chamber that can be held in vacuum. An etching gas is introduced into the process space to form a gas atmosphere at a gas pressure of 13 Pa to 1,333 Pa (100 mTorr to 10 Torr). A plasma is generated upon application of RF power. In the plasma, the sum of the number of charged particles such as ions and the number of radicals increases, and etching of the silicon region is performed at a higher rate than in conventional etching.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: April 4, 2006
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Takanori Mimura, Kazuya Nagaseki, Itsuko Sakai, Tokuhisa Ohiwa
  • Patent number: 7017514
    Abstract: An apparatus for managing plasma in wafer processing operations is disclosed which includes a housing having an internal region defined by an inner wall. The housing has an input port for supplying a plasma into the housing at a first end and an output port at a second end. The apparatus includes a hollow tube contained in the internal region within the housing. The hollow tube is defined by a wall that extends between the first end and the second end and contains a plurality of orifices generating a plurality of fluid paths through the wall. A fluid input is included supplying fluid into the internal region of the housing. The supplied fluid is capable of passing through the plurality of orifices, and the plasma supplied through the input port is capable of being mixed within the hollow tube with the supplied fluid. The output port at the second end of the housing enables the mixed plasma and fluid supply to exit the housing.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: March 28, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Robert A. Shepherd, Jr., James Caughran
  • Patent number: 6994769
    Abstract: An apparatus configured to remove chamber deposits between process operations is provided. The processing chamber includes a top electrode in communication with a power supply. A processing chamber defined within a base, a sidewall extending from the base, and a top disposed on the sidewall is provided. The processing chamber has an outlet enabling removal of fluids within the processing chamber. The processing chamber includes a substrate support and an inner surface of the processing chamber defined by the base, the sidewall and the top. The inner surface is coated with a fluorine containing polymer coating. The fluorine containing polymer coating is configured to release fluorine upon creation of an oxygen plasma in the processing chamber to remove a residue deposited on the fluorine containing polymer coating. The residue was deposited on the polymer coating from a processing operation performed in the processing chamber.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: February 7, 2006
    Assignee: Lam Research Corporation
    Inventors: Harmeet Singh, John E. Daugherty, Vahid Vahedi, Saurabh J. Ullal
  • Patent number: 6974771
    Abstract: In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: December 13, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Fusen Chen, Ling Chen, Walter Benjamin Glenn, Praburam Gopalraja, Jianming Fu
  • Patent number: 6946063
    Abstract: In one aspect of the invention is a method to construct plasma chambers with improved wall resistance to deterioration. In one embodiment of the invention, a chamber is made of an aluminum alloy having low concentrations of elements that form non-soluble, intermetallic particles to address coating/substrate issues, has swaged-in cooling tubes to reduce thermal stress by improving thermal resistance, and has a plurality of dielectric gaps to decrease ion bombardment.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: September 20, 2005
    Assignee: Advanced Energy Industries, Inc.
    Inventors: Juan Jose Gonzalez, Steve Dillon, Andrew Shabalin, Justin Mauck, Fernando Gustavo Tomasel
  • Patent number: 6939434
    Abstract: A plasma reactor is described that includes a vacuum chamber defined by an enclosure including a side wall and a workpiece support pedestal within the chamber defining a processing region overlying said pedestal. The chamber has at least a first pair of ports near opposing sides of said processing region and a first external reentrant tube is connected at respective ends thereof to the pair of ports. The reactor further includes a process gas injection apparatus (such as a gas distribution plate) and an RF power applicator coupled to the reentrant tube for applying plasma source power to process gases within the tube to produce a reentrant torroidal plasma current through the first tube and across said processing region. A magnet controls radial distribution of plasma ion density in the processing region, the magnet having an elongate pole piece defining a pole piece axis intersecting the processing region.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: September 6, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Yan Ye, Kartik Ramaswamy, Andrew Nguyen, Michael S. Barnes, Huong Thanh Nguyen
  • Patent number: 6939435
    Abstract: The present invention provides a plasma processing apparatus and processing method capable of maintaining a constant processing profile.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: September 6, 2005
    Assignees: Hitachi, Ltd., Hitachi High-Technologies Corporation
    Inventors: Junichi Tanaka, Hiroyuki Kitsunai, Hideyuki Yamamoto, Shoji Ikuhara, Akira Kagoshima
  • Patent number: 6935351
    Abstract: A cleaning method for CVD apparatus wherein by-products such as SiO2 and Si3N4 adhered to and deposited on surfaces of the inner wall, electrodes and other parts of a reaction chamber at the stage of film formation can be removed efficiently. Furthermore, the amount of cleaning gas discharged is so small that the influence on environment such as global warming is little and cost reduction can be also attained. After the film formation on a base material surface by the use of CVD apparatus, a fluorinated cleaning gas containing a fluorcompound is converted to plasma by means of a remote plasma generator, and the cleaning gas having been converted to plasma is introduced into a reaction chamber so that any by-products adhered to inner parts of the reaction chamber is removed.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: August 30, 2005
    Assignees: Anelva Corporation, Ulvac, Inc., Kanto Denka Kogyo Co., Ltd., Sanyo Electric Co., Ltd., Sony Corporation, Daikin Industries, Ltd., Tokyo Electron Limited, NEC Electronics Corporation, Hitachi Kokusai Electric Inc., Matsushita Electric Industrial Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Renesas Technology Corp.
    Inventors: Koji Shibata, Naoto Tsuji, Hitoshi Murata, Etsuo Wani, Yoshihide Kosano
  • Patent number: 6933025
    Abstract: A component for a substrate processing chamber has a structure composed of aluminum oxide. The structure has a roughened surface having a roughness average of from about 150 to about 450 microinches. A plasma sprayed ceramic coating of aluminum oxide is deposited on the roughened surface of the structure. The component may be a dome shaped ceiling of the chamber.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: August 23, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Shyh-Nung Lin, Mark D. Menzie, Joe F. Sommers, Daniel Owen Clawson, Glen T. Mori, Lolita L. Sharp
  • Patent number: 6921437
    Abstract: The present invention provides a gas distribution apparatus useful in semiconductor manufacturing. The gas distribution apparatus comprises a unitary member and a gas distribution network formed within the unitary member for uniformly delivering a gas into a process region. The gas distribution network is formed of an inlet passage extending upwardly through the upper surface of the unitary member for connecting to a gas source, a plurality of first passages converged at a junction and connected with the inlet passage at the junction, a plurality of second passages connected with the plurality of first passages, and a plurality of outlet passages connected with the plurality of second passages for delivering the gas into a processing region. The first passages extend radially and outwardly from the junction to the periphery surface of the unitary member, and the second passages are non-perpendicular to the first passages and extend outwardly from the first passages to the periphery surface.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: July 26, 2005
    Assignee: Aviza Technology, Inc.
    Inventors: Jay Brian DeDontney, Jack Chihchieh Yao
  • Patent number: 6911112
    Abstract: A method of manufacturing a semiconductor device includes first and second processes, the latter requiring more processing time. An apparatus for performing the semiconductor manufacturing process includes a first reactor, and a plurality of second reactors for each first reactor. A first group of wafers are subjected to the first process within the first reactor, and are then transferred into a second reactor as isolated from the outside air. The first group of wafers is subjected to the second process within the second reactor. At the same time, a second group of wafers are subjected to the first process within the first reactor. After the first process is completed, the second group of wafers is transferred into an unoccupied one of the second reactors as isolated from the outside air. There, the second group of wafers is subjected to the second process.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: June 28, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Hyuck An
  • Patent number: 6910441
    Abstract: Plasma processing equipment includes a process, a cover covering the top of the process chamber, a wafer chuck disposed in the process chamber, a pressure regulating system including a pressure regulating plate situated at the bottom surface of the cover, and an elevating mechanism for adjusting the position of the pressure regulating plate, and a measuring device including at least one visual display for use in calibrating the pressure regulating system.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: June 28, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Jun Jang
  • Patent number: 6905549
    Abstract: A vertical type semiconductor device producing apparatus comprises a vertical type reaction chamber which is to accommodate a plurality of stacked substrates; an exhaust path which exhausts the reaction chamber, a vacuum exhaust device which exhausts the reaction chamber through the exhaust path; an exhaust valve which opens and closes the exhaust path; a first supply path which supplies a first kind of gas, which contributes to film formation, to the reaction chamber; a second supply path which supplies a second kind of gas, which contributes to the film formation, to the reaction chamber; a first and a second gas supply valves which respectively open and close the first and second supply paths; and a controller which controls the exhaust valve and the first and second gas supply valves such that when the first kind of gas is supplied to the reaction chamber, the first kind of gas is supplied to the reaction chamber from the first supply path in a state in which exhaust of the reaction chamber is being stopp
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: June 14, 2005
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuyuki Okuda, Yasushi Yagi, Toru Kagaya, Masanori Sakai
  • Patent number: 6899785
    Abstract: Undesirable reactions (such as formation of volatile compounds or complexes) are recognized to occur during production processes (such as etching with fluorine) at interior surfaces of a reactor chamber (such as a silicon-based reactor chamber). These undesirable reactions may be minimized and controlled by priming the chamber surface by incorporating seasoning atoms and/or molecules.
    Type: Grant
    Filed: November 5, 2001
    Date of Patent: May 31, 2005
    Assignee: International Business Machines Corporation
    Inventors: Kellie L. Dutra, Margaret L. Gibson, Ronald G. Meunier, Jason W. Silbergleit
  • Patent number: 6887340
    Abstract: An etching apparatus has a chamber enclosing a first electrode, a second electrode, confinement rings, a focus ring, and a shield. The first electrode is coupled to a source of a fixed potential. The second electrode is coupled to a dual frequency RF power source. The confinement rings are disposed between the first electrode and the second electrode. The chamber is formed of an electrically conductive material coupled to the source. The focus ring substantially encircles the second electrode and electrically insulates the second electrode. The shield substantially encircles the focus ring. The distance between an edge of the second electrode and an edge of the shield is at least less than the distance between the edge of the second electrode and an edge of the first electrode. The shield is formed of an electrically conductive material coupled to the source of fixed potential.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: May 3, 2005
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Bobby Kadkhodayan