With Mechanical Mask, Shield Or Shutter For Shielding Workpiece Patents (Class 156/345.3)
  • Publication number: 20080311758
    Abstract: Apparatus and methods protect a central process exclusion region of a substrate during processing of an edge environ region of process performance. Removal of undesired materials is only from the edge environ region while the central device region is protected from damage. Field strengths are configured to protect the central region from charged particles from plasma in a process chamber and to foster removal of the undesired materials from only the edge environ region. A magnetic field is configured with a peak value adjacent to a border between the central and edge environ regions. A strong field gradient extends from the peak radially away from the border and away from the central region to repel the charged particles from the central region. The strength and location of the field are adjustable by axial relative movement of magnet sections, and flux plates are configured to redirect the field for desired protection.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 18, 2008
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Andrew D. Bailey, Yunsang Kim
  • Publication number: 20080277377
    Abstract: The object of the present invention is to provide a masking material for dry etching, which is suitable for fine processing of a magnetic film as thin as a few nm such as NiFe or CoFe constituting a TMR film and capable of simplifying the process for producing a TMR element and reducing production costs related to facilities and materials. This object was solved by a masking material for dry etching of a magnetic material by using a mixed gas of carbon monoxide and a nitrogenous compound as etching gas, which comprises a metal (tantalum, tungsten, zirconium or hafnium) with a melting or boiling point increasing upon conversion thereof into a nitride or carbide.
    Type: Application
    Filed: July 16, 2008
    Publication date: November 13, 2008
    Inventors: Isao Nakatani, Kimiko Mashimo, Naoko Matsui
  • Patent number: 7438765
    Abstract: An apparatus for adjusting an etching area of a semiconductor wafer includes an adjustable shielding plate. The adjustable shielding plate includes a plurality of shielding members. Each of the plurality of shielding members are movable between a first position configured to shield a portion of a semiconductor wafer from an etching gas and a second position configured to expose an unshielded etching portion of the semiconductor wafer to the etching gas.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: October 21, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Chul Park, Sang-sup Jeong
  • Patent number: 7416634
    Abstract: The present invention relates to a method and apparatus for growing nanostructures in a controlled way, wherein the controlling comprises controlling the electron emitting tips used for the nanoscopic structure growth. Further, the present invention describes an integrated method and apparatus for growing a plurality of electron emitting tips and nanoscopic structures in the same growing process.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: August 26, 2008
    Assignee: Matvice EHF
    Inventor: Sveinn Olafsson
  • Publication number: 20080190892
    Abstract: A plasma etching method includes: plasma etching a silicon oxide film to be etched that is positioned under a multi-layer resist mask by using the multi-layer resist mask formed on a substrate to be processed; and plasma etching a glass based film positioned under the silicon oxide film by using the multi-layer resist mask. In the method a gaseous mixture of C4F6 gas and C3F8 gas as a processing gas is used in the plasma etching of the glass based layer.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 14, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Sung Tae LEE
  • Publication number: 20080185101
    Abstract: Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.
    Type: Application
    Filed: April 8, 2008
    Publication date: August 7, 2008
    Applicant: International Business Machines Corporation
    Inventors: Michael C. Gaidis, Sivananda K. Kanakasabapathy, Eugene J. O'Sullivan
  • Patent number: 7384876
    Abstract: A plasma processing device comprising a gas injection system is described, wherein the gas injection system comprises a gas injection assembly body, a consumable gas inject plate coupled to the gas injection assembly body, and a pressure sensor coupled to a gas injection plenum formed by the gas injection system body and the consumable gas inject plate. The gas injection system is configured to receive a process gas from at least one mass flow controller and distribute the process gas to the processing region within the plasma processing device, and the pressure sensor is configured to measure a gas injection pressure within the gas injection plenum. A controller, coupled to the pressure sensor, is configured to receive a signal from the pressure sensor and to determine a state of the consumable gas inject plate based upon the signal.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: June 10, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Eric J. Strang
  • Publication number: 20080128086
    Abstract: A method and system for backside unlayering a semiconductor device to expose FEOL semiconductor features of the device for subsequent electrical and/or physical probing. A window is formed within a backside substrate layer of the semiconductor. A collimated ion plasma is generated and directed so as to contact the semiconductor only within the backside window via an opening in a focusing shield. This focused collimated ion plasma contacts the semiconductor, only within the window, while the semiconductor is simultaneously being rotated and tilted by a temperature controlled stage, for uniform removal of semiconductor layering such that the semiconductor features, in a location on the semiconductor corresponding to the backside window, are exposed. Backside unlayering of the invention may be enhanced by CAIBE processing.
    Type: Application
    Filed: February 7, 2008
    Publication date: June 5, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Terence L. Kane, Darrell L. Miles, John D. Sylvestri, Michael P. Tenney
  • Publication number: 20080102538
    Abstract: An apparatus for controlling a plasma etching process includes plasma control structure that can vary a size of a plasma flow passage, vary a speed of plasma flowing through the plasma flow passage, vary plasma concentration flowing through the plasma flow passage, or a combination thereof.
    Type: Application
    Filed: January 19, 2007
    Publication date: May 1, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih Ming Chang, Chi-Lun Lu
  • Publication number: 20080099426
    Abstract: A method and apparatus for etching photomasks are provided herein. The apparatus includes a process chamber with a shield above a substrate support. The shield comprises a plate with apertures, and the plate has two zones with at least one characteristic, such as material or potential bias, that is different from each other. The method provides for etching a photomask substrate with a distribution of ions and neutral species that pass through the shield.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 1, 2008
    Inventors: Ajay Kumar, Madhavi R. Chandrachood, Richard Lewington, Darin Bivens, Amitabh Sabharwal, Sheeba J. Panayil, Alan Hiroshi Ouye
  • Patent number: 7354500
    Abstract: A mask for use with a sample preparation apparatus that prepares an ion-milled sample adapted to be observed by an electron microscope is offered. It is possible to prepare the sample having a desired cross section by the use of the mask. The mask, which defines the boundary between irradiated and unirradiated regions on the sample surface, has an edge portion having an increased thickness compared with the other portions. When the edge portion of the mask is etched, the original shape is almost maintained. Thus, the side surface of the mask is kept on the center axis of the ion beam.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: April 8, 2008
    Assignees: Jeol Ltd., Jeol Engineering Co., Ltd.
    Inventors: Tadanori Yoshioka, Eiichi Watanabe
  • Patent number: 7345288
    Abstract: A sample holder and ion-beam processing system are offered which permit a good sample adapted for observation (such as TEM (transmission electron microscopy) observation). The sample holder has a sample placement portion having a sample adhering surface. The holder further includes a shielding material guide portion placed over the sample placement portion. The guide portion is fixedly mounted to the sample placement portion and has a shielding material guide surface. The sample adhering surface is in a position lower than the position of the shielding material guide surface by a given amount of 40 ?m. Therefore, when the sample having a thickness of 100 ?m is attached to the sample adhering surface, the sample protrudes 60 ?m ahead of the shielding material guide surface. The shielding material having a thickness of about 20 ?m is then placed in position over the shielding material guide surface.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: March 18, 2008
    Assignee: Jeol Ltd.
    Inventor: Takushi Yamashita
  • Patent number: 7338699
    Abstract: In film-forming devices and plasma-processing devices, filmy matter adheres to the surfaces of the inner parts and it peels to cause dust and particles in the devices. In the devices, the dust and particles contaminate the objects for film formation thereon or the objects to be processed with plasma. For preventing the objects from being contaminated with them, the inner parts of the devices must be frequently exchanged every time when they have received any minor filmy matter thereon, and this lowers the productivity in the devices. When a modified glass part of which the surface is modified with spherical or bell-like island projections having a width and a height of from a few ?m to a few hundreds ?m is used in a film-forming device and in a plasma-processing device, then its ability to hold the filmy substance having adhered thereto is good and its resistance to plasma is also good.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: March 4, 2008
    Assignee: Tosoh Corporation
    Inventors: Koyata Takahashi, Masanori Kohgo, Osamu Matsunaga
  • Patent number: 7268084
    Abstract: A method of treating a substrate includes disposing the substrate in a processing chamber having a first chamber portion configured to define a plasma space and a second chamber portion configured to define a process space, introducing a first gas to the plasma space and introducing a second gas to the process space. A plasma is formed in the plasma space from the first gas using a plasma source coupled to the upper chamber portion, and a process chemistry for treating the substrate is formed in the process space by providing a grid positioned between the first chamber portion and the second chamber portion such that the plasma can diffuse from the plasma space to the process space.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: September 11, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Lee Chen, Hitomitsu Kambara, Caiz Hong Tian, Tetsuya Nishizuka, Toshihisa Nozawa
  • Publication number: 20070175495
    Abstract: An apparatus for treating plasma includes an inner chamber, an outer chamber receiving the inner chamber and including a gas supplier that supplies a gas into the inner chamber, an inner electrode disposed in the inner chamber, and a plasma generator supplying power independently to the inner electrode and the inner chamber.
    Type: Application
    Filed: January 30, 2007
    Publication date: August 2, 2007
    Inventors: Weon-Hong Kim, Seok-Jun Won, Dae-Jin Kwon, Min-Woo Song, Ju-Youn Kim, Jung-Min Park
  • Publication number: 20070163714
    Abstract: An etch chamber and a method of reducing back flow of particles in an etch chamber having a valve connected thereto. The etch chamber comprises a valve connected to the etch chamber; and a liner a liner disposed to cover an internal gap between a flange portion of the valve and a flange portion of the etch chamber.
    Type: Application
    Filed: January 18, 2006
    Publication date: July 19, 2007
    Inventors: Hong Jin Kim, Jose Angeles Talban, Abdul Rahim Abdul Malik, Ronnie San Diego David
  • Patent number: 7223699
    Abstract: A plasma etch reactor 20 includes a upper electrode 24, a lower electrode 24, a peripheral ring electrode 26 disposed therebetween. The upper electrode 24 is grounded, the peripheral electrode 26 is powered by a high frequency AC power supply, while the lower electrode 28 is powered by a low frequency AC power supply, as well as a DC power supply. The reactor chamber 22 is configured with a solid source 50 of gaseous species and a protruding baffle 40. A nozzle 36 provides a jet stream of process gases in order to ensure uniformity of the process gases at the surface of a semiconductor wafer 48. The configuration of the plasma etch reactor 20 enhances the range of densities for the plasma in the reactor 20, which range can be selected by adjusting more of the power supplies 30, 32.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: May 29, 2007
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Leslie G. Jerde, Alferd Cofer, Robert C Vail, Kurt A. Olson
  • Patent number: 7220320
    Abstract: The present invention provides members that are provided around a susceptor for mounting a semiconductor in a chamber for a semiconductor production system. Each member has a function of independently generating heat to heat the semiconductor, at least by radiation, and preferably, a heat generating element is embedded in each member.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: May 22, 2007
    Assignee: NGK Insulators, Ltd.
    Inventors: Yoshinobu Goto, Hideyoshi Tsuruta
  • Patent number: 7207763
    Abstract: A semiconductor manufacturing system and wafer holder for a semiconductor manufacturing system which prevents a semiconductor wafer from being exposed to a process reaction and which includes a reaction tube for providing a sealed process space and a dual boat and which prevents the backside deposition by the wafer holder. The wafer holder includes a holder body to hide the backside of the semiconductor wafer during a process in the reaction tube and a wafer lifter having a portion that can be disengaged from and coupled to the holder body so that a lower portion of the semiconductor wafer is supported by the dual boat and so that the semiconductor wafer can be lifted up from the wafer body when the semiconductor wafer is loaded and unloaded. A separation boundary between the holder body and the wafer lifter includes a gas inflow interception surface to hinder reaction gas from flowing through the separation boundary.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: April 24, 2007
    Assignee: Terasemicon Co., Ltd
    Inventor: Byung-Il Lee
  • Patent number: 7204912
    Abstract: The present invention presents an improved bellows shield for a plasma processing system, wherein the design and fabrication of the bellows shield coupled to a substrate holder electrode advantageously provides protection of a bellows with substantially minimal erosion of the bellows shield.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: April 17, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Hidehito Saigusa, Taira Takase, Kouji Mitsuhashi, Hiroyuki Nakayama
  • Patent number: 7182816
    Abstract: Particle flaking is reduced in a semiconductor wafer processing apparatus by installing a chamber shield assembly in the chamber of the apparatus. The shield assembly includes a plurality of nested shields that are supported out of contact with each other and suspended such that, during thermal expansion and contraction, gaps are maintained that are sufficient to avoid arcing. Alignment structure on the shields and on the chamber walls force the shields to align concentrically and maintain the gaps. The shields are made of aluminum or another thermally conductive material and have cross-sectional areas large enough to provide high thermal conductivity throughout the shields. Mounting flanges and other mounting surfaces are provided on the shields that form intimate thermal contact with sufficient contacting area to insure high thermal conductivity from the shields to the temperature controlled walls of the chamber.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: February 27, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Mark Kleshock, Jacques Faguet, Tim Provencher
  • Patent number: 7172674
    Abstract: A device for liquid treatment of a defined area of a wafer-shaped article, especially of a wafer, in which a mask is kept at a defined short distance to the wafer-shaped article such that liquid can be retained between the mask and the defined area of the wafer-shaped article by capillary forces.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: February 6, 2007
    Assignee: SEZ AG
    Inventor: Philipp Engesser
  • Patent number: 7045465
    Abstract: In a semiconductor device manufacturing apparatus that processing a substrate by applying a voltage to a gas to create a plasma, positively charged particles are trapped or guided at the instant that the cathode voltage is stopped, by an electrode to which is imparted a negative voltage, so as to prevent particles reaching the substrate.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 16, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Natsuko Ito, Fumihiko Uesugi, Tsuyoshi Moriya
  • Patent number: 6960263
    Abstract: A shadow frame and framing system for semiconductor fabrication equipment comprising a rectangular frame having four edges, the edges forming an interior lip with a top surface and an bottom engagement surface; and a cross beam disposed between at least two edges of the frame, the cross beam having a top surface and a bottom engagement surface, the engagement surface of the cross beam configured to be flush with the engagement surface of the lip; wherein one or more of the engagement surfaces are configured to cover metal interconnect bonding areas on a carrier disposed below the frame. The shadow frame is particularly useful in plasma enhanced chemical vapor deposition (PECVD) applications used to make active matrix liquid crystal displays (AMLCDs) and solar cells.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: November 1, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Sakae Tanaka, Qunhua Wang, Sanjay Yadav, Quanyuan Shang, William R. Harshbarger
  • Patent number: 6949174
    Abstract: A milling apparatus is provided in which temperature rise of a treatment-object in milling treatment, especially of the substrate thereof, is prevented. In the apparatus, ionization mechanism 2 comprises casing 20d having an opening at the center portion of the face thereof opposing to substrate 5 held by substrate holder 6; a filament is placed at the position where the straight line drawn from the filament to substrate 5 is intercepted by casing 20d; and electromagnets 31, 32 are provided around ionization mechanism 2 for generating a magnetic field to produce magnetic lines extending through opening 20j to substrate 5.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: September 27, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirohito Yamaguchi, Masahiro Kanai, Atsushi Koike, Katsunori Oya
  • Patent number: 6933025
    Abstract: A component for a substrate processing chamber has a structure composed of aluminum oxide. The structure has a roughened surface having a roughness average of from about 150 to about 450 microinches. A plasma sprayed ceramic coating of aluminum oxide is deposited on the roughened surface of the structure. The component may be a dome shaped ceiling of the chamber.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: August 23, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Shyh-Nung Lin, Mark D. Menzie, Joe F. Sommers, Daniel Owen Clawson, Glen T. Mori, Lolita L. Sharp
  • Patent number: 6899785
    Abstract: Undesirable reactions (such as formation of volatile compounds or complexes) are recognized to occur during production processes (such as etching with fluorine) at interior surfaces of a reactor chamber (such as a silicon-based reactor chamber). These undesirable reactions may be minimized and controlled by priming the chamber surface by incorporating seasoning atoms and/or molecules.
    Type: Grant
    Filed: November 5, 2001
    Date of Patent: May 31, 2005
    Assignee: International Business Machines Corporation
    Inventors: Kellie L. Dutra, Margaret L. Gibson, Ronald G. Meunier, Jason W. Silbergleit
  • Patent number: 6899798
    Abstract: Disclosed herein is a method of roughening a ceramic surface by forming mechanical interlocks in the ceramic surface by a chemical etching process, a thermal etching process, or a laser micromachining process. Also disclosed herein are components for use in semiconductor processing chambers (in particular, a deposition ring for use in a PVD chamber) which have at least one ceramic surface having mechanical interlocks formed therein by chemical etching, thermal etching, or laser micromachining. Ceramic surfaces which have been roughened according to the chemical etching, thermal etching, or laser micromachining process of the invention are less brittle and damaged than ceramic surfaces which are roughened using conventional grit blasting techniques. The method of the invention results in a roughened ceramic surface which provides good adherence to an overlying sacrificial layer (such as aluminum).
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 31, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Edwin Charles Weldon, Yongxiang He, Hong Wang, Clifford C. Stow
  • Patent number: 6890385
    Abstract: A second metal mask (13) having a screen part (13A) provided with a plurality of parallel, fine slits (13a) arranged at very small intervals is placed on a base plate (12) serving also as a first metal mask and provided with a plurality of windows (18) defining regions in which a material is to be deposited. One end of the second metal mask (13) is fastened to the base plate (12) by a mask clamp (20) and the other end of the same is fastened to a slider (23). Resilient force is applied to the slider (23) by compression coil springs (30). Thus, the screen part (13A) of the second metal mask (13) is tensioned and thereby the slits (13a) are stretched straight and are extended at predetermined pitches. A substrate (17) placed on the second mask (13) is subjected to a vacuum evaporation process to form fine patterns on the substrate (17) in a gang-patterning mode.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: May 10, 2005
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Terunao Tsuchiya, Takuya Sakata
  • Patent number: 6887340
    Abstract: An etching apparatus has a chamber enclosing a first electrode, a second electrode, confinement rings, a focus ring, and a shield. The first electrode is coupled to a source of a fixed potential. The second electrode is coupled to a dual frequency RF power source. The confinement rings are disposed between the first electrode and the second electrode. The chamber is formed of an electrically conductive material coupled to the source. The focus ring substantially encircles the second electrode and electrically insulates the second electrode. The shield substantially encircles the focus ring. The distance between an edge of the second electrode and an edge of the shield is at least less than the distance between the edge of the second electrode and an edge of the first electrode. The shield is formed of an electrically conductive material coupled to the source of fixed potential.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: May 3, 2005
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Bobby Kadkhodayan
  • Patent number: 6846396
    Abstract: Methods and apparatuses for shielding magnetic flux which is associated with a semiconductor fabrication system are provided. A magnetic shield assembly substantially surrounds a side wall of a plasma reactor. The shield assembly comprises a passive shield member in combination with an active shield member. As a result, effective shielding of magnetic flux can occur without excessive distortion of the magnetic field line pattern in the plasma region of the plasma reactor. In one aspect, the shield assembly comprises a first shield member adapted to attenuate a magnetic flux density. The first shield member is disposed in a parallel, spaced apart relationship from the side wall. A second member is attached to the first shield member and is constructed of a ferromagnetic material which is permanently magnetized.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: January 25, 2005
    Assignee: Applied Materials, Inc.
    Inventor: Mark A. Perrin
  • Patent number: 6837967
    Abstract: A plasma edge cleaning apparatus is configured to remove film deposits from a wafer edge. A gas distribution manifold is annular shaped and positioned to provide plasma process gases near the edge of the wafer. A top insulator and a wafer support each include a magnetic coil to generate a magnetic field for shielding the selected portions of a wafer from the generated plasma. The top insulator is positioned above the wafer during edge processing so as to form a small gap between the top insulator and the wafer to prevent plasma from etching active die areas of the wafer.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: January 4, 2005
    Assignee: LSI Logic Corporation
    Inventors: Michael J. Berman, Steven E. Reder, Rennie G. Barber
  • Patent number: 6833050
    Abstract: An apparatus for improving the density and uniformity of plasma in the manufacture of a semiconductor device features a plasma chamber having a complex geometry that causes plasma density to be increased at the periphery or edge of a semiconductor wafer being processed, thereby compensating for a plasma density that is typically more concentrated at the center of the semiconductor wafer. By mounting a target semiconductor wafer in a chamber region that has a cross-sectional area that is smaller than a cross-sectional area of a plasma source chamber region, a predetermine flow of generated plasma from the source becomes concentrated as it moves toward the semiconductor wafer, particularly at the periphery of the semiconductor wafer. This provides a more uniform plasma density across the entire surface of the target semiconductor wafer than has heretofore been available.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: December 21, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-sic Jeon, Jin Hong
  • Patent number: 6802942
    Abstract: To generate an especially good heat transfer between a seating face of a storage plate support and a storage plate, during coating with a sputter source in a vacuum installation, the seating face of the storage plate support is slightly annularly convexly arched and the storage plate is clamped in the center as well as on its outer margin by a center mask and an outer mask against the arched seating face. Hereby an especially good heat transfer is attained with very low arching d, whereby the storage plate is treated gently and simultaneously, during the coating process, no layer thickness distribution problems occur through arching that is too large.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: October 12, 2004
    Assignee: Unaxis Balzers Limited
    Inventors: Stephan Voser, Martin Dubs
  • Publication number: 20040194885
    Abstract: A substrate processing chamber of the type adapted for processing a substrate having edges and a surface at a reduced pressure and elevated temperature relative to ambient. Typically, a combination of the elevated temperature and the reduced pressure tends to produce spallation of the substrate near the edges, which spallation produces chips that are redeposited across the surface of the substrate. Such chips inhibit proper operation of subsequent processing of the substrate. The improvement is a shield disposed in proximity to the surface of the substrate, but not touching the substrate. The shield forms a perimeter barrier at a circumference of the substrate that is interior to the edges of the substrate where the spallation occurs, and the shield prohibits the chips from redepositing across portions of the surface of the substrate that are interior to the perimeter barrier.
    Type: Application
    Filed: April 4, 2003
    Publication date: October 7, 2004
    Inventors: David A. Stacey, Jonathan D. Allinger, Zachary A. Prather
  • Publication number: 20040168765
    Abstract: In transporting a reticle with a pellicle, gas purge is efficiently performed in a pellicle space or the environment in the pellicle space is efficiently maintained. Injectors (35) are provided in a pair of fork portions (31) of a reticle hand. Inert gas is injected and supplied from the injectors (35) into a pellicle space (29) through vent holes (27) of a reticle (30) with a pellicle. In this state, the reticle (30) with the pellicle is transported.
    Type: Application
    Filed: November 24, 2003
    Publication date: September 2, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventor: Ken Matsumoto
  • Patent number: 6777045
    Abstract: A domed enclosure wall for a plasma processing chamber is made from a dielectric material having a roughened surface with a roughness average of from about 150 to about 450 microinches. A plasma sprayed ceramic coating is applied on the roughened surface of the dielectric material. The plasma sprayed coating comprises a textured surface having a roughness with an average skewness that is a negative value. When the enclosure wall is used in a plasma processing chamber, sputtered material generated by a plasma formed in a plasma processing chamber has good adherence to the textured surface.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: August 17, 2004
    Assignee: Applied Materials Inc.
    Inventors: Shyh-Nung Lin, Mark D. Menzie, Joe F. Sommers, Daniel Owen Clawson, Glen T. Mori, Lolita L. Sharp
  • Publication number: 20040123950
    Abstract: The present invention describes a method of providing a substrate, the substrate being transparent to radiation at an actinic wavelength; forming an absorber layer over the substrate, the absorber layer including an active area and a peripheral area; removing the absorber layer from a portion of the peripheral area; and forming a trench in the substrate in the portion of the peripheral area.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventor: Patrick D. Boyd
  • Patent number: 6736928
    Abstract: An exposure apparatus for sequentially performing exposure of device patterns provided in a pattern effective area of a photo-mask (10) on to shot areas of a wafer (20), to provide excellent throughput performance, includes an illumination unit (115) for collectively illuminating the entire pattern effective area of the photo-mask contained within the illumination range with exposure light, a mask stage (114) that moves the photo-mask for the illumination range in the mask scanning direction, and a wafer stage (111) that moves the wafer for the projection range in which the pattern effective area of the photo-mask is projected in the wafer scanning direction.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: May 18, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kenichi Kotoku
  • Patent number: 6733640
    Abstract: A shutter assembly for use in a thin-film processing system to control exposure of a substrate to a process energy source includes a shield member having a shutter opening. The shutter opening is defined by sides which are oriented along radial lines of a central axis to promote uniform exposure of the substrate to the process energy source.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: May 11, 2004
    Assignee: Seagate Technology LLC
    Inventors: Peter R. Krauss, Shaun E. McKinlay
  • Patent number: 6730174
    Abstract: An apparatus for replacing consumables of a vacuum chamber. A unitary removable shield assembly is provided to quickly replace consumables such as a shield. The shield assembly can include an upper adapter assembly, at least one shield member, a cover ring and an insulator member. The shield assembly is designed so that the consumables can be replaced in one step and allows the chamber to continue with its maintenance cycle.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: May 4, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Alan B. Liu, Ilya Lavitsky, Michael Rosenstein
  • Publication number: 20040079725
    Abstract: A dry etching apparatus that performs etching on a substrate 1 placed on a tray 13 inside a chamber 18 by covering the substrate 1 with a plate 14 provided with opening portions 15, in which a distance D between the surface opposing the substrate 1 and the substrate 1 in the peripheral portion of the plate 14 is set shorter than the distance D between the surface opposing the substrate 1 and the substrate 1 in the central portion of the plate 14. Textures can be thus formed homogeneously on the surface of the substrate.
    Type: Application
    Filed: August 27, 2003
    Publication date: April 29, 2004
    Applicant: KYOCERA CORPORATION
    Inventors: Yosuke Inomata, Yuko Fukawa
  • Patent number: 6726805
    Abstract: Generally, a substrate support member for supporting a substrate is provided. In one embodiment, a substrate support member for supporting a substrate includes a body coupled to a lower shield. The body has an upper surface adapted to support the substrate and a lower surface. The lower shield has a center portion and a lip. The lip is disposed radially outward of the body and projects towards a plane defined by the first surface. The lip is disposed in a spaced-apart relation from the body. The lower shield is adapted to interface with an upper shield disposed in a processing chamber to define a labyrinth gap that substantially prevents plasma from migrating below the member. The lower shield, in another embodiment, provides the plasma with a short RF ground return path.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: April 27, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Karl Brown, Vineet Mehta, See-Eng Phan, Semyon Sherstinsky, Allen Lau
  • Patent number: 6692649
    Abstract: A plasma processing module for processing a substrate includes a plasma containment chamber having a feed gas inlet port capable of allowing a feed gas to enter the plasma containment chamber of the plasma processing module during the processing of the substrate. An inductively coupled source is used to energize the feed gas and striking a plasma within the plasma containment chamber. The specific configuration of the inductively coupled source causes the plasma to be formed such that the plasma includes a primary dissociation zone within the plasma containment chamber. A secondary chamber is separated from the plasma containment chamber by a plasma containment plate. The secondary chamber includes a chuck and an exhaust port. The chuck is configured to support the substrate during the processing of the substrate and the exhaust port is connected to the secondary chamber such that the exhaust port allows gases to be removed from the secondary chamber during the processing of the substrate.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: February 17, 2004
    Assignee: Lam Research Corporation
    Inventors: Wenli Z. Collison, Michael S. Barnes, Tuqiang O. Ni, Butch Berney, Wayne W. Vereb, Brian K. McMillin
  • Patent number: 6689249
    Abstract: A ring or collar surrounding a semiconductor workpiece in a plasma chamber. According to one aspect, the ring has an elevated collar portion having an inner surface oriented at an obtuse angle to the plane of the workpiece, this angle preferably being 135°. This angular orientation causes ions bombarding the inner surface of the elevated collar to scatter in a direction more parallel to the plane of the workpiece, thereby reducing erosion of any dielectric shield at the perimeter of the workpiece, and ameliorating spatial non-uniformity in the plasma process due to any excess ion density near such perimeter. In a second aspect, the workpiece is surrounded by a dielectric shield, and the shield is covered by a non-dielectric ring which protects the dielectric shield from reaction with, or erosion by, the process gases.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: February 10, 2004
    Assignee: Applied Materials, Inc
    Inventors: Kuang-Han Ke, Bryan Y. Pu, Hongching Shan, James Wang, Henry Fong, Zongyu Li, Michael D. Welch
  • Patent number: 6682629
    Abstract: The present invention is a processing unit for processing a substrate in a casing, having: a transfer port provided in the casing through which the substrate passes when the substrate is carried into the casing by a carrier for carrying the substrate; and an inflow restricting device for controlling an atmosphere outside the casing to restrict the atmosphere from flowing into the casing through the transfer port. According to the present invention, it is possible to control the atmosphere outside the casing to restrict the atmosphere from flowing into the casing, which restricts the temperature of the substrate in the processing unit from partially varying and the temperature distribution from becoming ununiform within a plane of the substrate.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: January 27, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Hiroyuki Kudo, Takahiro Okubo, Minoru Kubota
  • Publication number: 20040000375
    Abstract: A multi-layer insert ring for engaging a shadow ring in a plasma etch chamber which includes at least two layers stacked together in an opening of the shadow ring. The multi-layer insert ring may be constructed by two layers or three layers by utilizing ground, reprocessed insert rings resulting in significant cost savings. Each of the layers of the multi-layer insert rings has a planar top surface and a planar bottom surface that is parallel to the planar top surface. Only the top layer need to be replaced after repeated usage of the insert ring in plasma etching processes.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 1, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiang-Hsing Liu, Chung-Feng Huang, Yang-Kai Fan, Kwang-Niang Tan, Wen-Chin Tseng
  • Patent number: 6669811
    Abstract: A plasma processing system for processing a substrate is disclosed. The system includes a process component capable of effecting a plasma inside a process chamber. The system also includes a gear drive assembly for moving the process component in a linear direction during processing of the substrate.
    Type: Grant
    Filed: November 5, 2001
    Date of Patent: December 30, 2003
    Assignee: Lam Research Corporation
    Inventors: Fangli Hao, Keith Dawson, Eric H. Lenz
  • Patent number: 6663747
    Abstract: A shaper for an ion beam gun has a plate with a non-symmetrical profile including notches and tabs. The shaper is mounted to the surface of an ion beam grid having an array of holes. The shaper is oriented radially on the grid and covers some of the holes in the grid. The grid is mounted to an ion beam gun above a specimen that is rotated beneath the ion beam gun. The ion beam is filtered into smaller ion beamlets by the grid. The ion beamlets permeate the holes in the grid that are not covered by the shaper. The ion beamlets reach the specimen to etch it more uniformly than a grid that does not have a shaper. The shaper may be further optimized for a particular grid via a trial-and-error process to even further refine the uniformity of etching depth.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: David Garcia, Cherngye Hwang, Uriel Ortiz, Nick K. Karmaniolas
  • Patent number: 6656283
    Abstract: A method and apparatus for providing particle collection channels in a semiconductor substrate processing chamber. The channels are formed in either a chamber liner or directly into the walls and/or bottom of the chamber. The channels direct trapped particles toward a chamber exhaust port.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: December 2, 2003
    Assignee: Applied Materials, Inc.
    Inventor: Thorsten Lill