Abstract: A method for manufacturing a build-up substrate, the build-up substrate comprising an insulating layer and a wiring pattern layer stacked over a circuit substrate, said method comprising the steps of: (i) applying a photoactive metal oxide precursor material to one or both sides of the circuit substrate with a wiring pattern, and drying the applied photoactive metal oxide precursor material to form an insulating film; (ii) forming an opening for a via hole in the insulating film by exposure and development of the insulating film; (iii) applying a heat treatment to the insulating film to convert the insulating film into a metal oxide film, thereby forming a build-up insulating layer of the metal oxide film; and (iv) plating the build-up insulating layer to form via holes in the openings, forming a metal layer on the build-up insulating layer, and etching the metal layer to form a build-up wiring pattern; and (v) repeating the steps from (i) to (iv) at least one time.

Abstract: Disclosed herein are a touch sensor and a method of manufacturing the same. The touch sensor according to the preferred embodiment of the present invention includes; a transparent substrate; a first electrode formed on one surface of the transparent substrate; a first insulating layer formed on one surface of the first electrode and formed with a through-hole; and a second electrode formed on one portion of one surface of the insulating layer, wherein the first electrode is extendedly formed to the other portion of one surface of the insulating layer through the through-hole.

Abstract: A method for producing a printed wiring board which is capable of forming an insulating layer having a surface with low roughness and high adhesion strength to a conductive layer and of achieving an excellent performance in removal of smear, involves the following steps (A) to (F) in this order: (A) laminating, onto an internal layer circuit substrate, a resin sheet with a support which includes a support and a resin composition layer in contact with the support so that the resin composition layer is in contact with the internal layer circuit substrate; (B) thermally curing the resin composition layer of the resin sheet with a support to form an insulating layer; (C) perforating the insulating layer to form a via hole; (D) performing a desmear treatment; (E) peeling the support; and (F) forming a conductive layer on a surface of the insulating layer.

Abstract: The present invention relates to a multilayer ceramic capacitor and a printed circuit board including the same that can minimize thickness deviations of an external electrode and a multilayer ceramic. A multilayer ceramic capacitor according to an embodiment of the present invention includes a multilayer ceramic and external electrodes formed on both sides of the multilayer ceramic, wherein |Tmax?Tmin| may be less than 10 ?m, and |CTmax?CTmin| may be less than 20 ?m. (Here, Tmax is a maximum thickness of the external electrodes in a via processing area, Tmin is a minimum thickness of the external electrodes in the via processing area, CTmax is a maximum thickness of the multilayer ceramic capacitor in the via processing area, and CTmin is a minimum thickness of the multilayer ceramic capacitor in the via processing area.

Abstract: A method of manufacturing a bond pad structure, comprising the steps of forming a pad material layer on a passivation layer, forming a protection layer on the pad material layer, performing an etching process to pattern the protection layer and the pad material layer into a bond pad structure, and removing the protection layer on the bond pad structure.

Abstract: A wiring substrate includes a core layer, first and second wiring layers, and a first insulating layer. The core layer has one and another surfaces and includes a plate-shaped member formed of an aluminum oxide and multiple linear conductors penetrating the plate-shaped member in a thickness direction of the plate-shaped member. The first wiring layer is formed on the one surface of the core layer. The second wiring layer is formed on the other surface of the core layer. The first insulating layer has a same thickness as the first wiring layer and is formed in an area of the one surface of the core layer on which the first wiring layer is not formed. The first and second wiring layers are positioned superposing each other in a plan view. The first and second wiring layers are electrically connected by way of the multiple linear conductors.

Abstract: A wiring board includes a rectangular mount region surrounded by four sides circumscribed to pads located in an outer peripheral area among a plurality of pads arranged in a substantially matrix form, a corner pad close to a corner of the mount region, and a second via-conductor and a second corner via-conductor electrically connected to the corner pad via a first via-conductor and a first wiring conductor. In the wiring board, a distance in a plane direction between the second corner via-conductor and a center of the mount region is smaller than a distance in the plane direction between the corner pad and the center of the mount region.

Abstract: A wiring board with a built-in electronic component includes a core substrate having a cavity, an electronic component accommodated in the cavity of the core substrate and having a body portion and multiple conductive portions formed on a surface of the body portion, a filling resin filling the space formed in the cavity having the component positioned in the cavity, and an resin insulation layer formed on the core substrate such that the resin insulation layer is covering an opening of the cavity and a surface of the component. The core substrate has an inclination suppressing structure formed on one or more side walls forming the cavity such that the distance between the side wall forming the cavity and the component varies in a portion of the side wall having the inclination suppressing structure and a portion of the side wall other than the portion having the inclination suppressing structure.

Abstract: A metal-clad laminate according to the invention is provided with an insulating layer and a metal layer present on at least one surface side of the insulating layer. The insulating layer is formed by laminating at least two layers, which are a first resin layer and a second resin layer disposed between the first resin layer and the metal layer. The first resin layer and the second resin layer each include a cured product of a resin composition. The resin composition in the first resin layer is different from the resin composition in the second resin layer. A relative permittivity of the cured product of the resin composition included in the second resin layer is lower than a relative permittivity of the cured product of the resin composition included in the first resin layer.

Abstract: A circuit board having a semiconductor chip embedded therein includes: a core board having opposing first and second surfaces and a through-hole; a semiconductor chip received in the through-hole and having a first active surface and an opposing second active surface, wherein first electrode pads comprising signal pads, power pads, and ground pads are provided on the first active surface; a first dielectric layer provided on the first surface of the core board and the first active surface of the semiconductor chip and configured to fill a gap between the through-hole and the semiconductor chip so as to secure the semiconductor chip in position to the through-hole; and a first circuit layer disposed in the first dielectric layer so as to be flush with the first dielectric layer, provided with first conductive vias disposed in the first dielectric layer, and electrically connected to the first electrode pads.

Abstract: A printed wiring board is manufactured by a method in which a core substrate having an insulation substrate and a conductive circuit formed on the insulation substrate is provided. An inner insulation layer is formed on the core substrate, and a surface of the inner insulation layer is treated to form a roughened portion on the surface. An outer insulation layer including a reinforcing material is formed on the surface of the inner insulation layer having the roughened portion.

Abstract: A multilayer ceramic substrate includes a ceramic element body including a plurality of stacked ceramic layers, a resistor including a resistance film disposed between the ceramic layers, and a lead via conductor penetrating the ceramic layers in a thickness direction and connected at a first end portion to the resistance film. The resistance film and the lead via conductor both contain, for example, Ni and Cu that constitute an alloy resistive material. A concentration of the Ni component in the lead via conductor has a gradient structure that is comparatively high in the first end portion connected to the resistance film and gradually decreases from the first end portion toward a second end portion opposite therefrom.

Abstract: Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

Abstract: Provided is a curable resin composition which can provide a cured article having a low dielectric constant and a low dielectric tangent, and can also provide a cured article having excellent moldability at ordinary press-molding temperatures, excellent heat resistance and excellent adhesion properties. The present invention provides a curable resin composition containing a polyphenylene ether, wherein the average number of phenolic hydroxy groups is 0.3 or more per molecule of the polyphenylene ether, the resin flow amount of the curable resin composition upon curing is 0.3 to 15% inclusive, and a cured article having a dielectric tangent of 0.005 or less at 1 GHz and a glass transition temperature of 170° C. or higher can be produced.

Abstract: A coating for reducing interaction between a surface and the environment around the surface includes an alkali silicate glass material configured to protect the surface from environmental corrosion due to water or moisture. The alkali silicate glass material is doped with a first element to affect various forms of radiation passing through the coating. The electromagnetic radiation is at least one of ultraviolet, x-ray, atomic (gamma, alpha, beta), and electromagnetic or radio wave radiation. The coating may also be used to protect a solar cell from the environment and UV rays while retransmitting received light as usable light for conversion into electrical energy. The coating may also be used to prevent whisker formation in metal finishes of tin, cadmium, zinc, etc.

Abstract: A circuit board includes an insulating film extending from an active area for displaying images to a peripheral area surrounding the active area. A circumference wiring is arranged in an aperture penetrating the insulating film and extending from the aperture to the active area on the insulating film so as to cross an edge of the aperture. The shape of the edge of the aperture which the circumference wiring crosses includes at least one concave portion and one convex portion, respectively.

Abstract: The present invention relates to a printed circuit board, a semiconductor package using the same, and a method for manufacturing the printed circuit board and the semiconductor package. The method for manufacturing a semiconductor package in accordance with the present invention includes: forming a circuit of a predetermined pattern on a PCB substrate; applying a first insulating material on the substrate; removing the first insulating material in the remaining portion except a predetermined portion by exposing and developing the substrate; forming a solder bump in the circuit portion exposed; molding a certain region of an upper surface portion of the PCB substrate including the solder bump by filling a second insulating material on the PCB substrate including the circuit portion; mounting a semiconductor chip on the PCB substrate; and completing one package in which the semiconductor chip and the PCB substrate are integrated.

Abstract: An electrical circuit is comprised of a sheet of mycelium having a wiring pattern for an electrical circuit thereon. The sheet of mycelium is prepared from a solution of Potato Dextrose Broth and Potato Dextrose Agar that is inoculated with a macerated tissue culture including a filamentous fungi selected from the group consisting of Basidiomycota, Ascomycota and Zygomycota. A sheet of tissue that grows on the surface of the solution is extracted, plasticized and dried prior to being formed with the wiring pattern.

Abstract: A wiring substrate includes a first wiring layer, a first insulating layer, a second wiring layer, and a first wiring pattern. The second wiring layer includes a first metal foil that is thinner than the first wiring layer. A first via in the first insulating layer connects the first and second wiring layers. The first via is arranged to fill a first through hole and a first recess. The first through hole extends through the first insulating layer and has a first open end with a first opening diameter and a second open end with a smaller second opening diameter. The first recess is in communication with the first through hole. The first recess has a larger diameter than the second opening diameter. The first metal foil includes a first opening communicating with the first through hole and having a larger opening diameter larger than the first opening diameter.

Abstract: Embodiments are directed to semiconductor packaging having reduced sized plated through hole (PTH) pads by eliminating the margin of the pad-to-PTH alignment and enabling finer traces on the core of the substrate.

Abstract: A wiring board is configured by stacking one or more conductor wiring layers and one or more insulating resin layers and comprising one or more metal vias configured to penetrate the insulating resin layer, wherein the boundary surface between the metal via and the insulating resin layer has a concavo-convex boundary cross-section structure in which the metal via and the insulating resin layer are engaged with each other.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract: A transparent conductive substrate used for the detection of a touched position in a touch screen panel and a touch panel having the same. The transparent conductive substrate includes a base substrate, a transparent conductive layer formed on the base substrate, the transparent conductive layer including a pattern part which includes a transparent conductive film coating the base substrate and a non-pattern part through which the base substrate is exposed, and a polymer resin layer containing a resin that has a refractive index from 1.4 to 1.6, the polymer resin layer being formed on the transparent conductive layer while filling the non-pattern part, the thickness of the polymer resin layer from the pattern part ranging from 1 to 1000 ?m. The transparent conductive film includes a first thin film on the base substrate, a metal thin film on the first thin film, and a second thin film on the metal thin film.

Abstract: A wiring board includes a base wiring board 10 and a frame wiring board 20. The base wiring board 10 has an element mounting portion 1a and a frame-shaped frame joining portion 1b on the upper surface and a solder resist layer 4 deposited in a portion between the element mounting portion 1a and the frame joining portion 1b. In the wiring board 10, a first joining pad 6 provided in the frame joining portion 1b and a second joining pad 16 provided in a lower surface of the frame wiring board 20 are joined together via a solder bump H so that a gap may be formed between the frame joining portion 1b and the frame wiring board 20. The base wiring board 10 has a resin injection hole 8 penetrating through the base wiring board 10 in the frame joining portion 1b, and the gap is filled with a sealing resin 18.

Abstract: A metal foil pattern layered body of the invention includes: a base member; a metal foil including a metal foil pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.

Abstract: A system and method for forming conductive lines on a substrate comprising depositing a precursor onto at least a portion of the substrate, depositing a thin layer of conductive material over the precursor, forming a negative-patterned mask over a portion of the thin layer of conductive material to form an exposed pattern, forming conductive lines in the exposed pattern, removing the patterned mask thereby uncovering an exposed portion of the conductive layer that substantially corresponds to the negative pattern portion, and removing the exposed portion of the conductive layer so as to uncover substrate that substantially corresponds to the exposed portion.

Abstract: In the upper surface of a metallic substrate, a region near the central part of the metallic substrate is surrounded by a rectangle having dotted sides electrically separate the interior and exterior of the rectangle. Each dot of the sides is formed of a pillared insulating resin that penetrates from the upper surface to the lower surface of the metallic substrate. Oxide films are so formed as to fill in the spaces between adjacent cylinders of insulating resins and the surrounding of the cylinders. That is, a separation layer is formed of the pillared insulating resins and the oxide films that fill up the spaces between the pillared insulating resins as well as their vicinities.

Abstract: Disclosed herein are a raw glass plate for manufacturing a touch panel and a method of manufacturing a touch panel using the raw glass plate. The raw glass plate includes a unit substrate region divided into an active region and a non-active region that is an edge portion of the active region; electrodes formed on the active region of the unit substrate region; wirings that are formed on the non-active region of the unit substrate region and are electrically connected to the electrodes; and a guard line that is formed outside a position at which the wirings are formed, on the non-active region of the unit substrate region in a longitudinal direction of the wirings.

Abstract: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.

Abstract: A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.

Abstract: An information handling system circuit board interfaces storage device surface connectors and storage device controllers disposed on opposing sides by coupling a first circuit board portion having a controller press in connector to a second circuit board portion having plural surface connectors. The first and second circuit board portions couple to each other with an adhesive activated by curing. Resistant ink is printed over openings of the first circuit board portion where adhesive is applied in order to prevent the adhesive from flowing into the openings at or before the curing of the adhesive.

Abstract: A conductive double-sided tape includes a conductive, nonwoven adhesive layer including an adhesive material, a nonconductive, nonwoven substrate having a plurality of passageways, and a plurality of conductive particles penetrating through the nonconductive, nonwoven substrate and the adhesive material. The nonconductive, nonwoven substrate is embedded in the adhesive material. The conductive particles have a D99 particle size larger than a thickness of the nonconductive, nonwoven substrate and the adhesive material.

Abstract: The photosensitive resin composition contains a (A) binder polymer, (B) cross-linked polymer particles, (C) thermosetting resin, (D) photo-polymerization initiator, and a (E) phosphoric flame retardant, in which a content of the (B) cross-linked polymer particles is 30 parts by weight to 100 parts by weight with respect to the 100 parts by weight of the (A) binder polymer, and an average particle diameter of the (B) cross-linked polymer particles is 1 ?m to 10 ?m. Therefore, the photosensitive resin composition (i) obtains an excellent tack-free property after being applied and dried, (ii) can be subjected to fine processing, (iii) is formed into a cured film having excellent flexibility, flame retardancy, and electrical insulation reliability, and (iv) causes a substrate to have a small warpage after being cured.

Abstract: The invention relates to a layered body, in particular one with two sheets of electric functional layers, as well as a use of this layered body for example in a touch screen with improved resolution. By changing the grid structure at the intersection areas a moiré effect can be avoided by superimposition of the patterns.

Abstract: A flexible printed wiring member includes a flexible insulating base layer; a patterned copper layer disposed on the insulating base layer, the patterned copper layer including: a first portion including unplated copper leads; and a second portion including a plated metal layer disposed on the patterned copper layer; a first insulating cover layer disposed over the unplated copper leads in the first portion, the first insulating cover layer terminating at a first edge located proximate a boundary between the first portion and the second portion of the patterned copper layer; and a second insulating cover layer disposed over the first insulating cover layer, the second insulating cover layer terminating at a second edge located within the second portion of the patterned copper layer.

Abstract: A semiconductor device is a resin package structure including a semiconductor element T1 molded with a first resin 6. The first resin 6 contains a filler 7 including an electrical insulating capsule enclosed with a phase-change-material that absorbs ambient heat and phase-changes so as to increase a dielectric-strength. The effect of the filler 7 achieves a structure with satisfactory heat dissipation and a high withstand voltage.

Abstract: A conductive component is disclosed in the present invention, which includes an insulating layer and a metal mesh arranged on the insulating layer, the metal mesh defines a plurality of voids arranged in array, the aperture ratio K of the voids of the metal mesh and the optical transmittance T1 of the conductive component and the optical transmittance T2 of the insulating layer being described as formula: T1=T2*K. The metal mesh is arranged on the insulating layer in the conductive component, a patterned sensing layer on the insulating layer by the metal mesh treated by exposure and development as needed when in use, and then applied to touch screen, the use of indium tin oxide is avoided in the conductive component, thus the cost of the conductive component is low. A method of preparing the conductive component is also provided.

Abstract: [Summary] [Subject] The present invention has an objective to provide a circuit board for a peripheral circuit which can transmit outside heat which generates from a high exothermic element, such as a power semiconductor element, while attaining reduction in size and weight, reduction in serge, and reduction in a loss, in high-capacity modules including power modules, such as an inverter. [Solution Means] In a high-capacity module, by laminating a peripheral circuit using a ceramic circuit board with electrode(s) constituted by thick conductor and embedded therein on a highly exothermic element, overheating of the module is prevented by effective heat dissipation via the circuit board while attaining reduction in size and weight, reduction in serge, and reduction in a loss in the module.

Abstract: A wiring board with built-in metal slugs includes a dielectric hybrid core and build-up circuitries. The metal slugs extend into apertures of a stiffener of the hybrid core and are electrically connected to the build-up circuitry. The build-up circuitry covers the metal slugs and the stiffener and provides signal routing. The metal slugs can serve as power and ground planes for the wiring board.

Abstract: An organic LED element includes a transparent substrate, a light scattering layer, a first electrode, an organic light emitting layer, and a second electrode. The light scattering layer includes a base material made of glass, and scattering substances dispersed in the base material. The light scattering layer has a refractive index [N?] greater than a refractive index [N?] of the transparent substrate. First and second layers made of a material other than molten glass are arranged between the light scattering layer and the first electrode. A refractive index N1 of the first layer is greater than [N?], and a refractive index N2 of the second layer is greater than each of [N?], [N?], and N1.

Abstract: Disclosed herein is a flat dam formed in a package region of an insulation layer provided on a board to limit movement of an underfill and made of the hydrophobic material including any one of or at least two of perfluorooctyl acrylate (PFAC), polypropylene, polytetrafluoroethylene (PTFE), and fluorine compound.

Abstract: A high-quality resistor pattern and conductor pattern is formed on an external surface of a multilayer ceramic substrate by an ink jet method. A composite sheet including a first ceramic green layer and a shrinkage-retardant layer is formed, and a resistor pattern and a conductor pattern are formed on the first ceramic green layer of the composite sheet by an ink jet method. Subsequently, a plurality of second ceramic green layers are stacked with the composite sheet such that the shrinkage-retardant layer of the composite sheet defines an outermost layer, thus forming a multilayer composite including an unfired multilayer ceramic substrate and the shrinkage-retardant layer. Then, the multilayer composite is fired, and the shrinkage-retardant layer is removed to obtain a sintered multilayer ceramic substrate.

Abstract: Provided are a ceramic wiring substrate; a multi-piece ceramic wiring substrate array for providing a plurality of the wiring substrates; and a method for reliably producing the wiring substrate array. The ceramic wiring substrate includes a substrate main body, which has a front surface, a back surface, side surfaces, a groove surface located on a side toward the front surface, and a fracture surface located on a side toward the back surface; and a notch which has a concave shape in plan view, and which is provided on at least one of the side surfaces so as to extend between the front surface and the back surface, wherein, in the side surface having the notch, the boundary between the groove surface and the fracture surface has curved portions on opposite sides of the notch, the curved portions being convex toward the front surface of the substrate main body in side view.

Abstract: [Problem] Provided are: a pattern forming method by which a pattern can be formed by development using a thermosetting resin composition and a cured layer having excellent curability can be obtained; a thermosetting resin composition used in the pattern forming method; and a printed circuit board. [Means for Solution] The pattern forming method according to the present invention is characterized by comprising the steps of: (A) forming a resin layer composed of an alkali-developable thermosetting resin composition comprising a photobase generator on a substrate; (B) activating the photobase generator contained in the alkali-developable thermosetting resin composition by irradiation with a light in a pattern form so as to cure an irradiated part; and (C) forming a negatively patterned layer by removing a non-irradiated part by alkali development.

Abstract: This disclosure provides systems, methods and apparatus for glass via bars that can be used in compact three-dimensional packages, including embedded wafer level packages. The glass via bars can provide high density electrical interconnections in a package. In some implementations, the glass via bars can include integrated passive components. Methods of fabricating glass via bars are provided. In some implementations, the methods can include patterning and etching photo-patternable glass substrates. Packaging methods employing glass via bars are also provided.

Abstract: A method reduces coupling noise and controls impedance discontinuity in ceramic packages by: providing at least one reference mesh layer; providing a plurality of signal trace layers, with each signal layer having one or more signal lines and the reference mesh layer being adjacent to one or more of the signal layers; disposing a plurality of vias through the at least one reference mesh layer, with each via providing a voltage (Vdd) power connection or a ground (Gnd) connection; selectively placing via-connected coplanar-type shield (VCS) lines relative to the signal lines, with a first VCS line extended along a first side of a first signal line and a second VCS line extended along a second, opposing side of said first signal line. Each of the VCS lines interconnect with and extend past one or more vias located within a directional path along which the VCS lines extends.

Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same. The printed circuit board includes: a core reinforcement having stiffness; insulating layers formed on both surfaces of the core reinforcement; a through hole formed by penetrating through the insulating layer and the core reinforcement; and a circuit layer formed on the insulating layer and a plating layer formed in the through hole for implementing inter-layer connection of the circuit layers.

Abstract: A circuit board includes an insulation layer, an electrically conductive layer, and a solder mask layer. The insulation layer has a plurality of through holes passing through. The electrically conductive layer is formed on a surface of the insulation layer and covers the through holes. The electrically conductive layer has a plurality of portions exposed in the through holes to serve as a plurality of first conductive pads. The solder mask layer covers the electrically conductive layer and defines a plurality of openings to expose parts of the electrically conductive layer. Parts of the electrically conductive layer are exposed to the solder mask layer to serve as a plurality of second conductive pads. The second conductive pads are electrically connected to the first conductive pads respectively. This disclosure further relates to a chip package and a method of manufacturing the same.

Abstract: A printed wiring board includes a first buildup layer including first and second interlayer insulating layers, and a second buildup layer formed on the first buildup layer and including the outermost interlayer insulating layer and the outermost conductive layer formed on the outermost interlayer resin insulating layer. The buildup layer includes a first signal line interposed between the first and second interlayer insulating layers, a first ground layer formed on a surface of the first interlayer resin insulating layer, and a second ground layer formed on a surface of the second interlayer resin insulating layer such that the first signal line is interposed between the first and second ground layers, the first and second interlayer insulating layers and the outermost interlayer insulating layer include resin materials, respectively, and the first and second interlayer insulating layers are different from the outermost interlayer insulating layer in material and/or thickness.

Abstract: Disclosed herein is a printed circuit board, including: a substrate; a first circuit layer formed on the substrate; a first insulation layer formed on the first circuit layer and having a pattern corresponding to that of the first circuit layer; and a second insulation layer formed on the substrate such that the second insulation layer surrounds the first circuit layer and the first insulation layer formed on the first circuit layer. The printed circuit board is advantageous in that process time and process cost can be reduced because a first insulation layer is used as an etching resist and is included as a part of a printed circuit board even after etching.