Insulating Patents (Class 174/258)
  • Patent number: 8796556
    Abstract: The present invention provides flake having a thickness up to 350 nm, the flake being made of basalt, ceramics, alumina, graphite, a metal, a metal oxide or a combination of any two or more thereof. Equipment for manufacturing such flake is also described as is a method for the manufacture of the flake. The equipment comprises a cup mounted for rotation and for receiving molten glass. The equipment further comprises either insulating means extending at least partially around said cup or means for heating the cup while it is rotating.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: August 5, 2014
    Inventor: Charles Watkinson
  • Patent number: 8796557
    Abstract: An adhesive film, containing a first adhesive layer in which conductive particles are dispersed, and a second adhesive layer adhered to the first adhesive layer, wherein the lowest viscosity of the first adhesive layer attained at or below the curing temperature is higher than that of the second adhesive layer attained at or below the curing temperature, where the curing temperature is a temperature at which the adhesive layer starts to cure, wherein the first and second adhesive layers are respectively disposed to a substrate side and an electronic part side, and the adhesive film is configured to join the electronic part and the substrate by heating and pressurizing the substrate and the electronic part with the adhesive layer being therebetween, and wherein the first adhesive layer has a thickness which is less than two times of an average particle diameter of the conductive particles.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: August 5, 2014
    Assignee: Dexerials Corporation
    Inventors: Tomoyuki Ishimatsu, Hiroki Ozeki
  • Patent number: 8796145
    Abstract: A method of manufacturing a metal-base substrate having an insulative adhesive layer and a conductor layer on a metal-based material is provided. The method includes the steps of dispersing a disperse phase in an insulative adhesive-dispersing medium that contains a wetting dispersant and constitutes the insulative adhesive layer; laminating step of laminating the insulative adhesive on the conductor foil as feeding the roll-shaped conductor foil; curing the insulative adhesive on the conductor foil under heat into a B stage state and thus forming a composite of the conductor foil and the insulative adhesive layer in the B stage state; laminating the metal-based material on the insulative adhesive layer in the B stage state to give a laminate; and then curing the insulative adhesive layer in the B stage state into a C stage state by heat pressurization of the laminate.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: August 5, 2014
    Assignee: Denki Kagaku Kogyo Kabushiki Kaisha
    Inventors: Taiki Nishi, Takeshi Miyakawa, Katsunori Yashima, Kensuke Okoshi, Hidenori Ishikura
  • Publication number: 20140202747
    Abstract: A circuit board and a manufacturing method thereof are provided. The manufacturing method includes the following steps. A substrate having a first surface and a second surface opposite to each other is provided. A first circuit layer is formed on the first surface. A stress is applied to the first circuit layer and the substrate using a awl tool, such that the first circuit layer and the substrate are deformed to form a through hole. A portion of the first circuit layer is located on the sidewalls of the through hole and an end of the through hole is protruded from the second surface. A printing process is performed to form a second circuit layer on the second surface. The second circuit layer is connected to the first circuit layer located in the through hole.
    Type: Application
    Filed: January 24, 2013
    Publication date: July 24, 2014
    Applicant: ELITES ELECTRONICS CORP.
    Inventor: Jung-Yu Peng
  • Patent number: 8784682
    Abstract: Disclosed are a thermosetting composition including a liquid crystal oligomer, a bismaleimide-based compound, an epoxy compound, and a fluorinated polymer resin powder. A resin cured product, board, and storage medium each include the thermosetting composition.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: July 22, 2014
    Assignees: Samsung Electro-Mechanics Co., Ltd., Samsung Fine Chemicals Co., Ltd.
    Inventors: Myung-Sup Jung, Jae-Jun Lee
  • Patent number: 8785786
    Abstract: A wiring board including a conductor post corresponding to high-density packaging is provided. The wiring board may comprise a conductor layer, a solder resist layer laminated on the conductor layer, and a conductor post that is electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the solder resist layer, wherein the solder resist layer comprises a thermosetting resin; the conductor post comprises tin, copper, or a solder; the conductor post includes a lower conductor post, which is located within the through-hole and includes an external side surface and a lower end surface, and an upper conductor post, which is located above the lower conductor post and is projected outside the solder resist layer; and at least a part of a lower end surface of the upper conductor post is brought into intimate contact with an outer surface of the solder resist layer.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: July 22, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Erina Yamada, Kazunaga Higo, Hironori Sato
  • Publication number: 20140196936
    Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one surfaces of the plurality of dielectric layers and alternately exposed to both end surfaces of the ceramic body; first and second external electrodes formed on both end surfaces of the ceramic body and electrically connected to the respective first and second internal electrodes; and first and second non-conductive epoxy resin layers formed on peripheral surfaces of the first and second external electrodes except for mounting surfaces of the first and second external electrodes.
    Type: Application
    Filed: March 15, 2013
    Publication date: July 17, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyung Pyo HONG, Hyun Hee GU, Doo Young KIM, Young Ghyu AHN, Chang Hoon KIM
  • Publication number: 20140196937
    Abstract: Disclosed herein is a multi-layered capacitor, including: an element formed by alternately multi-layering a dielectric layer and an internal electrode; and external terminals disposed at both ends of the element, wherein the dielectric layer disposed at an upper end U and a lower end L of the element is formed of a paraelectric material and the dielectric layer disposed at a central part C of the element is formed of a ferroelectric material.
    Type: Application
    Filed: November 8, 2013
    Publication date: July 17, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Cheol PARK, Young Ghyu AHN, Sang Soo PARK, Joon Yeob CHO
  • Patent number: 8777638
    Abstract: A wiring board includes a first substrate portion including a first feed-through conductor portion in a vertical direction, a second substrate portion provided on the first substrate portion and including a second feed-through conductor portion in a vertical direction of a corresponding part to the first feed-through conductor portion, and a feed-through electrode including the first feed-through conductor portion and the second feed-through conductor portion.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: July 15, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Akinori Shiraishi, Mitsutoshi Higashi
  • Patent number: 8779561
    Abstract: Disclosed herein is a Light Emitting Diode (LED) backlight unit without a Printed Circuit board (PCB). The LED backlight unit includes a chassis, insulating resin layer, and one or more light source modules. The insulating resin layer is formed on the chassis. The circuit patterns are formed on the insulating resin layer. The light source modules are mounted on the insulating resin layer and are electrically connected to the circuit patterns. The insulating resin layer has a thickness of 200 ?m or less, and is formed by laminating solid film insulating resin on the chassis or by applying liquid insulating resin to the chassis using a molding method employing spin coating or blade coating. Furthermore, the circuit patterns are formed by filling the engraved circuit patterns of the insulating resin layer with metal material.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: July 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gi Ho Jeong, Si Young Yang, Jae Wook Kwon, Jeong Hoon Park, Hyun Ju Yi, Choon Keun Lee
  • Patent number: 8779296
    Abstract: A wiring board is provided which can prevent a metal electrode from corroding due to a defect in a transparent conductive electrode covering an end face of an organic insulating film. An active-matrix substrate includes: a glass substrate; a metal wire provided on the glass substrate; a gate insulating film covering the metal wire; an interlayer insulating film covering the gate insulating film; and a transparent electrode formed on the interlayer insulating film. The scanning wire provided with a terminal area where the transparent electrode is laminated directly on the scanning wire. The transparent electrode extends over the terminal area in such a way as to cover an end face of the interlayer insulating film that faces the terminal area and an end face of the gate insulating film that faces the terminal area.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiromitsu Katsui, Kenichi Kitoh, Wataru Nakamura
  • Patent number: 8779298
    Abstract: Electronic circuits (1, 101) are disclosed. The electronic circuits comprise a first and a second integrated circuit (10a, 110a, 10b, 110b) and a printed circuit board (PCB) (15, 115). The PCB comprises dielectric layers (30a-c, 130) of polymer-based materials having different dissipation factors arranged in accordance with various embodiments for suppressing noise.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: July 15, 2014
    Assignee: St-Ericsson SA
    Inventor: Richard Asterland
  • Patent number: 8780576
    Abstract: An interconnection component includes a first support portion has a plurality of first conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent a first surface and a second end adjacent a second surface. A second support portion has a plurality of second conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent the first surface and a second end adjacent the second surface. A redistribution layer is disposed between the second surfaces of the first and second support portions, electrically connecting at least some of the first vias with at least some of the second vias. The first and second support portions can have a coefficient of thermal expansion (“CTE”) of less than 12 parts per million per degree, Celsius (“ppm/° C.”).
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: July 15, 2014
    Assignee: Invensas Corporation
    Inventors: Belgacem Haba, Kishor Desai
  • Publication number: 20140191275
    Abstract: To provide a ceramic substrate having a reflective film formed on the surface thereof that is suitable for mounting electronic components such as LEDs, a ceramic substrate 1 includes a ceramic substrate body 2, a terminal 4 for connecting an electronic component 3 on the ceramic substrate body 2, and a wiring unit 5 forming an electronic wiring pattern over the ceramic substrate body 2. The thickness of the terminal 4 is configured to be greater than the thickness of the wiring unit 5.
    Type: Application
    Filed: January 2, 2014
    Publication date: July 10, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Takashi AIBARA
  • Publication number: 20140190731
    Abstract: A quickly-mounted capacitor consists of a capacitor (1) and a plug piece (10). The quickly-mounted capacitor is characterized in that a fixation mounting rod (22) or a screw (21) is extended from a lower end of a housing of the capacitor (1); the plug piece (10) comprises an insulating sheet (11) arranged in an upper portion, and a lower portion of the insulting sheet (11) is connected to an upper end of a connection part (13); a lower end of the connecting part (13) is connected to a plastic elastic card (12) to form a plastic anchor-shaped elastic card. An upper portion of the plug piece (10) is provided with a capacitor mounting hole (15). The capacitor not only is convenient to plug, but also can effectively play a role in insulation and prevent the accident caused by conducting leak electricity to an electric appliance casing when abnormal electricity leakage occurs in the capacitor.
    Type: Application
    Filed: September 25, 2012
    Publication date: July 10, 2014
    Applicants: SHANGHAI HAOYE CAPACITORS CP., LTD., SHANGHAI HAOYE ELECTRIC CO., LTD.
    Inventors: Zikui Zhang, Feng Xu, Hao Pan
  • Publication number: 20140182906
    Abstract: An interposer is provided, including a composite body and a plurality of conductive through vias penetrating the composite body. The composite body includes at least a main layer and at least a combining layer stacked on one another. The combining layer prevents the main layer from being cracked. The combining layer is more flexible than the main layer. The combining layer prevents the main layer from being cracked. Therefore, the main layer can be thinned on demands, and the interposer can be thinned accordingly.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Inventor: Dyi-Chung Hu
  • Publication number: 20140182908
    Abstract: This invention relates to an epoxy resin composition for an insulating film, an insulating film, and a printed circuit board including the same. Particularly in a printed circuit board using a build-up process, a skin layer and a roughness are formed on the surface of the insulating film using different curing starting temperatures, so that peel strength can be enhanced, thus enabling the formation of a fine pattern, and also, a coefficient of thermal expansion of the insulating film is low, thus preventing the deformation of the film.
    Type: Application
    Filed: March 15, 2013
    Publication date: July 3, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ji Hye Shim, Yong Jin Park, Hwa Young Lee, Hyung Mi Jung
  • Publication number: 20140182907
    Abstract: There is provided an embedded multilayer ceramic electronic component including: a ceramic body including dielectric layers, having first and second lateral surfaces opposing one another, and having a thickness equal to or less than 250 ?m; a first internal electrode and a second internal electrode disposed to face one another with the dielectric layer interposed therebetween; a first external electrode formed on the first lateral surface of the ceramic body and electrically connected to the first internal electrode and a second external electrode formed on the second lateral surface and electrically connected to the second internal electrode; and metal layers formed on the first external electrode and the second external electrode, respectively, and including copper (Cu), wherein when a thickness of the metal layers is tp, tp?5 ?m may be satisfied.
    Type: Application
    Filed: February 19, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Woo LEE, Eun Hyuk CHAE, Byoung Hwa LEE
  • Patent number: 8766103
    Abstract: An electronic component includes: a multilayer ceramic substrate that has a penetration electrode formed therein, and has a passive element provided on the upper face thereof; an insulating film that is provided on the multilayer ceramic substrate, and has an opening above the penetration electrode; a first connecting terminal that is provided on the insulating film so as to cover the opening, and is electrically connected to the penetration electrode; and a second connecting terminal that is provided on a region of the insulating film other than the opening region.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: July 1, 2014
    Assignees: Taiyo Yuden Co., Ltd., Fujitsu Limited
    Inventors: Takeo Takahashi, Xiaoyu Mi, Tsuyoshi Yokoyama, Tokihiro Nishihara, Satoshi Ueda
  • Publication number: 20140174802
    Abstract: A halogen-free resin composition includes (A) 100 parts by weight of naphthalene epoxy resin; (B) 10 to 100 parts by weight of styrene maleic anhydride copolymer; and (C) 30 to 70 parts by weight of DOPO-containing bisphenol F novolac resin. The halogen-free resin composition includes specific ingredients, and is characterized by specific proportions thereof, to thereby attain a low dielectric constant, a low dielectric dissipation factor, high heat resistance, and high flame retardation, and thus is suitable for producing a prepreg or a resin film to thereby be applicable to copper clad laminates and printed circuit boards.
    Type: Application
    Filed: February 26, 2013
    Publication date: June 26, 2014
    Applicant: ELITE ELECTRONIC MATERIAL (KUNSHAN) CO., LTD
    Inventor: ELITE ELECTRONIC MATERIAL (KUNSHAN) CO., LTD
  • Publication number: 20140174799
    Abstract: A touch electrode device includes first electrode lines and second electrode lines formed on a transparent substrate. An insulating block is disposed at a junction between a first conductive connecting portion of the first electrode line and a second conductive connecting portion of the second electrode line. At least one insulating line is extended from the insulating block and disposed along the first electrode line.
    Type: Application
    Filed: December 27, 2012
    Publication date: June 26, 2014
    Applicant: HengHao Technology Co. LTD
    Inventors: Chien-Wen Lai, Wei-Wen Wang
  • Publication number: 20140174803
    Abstract: A wiring substrate includes a substrate body formed of a plate-like ceramic, having a front surface, a back surface, and a height of 0.8 mm or less; a cavity opening at the front surface and having a rectangular shape as viewed in plane; and side walls having a thickness of 0.3 mm or less between a side surface of the cavity and a side surface of the substrate body. The wiring substrate further includes an electrically conductive layer having the form of a frame and formed on the front surface to surround an opening of the cavity; a ceramic surface having the form of a frame and located adjacently to the electrically conductive layer and along the outer periphery of the front surface; and a via conductor formed in the substrate body along the side surface of the cavity between a bottom surface of the cavity and the front surface.
    Type: Application
    Filed: December 25, 2012
    Publication date: June 26, 2014
    Inventors: Jyun Suzuki, Naoki Kito, Masami Hasegawa, Chizuo Nakashima
  • Publication number: 20140175942
    Abstract: A multilayer ceramic electronic component achieves a high electrostatic capacitance and includes an Al inner electrode superior in smoothness and conductivity. The multilayer ceramic electronic component includes a multilayer body including a plurality of stacked ceramic layers and a plurality of inner electrodes arranged along certain interfaces between the ceramic layers and containing Al as a main component, and an outer electrode located on an outer surface of the multilayer body. A surface of the inner electrode is covered with a layer including a noble metal or Ti as a main component.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 26, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Koichi BANNO, Shoichiro SUZUKI, Taisuke KANZAKI, Akihiro SHIOTA
  • Patent number: 8759685
    Abstract: A wiring substrate includes a substrate body including first and second surfaces on opposite sides and a substrate side surface; a penetration electrode penetrating through the substrate body; a first wiring pattern on the first surface and including a first pad; a second wiring pattern on the second surface and including a second pad; a first insulating resin layer covering the first wiring pattern except for an area corresponding to the first pad and having a first resin side surface; a second insulating resin layer covering the second wiring pattern except for an area corresponding to the second pad and having a second resin side surface that is flush with the first resin side surface; a notch part encompassing at least apart of the substrate body and having a resin material provided therein. The substrate side surface is located more inward than the first and second resin side surfaces.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: June 24, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Akinori Shiraishi
  • Patent number: 8760877
    Abstract: The present invention relates to a flexible modular assembly (100) comprising at least two flexible electronic modules (110 and 111) supported by a textile support (130). The two flexible electronic modules and the textile support each comprise a set of electrical conductors. The flexible modular assembly further comprises flexible connectors (140) for interconnecting two sets of electrical conductors. The flexible modular assembly of the invention is a modular textile assembly for use in large-area applications of electronic textiles.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: June 24, 2014
    Assignee: Koninklijke Philips N.V.
    Inventors: Rabin Bhattacharya, Martijn Krans, Liesbeth Van Pieterson, Thomas Schuler, Guido Lamerichs, Erwin Altewischer
  • Patent number: 8759691
    Abstract: A wiring board has a first resin insulation layer, a first conductive pattern formed on the first resin insulation layer, a second resin insulation layer formed on the first conductive pattern and having an opening portion exposing at least a portion of the first conductive pattern, a second conductive pattern formed on the second resin insulation layer, and a via conductor formed in the opening portion of the second resin insulation layer and electrically connecting the first conductive pattern and the second conductive pattern. The via conductor has a side surface extending between the first conductive pattern and the second conductive pattern and a bent portion where an inclination of the side surface of the via conductor changes in a depth direction of the via conductor.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: June 24, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Shinji Ouchi, Shigeru Yamada, Makoto Terui, Yoshinori Shizuno
  • Publication number: 20140168909
    Abstract: Attachment structures for electrically coupling a microelectronic package to a microelectronic board/interposer including joint pads formed on the microelectronic board/interposer which provide a gap between respective openings in a solder resist layer of the microelectronic substrate and each of the joint pads. Such attachment structures may reduce or substantially eliminate contact between a solder interconnect and a solder resist layer of the microelectronic board/interposer, which may, in turn, reduce or substantially eliminate the potential of crack initiation and propagation at contact areas between the solder interconnect and a solder resist layer of the microelectronic board/interposer due to stresses induced by a mismatch of thermal expansion between the microelectronic package and the microelectronic board/interposer during thermal cycling.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Inventors: Tieyu Zheng, Jin A. Zhao, Ru Han, Min Pei
  • Publication number: 20140166351
    Abstract: A multilater ceramic capacitor includes: a ceramic body in which a plurality of dielectric layers are laminated; and an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layer interposed therebetween, and forming capacitance. An upper cover layer is formed on an upper portion of the active layer; a lower cover layer is formed on a lower portion of the active layer and having a thickness greater than that of the upper cover layer. First and second external electrodes cover both end surfaces of the ceramic body. Specific sizing of ceramic body and electrodes is defined.
    Type: Application
    Filed: February 11, 2013
    Publication date: June 19, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Byoung Hwa LEE, Young Ghyu AHN, Sang Soo PARK, Min Cheol PARK, Tae Hyeok KIM, Heung Kil PARK
  • Publication number: 20140166350
    Abstract: An electronic device may be provided with metal coated dielectric structures that serve as electromagnetic interference shielding, antenna structures, or other metal structures. The metal coated dielectric structures may be formed form a sheet of polymer. Metal may be deposited on the sheet of polymer using a deposition tool and patterned following deposition or may be patterned during deposition. A dielectric sheet having patterned metal may be shaped into a desired shape using molding equipment or other equipment that applies heat and pressure to the dielectric sheet and patterned metal. Metal on a dielectric sheet may also be patterned after the dielectric sheet is formed into a desired shape. Metal may be formed on opposing sides of the dielectric sheet.
    Type: Application
    Filed: December 13, 2012
    Publication date: June 19, 2014
    Applicant: Apple Inc.
    Inventor: Benjamin M. Rappoport
  • Publication number: 20140166352
    Abstract: A hollow sealing structure includes a substrate, an element part provided on a first surface of the substrate, a cap that covers the element part, and a resin layer that covers the cap. The substrate includes a positioning part positioning the cap. The cap includes a fixation part being arranged at the positioning part and fixing the cap on the substrate. The resin layer is connected to the positioning part and the fixation part.
    Type: Application
    Filed: September 21, 2012
    Publication date: June 19, 2014
    Applicant: NEC Corporation
    Inventors: Takashi Ueda, Masamoto Tago
  • Publication number: 20140160688
    Abstract: Methods and apparatus for an interposer with a dam used in packaging dies are disclosed. An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size larger than a size of a die which may be connected to a contact pad above the metal layer within the area. A dam may comprise a conductive material, or a non-conductive material, or both. An underfill may be formed under the die, above the metal layer, and contained within the area surrounded by the dam, so that no underfill may overflow outside the area surrounded by the dam. Additional package may be placed above the die connected to the interposer to form a package-on-package structure.
    Type: Application
    Filed: December 6, 2012
    Publication date: June 12, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Kai-Chiang Wu, Yen-Ping Wang, Shih-Wei Liang, Ching-Feng Yang
  • Patent number: 8749980
    Abstract: A mobile terminal is provided. The mobile terminal comprises at least one element, a connector selectively connected to another device to provide a data exchange path between the at least one element and the other device, and a thermal conduction frame having one side coming into contact with the at least one element and the other side coming into contact with the connector to transfer heat generated from the at least one element to the connector. The connector is connected to the element included in the mobile terminal and the other device through the thermal conduction frame to effectively transfer heat generated from the element to the other device through the connector.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: June 10, 2014
    Assignee: LG Electronics Inc.
    Inventors: Dongsu Won, Seunghwan Jang, Yongsang Cho
  • Publication number: 20140151100
    Abstract: An electronic component embedded printed circuit board includes a core having a cavity; an electronic component inserted in the cavity; insulating layers laminated on top and bottom of the core and mixed with a coupling agent, which has functional groups respectively acting on an organic material and an inorganic material, to be bonded to an outer peripheral surface of the electronic component; and circuit patterns provided on the insulating layers.
    Type: Application
    Filed: November 27, 2013
    Publication date: June 5, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yeon Seop YU, Moon II Kim, Jun Young Kim
  • Publication number: 20140151099
    Abstract: A laser drilling method of a wiring board is provided. In the method, a laser beam shines on a wiring substrate including an insulating layer to remove a portion of the insulating layer. The wiring substrate is placed in a focus section of the laser beam. The focus section contains a central region, an optical axis located in the central region, and a peripheral region surrounding the central region. The maximum light intensity of the focus section is located in the peripheral region.
    Type: Application
    Filed: March 18, 2013
    Publication date: June 5, 2014
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: CHENG MING WENG, WEI-MING CHENG, HAN-PEI HUANG
  • Publication number: 20140144681
    Abstract: This disclosure provides systems, methods and apparatus for an adhesive metal nitride layer on glass. In one aspect, a glass substrate having a surface is provided. A via with a depth to width aspect ratio of 5 to 1 or greater extends at least partially through the glass substrate. An adhesive metal nitride layer is disposed on the surface of the glass substrate and on one or more interior surfaces of the via. The adhesive metal nitride layer includes at least one of titanium nitride and tantalum nitride.
    Type: Application
    Filed: November 27, 2012
    Publication date: May 29, 2014
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Victor Louis Arockiaraj Pushparaj, Ravindra V. Shenoy, Jon Bradley Lasiter, Kwan-Yu Lai, Donald William Kidwell, Ana Rangelova Londergan
  • Publication number: 20140147128
    Abstract: Provided are structures for connecting trace lines of printed circuit boards and optical transceiver modules with the same. The module may include an optical transmitter/receiver part, a signal processing unit, a flexible PCB, and a rigid PCB. The flexible PCB may include a first signal line, and the rigid PCB may include a second signal line. The flexible PCB and the rigid PCB may be overlapped with each other. The first signal line and the second signal line may not be overlapped with each other and be electrically connected to each other by a junction soldering structure. It is possible to transmit high quality and high frequency signals through the first and second signal lines.
    Type: Application
    Filed: June 5, 2013
    Publication date: May 29, 2014
    Inventors: Young-Tak Han, Jang Uk Shin, Sang Ho Park, Yongsoon Baek
  • Publication number: 20140144686
    Abstract: A wiring board for a built-in electronic component includes a substrate having a cavity portion, an electronic component accommodated in the cavity portion of the substrate, a filling resin material filling a space formed between the electronic component and an inner wall of the substrate forming the cavity portion, an insulation layer formed on the substrate and the electronic component accommodated in the cavity portion of the substrate, and a via conductor formed in the insulation layer such that the via conductor is connected to a connection terminal of the electronic component. The substrate has projection portions formed on the inner wall of the substrate such that the projection portions project toward the electronic component accommodated in the cavity portion of the substrate.
    Type: Application
    Filed: November 29, 2013
    Publication date: May 29, 2014
    Applicant: IBIDEN CO., LTD.
    Inventor: Keisuke SHIMIZU
  • Publication number: 20140144685
    Abstract: A printed circuit board with circuit visible includes a wiring layer, a first adhesive layer, a first dielectric layer, and a cover film, which are stacked in described order, the wiring layer comprising at least one electrical contact pad. The cover film has at least one opening corresponding to the electrical contact pad. The cover film includes a second dielectric layer and a second adhesive layer. A flow initiation temperature of the first adhesive layer is in a range from 85 degrees centigrade to 90 degrees centigrade, and a hardening temperature of the first adhesive being lower than 150 degrees centigrade.
    Type: Application
    Filed: November 18, 2013
    Publication date: May 29, 2014
    Applicants: ZHEN DING TECHNOLOGY CO., LTD., FUKUI PRECISION COMPONENT (SHENZHEN) CO., LTD.
    Inventors: MING-JAAN HO, XIAN-QIN HU
  • Patent number: 8735733
    Abstract: Disclosed are a resin composition containing (a) a maleimide compound having at least two N-substituted maleimide groups in a molecular structure and (b) a silicone compound having at least one reactive organic group in a molecular structure thereof; and a prepreg using the same, a laminate, and a printed wiring board. A resin composition having excellent heat resistance and low thermal expansion properties; and a prepreg, a laminate, and a printed wiring board using the same can be provided.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: May 27, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Masato Miyatake, Tomohiko Kotake, Shunsuke Nagai, Shintaro Hashimoto, Yasuo Inoue, Shin Takanezawa, Hikari Murai
  • Publication number: 20140138131
    Abstract: An article includes a patterned substrate including a substrate surface with an inorganic electro-conductive trace adjacent thereto (wherein the substrate and the inorganic material of the trace each has an index of refraction), and a layer including a polymerized acrylate matrix adjacent to at least a portion of the surface of the substrate and the inorganic electro-conductive trace, wherein the layer has an index of refraction that is within ±10% of the average of the indices of refraction of the substrate and the inorganic material of the trace.
    Type: Application
    Filed: March 15, 2013
    Publication date: May 22, 2014
    Applicant: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: ENCAI HAO, ABDUJABAR K. DIRE, ALBERT I. EVERAERTS, TAO LIU, ROSS E. BEHLING, GUY D. JOLY
  • Publication number: 20140140030
    Abstract: A conductive material includes a first metal part whose main ingredient is a first metal; a second metal part formed on the first metal part and whose main ingredient is a second metal, the second metal having a melting point lower than a melting point of the first metal, which second metal can form a metallic compound with the first metal; and a third metal part whose main ingredient is a third metal, which third metal can make a eutectic reaction with the second metal.
    Type: Application
    Filed: January 24, 2014
    Publication date: May 22, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Seiki Sakuyama, Taiji Sakai
  • Patent number: 8728964
    Abstract: The present disclosure relates to a glass composition having a low thermal expansion coefficient, specifically, a glass composition comprising about 55 to less than 64 weight percent of silicon oxide, about 15 to about 30 weight percent of aluminum oxide, about 5 to about 15 weight percent of magnesium oxide, about 3 to about 10 weight percent boron oxide, about 0 to about 11 weight percent calcium oxide, and about 0 to about 2 weight percent of alkali oxide, the remainder being trace compounds of less than about 1 weight percent, is provided. Glass fibers and composite articles formed therefrom are also provided.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: May 20, 2014
    Assignee: AGY Holding Corp.
    Inventors: Sudhendra V. Hublikar, Robert L. Hausrath, Anthony V. Longobardo
  • Patent number: 8729402
    Abstract: An object of the present invention is to provide (i) a polyimide precursor composition which is curable at a low temperature (not more than 250° C.) and which has a low viscosity despite having a high concentration, and a production method thereof, (ii) a polyimide coating film obtained from the polyimide precursor composition and having good properties, and a production method thereof, (iii) a photosensitive resin composition prepared by use of the polyimide precursor composition, and a production method thereof. The object of the present invention can be attained by a polyimide precursor composition containing an imidized tetracarboxylic acid having a specific structure and an isocyanate compound having a specific structure, or optionally a diamine.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: May 20, 2014
    Assignee: Kaneka Corporation
    Inventor: Yoshihide Sekito
  • Patent number: 8730676
    Abstract: A composite component includes a first joining partner, at least one second joining partner and a first joining layer situated between the first joining partner and the second joining partner. In addition to the first joining layer, at least one second joining layer is provided between the first and the second joining partner; and at least one intermediate layer is situated between the first and the second joining layer.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: May 20, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Michele Hirsch, Michael Guenther
  • Patent number: 8729404
    Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: May 20, 2014
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Glenn Simenson, William Antoni, Steven Cohen, Jeffery Howerton
  • Publication number: 20140131081
    Abstract: Disclosed herein is a printed circuit board, including: a base substrate on which a connection pad is formed; a dam spaced apart from one side of the connection pad; and a protective layer formed to surround the dam.
    Type: Application
    Filed: March 14, 2013
    Publication date: May 15, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hye Jin Cho, Se Kyung Lee, Bae Soon Son, Suk Jin Ham
  • Patent number: 8720049
    Abstract: Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: May 13, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd
    Inventors: Tae Kyun Bae, Chang Gun Oh, Ho Sik Park
  • Patent number: 8720048
    Abstract: A method of manufacturing a printed circuit board includes arranging a core layer in which a bending prevention portion of at least two layers that are metal layers having different thermal expansion coefficients is disposed between a plurality of insulating members; forming a circuit pattern so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and forming an insulating layer including an opening portion that exposes the circuit pattern on the core layer.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: May 13, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Mi Sun Hwang, Jae Joon Lee, Myung Sam Kang
  • Patent number: 8723051
    Abstract: A wiring substrate includes a substrate body formed of an inorganic material and including a first surface and a second surface, a first trench formed in a first surface side of the substrate body, a second trench formed in a second surface side of the substrate body, a penetration hole penetrating through the substrate body, a first plane layer filling the first trench, a second plane layer filling the second trench, and a penetration wiring filling the penetration hole. The first plane layer is a reference potential layer. The second plane layer is a power supply layer.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: May 13, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Rie Arai
  • Publication number: 20140124777
    Abstract: A method for manufacturing a build-up substrate, the build-up substrate comprising an insulating layer and a wiring pattern layer stacked over a circuit substrate, said method comprising the steps of: (i) applying a photoactive metal oxide precursor material to one or both sides of the circuit substrate with a wiring pattern, and drying the applied photoactive metal oxide precursor material to form an insulating film; (ii) forming an opening for a via hole in the insulating film by exposure and development of the insulating film; (iii) applying a heat treatment to the insulating film to convert the insulating film into a metal oxide film, thereby forming a build-up insulating layer of the metal oxide film; and (iv) plating the build-up insulating layer to form via holes in the openings, forming a metal layer on the build-up insulating layer, and etching the metal layer to form a build-up wiring pattern; and (v) repeating the steps from (i) to (iv) at least one time.
    Type: Application
    Filed: October 29, 2012
    Publication date: May 8, 2014
    Applicant: Panasonic Corporation
    Inventors: Seiichi Nakatani, Koji Kawakita, Susumu Sawada, Yoshihisa Yamashita