Abstract: In production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101˜103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 131, 161 and the blind via-holes 141, 142.

Abstract: The present invention provides a new device and method for enhancing the electrical properties of the thick metal backer/electrically conductive thermoset adhesive/printed circuit board or card assembly. The enhanced electrical properties are obtained by providing a thin bondline of conductive adhesive that is essentially void free.

Abstract: The present invention relates to a method for manufacturing a printed circuit board, and the method comprises forming penetrating holes in predetermined positions of an insulating substrate, then forming resist films having a predetermined pattern on the front and the rear surfaces of the insulating substrate; plating the insulating substrate provided with the resist films so as to form conductive plating patterns on the front and the rear surfaces of the insulating substrate and conductive paths on the inside surfaces of the penetrating holes, the conductive plating patterns being connected to each other via the conductive paths; and subsequently removing the resist films.

Abstract: A printed wiring board is formed from two or more layers, one of which has circuit lines formed thereon, and wherein the surfaces of the circuit lines are roughened only in areas that require good copper to laminate adhesion. The remainder of the circuit line surfaces are smooth. Thus, those areas for propagation of the signal on signal lines have the circuit lines smooth to maximize the signal propagation effect, while those areas where the signal propagation is not critical are rough, which improves the adhesion of one layer to another. On the voltage planes, the surface in those regions opposite the smooth surfaces of the signal planes is smooth. Thus, these areas of the voltage planes can be maintained smooth while the other areas of the surface of the voltage planes can be roughened, providing good adhesion to the adjoining dielectric material.

Abstract: In the production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101˜103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 13, 161 and the blind via-holes 141, 142.

Abstract: A multi-layered printed wiring board comprising a multi-layered substrate. The substrate has a plurality of conductor layers, a plurality of insulating layers interposed between the conductor layers, a via hole penetrating the insulating layers and having a plated layer electrically connecting the conductor layers, and a plating resist layer through which the via hole passes. The plating resist layer is exposed to an interior of the via hole and divides the plated layer into a plurality of parts. The parts of the plated layer electrically connect the conductor layers.

Abstract: The invention comprises a method for manufacturing electrical connecting elements or semifinished products. Microvias are formed in a dielectric substrate layer by piercing a substrate layer (1) through a first conducting layer (3), which essentially covers an entire side of the substrate. The perforation depth (d) is at least equal to the total thickness of the substrate and the first conducting layer. The conductor material of the first conducting layer (3) during the piercing step is deformed so that it partially covers the wall of the hole fabricated by the piercing process. The little remaining distance between the conductor material and the opposite side of the substrate layer can easily be bridged by plating the side of the first conducting layer with additional conductor material. In this way, a reliable via contact is formed.

Abstract: Electrical nets are prepared by bonding an electrically conductive element in a deleted plated via. The electrically conductive element has a headed portion that contacts the bottom of the laminate and the other end of the electrically conductive element electrically connects to a BGA pad or surface trace line.

Abstract: A printed wiring board (1) having a cavity (20) for mounting electronic parts therein and a method for manufacturing thereof, comprising: an upper wiring substrate (1A) having flat surfaces on both sides; a lower plate body (1B) being fixed on a reverse side surface of the upper wiring substrate, and being formed with the cavity (20) in a part thereof, for receiving an electronic part (30) within an inside thereof; conductor layers (3) provided on both side surfaces of the upper wiring substrate for mounting electronic parts thereon, by forming plated through-holes (7) or flat through-holes (7′), in particular with in a region of the cavity on the reverse side surface thereof; and external electrodes (5) formed on side-end surface or on a lower-end surface of the printed wiring board, wherein at least an electronic part, for example, hybrid IC, chip-like parts, functional parts, such as SAW filter, sensor parts, etc.

Abstract: The invention is directed to techniques for forming a connection between a pin and a circuit board using a pin having protruding portions and grooved surfaces that extend between the protruding portions. The protruding portions (i) prevent the pin from inadvertently slipping through a via of the circuit board, and (ii) maintains the pin's proper position relative to the circuit board via. The grooved surfaces enable gas to vent from a cavity in the via during the solder process thus enabling solder to flow within the via and form a reliable and robust solder joint between the pin and the circuit board via. In one arrangement, the protruding portions and grooved surfaces are at both ends of the pin enabling the pin to be soldered between two circuit board sections. In one arrangement, the pin is simultaneously soldered to both circuit board sections. In another arrangement, the pin is initially soldered to one circuit board section, and subsequently soldered to another circuit board section.

Abstract: A printed wiring board comprises an insulating layer having a plurality of recesses formed along a predetermined edge portion of the insulating layer to extend through a side surface of the insulating layer, tabs for establishing electrical connection with an external electronic apparatus and which are formed on a surface of the insulating layer along the predetermined edge portion in correspondence with the plurality of recesses, and extensions connected electrically to the respective tabs and extending into the respective recesses. The printed wiring board may further comprise a plurality of dummy pads which are buried under the insulating layer in correspondence with the tabs and the extensions and which are electrically insulated from each other. The extensions are joined to the dummy pads through the recesses. The resulting board comprises a structure in which tabs are not easily peeled from an insulating layer.

Abstract: A multi-layer printed circuit board includes a via having a conductive upper portion, a conductive lower portion, and an electrically insulating intermediate portion between the upper and lower portions. In one embodiment, the insulating intermediate portion of the via is provided by a non-platable layer of the circuit board, as may be comprised of PTFE. Vias having a continuous conductive coating may be formed through clearance holes in the non-platable layer which are provided with a platable inner surface, either by filling the hole with a platable material, such as epoxy resin, prior to laminating the board or by chemically conditioning the non-platable material to make it platable. In a further embodiment, the as insulating intermediate portion of the via has a narrower diameter than the conductive upper and lower portions.

Abstract: A multi-layer interconnection board, includes a multi-layer structure in which plural interconnections are provided and which includes a ground layer, and a hole part provided in the multi-layer structure, wherein a conductive part is provided on an internal wall part of the hole part.

Abstract: End-face through holes each comprising a concave-curved end-face opening groove and an end-face electrode covering the inner wall of the groove are formed in the end-faces of a substrate. Furthermore, a solder having a semi-circular shape is attached to the end-face electrode. The solder comprises an electrode facing portion facing the end-face electrode in the end-face groove, and a protuberant portion elongated from the electrode facing portion to protrude on the back-surface side of the substrate. Thereby, even if the substrate or the like is warped, a gap between the end-face electrode and the electrode pad of a mother board can be filled with the protuberant portion of the solder to connect the end-face electrode and the electrode pad to each other.

Abstract: A multilayer printed circuit board is provided which includes a base member having a surface provided with a base wiring pattern, an inner buildup layer laminated on the base member and having a surface formed with an inner buildup wiring pattern, and an outer buildup layer laminated on the surface of the inner buildup layer and having a surface formed with an outer buildup wiring pattern. The wiring patterns are electrically connected to each other through vias. The inner buildup layer is formed of a resin material which is not reinforced by glass fibers, whereas the outer buildup layer is formed of a resin material reinforced by glass fibers.

Abstract: A resin structure includes a resin layer and a metal layer. The resin layer is formed of a single material. The metal layer is laminated directly on the resin layer without intervention of an adhesive layer between the resin layer and the metal layer. A surface of the resin layer, on which the metal layer is laminated, has a surface roughness of a value in a range of 0.1 microns to 10 microns, as a rough surface. The metal layer is formed on the rough surface of the resin layer.

Abstract: A multilayer printed circuit board enables needless electro-magnetic radiation to be suppressed. Interlayer insulation materials are arranged in layer-built constitution between respective layers of a mixed wiring layer of a first signal and/or a power supply wiring, a first ground layer, a second ground layer, and a mixed wiring layer of a second signal and/or a power supply wiring. A through-hole for connecting the ground layers with each other is provided adjacently to a through-hole for connecting the signal and/or the power supply between these layers. According to the constitution, a return circuit current route of the signal and the power supply to the ground layers is secured. As a result, a loop made by the current becomes small, thus needless radiation of electro-magnetic wave is capable of being suppressed.

Abstract: A multi-layer circuit board is disclosed. The circuit board comprises a plurality of conductive planes; a plurality of plated through hole sets, each set comprising one or more plated through holes, none to all of the plated through holes of each set contacting at least one the conductive plane; a thermal break formed around each plated through hole in each conductive plane to which the plated through hole is connected; and one or more thermal vents, in the vicinity of each plated through hole in each conductive plane to which the plated through hole is connected. Additionally, surface mount technology pads are provided on a top surface of the circuit board.

Abstract: An electronic structure. The electronic structure comprises a layer. The layer includes: a cylindrical volume; a fully cured annular volume of a photoimageable dielectric (PID) material circumscribing the cylindrical volume; and a partially cured remaining volume of the PID material circumscribing the annular volume. The cylindrical volume may include a via. The structure can include a power plane.

Abstract: Electrical nets are prepared by bonding an electrically conductive element in a deleted plated via. The electrically conductive element has a headed portion that contacts the bottom of the laminate and the other end of the electrically conductive element electrically connects to a BGA pad or surface trace line.

Abstract: An electronic structure that includes a copper-Invar-copper (CIC) laminate of negligible thickness, such as a thickness not exceeding about 0.5 microns. The electronic structure may have a via passes through the CIC laminate such that the via is plated with a ring of copper. The ring of copper and the copper in the CIC laminate may have about the same grain structure.

Abstract: A multi-layer wiring substrate capable of high density packaging, and a method of manufacturing the same, in which a carrier substrate, in which through holes can be easily formed in high density corresponding substantially to a pitch of connecting terminals in a semiconductor chip, and build-up layers are formed on the substrate with the application of a conventional build-up technique. When the build-up technique for repeatedly forming insulating layers and wiring layers on a carrier substrate is used to manufacture a multi-layer wiring substrate, the carrier substrate is formed in the following manner. First, an insulating resin layer is formed in a copper foil, in which a plurality of first windows are regularly provided, to cover the copper foil, and the resin layer fills the interior of the windows.

Abstract: The invention provides a printed-wiring board that is capable of preventing the lift-off phenomenon without changing the related process for fabricating related printed-wiring boards. A printed-wiring board of the present invention has the structure in which land portions are formed on both sides (front side and back side) of a board, a through hole is formed through the board, and an electrically conducting layer is formed on the inside peripheral surface of the through hole by means of plating to connect between the above-mentioned land portions of a wiring pattern, wherein the entire surface of the land part including the opening circumference of the through hole is covered with an insulating layer that covers the other part of the wiring pattern on the component side and on the other hand the land part is not covered with an insulating layer and remains exposed on the soldering side.

Abstract: In a semiconductor package which contains an IC element therein and effects the inputting and outputting of a signal to the IC element through a plurality of pads, a group of signals is layout-patterned so as to be divided into a plurality of groups such as a group of signals weak against noise, a group of signals liable to discharge noise and a group of signals exchanging a heavy current and so that the groups may be isolated from one another.

Abstract: To mount electronic components on a printed circuit board (PCB), the electrical contacts of the components are coupled to PCB bonding pads that are intersected by via pads. To minimize various defects encountered during solder reflow, while concurrently minimizing PCB area and manufacturing costs, the via pads are formed so that the via holes substantially avoid underlying the solder fillets coupling the component contacts to the PCB bonding pads. In one embodiment, the via pads are formed in the inter-pad space beneath the component; in another embodiment they are offset from the bonding pads. A substrate, an electronic assembly, and an electronic system are described.

Abstract: An opening portion is provided in a connecting portion of a flexure blank, an opening end portion of an insulating base layer is coated with a conductive member without exposing the opening end portion of the insulating base layer in the connecting portion, and a lower surface of the conductive member of the opening portion in the connecting portion of the flexure blank is structured such as to form the same surface as the lower surface of the insulating base layer.

Abstract: A substrate of multilayered structure having a plurality of sets of an insulation layer and a wiring line layer, and having one face for mounting a semiconductor element thereon and the other face on which external connection terminals are to be provided, the face for mounting a semiconductor element being provided with pads to be bonded to an electrode terminal of the semiconductor element, the other face being provided with pads to be bonded to an external connection terminal, such as a terminal formed of a solder ball, and the wiring line layers on both sides of an insulation layer being connected with each other by vias piercing the insulation layer, wherein the surfaces of the pads to be bonded to an electrode terminal of a semiconductor element are flat and are in the same plane. A method of manufacturing such a multilayered substrate is also disclosed.

Abstract: A chip carrier structure and method for forming the same having a receptor pad formed therein. The structure comprises a circuitized substrate having a conductive element on the surface, an External Dielectric Layer mounted on the circuitized substrate with an opening positioned above the conductive element to form a microvia. The walls of the microvia are first treated to enhance copper adhesion and then are electroplated to provide a receptor pad. Finally, a solder paste is deposited within the microvia to create a solder deposit or bump.

Abstract: In holes formed in a multi-layer wiring board for transmitting differential signals, a first hole is formed, an insulating portion is formed by filling the first hole with an insulating resin, a pair of second holes is formed for transmitting the differential signals to the formed insulating portion, and the pair of second holes is arranged symmetrically each other with respect to a center axis of the first hole for forming a coaxial structure.

Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A second primary embodiment of the invention utilizes a carrier substrate which has a pair of recesses for back-to-back surface mounting of the IC package pair. The two IC packages may be in contact with opposite sides of a heat sink layer embedded within the carrier substrate.

Abstract: The present invention provides a through-hole structure for connecting a connector to a printed circuit board, the through-hole structure comprising a signal through-hole having a conductive layer therein for supplying a signal to the printed circuit board, power through-holes having a conductive layer therein for supplying power to the printed circuit board, and dielectric constant adjusting portions formed among the signal through-hole and the power through-holes. Moreover, the present invention provides a printed circuit board having the above-described through-hole structure formed therein.

Abstract: A system and method is described which provides for electrical signal transmission and a secure mechanical attachment in a flexible circuit assembly. The inventive mechanism combines the electrical features of discrete wiring with the mechanical features of etched pads connected to plated vias on flex circuits in order to achieve robustness in both the mechanical and electrical properties. A discrete wire is preferably securely bonded to a conductive pad which pad is then securely attached to a plated via. In this manner, the sequence of connections is made mechanically secure by either ultrasonically bonding or welding the discrete wire to the pad and employing the traditionally robust connection between the pad and the via. The arrangement achieves high quality electrical signal transmission by employing discrete wiring for signal transmission along any path of significant length.

Abstract: The present invention provides a circuit board having burr free castellated plated through holes. In particular, the leading edge of the plated through hole, that tends to produce burr formation during conventional profiling, is removed or pre-profiled to off-set the leading edge of the plated through hole from a surface of the circuit board.

Abstract: A method and structure to repair or modify a land grid array (LGA) interface mounted on a printed circuit card. The land grid array interface has a plurality of contact pads on a first surface of the printed circuit card, each contact pad is connected to at least one electronic component by a conductor. The method includes, for a preselected one of the contact pads to be replaced, drilling a first hole through printed circuit card at a predetermined location and having a first diameter predetermined to be sufficient to electrically isolate the preselected contact pad from all circuits contained in or on the printed circuit card. If any of the preselected contact pad or any conductor material directly attached to it remains attached to the first surface, it is delaminated, thereby separating it from the first surface of the printed circuit card.

Abstract: A method and structure relating to multisegmented plated through holes. A substrate includes a dielectric layer sandwiched between a first laminate layer and a second laminate layer. A through hole is formed through the substrate. The through hole passes through nonplatable dielectric material within the dielectric layer. As a result, subsequent seeding and electroplating of the through hole results in a conductive metal plating forming at a wall of the through hole on a segment of the first laminate layer and on a segment of the second laminate layer, but not on the nonplatable dielectric material of the dielectric layer. Thus, the conductive metal plating is not continuous from the first laminate layer to the second laminate layer.

Abstract: A support structure of a piezoelectric vibrator greatly increase a bonding strength between a conductive bonding agent and a mounting substrate. The support structure may be provided in a piezoelectric transformer, a piezoelectric vibrator, a gyroscope, and a multilayered piezoelectric component. The mounting substrate has first to third terminal electrodes provided on both top and bottom surfaces thereof and includes first to third through holes being provided at a central portion of the terminal electrodes, respectively. After the piezoelectric transformer element is positioned on the mounting substrate such that the transformer element is spaced slightly apart from the top surface of the mounting substrate by a predetermined distance, a conductive bonding agent is applied to the node N of vibration of an input electrode of the piezoelectric transformer element and the first terminal electrode, and the first through hole is filled with the conductive bonding agent.

Abstract: An electronic circuit board comprising a flow soldering surface and a plurality of lands is disclosed. The flow soldering surface has an upstream side, a downstream side, and a warp defining a warp direction. The plurality of lands are disposed on (i) the upstream side of the flow soldering surface and (ii) the downstream side of the flow soldering surface, and only said plurality of lands on the downstream side having extended portions extending along the warp direction.

Abstract: High aspect ratio (5:1-30:1) and small (5 &mgr;m-125 &mgr;m) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.

Abstract: A resin structure includes a resin layer and a metal layer. The resin layer is formed of a single material. The metal layer is laminated directly on the resin layer without intervention of an adhesive layer between the resin layer and the metal layer. A surface of the resin layer, on which the metal layer is laminated, has a surface roughness of a value in a range of 0.1 microns to 10 microns, as a rough surface. The metal layer is formed on the rough surface of the resin layer.

Abstract: A method of forming an electrical interconnect through a via to electrically couple two electrically conductive layers and the device. There are provided a pair of electrically conductive layers and an electrically insulating layer between the pair of electrically conductive layers having a via extending between the pair of electrically conductive layers. A layer of titanium is formed covering the walls of the via and extending onto one of the pair of electrically conductive layers. A thin layer of titanium nitride with a poor step ?? technique is formed covering the titanium on the walls but not covering the titanium on the one of the pair of electrically conductive layers. The remainder of the via is filled with aluminum. The layer of titanium and the layer of titanium nitride preferably extend out of the via and between the electrically insulating layer and at least one of the pair of electrically conductive layers.

Abstract: A printed wiring board has a circuit substrate 6 having a conductor circuit 5 and a through hole 60, and also has a joining pin 1 inserted into the through hole. The joining pin is manufactured by using a material unmelted at a heating temperature in joining the joining pin to an opposite party pad 81. The joining pin is constructed by a joining head portion 11 having a greater diameter than an opening diameter of the through hole. The joining pin forms a joining portion for joining and connection to the opposite party pad. The joining pin has a leg portion 12 having a diameter smaller than the through hole. The leg portion is inserted into the through hole and is joined to the through hole by a conductive material such as a soldering material 20, etc. In lieu of a joining pin, a joining ball approximately having a spherical shape can be joined to the through hole by the conductive material.

Abstract: The present invention is directed to a high-performance system on a clip which uses multi-layer wiring/insulation through-hole interconnections to provide short wiring and controlled low-impedance wiring including ground planes and power supply distribution planes between chips.

Abstract: In a multilayer printed circuit board having a conductor pattern, covered with an insulation layer having via holes, these via holes are filled with a conductor by means of electroless nickel plating or electroless copper plating.

Abstract: A circuit board comprising an insulating substrate, via-holes made in the insulating substrate, and a wiring conductor having at least one layer disposed on the insulating substrate. The circuit board is characterized in that a gold-plated layer of the wiring conductor exposed to the inside of the via-hole is thinner than a gold-plated layer of the wiring conductor exposed to a portion other than the inside of the via-hole in the insulating substrate. A method of manufacturing the circuit board is characterized in that gold electroplating of the wiring conductor is performed with the open-end of the via-hole contacted on a shielding board in a plating bath. The present invention provides a circuit board capable of satisfying the requirements for long-lasting strength of solder ball junction and good wire bonding ability at the same time.

Abstract: A printed circuit architecture includes a relatively thick, stiffening base of thermally and electrically conductive material, and a laminate of conductive layers including a printed circuit structure, interleaved with dielectric layers, disposed atop the base. The patterned conductive layers contain an integrated circuit structure that is configured to provide RF signaling, microstrip shielding, and digital and analog control signal leads, and DC power. Low inductance electrical connectivity among the conductive layers and also between conductive layers and the base is provided by a plurality of conductive bores. Selected bores are counter-drilled at the RF signaling layer and filled with insulating plugs, which prevent shorting of the RF signal trace layer to ground, during solder reflow connection of leads of circuit components to the RF signaling layer.

Abstract: A method and apparatus interconnecting multiple devices on a circuit board. One disclosed circuit board has a first attach region on a first surface for coupling a first set of pins from a first device to a set of signal lines. A second attach region on a second surface is for coupling a second set of pins from a second device to the set of signal lines. The second attach region is predominantly non-overlapping with respect to the first attach region.

Abstract: Disclosed is a structure of substrate and a fabricating method for IC (integrated circuit) chip package. Selected areas of the copper plate are etched for forming the plural conducting columns, and then an insulating layer is laminated to said copper plate to make said conducting columns embedded into said insulating layer. After portions of said insulating layer are removed for forming the plural blind vias each corresponding to exposed conducting columns, both said plural blind vias and the upper surface of said insulating layer are plated with a copper layer. An upper circuit layer and a lower circuit layer formed by etching said copper layer and said copper plate are covered with solder mask layers for protecting the substrate.

Abstract: A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of forming dendrites on selected regions of a first conductive layer, forming dendrites on selected regions of a second conductive layer, applying an epoxy adhesive material over the first conductive layer, and compressively attaching the second conductive layer to the first conductive layer such that the dendrites on the first conductive layer contact the dendrites on the second conductive layer. Also claimed is an electronic circuit package incorporating the dendrites used for electrical interconnection manufactured in accordance with the present invention. An alternative embodiment of the invention utilizes an intermediate surface metal with dendrites in place of a “through via.

Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.

Abstract: Disclosed is a printed circuit board and a method of preparing the printed circuit board. The printed circuit board has two types of plated through holes. The first type of plated through holes extend to and through an exterior surface of the printed circuit board for receipt of a pin-in-through-hole module or component pin. The second type of plated through holes are for surface mount technology and terminate below the exterior surfaces of the printed circuit board. These plated through holes contain a bill composition.