With Single Conductive Plane (e.g., Tape, Cable) Patents (Class 174/268)
  • Patent number: 11961632
    Abstract: There is provided a fabrication method of conductive nanonetworks using a mastermold by which, in forming the conductive nanonetworks, electrical properties and optical properties of the conductive nanonetworks are improved by excluding contact resistance between nanowires and minimizing surface roughness of the conductive nanonetworks, and a nanoelectrode having a large area can be easily formed by applying a method of replicating the conductive nanonetworks on the mastermold to a substrate. The fabrication method of conductive nanonetworks using a mastermold includes: preparing a mastermold that has a conductive nanonetwork replicating region patterned in relief; coating the mastermold with a conductive material; and forming conductive nanonetworks on an application target substrate by replicating a conductive material, with which the conductive nanonetwork replicating region is coated, onto the application target substrate.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: April 16, 2024
    Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jung-Yong Lee, Kyungmin Kim
  • Patent number: 11877856
    Abstract: The present invention relates to a brain dysfunction and seizure detector monitor and system, and a method of detecting brain dysfunction and/or seizure of a subject. Preferably, the present invention also includes one or more seizure detection algorithms. The analysis method is specifically optimized to amplify abnormal brain activity and minimize normal background activity yielding a seizure index directly related to the current presence of ictal activity in the signal. Additionally, a seizure probability index based on historical values of the aforementioned seizure index, is derived for diagnostic purposes. The seizure probability index quantifies the probability that the patient has exhibited abnormal brain activity since the beginning of the recording. These indexes can be used in the context of emergency and/or clinical situations to assess the status and well-being of a patient's brain, or can be used to automatically administer treatment to stop the seizure before clinical signs appear.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: January 23, 2024
    Assignee: NeuroWave Systems Inc.
    Inventors: Stéphane Bibian, Tatjana Zikov, Mo Modarres
  • Patent number: 11757172
    Abstract: A transmission-line assembly provides a transition between more coupled and less coupled transmission lines. The more coupled transmission lines may be configured as a dual stripline, and the less coupled transmission lines may be configured as separate striplines or a dual stripline with reduced coupling. In an intermediate section, the transmission conductors transition between the more coupled and less coupled sections and at least one transmission conductor bends. A grounded shield conductor is coplanar with and edge-coupled to the one transmission conductor and extends along the bend in the one transmission conductor. The shield conductor is not connected to either of the transmission conductors, and overlaps the other transmission conductor when viewed normal to the planes of the transmission conductors, whereby the shield conductor is broadside coupled to the other transmission conductor.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: September 12, 2023
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Michael J. Surovich
  • Patent number: 11758659
    Abstract: A flexible printed circuit board includes: a substrate; and a circuit pattern disposed on the substrate, wherein the substrate includes a chip mounting region, and the circuit pattern includes a wiring portion and a pad portion, wherein the circuit pattern includes: a first circuit pattern including a first-first pad portion disposed inside the chip mounting region, a first-second pad portion disposed outside the chip mounting region, and a first wiring portion that connects the first-first pad portion and the first-second pad portion, and extending in a first direction based on the chip mounting region; a second circuit pattern including a second-first pad portion disposed inside the chip mounting region, a second-second pad portion disposed outside the chip mounting region, and a second wiring portion that connects the second-first pad portion and the second-second pad portion, and extending in a second direction; and a third circuit pattern including a plurality of third pad portions disposed inside the ch
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: September 12, 2023
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Eon Jong Lee, Dong Chan Kim, Ki Tae Park
  • Patent number: 11757220
    Abstract: A paddle card includes a printed circuit board and a twin-axial cable. The PCB includes a first signal pad on a top surface of the PCB and a second signal pad on a bottom surface of the PCB. The second signal pad is directly below the first signal pad. The twin-axial cable includes a first signal conductor coupled to the first signal pad and a second signal conductor coupled to the second signal pad.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: September 12, 2023
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 11735850
    Abstract: A connector assembly comprises a circuit board having a front side and a back side, and two first connectors mounted side by side on the front side of the circuit board. A cable includes a plurality of wires divided into two groups, with each of the groups of wires being electrically connected on one end to a respective one of the first connectors via the circuit board.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: August 22, 2023
    Assignee: Tyco Electronics (Shanghai) Co., Ltd.
    Inventors: Lizhou (Leo) Li, Xinjie (David) Zhang, Hongjian (Neil) Ni
  • Patent number: 11658376
    Abstract: A signal transmission line includes a laminate, a signal conductor, a hollow portion, and a reinforcing conductor. The laminate includes a flexible laminate including resin layers each of which has flexibility. The signal conductor extends in a signal transmission direction of the laminate and is disposed in an intermediate position in a laminating direction of the resin layers. The hollow portion is in the laminate and defined by an opening provided at a portion of the plurality of resin layers. The reinforcing conductor is in the laminate. The hollow portion is disposed at a position overlapping with the signal conductor, in a plan view of the laminate from a surface perpendicular or substantially perpendicular to the laminating direction. The reinforcing conductor is disposed at a position different from the position of the hollow portion in a plan view.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: May 23, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kanto Iida, Nobuo Ikemoto
  • Patent number: 11606860
    Abstract: A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: March 14, 2023
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Gwo-Shyan Sheu, Hsin-Hao Huang, Yu-Chen Ma, Chia-Hsin Yen
  • Patent number: 11596058
    Abstract: Laminate structures and configurations of fiducials for laminates structures for electronic devices are disclosed. Fiducials are formed in laminate structures to provide increased visibility and contrast, thereby improving detection of the fiducials with optical detection equipment of automated machines commonly used in the electronics industry. Fiducials are disclosed that are defined by openings in laminate structures that extend to depths within the laminate structures to provide sufficient contrast. Openings for fiducials may be arranged to extend through multiple metal layers and dielectric layers of the laminate structures. The fiducials may be formed by laser drilling or other subtractive processing techniques.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: February 28, 2023
    Assignee: Qorvo US, Inc.
    Inventors: John August Orlowski, Stephen Craig Parker, James Edwin Culler, Jr.
  • Patent number: 11537225
    Abstract: A functional module is applied in a front light module of a display device. The functional module includes a composite cover structure having a first plate and a second plate and a reflective display panel. The second plate is located between the first plate and the reflective display panel. At least one medium layer is located between the first plate of the composite cover structure and the reflective display panel. The refractive index of the medium layer is greater than or equal to 1 and is smaller than 1.474.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: December 27, 2022
    Assignee: E Ink Holdings Inc.
    Inventors: Chao-Jen Wang, Jen-Pin Yu
  • Patent number: 11533807
    Abstract: A flexible circuit (FC) and a method of forming the FC each include providing a first dielectric layer, applying a plurality of conductive circuit traces that are substantially parallel to each other to the first dielectric layer, providing a second dielectric layer atop the first dielectric layer and the plurality of conductive circuit traces to form a third dielectric layer having the plurality of conductive traces disposed therein and being configured to support and insulate the plurality of conductive traces, and forming a plurality of channels extending at least partially through a thickness of the third dielectric layer, wherein the plurality of channels are arranged between the plurality of conductive circuit traces and substantially parallel thereto and are configured to provide increased flexibility of the FC.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: December 20, 2022
    Assignee: APTIV TECHNOLOGIES LIMITED
    Inventors: David R. Peterson, Joseph Sudik, Jr., David G. Siegfried, Jared Bilas
  • Patent number: 11523494
    Abstract: An electronic apparatus that is improved in heat dissipation efficiency of a heat generating component while avoiding an increase in the size of the electronic apparatus. A first substrate has a heat generating component mounted thereon. A heat dissipation frame is arranged opposed to and in contact with a second substrate. A flexible printed circuit electrically connects the first and second substrates. A thermally conductive member is sandwiched between the heat generating component and the heat dissipation frame such that the flexible printed circuit is pressed against the heat generating component. As heat dissipation paths from the heat generating component to the heat dissipation frame, there are formed a first heat dissipation path via the thermally conductive member and a second heat dissipation path via the flexible printed circuit and the second substrate.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: December 6, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Koichi Odagaki
  • Patent number: 11343933
    Abstract: A circuit board includes a substrate, a plurality of electronic components disposed on the substrate, and at least one cable management structure. The substrate is provided with a first surface and a second surface. The first surface and the second surface are correspondingly disposed. The cable management structure is used for limiting a configuration direction of at least one cable. The cable management structure includes at least one cable management column and at least one cable collection member. The cable management column is disposed on the first surface of the substrate. The cable collection member is disposed at an edge of the substrate, and the cable management column is located beside the cable collection member. The cable is capable of bypassing the cable management column and passing through the cable collection member from the edge of the substrate to the second surface, to achieve cable management and positioning effects.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: May 24, 2022
    Assignee: PEGATRON CORPORATION
    Inventors: Wei-Chih Hsu, Pen-Uei Lu, Mao-Hsiang Huang
  • Patent number: 11298925
    Abstract: One aspect of the present invention provides a light-transmitting electroconductive film 10 comprising a light-transmitting base material 11 and an electroconductive part 13 provided on one surface of the light-transmitting base material 11, wherein the electroconductive part 13 includes a light-transmitting resin 15 and plural electroconductive fibers 16 incorporated in the light-transmitting resin 15, and the electroconductive part 13 can conduct electricity from the surface 13A of the electroconductive part 13, and the electroconductive fibers 16 as a whole are unevenly distributed on the light-transmitting base material side than the position HL, which is located at half the film thickness of the electroconductive part 13 in the electroconductive part 13, and the electroconductive part 13 has a surface resistance value of 200?/? or less, and the electroconductive film 10 has a haze value of 5% or less.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: April 12, 2022
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Shoichiro Ogumi, Yoshimasa Ogawa, Eiji Ooishi, Yukimitsu Iwata, Yuji Shimizu, Ryota Kitayama, Hiroaki Mutou
  • Patent number: 11129273
    Abstract: A metal-ceramic substrate (1) comprising an insulating layer (11) extending along a main extension plane (HSE) and comprising a ceramic, and a metallisation layer (12) bonded to the insulating layer (11) over a bonding area (A), the bonding area (A) being delimited by at least one edge (K) in a plane parallel to the main extension plane (HSE), characterized in that the edge (K) is at least partially covered with a filling material (2) and an edge region (RB) of the metallisation layer (12) adjoining the edge has a material weakening.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: September 21, 2021
    Assignee: ROGERS GERMANY GMBH
    Inventors: Xinhe Tang, Andreas Meyer, Stefan Britting
  • Patent number: 10941305
    Abstract: The present invention relates to a thermoplastic screen printing paste comprising one or more hydroxyfunction polyesters, one or more blocked polyisocyanates, pigments, and additives. The invention is characterized in that the melting or softening range of the thermoplastic screen printing paste lies at temperatures below 90° C. and the paste is free of bisphenol-A is and free of other substances directly involved in the polymerization itself.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: March 9, 2021
    Assignee: Ferro Corporation
    Inventors: Andreas Schulz, Elisabeth Gross
  • Patent number: 10920098
    Abstract: The present invention relates to a process of forming electrical conductor on a substrate comprising the steps of a) providing a substrate; b) providing an electrically conductive composition; c) applying said electrically conductive composition to at least one part of said substrate; and d) exposing said electrically conductive composition on the substrate to a near infrared light to form an electrical conductor. NIR light cure provides improved electrical properties of the cured composition without damaging heat sensitive substrates.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: February 16, 2021
    Assignee: HENKEL AG & CO. KGAA
    Inventors: Inge Van Der Meulen, Gunther Dreezen, Anja Henckens, Stijn Gillissen, Rudolf Warmold Oldenzijl
  • Patent number: 10679633
    Abstract: The present disclosure is provided an audio processing device and an audio playback system thereof. The audio processing device includes a receiving module configured to receive an audio signal and identify a transmission mode of the audio signal, with the transmission mode at least including a Bluetooth transmission mode and a WIFI transmission mode; a processing module configured to decode the audio signal into an analog audio signal and a digital audio signal; an output module configured to receive the analog audio signal and the digital audio signal and then output the analog audio signal to a conventional audio via an AUX analog output port and output the digital audio signal to an HiFi audio via an optical fiber output port. The present disclosure can receive audio signals with different transmission types and output the audio signals of different types, which enriches audio selectivity and is of high interest.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: June 9, 2020
    Assignee: SHENZHEN CHUANGYUANTENG TECHNOLOGY CO., LTD.
    Inventor: Lichao Shi
  • Patent number: 10524352
    Abstract: A resin multilayer substrate includes a multilayer body including resin layers mainly made of thermoplastic resin and that are laminated, a first component incorporated in the multilayer body and including a first component terminal, a second component incorporated in the multilayer body, including a second component terminal, spaced away from the first component as seen from a laminating direction of the multilayer body, a first conductive via electrically connected to the first component terminal and overlapping the first component terminal as seen from the laminating direction of the multilayer body, and a plurality of second conductive vias not aligned with the first conductive via, disposed closer to the second component, disposed at heights different from a height of the first conductive via, and electrically connected to the first conductive via.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: December 31, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yoshihito Otsubo
  • Patent number: 10411329
    Abstract: A packaged device may include electrical components such as integrated circuits that are mounted to a substrate such as a printed circuit substrate. Plastic may be molded to the printed circuit substrate over the integrated circuits. The molded plastic may include one or more shots of plastic and may include laser-sensitizable plastic material. Antenna structures may be supported by molded plastic such as molded plastic in a packaged device. The antenna structures may be formed from metal foil, flexible printed circuit substrate material with metal antenna traces, and metal traces that are formed on exposed surfaces of the plastic. The metal traces may be electroplated metal traces that are formed on regions of a laser-sensitizable plastic material that have been exposed to laser light. A package may have a protrusion that supports an antenna structure.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: September 10, 2019
    Assignee: Apple Inc.
    Inventors: Steven P. Cardinali, James G. Horiuchi
  • Patent number: 10275100
    Abstract: Provided is an optically transparent conductive material which does not cause moire or grain even when placed over a liquid crystal display, that is, has a favorably low visibility (moire and grain are less recognizable), and has a high reliability. The optically transparent conductive material has, on an optically transparent base material, an optically transparent conductive layer having sensor parts and dummy parts, the sensor parts and/or the dummy parts being formed of a metal mesh pattern consisting of Voronoi edges formed based on a plurality of generators arranged in a plane tiled using polygons longer in the first direction than in the second direction, the mesh pattern being characterized in that each polygon has only one generator arranged in the polygon and that the generator is at an arbitrary position within a reduced polygon formed by connecting points at 90% or less of the direct distance from the center of gravity of the polygon to each vertex of the polygon.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: April 30, 2019
    Assignee: MITSUBISHI PAPER MILLS LIMITED
    Inventors: Kazuhiko Sunada, Yasuhiro Tanaka
  • Patent number: 10261643
    Abstract: The present invention discloses a novel and inventive transparent conductive film Differing from conventional metal mesh substrates are mainly constituted by silver nanowires (AgNW), the present invention particularly designs a nano metal wire consisting of a metallic core wire, a transition layer and a protection layer, and further develops a transparent conductive film consisting of a substrate and a metal mesh layer; wherein the metal mesh layer is constituted by the said nano metal wires. It is worth describing that, a variety of experimental data prove that the thermal resistance of this novel transparent conductive film is up to 400° C.; moreover, experimental data also exhibit that the transparent conductive film can filter part of blue light portion out of a white light by 20-30%.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: April 16, 2019
    Assignee: National Tsing Hua University
    Inventors: Hsueh-Shih Chen, Ming-Hua Yeh, Shih-Jung Ho
  • Patent number: 10134966
    Abstract: A light emitting device includes a first substrate including a flexible first base member and a first wiring pattern provided on the first base member; a second substrate including a second base member and a second wiring pattern provided on the second base member; and a plurality of light emitting elements mounted on the first wiring pattern. The first substrate includes: a joining end portion that is located at a first, joining end of the first substrate, and that overlaps a portion of the second substrate, and a second end, other than the joining end, that does not overlap the second substrate. The first wiring pattern and the second wiring pattern do not face each other. An electrically conductive joining member is disposed across the first wiring pattern and the second wiring pattern, while partially covering the joining end portion of the first substrate.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: November 20, 2018
    Assignee: Nichia Corporation
    Inventors: Yasuo Fujikawa, Takuya Wasa, Yosuke Nakayama
  • Patent number: 9606312
    Abstract: A planar optical waveguide part that includes an optical waveguide, a planar conductive wire part that includes a conductive wire, and a connecting end part formed on the lengthwise direction end part, wherein the connecting end part is provided with an optical waveguide end part formed on the lengthwise direction end part of the conductive wire part, a conductive end part formed on the lengthwise direction end part of the conductive wire part, and an intermediate plate intervening between the optical waveguide end part and the conductive end part; the optical waveguide end part, conductive end part, and intermediate plate are bonded by layering; and a bonding pad where components are bonded is formed by ultrasonic bonding to the top surface of the conductive end part.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 28, 2017
    Assignee: Molex, LLC
    Inventors: Masako Nishikawa, Akihiro Shimotsu
  • Patent number: 9204534
    Abstract: A panel unit that reduces the influence of static electricity applied to a panel member forming a display surface without increasing the size of an electronic apparatus. The panel unit has a touch panel and an FPC including connection sections which are electrically connected to interconnection sections of the touch panel, and is provided with signal lines and a ground interconnection. The FPC includes conductor-exposed portions each provided between the connection sections connected to the interconnection sections and an outer part of the touch panel. The conductor-exposed portions are configured to be prevented from being electrically conducted to the signal lines, and be electrically conducted to the ground interconnection.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: December 1, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinnosuke Torii, Takayuki Wada
  • Patent number: 9179536
    Abstract: A solder validation method for a printed circuit board (PCB) having a pin hole extending through the PCB, an electrically conductive trace on a surface of the PCB, and an electrically conductive pin inserted through the pin hole includes the following. An electrically non-conductive portion is provided on the surface of the PCB between the pin hole and the trace such that the non-conductive portion electrically isolates the pin from the trace. After a soldering process intended to solder the pin and the trace together, a soldered connection between the pin and the trace is detected as being absent when no electrical continuity is between the pin and the trace as a soldered connection between the pin and the trace has to be present to provide the electrical continuity due to the pin and the trace otherwise being electrically isolated from one another by the non-conductive portion.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: November 3, 2015
    Assignee: Lear Corporation
    Inventors: Steven F. Gawron, Jonathan Dahlstrom
  • Patent number: 9137893
    Abstract: An electrical conductor includes a substrate having micro-channels formed in the substrate. A plurality of spaced-apart first micro-wires is located on or in the micro-channels, the first micro-wires extending across the substrate in a first direction. A plurality of spaced-apart second micro-wires is located on or in the micro-channels, the second micro-wires extending across the substrate in a second direction different from the first direction. Each second micro-wire is electrically connected to at least two first micro-wires and at least one of the second micro-wires has a width less than the width of at least one of the first micro-wires.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: September 15, 2015
    Assignee: Eastman Kodak Company
    Inventors: John Andrew Lebens, David Paul Trauernicht, Yongcai Wang, Ronald Steven Cok
  • Patent number: 9089071
    Abstract: A method, system and computer program product are provided for implementing enhanced low loss, thin, high performance flexible circuits. A plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values are provided for each signal layer in a flexible circuit. Volumetric calculations are performed using the predefined values for each signal layer in the flexible circuit and a respective adjacent adhesive layer is characterized for each signal layer providing a respective optimized adjacent adhesive layer.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: July 21, 2015
    Assignee: International Business Machines Corporation
    Inventors: John R. Dangler, Matthew S. Doyle
  • Patent number: 9056442
    Abstract: A ceramic multilayer substrate includes a ceramic substrate including a plurality of ceramic layers and electrodes (surface electrodes and internal electrodes) disposed on or in the ceramic layers, which are stacked on each other. A recessed portion is defined on a principal surface of any of the ceramic layers by the electrode and the surrounding ceramic layer. The electrodes (surface electrodes and internal electrodes) are buried or embedded in the ceramic layers. A peripheral portion of the surface electrode is preferably covered with a covering ceramic layer so as to prevent short-circuiting between adjacent electrodes even if surface electrodes and internal electrodes are disposed at narrow intervals and at high density.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: June 16, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yoshihito Otsubo
  • Publication number: 20150143925
    Abstract: Stretchable electronic structure comprising one intrinsically fragile thin film integrated on or within a soft heterogeneous substrate. The invention also relates to a process for manufacturing such a structure.
    Type: Application
    Filed: June 10, 2013
    Publication date: May 28, 2015
    Inventors: Hugues Vandeparre, Stephanie Lacour
  • Publication number: 20150146382
    Abstract: Disclosed herein are a package substrate, a method of manufacturing the same, and a power module package using the package substrate.
    Type: Application
    Filed: July 15, 2014
    Publication date: May 28, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Bum Sik Jang, Sung Min Song
  • Patent number: 9035198
    Abstract: The present invention provides a transparent conductive substrate comprising: a transparent substrate, and a conductive pattern provided on the transparent substrate, wherein the conductive pattern comprises line breakage portions performing electric breakage, and a pattern of a broken line formed when the line breakage portions are connected comprises an irregular pattern shape. The present invention can minimize a moiré phenomenon and a diffraction phenomenon by external light by performing line breakage of a regular or irregular conductive pattern by using the irregular pattern.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 19, 2015
    Assignee: LG Chem, Ltd.
    Inventors: Ji Young Hwang, Hyeon Choi, Seung Heon Lee, Sujin Kim, Ki-Hwan Kim
  • Publication number: 20150124182
    Abstract: A display device with a touch panel is disclosed. The display device with the touch panel includes: a sensor having a substrate, a sensing electrode layer and a protective layer with a plurality of protrusions, wherein the sensing electrode layer is configured between the substrate and the protective layer; and a display module disposed under the sensor, wherein the sensor is connected to the display module with a glue, and the glue is configured along a periphery of the sensor.
    Type: Application
    Filed: October 31, 2014
    Publication date: May 7, 2015
    Inventors: Ming-Liang Chen, Chih-Wei Chen, Ching-Feng Tsai
  • Publication number: 20150107889
    Abstract: A method of fabricating a capacitance touch panel module includes forming a plurality of first conductive patterns on a substrate comprising a touching area and a peripheral area along a first orientation, a plurality of second conductive patterns along a second orientation, and a plurality of connecting portions in the touching area; forming a plurality of insulated protrusions, in which each insulated protrusion covering one connecting portion, and forming an insulated frame on the peripheral area; and forming a bridging member on each insulated protrusion.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 23, 2015
    Inventors: KAI MENG, LIEN-HSIN LEE
  • Patent number: 9012785
    Abstract: A flexible multilayer substrate includes a multilayer body including a plurality of laminated resin layers. The multilayer body includes an innermost surface, which is a surface on an inner side when the substrate is bent, and an outermost surface, which is a surface on an outer side when the substrate is bent. Each of the plurality of resin layers includes a skin layer on one surface. Lamination of the multilayer body includes a skin layer joint plane at one location at a central portion in the thickness direction, and the skin layer and other surface come in contact with each other at another location along the central portion in the thickness direction. A skin layer joint plane is arranged on a side closer to the innermost surface than a central plane in the thickness direction of the multilayer body.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: April 21, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yoshihito Otsubo
  • Publication number: 20150101853
    Abstract: Embodiments of the invention provide a touch sensor including a window substrate and a bezel layer formed on outer edges of one surface of the window substrate, wherein the bezel layer includes a printed layer formed on the window substrate, a medium layer formed on the printed layer and having a refractive index lower than that of the printed layer, and a reflective layer formed on the medium layer. According to at least one embodiment, the bezel layer formed on the window substrate is reduced in thickness and various colors are more easily implemented.
    Type: Application
    Filed: October 14, 2014
    Publication date: April 16, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Tae Kyung LEE, Beom Seok OH, Kee Su JEON, Man Sub SHIN
  • Patent number: 8987609
    Abstract: A printed circuit board structure comprises a base layer, an insulation layer, and a signal layer sandwiched between the base layer and the insulation layer. The insulation layer includes a plurality of conductive regions. The conductive regions are used for providing a current reflowing path. Each of the conductive regions comprises a plurality of empty regions which are spaced from each other. A space inside the empty region is substantially hollow, and spaces between adjacent empty region are filled with cooper.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: March 24, 2015
    Assignee: Zhongshan Innocloud Intellectual Property Services Co., Ltd.
    Inventor: Hai-Dong Tang
  • Publication number: 20150053464
    Abstract: Provided is a method of manufacturing a conductive metal thin film, the method including: a) heating and stirring a first solution containing a metal precursor, acid, amine, and a reducing agent to synthesize metal nano-particles on which formation of a surface oxide film is suppressed; b) dispersing the metal nano-particles synthesize in step a) in a non-aqueous solvent to prepare a conductive ink composition; c) applying the conductive ink composition onto an insulating substrate; and d) heat-treating the insulating substrate applied with the ink composition to form a conductive metal thin film. With the method of manufacturing a conductive metal thin film according to the present invention, large area conductive thin film may be manufactured as compared with the existing conductive ink composition based on noble metal nano-particles. In addition, the conductive metal thin film having excellent conductivity may be manufactured by suppressing a surface oxide film from being formed.
    Type: Application
    Filed: March 29, 2013
    Publication date: February 26, 2015
    Inventors: Sun Ho Jeong, Young Min Choi, Beyong Hwang Ryu, Yeong Hui Seo, Su Hyun Lee
  • Publication number: 20150049440
    Abstract: The present invention is a transparent conductive laminate comprising a base, a low-refractive-index layer, an intermediate-refractive-index layer, and a transparent conductive layer, the low-refractive-index layer, the intermediate-refractive-index layer, and the transparent conductive layer being sequentially stacked on at least one side of the base either directly or through one or more layers, the low-refractive-index layer having a refractive index of 1.40 to 1.50, and the intermediate-refractive-index layer having a refractive index of 1.50 to 1.80 and a film density of 2.5 to 4.5 g/cm3. The present invention provides a transparent conductive laminate that exhibits excellent moisture-heat resistance and excellent optical properties, and an electronic device or module.
    Type: Application
    Filed: March 21, 2013
    Publication date: February 19, 2015
    Applicant: LINTEC CORPORATION
    Inventors: Tsutomu Hara, Yuuta Suzuki, Koichi Nagamoto
  • Publication number: 20150047893
    Abstract: Embodiments of the present packages comprise a package body that is made of an insulating material, has a front surface and a back surface, and has a rectangular shape in plan view, a metal layer that is formed along a peripheral portion of the front surface of the package body and that has a frame shape in plan view, a metal frame that is joined to the metal layer with a brazing material and has a frame shape in plan view. a pair of electrode pads that are formed on the front surface of the package body surrounded by the metal layer and configured to mount a crystal oscillator, and an opening portion of a cavity opened in a position that excludes the pair of electrode pads, wherein the metal layer, the pair of electrode pads, and the opening portion of the cavity are positioned in the same plane.
    Type: Application
    Filed: August 14, 2014
    Publication date: February 19, 2015
    Inventor: Kazushige AKITA
  • Publication number: 20150041192
    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. In detail, according to a representative preferred embodiment of the present invention, it is possible to protect a line width of a circuit pattern and suppress an undercut by providing the printed circuit board in which etched grooves are formed at both sides of a seed layer of the circuit pattern.
    Type: Application
    Filed: December 26, 2013
    Publication date: February 12, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung HAN, Young Do Kweon, Seung Min Baek, Yoon Su Kim, Young Jae Lee
  • Patent number: 8952271
    Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: February 10, 2015
    Assignee: Fujitsu Limited
    Inventors: Masaharu Furuyama, Daisuke Mizutani, Seiki Sakuyama, Toshiya Akamatsu
  • Publication number: 20140353020
    Abstract: A touch panel defines a touch region and a routing region. The touch panel includes a substrate, a transparent conductive layer, at least one electrode and at least one lead wire. The substrate has a surface and includes a planar part and a folded part extending from the planar part. The transparent conductive layer is located on the surface of the substrate. At least a first part of the transparent conductive layer is located on the planar part and located in the touch region. The at least one electrode is electrically connected to the conductive layer. The at least one lead wire is electrically connected to the at least one electrode in a one-to-one manner. At least part of the at least one lead wire is located on the folded part. The folded part is located in at least part of the routing region.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventors: CHIH-HAN CHAO, PO-SHENG SHIH, JIA-SHYONG CHENG
  • Publication number: 20140345920
    Abstract: Heat-assisted wiring traces and a conductive support substrate are respectively formed on first and second surfaces of an insulating layer. Further, connection terminals electrically insulated from the support substrate and electrically respectively connected to the heat-assisted wiring traces are formed on the second surface of the insulating layer. Each connection terminal has an element connection portion, a pattern connection portion and a spread blocking portion. When a circuit element is connected to the element connection portion of the connection terminal by solder, spreading of a molten solder applied to the element connection portion to the pattern connection portion is blocked by the spread blocking portion.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 27, 2014
    Applicant: Nitto Denko Corporation
    Inventors: Terukazu IHARA, Naohiro TERADA
  • Publication number: 20140318850
    Abstract: A printed circuit board on which a component having a plurality of terminals is to be mounted by using a reflow soldering process, includes wiring patterns that are arranged in correspondence with the plurality of terminals and have a size which is smaller in wiring patterns for terminals near the central portion of the component than in wiring patterns for terminals near each end portion of the component.
    Type: Application
    Filed: February 13, 2013
    Publication date: October 30, 2014
    Inventor: Junnosuke Yokoyama
  • Publication number: 20140299364
    Abstract: A transparent conductive article includes a transparent substrate, a thin electrically conductive grid, and a carbon nanolayer. The grid is disposed on the substrate, and the carbon nanolayer is also disposed on the substrate and in contact with the grid. The conductive grid and the carbon nanolayer may have thicknesses of no more than 1 micron and 50 nanometers, respectively. The carbon nanolayer has a morphology that includes graphite platelets embedded in nano-crystalline carbon, and can be produced with a buffing procedure using dry carbon particles without substantially damaging the grid structure. The article may have a visible light transmission of at least 80%, and a sheet resistance less than 500 or 100 ohms/square. The transparent substrate may comprise a flexible polymer film. The disclosed articles may substantially maintain an initial sheet resistance value when subjected to flexing.
    Type: Application
    Filed: December 12, 2012
    Publication date: October 9, 2014
    Inventors: Ranjityh Divigalpitiya, Mark J. Pellerite, John P. Baetzold, Gary A. Korba, Mieczyslaw H. Mazurek
  • Patent number: 8853559
    Abstract: The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 7, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Hironori Matsumoto, Jumpei Kusukawa
  • Publication number: 20140291008
    Abstract: A touchscreen electrode pattern constituted by wavy conductive lines, each wavy conductive line includes multiple troughs of wave and multiple crests of waves, wherein an interval between adjacent troughs of waves in each wavy conductive line is larger than 1.5 times of a predetermined value, and an amplitude difference between adjacent trough of waves and crest of waves in each wavy conductive line is smaller than ? times of the predetermined value.
    Type: Application
    Filed: June 13, 2014
    Publication date: October 2, 2014
    Inventor: Kung-Chieh Huang
  • Publication number: 20140285990
    Abstract: A circuit board for connecting a secondary battery including a first insulation layer, a conductive layer positioned on one surface of the first insulation layer, and a pad layer positioned on the conductive layer and divided into at least two areas is disclosed. In the circuit board, the conductive layer has an area wider than that of the pad layer. Accordingly, the conductive layer has an area wider than that of the pad layer, so that it is possible to miniaturize the circuit board and to improve the safety of the circuit board.
    Type: Application
    Filed: March 25, 2014
    Publication date: September 25, 2014
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Hyung-Sin Kim, Ji-Yeon Choi, Seok-Bong Lee, Sang-Joo Lee
  • Patent number: 8837117
    Abstract: The electrical card has power modules constituted by power components and by control components that are carried by strips fastened on a support plate comprising an electrical ground plate. The power components are connected firstly to control buses, and secondly to power buses carried by the support plate and extending in a layer adjacent to the electrical ground plate.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: September 16, 2014
    Assignee: Sagem Defense Securite
    Inventors: Etienne Merlet, Marie-Noëlle Besold-Etchechoury