With Single Conductive Plane (e.g., Tape, Cable) Patents (Class 174/268)
  • Patent number: 6215077
    Abstract: A thin-film laminate type conductor is provided which includes a first conductor that is a metal thin film formed of Al or Al alloy, and a second conductor that is a transparent conductive thin film formed of a metal oxide. The first and second conductors are formed in respective patterns on a transparent substrate, such that at least a part of the second conductor is laminated on at least a part of the first conductor. The transparent conductive thin film is composed of an amorphous film. In another embodiment, the first conductor is composed of laminated metal thin films one of which is formed of Al or Al alloy, and the other of which is formed of a high-melting-point metal. The Al or Al-alloy film is sandwiched between the substrate and the high-melting-point metal film.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: April 10, 2001
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Makoto Utsumi, Yutaka Terao
  • Patent number: 6210607
    Abstract: A conductive material is provided which comprises a polymeric matrix having dispersed therein a conductive filler system comprising a minor proportion by weight of a relatively more conductive filler, and a major proportion by weight of a relatively less conductive filler. Preferred conductive materials may be used to provide stress relief for electrical apparatus and may be rendered heat recoverable.
    Type: Grant
    Filed: June 19, 1980
    Date of Patent: April 3, 2001
    Assignee: Raychem Limited
    Inventors: Arthur Edward Blake, Michael Peter Allenden
  • Patent number: 6208521
    Abstract: A film carrier to be used for fabricating a new laminate type mounting structure, a new laminate type mounting structure comprising semiconductor elements mounted on the film carrier of the present invention and the laminate type mounting structure comprising a heat-releasing structure are provided. Due to the invention of the film carrier, handling of the semiconductor elements as well as fabrication of a laminate type mounting structure are facilitated. When a heat-releasing structure is added, the laminate type mounting structure of the present invention can advantageously efficiently release the heat generated by the semiconductor element in each layer.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: March 27, 2001
    Assignee: Nitto Denko Corporation
    Inventor: Yasuo Nakatsuka
  • Patent number: 6097607
    Abstract: A computing device unit includes an upper casing, at least one integrated chip module electrically mounted on an interior side of the upper casing, a lower casing selectively engageable with the upper casing, and a flexible circuity ribbon extending through the upper casing and the lower casing, and being electrically connected to the at least one chip module within the lower and upper casing. Related devices and methods provide similar advantages.
    Type: Grant
    Filed: November 1, 1997
    Date of Patent: August 1, 2000
    Assignee: ViA, Inc.
    Inventors: David W. Carroll, Wendell L. Carroll, James L. Carroll
  • Patent number: 6096982
    Abstract: A flexible conductive tape is coated on at least one surface with an electrically conductive adhesive. The adhesive includes conductive particles dispersed therein. The adhesive-coated surface of a first segment of the flexible tape is joined to a substrate. The flexible tape is folded back at a crease, to expose a portion of the adhesive surface. At least one module is affixed to the exposed adhesive surface of the adjacent tape segment to form a sub-assembly. The sub-assembly is adapted for interengagement with a complementary modular assembly including electrical components and connectors. An electrical current is provided to the flexible tape.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: August 1, 2000
    Assignee: Nanopierce Technologies, Inc.
    Inventor: Louis Difrancesco
  • Patent number: 5930119
    Abstract: A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. A set of common points is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The inductance of longer traces is reduced by merging traces near a central portion of the backplane to form a conductive region that extends to at least one connector on either side of the common points, thereby electrically shortening the longer traces. The inductance is further reduced by widening the longer traces. Longer traces are wider than shorter traces to reduce the differences in the LC products associated with each trace and, therefore, the differences in delay among the traces.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: July 27, 1999
    Assignee: Arizona Digital, Inc.
    Inventor: Andrew R. Berding
  • Patent number: 5917709
    Abstract: A multiple circuit board assembly comprising: a first circuit board having a first predetermined set of conductive traces on a surface; a second circuit board having a second predetermined set of conductive traces on a surface; an interconnect mechanism having a third set of traces that mate the first and second set of traces when sandwiched between the first circuit board and the second circuit board in a predetermined manner; and fastened to the first and second circuit boards together with the interconnect mechanism sandwiched between such that there is electrical contact between the first and second predetermined set of conductive traces. The interconnect mechanism can be either single sided flex connector cable, double sided flex connector cable, or Cinch connectors. The fastening mechanism can be snaps fittings or screw setups without or without resilient washers.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: June 29, 1999
    Assignee: Eastman Kodak Company
    Inventors: Dean A. Johnson, William R. Laubengayer, Stephen G. Richardson
  • Patent number: 5883219
    Abstract: The invention relates to an integrated circuit device comprising (i) a substrate, (ii) metallic circuit lines positioned on the substrate, and (iii) a porous dielectric material positioned on the circuit lines. The dielectric material comprises the reaction product of an organic polysilica and polyamic ester preferably terminated with an alkoxysilyl alkyl group.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: March 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Kenneth Raymond Carter, Daniel Joseph Dawson, Richard Anthony Dipietro, Craig Jon Hawker, James Lupton Hedrick, Robert Dennis Miller, Do Yeung Yoon
  • Patent number: 5864470
    Abstract: A flexible circuit board for a ball grid array semiconductor package including a flexible resin film, a plurality of electrically conductive traces formed on an upper surface of the resin film, the conductive traces having solder ball pads, and a die flag including a semiconductor chip paddle located on a central portion of the circuit board, the chip paddle having a plurality of heat-discharging and grounding solder ball pads, and a plurality of lattice-shaped traces adapted to electrically connect the solder ball pads, the traces being shaped into a lattice to prevent a bleed-out of a silver-filled epoxy resin, a ground bonding rim located around the chip paddle, and a plurality of radial traces adapted to electrically connect the chip paddle to the ground bonding rim, and the flexible resin film being perforated to define solder ball lands on lower surfaces of the solder ball pads.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: January 26, 1999
    Assignees: Anam Semiconductor Inc., Amkor Technology, Inc.
    Inventors: Il Kwon Shim, Young Wook Heo, Robert Francis Darveaux
  • Patent number: 5838546
    Abstract: In a tape carrier package applying a TAB technique, a flex rigid PWB is used as a tape carrier. A flexible portion is provided with a semiconductor connection terminal. An LSI is directly mounted to the flexible portion. A rigid portion is provided with an electrode for mounting a component and an electrode for an external input/output.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: November 17, 1998
    Assignee: NEC Corporation
    Inventor: Tadayoshi Miyoshi
  • Patent number: 5837940
    Abstract: A nonuniform dielectric is located proximate to a conductive surface, the dielectric being substantially nonuniform with respect to the surface area of that conductive surface. If there are plural closely spaced conductors in a structure, then the nonuniform dielectric is located outside the space between these closely spaced conductors. Making the proximate dielectric nonuniform instead of uniform can provide advantages in better electrical performance for the proximate conductor.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: November 17, 1998
    Inventor: J. Peter Moncrieff
  • Patent number: 5822191
    Abstract: There is provided a highly reliable panel assembly structure capable of performing fine-pitch high-density assembling at a high yield and a low cost. A flexible wiring board has a film-like substrate with flexibility, and an IC chip is mounted in an area. In the area is provided a through hole that has plane dimensions smaller than plane dimensions of the chip and penetrates the substrate. Portions that belong respectively to an output side wiring line and an input side wiring line provided on a substrate surface and are connected respectively to an output side electrode and an input side electrode of the chip via second connection materials and are supported by the substrate surface. An output terminal of the flexible wiring board is connected to an electrode terminal formed at a peripheral portion of a panel via a first connection material, while an input terminal of the flexible wiring board is connected to an electrode terminal of a circuit board via a third connection material.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: October 13, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasunobu Tagusa, Shigeo Nakabu
  • Patent number: 5744224
    Abstract: A semiconductor chip mounting board includes a base material made of resin; a metallized pattern formed on a surface of the base material which defines a die-pad area on which a semiconductor chip is to be mounted; and the metallized pattern comprising a plurality of zigzag shaped pattern lines along imaginary straight line segments radially, outwardly extending from a central position of the die-pad area. The metallized pattern may be a plurality of zigzag shaped pattern portions along imaginary concentric circles having a center at a central position of the die-pad area. Otherwise, the metallized pattern may be a plurality of closed loop shaped frames which are overlapped on each other in a zigzag manner.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: April 28, 1998
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yukiharu Takeuchi, Shigetsugu Muramatsu
  • Patent number: 5742484
    Abstract: A surface mountable flexible interconnect (10) for connecting two circuit board (30, 32) consists of a flex circuit (12) with solderable runners (14) on one side, the runners traversing the flex circuit from one end to the other. There is a solderable pad (16) at the end of each runner, and each solderable pad has a solder bump (18) fused to it. A rigid carrier ring (20) is used to hold the flex circuit in position prior to placement on the PCB. The flex circuit is formed into a U-shaped loop (26), and the loop is aligned to the carrier so that the loop is situated in an aperture (24) in the carrier. The solder pads lie directly under the carrier ring and face away from it. An adhesive (22) bonds the flex circuit to the carrier ring.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: April 21, 1998
    Assignee: Motorola, Inc.
    Inventors: Joseph G. Gillette, Scott G. Potter, Pradeep Lall
  • Patent number: 5683788
    Abstract: A printed circuit board includes a multi-component mounting footprint for mounting one of several possible differently sized discrete component packages on the circuit board. The multi-component mounting footprint includes a first mounting pad which has two connection points for mounting a connector on one of two different sized components. The footprint also includes a second mounting pad which is symmetric to the first mounting pad. About the mounting pads are cut outs which prevent solder buildup when either one of two different sized components are mounted thereon.
    Type: Grant
    Filed: January 29, 1996
    Date of Patent: November 4, 1997
    Assignee: Dell USA, L.P.
    Inventors: Becky Dugan, Darrell J. Slupek
  • Patent number: 5569488
    Abstract: The present invention relates to dielectric materials used in circuit board, radar and microwave applications and methods of making these materials. The dielectric materials of this invention are characterized by having a ground plane, at least two dielectric materials having different dielectric constants and a common conducting layer positioned over the dielectric materials.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: October 29, 1996
    Assignee: Arlon, Inc.
    Inventor: John C. Frankosky
  • Patent number: 5557075
    Abstract: A parallel flexible transmission cable accommodating three degrees of displacement and one degree of rotation. The cable has two connectors attached to a flexible, planar cable. A plurality of conductors in the planar cable electrically connect corresponding pins of the two conductors. The cable is bent or formed in the middle of its length to be composed solely of a vane or vanes, that is, planar sections which project othogonally to the common plane of the cable at the connectors. The vanes can flex cooperatively into parallel "S" shapes, allowing the connectors to move transversely with respect to each other. The cable can be made from different normally-planar materials such as flexible circuit boards, or "flex circuits," or ribbon cable.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: September 17, 1996
    Assignee: Intel Corporation
    Inventor: Steven F. Nugent
  • Patent number: 5541369
    Abstract: A printed circuit board having juxtaposed thereon in parallel plural conductive paths, at least a part of which has a different length, extending from one end side to the other end side, wherein the electric resistances of the conductive paths are made substantially same by changing the width of at least a part of the conductive paths.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: July 30, 1996
    Assignee: Nitto Denko Corporation
    Inventors: Hiroshi Tahara, Seiju Kobayashi, Hitoshi Ohta
  • Patent number: 5528001
    Abstract: A process and apparatus for producing supported conductive networks which can be flexible or rigid, having densely packed circuits. The process and apparatus for making the conductive network involves forming a conductive material supported on a "dynamic pressure cushion" into a non-planar pattern defining the desired conductive circuits in relation to a fixed reference plane. The "dynamic pressure cushion" is a material having suitable viscosity and flow characteristics to flow out from under the conductive material as it is being formed and fill up any voids. To ensure that the "dynamic pressure cushion" properly flows without deforming the desired circuits, the die used to form the conductive material is provided with a material flow control grid and material expansion troughs. After forming the unwanted material is then mechanically removed in dimensional relation to the reference plane leaving the desired conductive circuits.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: June 18, 1996
    Assignee: Research Organization for Circuit Knowledge
    Inventor: Joseph A. Roberts
  • Patent number: 5527997
    Abstract: A conductor for use in a flat cable includes thereon a tin or tin alloy plating the thickness of which is substantially uniform over the whole periphery of a flat conductor, in order to provide a conductor for use in a flat cable which can minimize variations in the plating thickness thereof, provide a good contact reliability with respect to a connector when it is used in a flat cable, and causes no increase in the contact resistance thereof in a humidity withstand test after it is inserted into and removed from the connector.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: June 18, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Haruo Saen, Ryuzo Suzuki, Hiroshi Fujii, Atsushi Iizuka
  • Patent number: 5528458
    Abstract: An integrated circuit device is disclosed that comprises a bare integrated circuit chip, having an integrated circuit section and pad sections, said chip being mounted on an insulated surface of a substrate, and an electro-conductive circuit pattern wiring formed on said insulating surface along the periphery of said chip. Tape automated bonding wiring is used to electrically connect the pad sections of the chip to an end of the circuit pattern wiring. Terminals are electrically connected to the other end of the circuit pattern wiring for use in electrically connecting the integrated circuit device to electronic equipment.
    Type: Grant
    Filed: November 18, 1994
    Date of Patent: June 18, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeo Yasuho, Hayami Matunaga, Masao Iwata, Hitonobu Furukawa
  • Patent number: 5496970
    Abstract: This invention provides a high-density planar contact array capable of interconnecting various electronic devices using a pad to pad approach or pad to pin, which is capable of accommodating non-coplanarity in the Z axis of printed circuit boards but which still maintains good electrical contact.The array comprises an insulative substrate sheet that has a plurality of parallel conductive lines terminating in a pad over a hole in the substrate.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: March 5, 1996
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Mark S. Spencer
  • Patent number: 5483021
    Abstract: A laminated flat cable uses a flat conductor which is treated substantially uniformly with an anticorrosion plating having a given thickness over the whole periphery thereof to provide a laminated flat cable which can provide a stable contact reliability with respect to a connector and a stable voltage withstand between conductors in a long period of use in which the cable is repeatedly inserted into and removed from the connector.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: January 9, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Haruo Saen, Ryuzo Suzuki
  • Patent number: 5449862
    Abstract: This invention provides a high-density planar contact array capable of interconnecting various electronic devices using a pad to pad approach or pad to pin, and which is capable of accommodating non-coplanarity in the Z axis of printed circuit boards but which still maintains good electrical contact.The array comprises a flat, flexible insulative substrate sheet that has a plurality of parallel conductive lines or an array of circles or polygons of which each has had insulative material surrounding or on at least two sides of the conductive lines or polygons removed in the Z axis. The insulative material is removed in such a way as to create a generally trapezoid shape having a greater length side opposite the conductor when viewed through a cross-section of the X or Y axis. This trapezoid shape allows free Z axis motion while limiting X and Y axis motion.
    Type: Grant
    Filed: August 25, 1993
    Date of Patent: September 12, 1995
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Mark S. Spencer
  • Patent number: 5444186
    Abstract: A multilayer conductive wire is formed of a plurality of conductive layers stacked upon each other, and has a slit shaped groove extending in the direction intersecting the direction of stress in at least one conductive layer. With the groove mating with a protrusion in another conductive layer or a protrusion in an insulating film layer, a sliding phenomenon between the layers due to the stress can be restrained, so that a multilayer conductive wire free from destruction due to the sliding phenomenon caused by the stress and without losing conductivity can be provided.
    Type: Grant
    Filed: August 24, 1992
    Date of Patent: August 22, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Koji Eguchi
  • Patent number: 5422441
    Abstract: In a master slice integrated circuit, a number of connection pads are located in a peripheral edge region of a chip in such a manner that each one power supply pad is interposed between each pair of signal input/output pads and a number of unitary pad arrays each of which consists of a signal pad, a power supply pad and another signal pad located in the named order are repeatedly arranged along a peripheral edge of the chip. Thus, the pad pitch can be reduced to two thirds of the width of an I/O cell, without changing the I/O cell size. In addition, since the power supply pad is located adjacent each of the I/O cells, it is effective to suppress or minimize the power supply voltage noise caused by the simultaneous driving.
    Type: Grant
    Filed: April 1, 1993
    Date of Patent: June 6, 1995
    Assignee: NEC Corporation
    Inventor: Masao Iruka
  • Patent number: 5418691
    Abstract: A printed circuit board device comprising at least two printed circuit boards in superposition to connect their interconnection patterns, and a positioning member for putting the two boards into registry when being superimposed, the positioning member including a hole provided in one of the boards, an extension provided on the other board and arranged to be inserted into the hole, and a pair of marks for position registry provided on the respective boards.
    Type: Grant
    Filed: November 18, 1992
    Date of Patent: May 23, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventor: Go Tokura
  • Patent number: 5416274
    Abstract: An object of this invention is to provide a circuit board low in manufacturing cost in which aimed circuit patterns having a circuit gap therebetween can be short-circuited substantially irrespective of the length of the circuit gap while being insulated from other circuit patterns which are laid in the circuit gap. In a circuit board on which a plurality of circuit patterns are arranged, a selected one of circuit patterns is cut to have a circuit gap where the selected circuit pattern is laid across the remaining circuit patterns, in such a manner that the circuit gap divides the selected circuit patterns into two parts, a conductor formed by cutting a wire to the length of the circuit gap bridges the circuit gap, to short-circuit the two parts thereby to complete the selected circuit pattern, the conductor being insulated from the remaining circuit patterns laid across the circuit gap.
    Type: Grant
    Filed: November 24, 1993
    Date of Patent: May 16, 1995
    Assignee: Kabushiki Kaisha Sankyo Seiki Seisakusho
    Inventors: Kiyohiko Ushiyama, Shizunori Mitsuma
  • Patent number: 5414219
    Abstract: A circuit control device includes two intermating foil pads separated from one another by a narrow gap having a maximum dimension of 0.006 inches. A circuit path having one side connected to one of the pads and a second side connected to the other of the pads is selectively closed and opened by solder application and removal operations. Interdigitated, triangular fingers which are intermated to form the device ensure the formation of acutely angled junctures along the gap to ensure solder bridging of the gap. Emergency control elements are coupled to the circuit control device to permit control of an associated circuit path if the circuit control device itself fails. In that event, an emergency control device is coupled to the emergency control elements to control opening and closing of the circuit path.
    Type: Grant
    Filed: April 22, 1994
    Date of Patent: May 9, 1995
    Assignee: AT&T Corp.
    Inventors: Curtis L. Huetson, Rick D. Jussel
  • Patent number: 5414593
    Abstract: The disclosure relates to electronic units formed by two printed circuit type boards that are electrically and mechanically coupled and that have a single plug for their connection. To facilitate the placing of these units between two pairs of grooves, the assembling the two boards comprise adjusting elements to adjust the distance between the two boards to two distinct values: one when the boards are inserted into the grooves and the other for an effect of locking the boards between the pairs of grooves. To this end, it is possible to use bars crossed by a screw that makes it possible, by screwing, to place two outside sections of the bar in a position of overthrust with respect to an inside section of the bar. The screwing is done after the electronic unit has been inserted into the grooves in order to lock the boards against the flanks of the grooves.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: May 9, 1995
    Assignee: Thomson-CSF
    Inventor: Eddy Furlan
  • Patent number: 5408050
    Abstract: Disclosed is a flat cable having a plurality of parallel-arranged flexible conductor wires and two pieces of insulating tape applied to the opposite center areas of the parallel arrangement of conductor wires leaving their opposite ends exposed, thereby permitting the exposed ends to be used as terminal contacts, each of said conductor wires having an intermediate length of reduced width for increasing the flexibility of the conductor wire. An elongated strip of electrically conductive, flexible metal foil is unrolled and fed to be punched to provide at one time, conductor wires of the same number and parallel arrangement as a flat cable to be made; two pieces of adhesive, insulating tape are applied to the center areas of the parallel conductor wire arrangement; and finally the opposite perforation edges are cut and removed.
    Type: Grant
    Filed: September 9, 1993
    Date of Patent: April 18, 1995
    Assignees: Honda Tsushin Kogyo Co., Ltd., Tohoku Honda Denshi Co., Ltd.
    Inventors: Kinji Kashio, Hikaru Mitani
  • Patent number: 5397864
    Abstract: A wiring board including a plate; at least one conductive strip provided on the plate, the conductive strip having a specified connection position; and an electrically insulating film covering the conductive strip and having a slit extending in a direction crossing the longitudinal direction of the conductive strip. A tip of the conductive strip in the vicinity of the connection position has a distance from the connection position in a longitudinal direction of the conductive strip. The slit is formed at a position corresponding to the connection position.
    Type: Grant
    Filed: November 18, 1992
    Date of Patent: March 14, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akiteru Rai, Keiji Yamamura
  • Patent number: 5384431
    Abstract: The present invention is a joint assembly for allowing relative rotational movement of a camera relative to a stationary base structure. The assembly has a first flexible member which allows the camera to pan the surrounding are and a second flexible member which allows the camera to tilt. Each flexible member has a first surface facing a first direction and second surface facing a second opposite direction. One end each flexible member is folded over onto itself so that a portion of the second surface faces the first direction. The flexible members are constructed in an essentially radial shape to define a radial path. When an end of a flexible member moves along the arcuate path the member rolls over itself. That is, the portion of the flexible member that is rolled over, has its second surface facing the first direction instead of the second direction.
    Type: Grant
    Filed: May 11, 1993
    Date of Patent: January 24, 1995
    Assignee: Schaeffer Magnetics, Inc.
    Inventor: Alain Tusques
  • Patent number: 5384432
    Abstract: A tape lead wire includes a polymer resin film and conductor films. The conductor films are directly deposited on the surface of the polymer resin film without using any bonding layer. The total thickness of the tape lead wire can be made smaller than that of a conventional lead wire. The tape lead wire has a high flexibility, can be easily bent, can extremely reduce the bending spring rigidity and is suitable for a magnetic head having a reduced size and load, which is imposed by a head supporting device on the magnetic head, and lowered flying height and peripheral speed.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: January 24, 1995
    Assignee: TDK Corporation
    Inventors: Tetsuya Noro, Masahiko Itoh, Nobuya Ohyama, Hiroshi Kanai, Masaharu Ishizuka
  • Patent number: 5373108
    Abstract: A dual durometer ribbon generally consisting of a preform and cover, typically formed by an injection molding process. The preform has a low durometer midsection and a plurality of high durometer ends. The high durometer ends are attached to the low durometer midsection at narrow blend areas where the high durometer material blends with the low durometer material. A plurality of printed circuit termination boards rests within recesses located on the top surface of each of the high durometer ends. The recesses are of uniform depth and have an outer border of uniform thickness. The printed circuit termination boards typically have slotted through holes at a receptacle end of the printed circuit board and female connectors are located on one of the surfaces of the printed circuit boards. A plurality of conductors rest within groves contained on the low durometer midsection. The conductors are terminate at the through holes in the printed circuit termination board.
    Type: Grant
    Filed: September 8, 1993
    Date of Patent: December 13, 1994
    Inventor: Floyd Ysbrand
  • Patent number: 5373114
    Abstract: A circuit substrate comprises, on a surface of a substrate, an electronic-part packaging section extending longitudinally and a plurality of conductive patterns extending in parallel relation to each other along the electronic-part packaging section. The conductive patterns and electronic parts are electrically connected to each other by wire bonding. The conductive patterns are drawn around in a stairway manner at an area or region of the wire bonding, to form a plurality of stairway-like steps. The stairway-like steps are so formed as to extend in consideration of overhang of bonding wires. The stairway-like steps are so arranged as to extend slightly obliquely with respect to the electronic-part packaging section such that the stairway-like steps are located substantially at the same distance with respect to the electronic-part packaging section.
    Type: Grant
    Filed: May 3, 1993
    Date of Patent: December 13, 1994
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Hideo Kondo, Chiaki Funabiki, Kazunori Hirosawa
  • Patent number: 5308927
    Abstract: A wiring board, which can be efficiency produced and has excellent heat resistance, and a method of manufacturing the same. With ion-irradiation, a conductive layer and a metal layer are formed in an insulating substrate. In the vicinity of the interface between the insulating substrate and the metal layer, a composition region, which includes the atoms of the insulating substrate and the metal layer, is formed by applying ions to a metal layer formed in the insulating substrate.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: May 3, 1994
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Norihiro Hosoi
  • Patent number: 5288950
    Abstract: Disclosed are a flexible wiring board in which the thickness of at least one part of the insulating film support to be bent in actual use of the board is made thinner than that of the other parts of it and the surfaces of the conductive patterns containing the part to be bent are covered each with a silicone rubber coveray, and a method of preparing the board. The board has sufficient flexibility enough to be well bent at the determined part in actual use thereof with ensuring the reliability of connection at the bent part.
    Type: Grant
    Filed: February 14, 1992
    Date of Patent: February 22, 1994
    Assignee: Sumitomo Metal Mining Company Limited
    Inventors: Ryozo Ushio, Akio Takatsu, Yoshinori Suzuki
  • Patent number: 5274195
    Abstract: A laminate comprising metal layers separated by an etchant barrier to control depth of etching of the laminate, the barrier being etchable by an etchant which is not an etchant for the layers. A cable incorporating such a laminate and having relatively flexible conductors integral with relatively rigid terminals. A method of making such a cable, using the laminate, by selectively etching the layers down to the barrier to form the conductors and terminals, stripping the barrier and laminating the conductor with an insulating material preferably extending over at least a portion of the terminals to reinforce the conductor terminal transition and a cable when made of such a method.
    Type: Grant
    Filed: June 2, 1992
    Date of Patent: December 28, 1993
    Assignee: Advanced Circuit Technology, Inc.
    Inventors: Davis W. Murphy, Dennis A. Bonnette, Thomas H. Stearns
  • Patent number: 5262590
    Abstract: An improved flexible circuit assembly arranged in stripline cable or microstrip configuration with shielding and also being designed with a predetermined characteristic impedance. The flexible printed circuits function as printed cables, and employ spacers on either side of the circuit traces so as to provide ground planes at a predetermined dimensional spacing from the traces comprising the circuit pattern. The arrangement of the present invention further comprises placing two or three individual conductor panels on a common substrate, so as to accommodate folding of the circuit panels, one over the other, to form a multi-layer sandwich. Elongated slots are formed along the fold lines so as to improve the integrity of the assembly, and to reduce buckling.
    Type: Grant
    Filed: April 27, 1992
    Date of Patent: November 16, 1993
    Assignee: Sheldahl, Inc.
    Inventor: Randell B. Lia
  • Patent number: 5254811
    Abstract: An article for tape-automated bonding of integrated circuit microchips comprises a carrier sheet (22) carrying conductive tracks (23) with a tubular metal formation (21) passing through the sheet at the end of each track for connection to a microchip (24). The tubular formations tend to accommodate irregularities in the chip and may contain solder or other metal having a lower melting point than the tubular formation to effect bonding.
    Type: Grant
    Filed: May 16, 1991
    Date of Patent: October 19, 1993
    Assignee: Raychem Limited
    Inventors: Michael J. Ludden, Peter Nyholm
  • Patent number: 5229916
    Abstract: A chip overlay element is formed of a flexible substrate of polymer having electrically conductive material applied to one side thereof and circuitized to form signal lines. A metal stiffener/heat spreader is laminated to the polymer on the opposite side of the conductor. I/Os are formed on one end of the signal lines of the circuitized layer (near the end of the overlay element) and interconnection pads, bumps, or the like are formed on the opposite end (near the center of the element). The metal stiffener is then etched to form three distinct areas. The chip edge is then placed on the center metal stiffener area and bonded, with the other two stiffener areas being bent around the chip and bonded to the corresponding chip sides. The original I/Os are then electrically connected to the I/Os formed on the signal lines of the overlay element.
    Type: Grant
    Filed: March 4, 1992
    Date of Patent: July 20, 1993
    Assignee: International Business Machines Corporation
    Inventors: Richard F. Frankeny, Ronald L. Imken
  • Patent number: 5218172
    Abstract: The invention is directed to an etched wiring (spider) for integrated circuits having a metallic frame for electrodeposition and shorting purposes proceeding all around at the periphery and connecting the wiring at several points. When separating a plurality of circuits lying side-by-side after the electrodeposition, an entire strip of the carrier material previously had to be discarded in order to enable the short-free separation of the etched wirings. In order to avoid this waste, the invention provides that the leads to the junctions of the frame with the wiring of neighboring circuits be fashioned meander-like.
    Type: Grant
    Filed: July 17, 1991
    Date of Patent: June 8, 1993
    Assignee: Siemens Nixdorf Informationssysteme AG
    Inventor: Wolfgang Seidel
  • Patent number: 5210378
    Abstract: A joint assembly for allowing relative rotational movement of two structures. The joint assembly has a flexible member with a first surface facing a first direction and second surface facing a second opposite direction. The flexible member is typically a flexible circuit board or an electrical wire cable, that extends from a first structure to a second structure. The structures are interconnected so that they can rotate relative to each other. The flexible member is constructed in an essentially radial shape that defines an arcuate path. One end of the flexible member is attached to the first structure and the other opposite end is connected to the second structure. When the second structure rotates relative to the first structure, the end of the flexible member attached to the second structure moves along the arcuate path. As the flexible member moves along the arcuate path the member rolls over itself.
    Type: Grant
    Filed: July 30, 1991
    Date of Patent: May 11, 1993
    Assignee: Schaeffer Magnetics, Inc.
    Inventor: Alain Tusques
  • Patent number: 5168430
    Abstract: The flexible printed circuit device, includes at least one hybrid circuit structure having assigned contact areas, a rigid printed circuit board, a flexible printed circuit board portion also having assigned contact areas on one end region thereof and being connected electrically to the rigid printed circuit board, a plurality of bonding electrical conductors, each of the electrical conductors being bonded at one end thereof to one of the assigned contact areas on the at least one hybrid circuit structure and, at the other end thereof, to one of the assigned contact areas on the end region of the flexible printed circuit board portion; and a rigid support, the hybrid circuit structure being mounted on the rigid support. The end region of the flexible printed circuit board portion is fixedly mounted on the rigid support in side-by-side relationship with the hybrid circuit structure.
    Type: Grant
    Filed: April 21, 1989
    Date of Patent: December 1, 1992
    Assignee: Robert Bosch GmbH
    Inventors: Manfred Nitsch, Peter Werner, Dieter Gunther, Herbert Arnold, Willy Bentz, Michael Horbelt, Willi Gansert, Dietrich Bergfried, Werner Auth, Ulrich Konzelmann
  • Patent number: 5164888
    Abstract: A method and structure for implementing dynamic burn-in of semi-conductor chips in TAB processing is provided. The semi-conductor chips are mounted on a wire pattern formed on the obverse side of an insulating tape in a conventional way. The insulating tape has a plurality of openings extending therethrough, one opening between each adjacent location of a chip. Wires from the wiring pattern at each chip location pass over the openings on the obverse side of the tape. A second insulating tape is provided which has a series of parallel conductors formed on one surface thereof. The spacing of the conductors corresponds to the spacing of the wires over the openings.The second tape is applied to the reverse surface of the first tape with the conductors on the second tape in registration with the wires over the openings in the first tape and the wires are electrically bonded to the conductors. Thus, various voltage and signal levels can be supplied for all of the chips simultaneously during dynamic burn-in.
    Type: Grant
    Filed: September 18, 1990
    Date of Patent: November 17, 1992
    Assignee: International Business Machines
    Inventor: Earl H. Stone, Jr.
  • Patent number: 5134252
    Abstract: Shielding portions are superposed on opposite sides of an elongated flexible circuit board on which signal wires are formed to provide a flexible shielded signal wire. The flexible shielded signal wire is especially adapted to transmit signals to and from a rotary head drum of a digital audio tape recorder.
    Type: Grant
    Filed: January 18, 1991
    Date of Patent: July 28, 1992
    Assignee: Sony Corporation
    Inventors: Takuji Himeno, Takashi Sato
  • Patent number: 5083238
    Abstract: An electronic assembly comprising a plurality of printed circuit boards residing in a chassis and a removable high frequency, multi-conductor flexible cable, having a connector at each end, the structure of said cable being such that, if positioned in a single plane, it has a plurality of substantially rigid turns, the sum of the degrees of arc of such turns in one direction being equal to the sum of the degrees of arc of such turns in the opposite direction, such that the conductors have equal lengths throughout the cable, resulting in matched signal lengths throughout the cable.To provide optimum shielding, the cable is formed of a plurality of pairs of conductors, each pair is separated by a ground conductor, and the top and bottom of the cable are ground planes.
    Type: Grant
    Filed: February 4, 1991
    Date of Patent: January 21, 1992
    Assignee: Motorola, Inc.
    Inventor: Thomas W. Bousman
  • Patent number: 5061190
    Abstract: A printed circuit card and card edge connector for use with a 32-bit bus include respectively a pattern of conductive fingers and pins in the connector that render the card electrically compatible with existing 8-bit STD connectors and that render the card edge connector electrically compatible with existing 8-bit STD cards. the latter compatibility makes it possible to use in 32-bit systems any of the more than a thousand existing 8-bit circuits without modification; while the former compatibility makes available to 8-bit systems an easy path to growth and the expanded computational power of a 32-bit system.
    Type: Grant
    Filed: August 14, 1990
    Date of Patent: October 29, 1991
    Assignee: Ziatech Corporation
    Inventors: James A. Medeiors, R. A. Beverly, Ty F. Safreno
  • Patent number: 4990724
    Abstract: Electrical interconnection of first and second sides of a flex circuit is provided by a tab formed in the flex circuit. At least one circuit trace extends along the tab and provides a contact area on the flex circuit first side. The tab is folded so that the contact area overlays the flex circuit second side. The contact area is then electrically interconnected as by reflow soldering to a contact area on the flex circuit second side.
    Type: Grant
    Filed: December 4, 1989
    Date of Patent: February 5, 1991
    Assignee: Motorola, Inc.
    Inventors: Anthony B. Suppelsa, Keith D. Soldner