With Single Conductive Plane (e.g., Tape, Cable) Patents (Class 174/268)
  • Publication number: 20140251676
    Abstract: A method for manufacturing a structure containing a conductor circuit according to the present invention can provide openings in various shapes by patterning a first photosensitive resin layer in a first patterning process according to shapes of openings formed in a heat-curable resin layer. Further, in the method for manufacturing a structure containing a conductor circuit, a plurality of openings can be formed at the same time and a residue of the resin around the opening can be reduced, unlike a case in which openings are formed with a laser. Therefore, it is possible to sufficiently efficiently manufacture the structure having excellent reliability even when the number of pins of a semiconductor element increases and it is necessary to provide a great number of fine openings.
    Type: Application
    Filed: October 9, 2012
    Publication date: September 11, 2014
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Kazuhiko Kurafuchi, Daisuke Fujimoto, Kunpei Yamada, Toshimasa Nagoshi
  • Publication number: 20140254121
    Abstract: Disclosed herein is a printed circuit board having an insulating layer crack preventing port. The printed circuit board includes: an insulating layer part having at least one pair of insulating layers stacked therein; circuit patterns formed on the insulating layers, respectively; and crack preventing ports formed at positions at which they are not affected by the respective circuit patterns of the insulating layer part and supporting the insulating layer part from external impact.
    Type: Application
    Filed: January 17, 2014
    Publication date: September 11, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joong Hyuk Jung, Kwang Son You, Jong Hyung Kim, Sang Hoon Park, Hyea Hyen Kang
  • Publication number: 20140251659
    Abstract: A circuit board, onto which an electronic component is to be mounted, is provided with insulating core substrates and patterned metal plates. The metal plates are bonded to at least one side of the insulating core substrates. The insulating core substrates and the metal plates form a laminated body, in which a gas-vent hole is provided. The gas-vent hole is formed so that when the electronic component is mounted, the gas present between the insulating core substrates and the metal plates expands and is released to a side open to the atmosphere via the gas-vent hole.
    Type: Application
    Filed: July 2, 2012
    Publication date: September 11, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Hiroaki Asano, Yasuhiro Koike, Kiminori Ozaki, Hitoshi Shimadu, Tetsuya Furuta, Masao Miyake, Takahiro Hayakawa, Tomoaki Asai, Ryou Yamauchi
  • Patent number: 8809696
    Abstract: An object of the present invention is to provide a copper surface treatment method capable of keeping certainly a bonding strength between a copper surface and a resist, or between a copper surface and an insulating resin without forming irregularities having sizes of more than 1 ?m on the copper surface, and a copper treated with the method. The surface treatment method, comprising: a first step of forming, on a copper surface, a nobler metal than the copper discretely; a second step, subsequent to the first step, of forming copper oxide on the copper surface by oxidation with an alkaline solution containing an oxidizing agent; and third step of dissolving the copper oxide so as to be removed, thereby forming irregularities on the copper surface.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: August 19, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Tomoaki Yamashita, Sumiko Nakajima, Sadao Itou, Fumio Inoue, Shigeharu Arike
  • Patent number: 8804348
    Abstract: A flexible printed circuit board can prevent itself from breaking without losing its flexibility, avoid significantly damaging the operation of an electronic device in the event that a part of the flexible printed circuit board is broken, and warn the user about the occurrence of a breakage. The flexible printed circuit board includes: a connecting portion that is formed at an end of a signal wire for transmitting an electric signal; a signal wiring portion in which a plurality of unidirectionally aligned signal wires are disposed in a vicinity of the connecting portion; a breakage detection portion in which the signal wires are not disposed and that is formed at one of side edges of the signal wiring portion; and a through hole formed between the breakage detection portion and the signal wiring portion.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: August 12, 2014
    Assignee: Panasonic Corporation
    Inventors: Shintaro Tanaka, Tetsuya Esaki
  • Publication number: 20140216804
    Abstract: A transparent conductive film includes a substrate defining a mesh-shaped groove, which forms a mesh; and a conductive layer formed by conductive material filled in the mesh. An edge line of the mesh-shaped grooves is a curve or a polyline which increases a contact area between the conductive material and an edge of the mesh-shaped groove. In the transparent conductive film, non-linear edge lines are used, therefore, for the conductive region with the same size, the area of edge of the conductive material in contact with the trench increases, and the friction is increased, which leads to a larger adhesion of the conductive material, and a stable performance of the transparent conductive film is guaranteed.
    Type: Application
    Filed: July 5, 2013
    Publication date: August 7, 2014
    Applicant: NANCHANG O-FILM TECH. CO., LTD.
    Inventors: Guangzhou Yang, Miaoqian Cao, Yulong Gao, Chao Sun
  • Publication number: 20140216803
    Abstract: A conductive component is disclosed in the present invention, which includes an insulating layer and a metal mesh laid on the insulating layer, the metal mesh defines a plurality of voids arranged in array, a relationship of the aperture ratio K of the voids of the metal mesh, the optical transmittance T1 of the conductive component and the optical transmittance T2 of the insulating layer satisfy the following formula: T1=T2*K. The metal mesh is arranged on the insulating layer in the conductive component, a patterned sensing layer on the insulating layer by exposuring and developmenting the metal mesh as needed when in use, and then applied to touch screen, the use of indium tin oxide is avoided in the conductive component, thus the cost of the conductive component is low. A method of preparing the conductive component is also provided.
    Type: Application
    Filed: December 21, 2012
    Publication date: August 7, 2014
    Applicant: SHENZHEN O-FILM TECH CO., LTD.
    Inventors: Zhizheng Cheng, Rongjun Cai
  • Publication number: 20140190732
    Abstract: A carrier device for an electrical component includes a carrier, which includes an electrically insulating layer, and an electrical contact layer on the electrically insulating layer The electrical contact layer includes at least one bridge-shaped contact region At least one recess in the electrically insulating layer is arranged at least on one side surface of the bridge-shaped contact region and/or the bridge-shaped contact region includes a bridge width reducing toward the insulating layer.
    Type: Application
    Filed: July 9, 2012
    Publication date: July 10, 2014
    Applicant: OSRAM GMBH
    Inventors: Krister Bergenek, Andreas Biebersdorf, Jörg Erich Sorg
  • Publication number: 20140151109
    Abstract: The present invention provides a method for manufacturing a conductive pattern, comprising the steps of: a) forming a conductive film on a substrate; b) forming an etching resist pattern on the conductive film; and c) forming a conductive pattern having a smaller line width than a width of the etching resist pattern by over-etching the conductive film by using the etching resist pattern, and a conductive pattern manufactured by using the same. According to the exemplary embodiment of the present invention, it is possible to effectively and economically provide a conductive pattern having a ultrafine line width.
    Type: Application
    Filed: November 15, 2013
    Publication date: June 5, 2014
    Applicant: LG CHEM, LTD.
    Inventors: Ji-Young Hwang, In-Seok Hwang, Dong-Wook Lee, Min-Choon Park, Seung-Heon Lee, Sang-Ki Chun, Yong-Koo Son, Beom-Mo Koo
  • Publication number: 20140138143
    Abstract: A light emitting device according to the embodiment includes touch window including: a substrate; and an electrode part on the substrate, wherein the electrode part includes: a first sub-pattern; an electrode layer on the first sub-pattern; and a second sub-pattern close to the first sub-pattern, and wherein a boundary area between the electrode layer and the first sub-pattern is larger than a boundary area between the substrate and the first sub-pattern. A light emitting device package according to the embodiment includes a touch window including: a substrate; and an electrode part on the substrate; wherein the electrode part includes: a first sub-pattern; an electrode layer on the first sub-pattern; and a second sub-pattern close to the first sub-pattern, and wherein a line width of the first sub-pattern is changed according to a height of the first sub-pattern.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 22, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Dong Keon LEE, Beom Sun HONG, Jung Ki LEE, Jun Phill EOM, Jun LEE
  • Patent number: 8698006
    Abstract: A hermetic interconnect for medical devices is disclosed. In one embodiment, the interconnect includes platinum leads co-fired between alumina substrates to form a monolithic composite that is subsequently bonded into a titanium alloy flange. Both methodology for forming these interconnects as well as specific geometries and compositions are disclosed. Interconnects formed in this fashion enable significant reductions in overall size of the interconnect relative to the number of feedthrough leads as well as substantial improvements in robustness versus currently available technology.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: April 15, 2014
    Assignee: Morgan Advanced Ceramics, Inc.
    Inventors: David Joseph Bealka, Christien Matthew Vaillancourt, Fred Michael Kimock, Emma Claire Gill
  • Patent number: 8693202
    Abstract: A flexible printed circuit includes a first flexible film; a first interconnection layer on the first flexible film, wherein the first interconnection layer includes a first end portion to be connected to a first electrode of a touchscreen, and a second end portion; a second flexible film; a second interconnection layer on the second flexible film, wherein the second interconnection layer includes a first end portion to be connected to a second electrode of the touchscreen, and a second portion; an adhesive layer that bonds the first flexible film and the second flexible film; a first cover film on the first interconnection layer with the first and second end portions of the first interconnection layer being exposed; and a second cover film on the second interconnection layer with the first and second end portions of the second interconnection layer being exposed.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: April 8, 2014
    Assignee: Fujitsu Component Limited
    Inventor: Kazuyuki Yoshifusa
  • Patent number: 8687373
    Abstract: A card structure includes a first element and a second element. The first element includes a first peripheral portion and a plurality of first contact points exposed by the first peripheral portion. The second element includes a second peripheral portion and a plurality of second contact points corresponding to the first contact points of the first element and exposed by the second peripheral portion. When the first and second elements are joined with each other, the first peripheral portion of the first element and the second peripheral portion of the second element are adjacent to each other, to juxtapose the first contact points of the first element and the second contact points of the second element to each other. The juxtaposed first and second contact points of the first and second elements are coupled to each other by a welding portion.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 1, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Yuan Liu, Chien-Hong Lin, Yuan-Heng Sun
  • Patent number: 8658906
    Abstract: A dummy trace portion is provided in a region between at least a suspension board with circuit on one end side and a support frame of a suspension board assembly sheet with circuits. A base insulating layer is formed on a support substrate in the dummy trace portion. A plurality of conductor traces are formed on the base insulating layer, and a cover insulating layer is formed on the base insulating layer to cover each conductor trace. At least one of the base insulating layer and the cover insulating layer in the dummy trace portion has a groove.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: February 25, 2014
    Assignee: Nitto Denko Corporation
    Inventors: Jun Ishii, Terukazu Ihara, Naohiro Terada
  • Publication number: 20140041924
    Abstract: A micro-wire electrode includes a substrate and an anisotropically conductive electrode extending in a length direction formed over the substrate. The electrode includes a plurality of electrically connected micro-wires formed in a micro-pattern over the substrate. The micro-pattern includes a plurality of substantially parallel and straight micro-wires extending substantially in the length direction and a plurality of angled micro-wires formed at a non-orthogonal angle to the straight micro-wires electrically connecting the straight micro-wires so that the anisotropically conductive electrode has a greater electrical conductivity in the length direction than in another conductive electrode direction.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 13, 2014
    Inventor: Ronald Steven Cok
  • Patent number: 8648668
    Abstract: Disclosed is a structure for precision control of electrical impedance of signal transmission circuit board. A substrate forms thereon a plurality of first signal transmission lines, and a first covering insulation layer is formed on a first surface of the substrate to cover a surface of each first signal transmission lines and each spacing section formed between adjacent first signal transmission lines. Each first signal transmission lines can transmit a differential mode signal or a common mode signal.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: February 11, 2014
    Assignee: Advanced Flexible Circuits Co., Ltd.
    Inventors: Gwun-Jin Lin, Kuo-Fu Su
  • Publication number: 20140034363
    Abstract: A substrate including a first transmission line arranged to transmit electrical signals and including first and second traces and a first dielectric layer. The first and second traces are separated from each other by the first dielectric layer. A printed circuit board includes a first transmission line arranged to transmit electrical signals and including first, second, and third traces; and a first dielectric layer. The first and second traces are separated from the third trace by the first dielectric layer.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 6, 2014
    Applicant: SAMTEC, INC.
    Inventor: Gary Ellsworth BIDDLE
  • Publication number: 20140034376
    Abstract: A substrate including a first transmission line arranged to transmit electrical signals and including first and second traces and a first dielectric layer. The first and second traces are separated from each other by the first dielectric layer. A printed circuit board includes a first transmission line arranged to transmit electrical signals and including first, second, and third traces; and a first dielectric layer. The first and second traces are separated from the third trace by the first dielectric layer.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 6, 2014
    Applicant: SAMTEC, INC.
    Inventor: Gary Ellsworth BIDDLE
  • Publication number: 20140027169
    Abstract: An anisotropic conductive film is disclosed. The anisotropic conductive film includes a substrate, a plurality of insulating resin walls on the substrate and conductive materials. Each insulating resin wall is disposed on the substrate in parallel to each other. The conductive materials are arranged between the insulating resin walls and have conductivity along a direction parallel to the insulating resin walls.
    Type: Application
    Filed: December 20, 2012
    Publication date: January 30, 2014
    Applicant: BENQ MATERIALS CORPORATION
    Inventors: Chien-Huang HUANG, Chen-Kuan KUO, Lung-Hai WU
  • Publication number: 20140027170
    Abstract: A wiring substrate (10, 40, 60, 80) includes a wiring pattern (13, 21, 41, 43, 65, 83a, 83b, 83c) and an insulating layer (11, 26, 48, 81) to which the wiring pattern is fixed. The insulating layer includes an edge. The wiring pattern (13, 21, 41, 43, 65, 83a, 83b, 83c) includes a joint portion (14, 44, 66) connected with the insulating layer (11, 26, 48, 81) and an extended portion (45, 45, 67, 85) that extends from the joint portion (14, 44, 66) and protrudes from the edge of the insulating layer (11, 26, 48, 81). The insulating layer (11, 26, 48, 81) or the joint portion (14, 44, 66) includes an outermost surface. A connection terminal (T, T1) is provided by bending the extended portion (45, 45, 67, 85) so that a part of the extended portion (45, 45, 67, 85) is protruded from the outermost surface of the insulating layer (11, 26, 48, 81) or the joint portion (14, 44, 66).
    Type: Application
    Filed: January 6, 2012
    Publication date: January 30, 2014
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Hitoshi Shimadu, Takehiko Sawada, Takahiro Hayakawa, Tomoaki Asai, Ryou Yamauchi
  • Publication number: 20130341080
    Abstract: In a ceramic multilayer substrate including a ceramic laminate including ceramic layers, a surface electrode located on a surface of the ceramic laminate, and a cover ceramic layer that covers a peripheral portion of the surface electrode, a recess portion is provided in a peripheral portion of a surface electrode to extend along the periphery thereof, and the peripheral portion of the surface electrode includes a peripheral end portion thereof and a region in which the recess portion is covered with a cover ceramic layer. A height of a central portion of the surface electrode which is not covered with the cover ceramic layer is lower than a height of a primary surface of the ceramic laminate on which the surface electrode is located.
    Type: Application
    Filed: August 26, 2013
    Publication date: December 26, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Yoshihito OTSUBO
  • Publication number: 20130341079
    Abstract: The present invention provides a transparent conductive substrate comprising: a transparent substrate, and a conductive pattern provided on the transparent substrate, wherein the conductive pattern comprises line breakage portions performing electric breakage, and a pattern of a broken line formed when the line breakage portions are connected comprises an irregular pattern shape. The present invention can minimize a moiré phenomenon and a diffraction phenomenon by external light by performing line breakage of a regular or irregular conductive pattern by using the irregular pattern.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 26, 2013
    Applicant: LG CHEM, LTD.
    Inventors: Ji Young HWANG, Hyeon Choi, Seung Heon Lee, Sujin Kim, Ki-Hwan Kim
  • Patent number: 8611094
    Abstract: Provided is an optical module in which wiring density may be reduced to ensure isolation between lines to reduce crosstalk. A flexible printed circuit includes: dielectric layers; a first pattern facing portion including a first ground conductor pattern and a first wiring pattern electrically connected to an electric terminal, which are facing each other through the dielectric layer; and a second pattern facing portion including a second ground conductor pattern and a second wiring pattern electrically connected to the electric terminal, which are facing each other through the dielectric layer, the second pattern facing portion facing the first pattern facing portion, in which when the dielectric layer is bent along a portion between the first pattern facing portion and the second pattern facing portion, at least one of the first ground conductor pattern and the second ground conductor pattern is located between the first wiring pattern and the second wiring pattern.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: December 17, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Aruga, Hideyuki Ohashi
  • Publication number: 20130328451
    Abstract: A dielectric element substrate includes a board, a diffusion layer, a first isolation layer, and a lower electrode layer. The diffusion layer is provided on the board. The first isolation layer is provided on and unitarily with the diffusion layer. The lower electrode layer is provided on the first isolation layer at an opposite side with respect to the diffusion layer of, and is isolated from the diffusion layer by the first isolation layer. The diffusion layer is formed by allowing a first metal element and a second metal element to diffuse from the board to the same composition material as that of the first isolation layer. The first isolation layer is free from the first and second metal elements. A coefficient of thermal expansion of the diffusion layer decreases monotonously from the board to the first isolation layer.
    Type: Application
    Filed: April 16, 2012
    Publication date: December 12, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takashi Kubo, Toshinari Noda
  • Publication number: 20130313013
    Abstract: A printed circuit board comprises at least one microstrip transmission line with a conductive solid reference plane and at least one conductive trace embedded in a dielectric substrate, and further comprises at least one conductive shielding layer having a lattice structure, wherein the conductive trace is arranged between the solid reference plane and the shielding layer.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 28, 2013
    Inventors: DAVID SALA PORTA, David Soriano Fosas, Juan Luis López Rodriguez
  • Patent number: 8590144
    Abstract: Provided is a method of manufacturing a printed circuit board including, disposing first and second insulating members and first and second conductive films on both sides of a separating member to perform a thermocompression bonding process on the first and second insulating members and the first and second conductive films on the both sides of the separating member, so as to attach the first member to the second member with the separating member therebetween and attach the first insulating member to the first conductive film and attach the second insulating member to the second conductive film, selectively removing the first and second conductive films to form first and second circuit patterns, and cutting the separating member and the first and second insulating members to separate the first and second insulating members with the first and second circuit patterns from the separating member.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: November 26, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hye Sun Yoon, Jae Bong Choi, Eun Jung Lee, Jung Ho Hwang, Joon Wook Han
  • Patent number: 8587953
    Abstract: A multi-layered cable consisting of three or more conductive layers separated by layers of dielectric and/or adhesive material. The bottom layer and the top layer may act as return path for the transmitted signals and as a shield to prevent interference between these and external electrical signals. Located between the bottom layer and the top layer, the middle layer may transmit desired signals through the flexible cable. The material selection and specifics of each of the layers should be selected so as to achieve a balance in which the desired electrical impedance and mechanical flexibility requirements are met. The cable may also include one or more vias connecting the bottom layer to the top layer, providing shielding all the way around the flex cable. An additional conductive sock may be used to improve shielding effectiveness of the top and bottom layer and to connect to I/O connector shells and the system Faraday cage.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: November 19, 2013
    Assignee: Apple Inc.
    Inventors: John Brock, Brett William Degner, Dinesh Mathew, Thomas W. Wilson, Jr., Chris Ligtenberg, Keith Hendren, Steven Keiper, Eugene Kim
  • Publication number: 20130295432
    Abstract: A method for producing a laminated electrically conductive sheet includes the steps of preparing a support board, forming an electrically conductive layer at one side in a thickness direction of the support board, and transferring the electrically conductive layer onto at least one surface in the thickness direction of a resin-containing layer containing a resin.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 7, 2013
    Applicant: NITTO DENKO CORPORATION
    Inventor: Shinichi INOUE
  • Publication number: 20130284500
    Abstract: A laminate circuit board structure from button up including a substrate, a circuit metal layer, a nanometer plating layer and a cover layer is disclosed. The nanometer plating layer is smooth a thickness of 5-40 nm, and can be directly forming on the outer surface of the circuit metal layer or manufactured by firstly forming the nanometer plating layer on a preforming substrate, then pressing the substrate against the nanometer plating layer, and finally removing the preforming substrate. The junction adhesion between the nanometer plating layer and the cover layer or the substrate is improved by chemical bonding. Therefore it does not need to roughen the circuit metal layer or reserve circuit width for compensation such that the density of the circuit increases and much more dense circuit can be implemented in the substrate with the same area.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Inventors: Jun-Chung Hsu, Chi-Ming Lin, Tso-Hung Yeh, Ya-Hsiang Chen
  • Publication number: 20130277100
    Abstract: Disclosed herein are a touch panel and a method of manufacturing the same. The touch panel includes a transparent substrate, an insulating layer that is formed on the transparent substrate and has an intaglio portion formed thereon, an electrode layer that is embedded in the intaglio portion, and a light absorbing layer that is formed in an inner wall of the intaglio portion to be interposed between the inner wall of the intaglio portion and the electrode layer. In the touch panel, the electrode layer is formed to be embedded, and the light absorbing layer is further included, thereby durability and visibility of the touch panel.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 24, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Hyun Ra, Jin Uk Lee
  • Publication number: 20130264107
    Abstract: A circuit board includes a substrate extending from a mounting end to an opposite end. The substrate extends a thickness from an upper side to a lower side. The substrate includes a recess that extends into the mounting end in a direction toward the opposite end. The circuit board includes an internal ground plane held by the substrate such that the internal ground plane extends within the thickness of the substrate. The internal ground plane includes a recess segment that extends, and is exposed, within the recess.
    Type: Application
    Filed: May 1, 2012
    Publication date: October 10, 2013
    Applicant: TYCO ELECTRONICS CORPORATION
    Inventor: Joel Nathan Meyers
  • Publication number: 20130240260
    Abstract: A method and product produced by the method for forming an interactive information device with a conductively coated panel includes forming a reduced contrast increased light transmitting, conductively coated panel by providing a transparent substrate and applying a transparent, conductive layer on at least one surface of the substrate in a predetermined pattern with at least one area having a conductive layer thereon and a second area without a conductive layer. The method further includes applying a transparent layer of a metal oxide such that the metal oxide layer, such as silicon dioxide, overlies both areas whereby visible contrast between the areas is reduced and light transmission through the coated panel is increased. The coated panel is then attached to an electro-optic display for displaying information when electricity is applied thereto.
    Type: Application
    Filed: May 10, 2013
    Publication date: September 19, 2013
    Applicant: TPK Touch Solutions Inc.
    Inventors: Eugene Halsey, IV, Catherine A. Getz
  • Publication number: 20130180773
    Abstract: A method for manufacturing circuit substrate structure and its product are provided. Firstly, an attached enhancement portion having rough surfaces is formed on a surface of a carrier through a roughing process, and a catalyst is disposed on a surface of the attached enhancement portion. Finally, a metal layer is formed on the attached enhancement portion after reacting with the catalyst through chemical plating reduction. The foregoing manufacturing method can effectively reduce the usage of the catalyst or an accelerator to greatly decrease the using costs of the catalyst and the accelerator.
    Type: Application
    Filed: June 26, 2012
    Publication date: July 18, 2013
    Inventors: Cheng-Feng CHIANG, Jung-Chuan CHIANG
  • Patent number: 8476532
    Abstract: A multilayer flexible printed circuit board disclosed in the present application is a multilayer flexible printed circuit board in which a ground layer, an insulating layer and a signal wiring layer in which signal wiring is formed are laminated in sequence, with the multilayer flexible printed circuit board including a protruding portion protruding laterally, and a ground that is electrically connected to the ground layer being formed on at least one surface of the protruding portion, in order to have shielding properties that can cope with high speed signal transmission performed via the signal wiring layer.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: July 2, 2013
    Assignee: Panasonic Corporation
    Inventors: Naofumi Kitano, Tetsuya Esaki
  • Publication number: 20130146338
    Abstract: A twisted-pair cable and methods are disclosed. The twisted-pair cable comprises a first layer comprising a first non-conductive. A second layer is coupled to the first layer, and comprises a printed circuit patterned with first diagonal conductor segments. A third layer is coupled to the second layer, and comprises a non-conductive strip. A fourth layer is coupled to the third layer, and comprises a printed circuit patterned with second diagonal conductor segments. The first diagonal conductor segments and the second diagonal conductor segments are coupled at respective segment ends such that at least two wires are formed around the non-conductive strip. A fifth layer is coupled to the fourth layer, and comprises a second non-conductive.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Inventors: Jeffrey L. Duce, Joseph A. Marshall
  • Publication number: 20130140063
    Abstract: A method for making printed circuits and printed circuit boards which includes coating a non-metallized substrate and plating an image of a desired circuit design directly onto the coated substrate without the need to image the circuit design on an intermediate silver halide polyester film or diazo and utilizing existing imaging, developing and etching subtractive techniques in conventional printed circuit board processing. One exemplary embodiment of the method for making printed circuit boards includes coating a non-metallized substrate with a palladium based material including a ferric based solution combined with palladium.
    Type: Application
    Filed: November 19, 2012
    Publication date: June 6, 2013
    Inventor: Steven Lee Dutton
  • Publication number: 20130105207
    Abstract: There is provided a transparent conductive film which comprises: a first transparent film; a plurality of transparent electrode patterns; a transparent adhesive layer; and a second transparent film. The first transparent film and the second transparent film are laminated with the transparent adhesive layer interposed therebetween. The first transparent film has a thickness of 15 ?m to 55 ?m. The second transparent film has a thickness 1.5 times to 6 times as great as that of the first transparent film. The transparent adhesive layer is a curing adhesive layer having a thickness of not less than 0.01 ?m and less than 10 ?m.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 2, 2013
    Applicant: NITTO DENKO CORPORATION
    Inventor: NITTO DENKO CORPORATION
  • Publication number: 20130092429
    Abstract: An electrical connector includes a printed circuit board that includes a body that carries a plurality of ground conductors that define respective ground contact pads, and a plurality of signal conductors that define respective signal contact pads. The contact pads are configured to mate with electrical contacts of a complementary electrical connector. The printed circuit board includes a ground coupling assembly that electrically connects at least a pair of the ground conductors.
    Type: Application
    Filed: October 3, 2012
    Publication date: April 18, 2013
    Inventor: Jason John Ellison
  • Patent number: 8410375
    Abstract: A wiring board has a wiring member, a first reinforcing member and a second reinforcing member. The wiring member has wiring layers and insulating layers which are stacked, and the wiring layers include a first connecting electrode formed on a surface of the wiring member and a second connecting electrode formed on a back surface of the wiring member. A pin is formed on the second connecting electrode. The second reinforcing member is formed by a resin and serves to reinforce the wiring member. The first reinforcing member is formed on the whole back surface of the wiring member except for the pin provided on the second connecting electrode.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: April 2, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yoshitaka Matsushita, Kazuhiro Oshima, Akio Horiuchi
  • Patent number: 8406009
    Abstract: An electronic device is provided, the electronic device includes a printed circuit board (PCB) having a mounting point. The computer system also includes a chassis having a mounting post. The mounting point and the mounting post are flexibly connected.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: March 26, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey A. Lev, Steven S. Homer, Earl W. Moore, Mark H. Ruch
  • Publication number: 20130063906
    Abstract: An electronic device includes a chassis, a circuit board and the resilient piece. The chassis includes a bottom panel. The circuit board has a ground plane. The resilient piece includes a soldering portion and a resisting portion. The soldering portion is in electrical connection with the ground plane, and the resisting piece abuts the bottom panel to prevent the electromagnetic interference (EMI) from the circuit board.
    Type: Application
    Filed: May 18, 2012
    Publication date: March 14, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD.
    Inventors: Yong-Nian CHEN, Li-Fu XU, Yue-Yong LI, Jin-Wen OU
  • Patent number: 8395050
    Abstract: A flexible printed circuit and a display module comprising the flexible printed circuit are disclosed. The display module comprises a display panel, a printed circuit board, and a flexible printed circuit. The flexible printed circuit electrically connects the display panel and the printed circuit board, and further comprises a flexible substrate and a cover lay. The flexible substrate has an upper surface and two opposite end portions. The cover lay is disposed on the upper surface of the flexible substrate and extends along a lengthwise direction of the flexible substrate. The cover lay further has two opposite sides each also extending along the lengthwise direction of the flexible substrate. Each of the sides has at least a partially continuous contour which is formed with a discontinuous status on at least one of the end portions.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: March 12, 2013
    Assignee: AU Optronics Corp.
    Inventors: Chien-Liang Chen, Chun-Yu Lee, Shih-Ping Chou
  • Patent number: 8384216
    Abstract: A manufacturing method of a package structure is provided. A metal substrate is provided. The metal substrate has a first surface where a first seed layer is formed. A patterned insulating layer is formed on the first seed layer and exposes a portion of the first seed layer. A patterned circuit layer is formed on the exposed portion of the first seed layer and covers a portion of the patterned insulating layer. A chip-bonding process is performed to electrically connect a chip to the patterned circuit layer. An encapsulant encapsulating the chip and the patterned circuit layer and covering a portion of the pattered insulating layer is formed. The metal substrate and the first seed layer are removed to expose a bottom surface of the patterned insulating layer and a lower surface of the patterned circuit layer. Solder balls are formed on the lower surface of the patterned circuit layer.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: February 26, 2013
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Publication number: 20130020120
    Abstract: A wiring board has a laminated structure having a recessed portion on a first-surface side of the laminated structure and a solder resist layer on a second-surface side of the laminated structure on the opposite side of the first-surface side. The laminated structure has a first-surface side pad formed in the bottom of the recessed portion and a second-surface side pad formed on the second-surface side of the laminated structure, the solder resist layer has a first opening portion and a second opening portion formed in the solder resist layer, the first opening portion is exposing the second-surface side pad, the second opening portion is formed on a back face of the recessed portion, and the back face of the recessed portion does not include the second-surface side pad.
    Type: Application
    Filed: May 31, 2012
    Publication date: January 24, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Teruyuki Ishihara, Hidetoshi Noguchi, Hirofumi Futamura
  • Publication number: 20130015908
    Abstract: A touch panel includes an insulating substrate, a rectangular transparent conductive layer and a number of electrodes. The insulating substrate has two opposite surfaces. The rectangular transparent conductive layer, fixed on one of the surfaces of the insulating substrate, has two opposite long sides and two opposite short sides. The electrodes are disposed at the short sides of the rectangular transparent conductive layer with a regular interval and electrically connected to the rectangular transparent conductive layer. The rectangular transparent conductive layer further has anisotropic impedance and defines an impedance direction substantially perpendicular to the short sides of the rectangular transparent conductive layer.
    Type: Application
    Filed: July 6, 2012
    Publication date: January 17, 2013
    Applicant: SHIH HUA TECHNOLOGY LTD.
    Inventors: PO-SHENG SHIH, CHIEN-YUNG CHENG, PO-YANG CHEN, JIA-SHYONG CHENG
  • Patent number: 8350159
    Abstract: A base insulating layer is formed on a suspension body, and write wiring traces and read wiring traces are formed on the base insulating layer. The write wiring trace and the read wiring traces are formed on a body region of the base insulating layer, and the write wiring trace is formed on an auxiliary region of the base insulating layer. The base insulating layer is bent along a bend portion. This causes the write wiring trace to be positioned above the write wiring trace.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: January 8, 2013
    Assignee: Nitto Denko Corporation
    Inventors: Tetsuya Oosawa, Naoyuki Tanaka, Mitsuru Honjo
  • Publication number: 20120325545
    Abstract: To provide a method for producing a conductive film with excellent transparency and conductivity by a simple method suitable for large-area production. A method for producing a conductive film comprising a step of placing a template (B), having openings in a mesh structure running from the side that is to contact a substrate (A) through to the back side, on the surface of the substrate (A), and spreading a dispersion (D) of conductive particles (P) on the surface of the substrate (A) on which the template (B) has been placed, and drying it, thereby forming a mesh-like structure (C) of the conductive particles (P) near the points of contact between the substrate (A) and the template (B), and then removing the template (B) from the substrate (A) to form a mesh-like structure (C) of the conductive particles (P) on the surface of the substrate (A).
    Type: Application
    Filed: January 18, 2011
    Publication date: December 27, 2012
    Applicants: Kyoto University, Mitsubishi Rayon Co., Ltd., SANYO CHEMICAL INDUSTRIES, LTD.
    Inventors: Ko Higashitani, Yasuhiro Tsudo, Masaki Nakayama, Shinji Kake
  • Publication number: 20120305306
    Abstract: An ink adapted for forming conductive elements is disclosed. The ink includes a plurality of nanoparticles and a carrier. The nanoparticles comprise copper and have a diameter of less than 20 nanometers. Each nanoparticle has at least a partial coating of a surfactant configured to separate adjacent nanoparticles. Methods of creating circuit elements from copper-containing nanoparticles by spraying, tracing, stamping, burnishing, or heating are disclosed.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 6, 2012
    Applicant: LOCKHEED MARTIN CORPORATION
    Inventor: Alfred A. Zinn
  • Patent number: 8319109
    Abstract: An electro-optical device includes an electro-optical panel, a first wiring board and a second wiring board. The first wiring board having a one-side first connection terminal electrically connected to the panel-side connection terminal at one end of a first wiring forming surface and having an other-side first connection terminal at the other end of the first wiring forming surface. The second wiring board having one-side second connection terminal electrically connected to the other-side first connection terminal at one end of a second wiring forming surface and having the other-side second connection terminal at the other end of the second wiring forming surface.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: November 27, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Kenya Ishii
  • Publication number: 20120292094
    Abstract: Provided is a metal core board which has a preferable function for a vehicle-mountable junction box, specifically, is reduced in size or improved in mounting efficiency. A metal core board for a vehicle-mountable junction box, which is mountable on the vehicle-mountable junction box, wherein a core plate forming an intermediate layer of the metal core board has a plurality of slits and an island surrounded by separating connection parts present between the slits; and in the state where the island is held between insulating layers stacked on both of two surfaces of the core plate, through-bores 46 are formed at the separating connection parts to remove the separating connection parts and the island is made electrically independent from a remaining part of the core plate while being held between the insulating layers. Thus, a plurality of circuits can be formed.
    Type: Application
    Filed: August 1, 2012
    Publication date: November 22, 2012
    Applicants: FURUKAWA AUTOMOTIVE SYSTEMS INC., FURUKAWA ELECTRIC CO., LTD.
    Inventors: Shinichi Jinagama, Kengo Aburaya, Hideki Nakazato, Kazumasa Sakata, Shinya Saito