Abstract: Embodiments of the disclosed technology provide to a thin film transistor array substrate comprising a first base substrate; a gate line formed on the first base substrate; and two data lines separately formed on the first base substrate; wherein the two data lines are located on both sides of the gate line respectively in the direction of data signal transmission but do not overlap with the gate line. The two data lines can be electrically connected through conductive elements for transmitting data signals.

Abstract: Disclosed is a flexible-circuit flat cable with cluster section, including at least one cluster section, at least one slip section, a first connection section, and a second connection section. The first connection section is set at a first end of the cluster section. The slip section has a first end connected to a second end of the cluster section and a second end at which the second connection section is set. The four sections are all provided with a plurality of signal transmission lines corresponding to and connecting each other. The first connection section and the second connection section are selectively provided with a connector or a plugging end. Further, the cluster section includes a cluster structure composed of a plurality of clustered flat cable components that are formed by slitting in a direction parallel to extension direction of a flexible circuit board to impose free and independent flexibility for bending to each clustered flat cable component.

Abstract: Embodiments of the invention generally relate to conductive foils having multiple layers for use in photovoltaic modules and methods of forming the same. The conductive foils generally include a layer of aluminum foil having one or more metal layers with decreased contact resistance disposed thereon. An anti-corrosion material and a dielectric material are generally disposed on the upper surface of the metal layer. The conductive foils may be formed on a carrier prior to construction of a photovoltaic module, and then applied to the photovoltaic module as a conductive foil assembly during construction of the photovoltaic module. Methods of forming the conductive foils generally include adhering an aluminum foil to a carrier, removing native oxides from a surface of the aluminum foil, and sputtering a metal onto the aluminum foil. A dielectric material and an anti-corrosion material may then be applied to the upper surface of the sputtered metal.

Abstract: A semiconductor device includes a substrate, a die assembly attachable to the substrate and a flexible strip extending over the substrate and the die assembly. The flexible strip has one or more routing circuits carried thereon. The die assembly and the substrate are arranged to be electrically connected through the one or more routing circuits carried on the flexible strip.

Abstract: An object of the present invention is to provide an insulating sheet superior in heat dissipation efficiency, heat resistance, insulation efficiency and moldability. Provided is a sheet-shaped insulating sheet of a resin composition containing an epoxy resin, a curing agent and an inorganic filler, wherein one or both of the epoxy resin and the curing agent have a naphthalene structure, the inorganic filler contains hexagonal boron nitride, and the inorganic filler is contained in an amount of 70 to 85 vol % in the entire resin composition. It is possible to increase the filling efficiency of an inorganic filler in the insulating sheet by using an epoxy resin and/or a curing agent having a naphthalene structure, which are favorably compatible with the hexagonal boron nitride contained in the inorganic filler.

Abstract: The present invention relates to a method for manufacturing a TAB tap. The method includes forming a circuit pattern region having input/output terminal pattern on a base film, and forming an exposing region at a convey region having a sprocket hole for exposing the base film. Accordingly, the present invention provides a TAB tape that improves reliability of a product by fundamentally preventing the generation of metal particles by forming exposing regions that expose a base film through selectively etching and removing a metal layer of a convey region formed at both side of a TAB tape and having a sprocket hole, and that prevents short-circuit by partially removing a base film at a predetermined region not having a circuit pattern formed thereon through etching.

Abstract: Disclosed is an internal cable system that communicates signals in an electronic device. The system uses a printed circuit board with active circuits that is connected to a standard communication cable. The printed circuit board is exposed to air flow from the cooling system of the electronic device for proper operation of the active components of the active circuits on the printed circuit board. The standard cable may include a SCSI internal cable or other similar signal communication cables. Signal integrity is enhanced using the active circuits that are mounted on the printed circuit board. Power is supplied to the printed circuit board through inactive conductors in the cable or conductors that would otherwise be used for grounding.

Abstract: A multilayer printed wiring board includes: a build-up layer that is formed on a core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; lands that are disposed on an upper surface of the low elastic modulus layer and connected via solder bumps to a IC chip; and conductor posts that pass through the low elastic modulus layer and electrically connect lands with conductor patterns. The conductor posts have the aspect ratio Rasp (height/minimum diameter) of not less than 4 and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts, which are positioned at external portions of the low elastic modulus layer, is greater than or equal to the aspect ratio Rasp of internal conductor posts, which are positioned at internal portions of the low elastic modulus layer.

Abstract: An assembly of substrate packages interconnected with flex cables. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing detachable inter-package flex cable connection. The flex cable comprises a transmission region that includes a plurality of signal traces and a ground plane. A plurality of solder mask strips are disposed on the plurality of signals traces to provide anchoring for the signal traces. The solder mask strips intersect the signals traces. The exposed signal traces and the ground plane are coated with organic solderability preservative material. Hermetically-sealed guiding through holes are provided on the substrate package as a mechanical alignment feature to guide connection between flex cables and high speed I/O contact pads on the substrate package.

Abstract: A plurality of first output terminals is provided along one side of a circuit element, and a plurality of input terminals and a plurality of second output terminals are provided adjacently along the other opposite side thereof. Leads include a first output lead extending from the first output terminal to an output connection electrode, and a second output lead extending from the second output terminal to the output connection electrode. The second output lead is extended from the other side of the circuit element to one side of the circuit element through a surface of a flexible wiring cable opposite the circuit element and further extended in parallel with the first output lead and connected to the output connection electrode.

Abstract: The invention discloses a membrane circuit board including a substrate, a plurality of first signal pins and a second signal pin. The first signal pins and the second signal pin are disposed on the substrate. The substrate has a first edge. Each of the first signal pins has a first terminal, and the first terminal has a first width. The second signal pin has a second terminal, which is disposed between the first edge and the first terminal. The second terminal has a second width. The second width is larger than the first width. Accordingly, the membrane circuit board may have high error tolerance and better quality control efficiency.

Abstract: A printed circuit board includes a reference layer configured to connect to a power or a ground and a dielectric layer stacked on the reference layer. The dielectric layer includes a component surface opposing the reference layer. The component surface forms a differential pairs, a protection runner, and a power runner. The differential pairs include a substantially linear part. The protection runner is intervened between the linear part and the power runner, and is substantially parallel to the differential pairs. The length of the protection runner is approximately equal to that of the linear part. Each of the two ends of the protection runner forms a via that electrically connects the protection runner to the reference layer.

Abstract: An electronic device includes an integrated circuit, a connector, and a circuit board. The integrated circuit includes a first signal processing circuit, a second signal processing circuit, and an interface multiplexer having a first input port electrically connected to the first signal processing circuit, a second input port electrically connected to the second signal processing circuit, and an output port arranged to be electrically connected to the first input port or the second input port. The circuit board carries the integrated circuit and has a plurality of connector placement sites, including at least a first connector placement site each dedicated to the first signal processing circuit and at least a second connector placement site each dedicated to the second signal processing circuit. The connector placement sites and the output port of the interface multiplexer are electrically connected in series. The connector is installed on one of the connector placement sites.

Abstract: A circuit substrate including a base layer and a plurality of lead units arranged as an array is provided, wherein the base layer has a plurality of through grooves, and the lead units are disposed on the base layer. Each of the lead units includes a common terminal and at least three leads. The common terminal is capable of being divided into a plurality of electrodes connected with each other. The leads are extended outwards from the edge of the common terminal, and each of the leads is extended outwards from the edge of one of the electrodes. The through grooves expose the common terminals of the lead units.

Abstract: A vacuum hermetic organic packaging carrier is provided. The organic packaging carrier includes an organic substrate, a conductive circuit layer, and an inorganic hermetic insulation film. The organic substrate has a first surface. The conductive circuit layer is located on the first surface and exposes a portion of the first surface. The inorganic hermetic insulation film at least covers the exposed first surface to achieve an effect of completely hermetically sealing the organic packaging carrier.

Abstract: A wiring board includes an insulation layer containing a resin and a silica-type filler and having a roughened surface, and a conductive layer formed on the roughened surface of the insulation layer and having a first conductive portion and a second conductive portion positioned adjacent to the first conductive portion. The roughened surface of the insulation layer has a roughness under the first conductive portion, a roughness under the second conductive portion, and a roughness between the first conductive portion and the second conductive portion, and the roughness between the first conductive portion and the second conductive portion is set less than at least one of the roughness under the first conductive portion and the roughness under the second conductive portion.

Abstract: A laminate including a resin layer and a metal layer, the resin layer being obtained by modifying at least part of the surface of a resin film including a thermoplastic cyclic olefin resin by ionizing irradiation, and the metal layer being formed on the modified area of the surface of the resin film by plating, a method of producing the same, and an electronic circuit board including a circuit formed by etching the metal layer of the laminate by photolithography, are disclosed. The laminate ensures that the insulating resin layer (flat surface) exhibits high adhesion to the conductor layer.

Abstract: A cable with conductive bumps is fabricated by forming a photoresist layer with multiple openings on a cable substrate, coating a conductive layer on the photoresist layer whereby the conductive layer in the openings forms the bumps at circuits on the cable substrate, and then removing the photoresist layer. When connecting the cable to a task object such as an LCD glass substrate or PCB, only a usual non-conductive paste is applied to join the cable and the task object, without use of expensive anisotropic-conductive paste or film.

Abstract: A method of metallizing the surface of a substrate electrolessly, by spraying one or more oxidation-reduction solutions thereonto. The steps of this method include: a) physical or chemical treatment to reduce the surface tension of the substrate before metallization; b) electroless metallization of the surface of the substrate treated in step a), by spraying one or more oxidation-reduction solutions in the form of one or more aerosols thereonto; and c) formation of a top coat on the metallized surface. Compact devices for implementing this method and the products obtained are also disclosed.

Abstract: The present invention comprises methods and compositions of dielectric materials. The dielectric materials of the present invention comprise materials having a dielectric constant of more than 1.0 and less than 1.9 and/or a dissipation factor of less than 0.0009. Other characteristics include the ability to withstand a wide range of temperatures, from both high temperatures of approximately +260° C. to low temperatures of approximately ?200° C., operate in wide range of atmospheric conditions and pressures (e.g., a high atmosphere, low vacuum condition such as that found in the outer-space as well as conditions similar to those found at sea level or below sea level). The dielectric materials of the present invention may be used in the manufacture of composite structures that can be used alone or in combination with other materials, and can be used in electronic components or devices such as RF interconnects.

Abstract: An apparatus, a method, a planar insulating substrate and a chipset have been presented, comprising at least one module configured to establish a predefined pattern on a planar insulating substrate so that conductive particles can gather according to the predefined pattern. At least one another module is configured to transfer the conductive particles to the planar insulating substrate, wherein the conductive particles are arranged to gather according to the predefined pattern. A sintering module is configured to fuse the conductive particles on the planar insulating substrate, wherein the conductive particles are arranged to fuse according to the predefined pattern to establish a conductive plane on the planar insulating substrate. Embodiment of the invention relate to printable or printing electronics on a fibrous web.

Abstract: An object of the present invention is to provide a copper surface treatment method capable of keeping certainly a bonding strength between a copper surface and a resist, or between a copper surface and an insulating resin without forming irregularities having sizes of more than 1 ?m on the copper surface, and a copper treated with the method. The surface treatment method, comprising: a first step of forming, on a copper surface, a nobler metal than the copper discretely; a second step, subsequent to the first step, of forming copper oxide on the copper surface by oxidation with an alkaline solution containing an oxidizing agent; and third step of dissolving the copper oxide so as to be removed, thereby forming irregularities on the copper surface.

Abstract: A double-sided pressure-sensitive adhesive tape includes a nonwoven fabric substrate and pressure-sensitive adhesive layers present on both sides of the substrate, in which the nonwoven fabric substrate contains at least Manila hemp, has a thickness of 18 ?m or less, and has a tensile strength in a machine direction of 4 N/15 mm or more. The double-sided pressure-sensitive adhesive tape is thin and is effective for the reduction in size and thickness of products to be fixed through the tape. The tape has a high strength in the machine direction and does not break during production and processing processes. In addition, the tape has a nonwoven fabric substrate and thereby excels also in punching quality. The tape is therefore particularly useful as a double-sided pressure-sensitive adhesive tape for fixing a wiring circuit board.

Abstract: A multilayer printed wiring board includes: a build-up layer that is formed on a core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; lands that are disposed on an upper surface of the low elastic modulus layer and connected via solder bumps to a IC chip; and conductor posts that pass through the low elastic modulus layer and electrically connect lands with conductor patterns. The conductor posts have the aspect ratio Rasp (height/minimum diameter) of not less than and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts, which are positioned at external portions of the low elastic modulus layer, is greater than or equal to the aspect ratio Rasp of internal conductor posts, which are positioned at internal portions of the low elastic modulus layer.

Abstract: The present invention provides a flip-chip package substrate and a method for fabricating a flip-chip package substrate comprising a circuit build-up structure, which comprises at least a dielectric layer and at least a circuit layer, wherein each dielectric layer comprises a first surface and a second surface, plural vias are formed in the first surface, the circuit layer is formed on the first surface and in the vias to electrically connect to another circuit layer disposed under the dielectric layer; a metal layer embedded in the exposed second surface of the circuit build-up structure without protruding the exposed second surface and connected to the circuit layer; and two solder masks disposed on the exposed first surface and the exposed second surface of the circuit build-up structure, wherein the solder masks have plural openings to separately expose part of the circuit layer and the metal layer functioning as conductive pads.

Abstract: A flow controller including a unitary controller body with a chemically inert fluid conduit having an insertable constriction or orifice disposed within the conduit having a reduced cross-sectional area to thereby restrict the flow of fluid within the conduit allowing for reliable flow measurement. An integrated circuit or controller may be coupled to the control valve and also coupled to the pressure sensors by a lead structure including signal conductors surrounded by a Faraday cage, and a chemically inert housing coupled to the unitary controller body enclosing the control valve and the pressure sensors.

Abstract: A flexible printed circuit and a display module comprising the flexible printed circuit are disclosed. The display module comprises a display panel, a printed circuit board, and a flexible printed circuit. The flexible printed circuit electrically connects the display panel and the printed circuit board, and further comprises a flexible substrate and a cover lay. The flexible substrate has an upper surface and two opposite end portions. The cover lay is disposed on the upper surface of the flexible substrate and extends along a lengthwise direction of the flexible substrate. The cover lay further has two opposite sides each also extending along the lengthwise direction of the flexible substrate. Each of the sides has at least a partially continuous contour which is formed with a discontinuous status on at least one of the end portions.

Abstract: Disclosed is a flexible-circuit flat cable with cluster section, including at least one cluster section, at least one slip section, a first connection section, and a second connection section. The first connection section is set at a first end of the cluster section. The slip section has a first end connected to a second end of the cluster section and a second end at which the second connection section is set. The four sections are all provided with a plurality of signal transmission lines corresponding to and connecting each other. The first connection section and the second connection section are selectively provided with a connector or a plugging end. Further, the cluster section includes a cluster structure composed of a plurality of clustered flat cable components that are formed by slitting in a direction parallel to extension direction of a flexible circuit board to impose free and independent flexibility for bending to each clustered flat cable component.

Abstract: Alien crosstalk suppression cores are used to decrease alien crosstalk in communications channels. Electrical communication cables may be provided with alien crosstalk suppression cores. The alien crosstalk suppression cores, which may be ferrite suppression cores, are placed separately on some or all of the twisted pairs within a communication cable. The alien crosstalk suppression cores reduce ANEXT and AFEXT in high-frequency communications when communication cables are installed near one another. Alien crosstalk suppression cores may also be incorporated into other communication channel components, such as on a PCB within a communication jack.

Abstract: A microwave conducting structure is described, in which a first electrically conductive layer, a first dielectric substrate with a first dielectric constant being arranged on the first electrically conductive layer, and at least one electrically conductive trace with a first width being arranged on or within the dielectric substrate are provided. A track of a second dielectric substrate having a second width being wider than the first width and a second dielectric constant being lower than the first dielectric constant, is arranged locally between the first dielectric substrate and the conductive trace so as to extend along the conductive trace such that the conductive trace operates electrically as being arranged on the second dielectric substrate.

Abstract: A method for producing an electrical and mechanical connection, wherein a solid body comprises a support, on which is disposed an electrical contact zone and an electrically insulating support zone. A flexible, flat cable comprises a support layer made of an electrically insulating material and a strip conductor, with an electrical contacting point and a laterally adjacent insulating cable zone. An adhesive layer is applied on the cable and the contacting point is disposed on the support layer so that the adhesive layer surrounds the contacting point and adheres to the cable. The support and the cable are positioned in a pre-assembly position so that the contacting point of the cable is facing the contact zone of the support and the adhesive layer is facing the electrically insulating support zone. The solid body and the cable are positioned so that the contacting point electrically contacts the contact zone and the adhesive layer adheres to the surface of the solid body.

Abstract: The present invention provides a flat cable fixing structure that includes a flexible flat cable (FFC) and a positioning element. The flexible flat cable is connected to a printed circuit board, and the positioning element is provided for fixing the flexible flat cable to the printed circuit board to achieve the effect of securely fixing the flexible flat cable onto the printed circuit board. When the flat cable fixing structure is applied to various types of electronic products, the invention can overcome the shortcomings of the prior art that the flat cable and the printed circuit board may be separately from each other easily by an external force, and the difficulty of aligning soldering points.

Abstract: A packaging method comprises: forming a circuit board by forming a substantially continuous conductive layer on an insulating board and removing selected portions of the continuous conductive layer to define an electrically conductive trace; laser cutting the electrically conductive trace to define sub-traces electrically isolated from each other by a laser-cut gap formed by the laser cutting; and bonding a light emitting diode (LED) chip to the circuit board across or adjacent to the laser-cut gap, the bonding including operatively electrically connecting an electrode of the LED chip to one of the sub-traces without using an interposed submount. A semiconductor package comprises an LED chip flip-chip bonded to sub-traces of an electrically conductive trace of a circuit board, the sub-traces being electrically isolated from each other by a narrow gap of less than or about 100 microns.

Abstract: A metal base circuit board to be used for a hybrid integrated circuit, including circuits provided on a metal plate via an insulating layer, a power semiconductor mounted on the circuit, and a control semiconductor to control the power semiconductor, provided on the circuit. A low capacitance portion is embedded under a circuit portion on which the control semiconductor is mounted, preferably. The low capacitance portion is made of a resin containing an inorganic filler and has a dielectric constant of from 2 to 9.

Abstract: An object of the present invention is to provide a flexible printed wiring board which relaxes stress concentration in the flexible printed wiring board during production steps, thereby preventing wire breakage in inner lead portions and cracking in solder resist which would otherwise be caused during mounting of devices such as IC chips and LSI chips. The flexible printed wiring board of the present invention includes an insulating layer; a wiring pattern formed of a plurality of wirings being juxtaposed, which wiring pattern is formed through patterning a conductor layer stacked on at least one surface of the insulating layer and on which wiring pattern a semiconductor chip is to be mounted; and grid-like dummy patterns formed in a blank area where the wiring pattern is not provided, wherein the dummy patterns are formed in a width direction generally symmetrically with respect to the longitudinal direction of the flexible printed wiring board.

Abstract: A printed circuit board and a method of manufacturing the printed circuit board are disclosed. In an embodiment of the present invention, the method of manufacturing a printed circuit board can include: providing a pair of conductive layers, in which roughness of one surface of one of the pair of conductive layers is different from roughness of one surface of the other of the pair of conductive layers; and stacking the pair of the conductive layers on a dielectric layer such that one surface of one of the pair of conductive layers faces one surface of the dielectric layer and one surface of the other of the pair of conductive layers faces another surface of the dielectric layer.

Abstract: A flexible circuit board uses a specific structure to alleviate mechanical stress thereof. The flexible circuit board has a flexible film, a plurality of inner leads, a plurality of outer leads, and a plurality of connection portion. Each of the connection portions a corresponding one of the inner leads with a corresponding one of the outer leads. A first width of the inner leads is greater than a second width of the outer leads. Due to rounded concave sections and rounded convex sections of the connection portions, if the flexible circuit board is bent, the mechanical stress around corners of joint portions of the connection portions with the inner leads and the outer leads could be alleviated.

Abstract: The anisotropic conductive tape (1) of the invention is used for electrical connection between opposing circuit electrodes and is provided with a tape-like base material (20) and with multiple adhesive layers (11b, 12b) formed in parallel on the main side of the base material (20) along the lengthwise direction of the base material (20), wherein at least two of the multiple adhesive layers have different structures.

Abstract: Multiple DIMM circuits or instantiations are presented in a single module. In some embodiments, memory integrated circuits (preferably CSPs) and accompanying AMBs, or accompanying memory registers, are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile.

Abstract: A charging system comprises a power pad and compatible circuitry on devices to be charged, including contacts in a constellation pattern that interface with conductive strips on the pad to ensure power transfer regardless of orientation. Safety and control circuitry provide spark suppression and short protection.

Abstract: A front-and-back electrically conductive substrate includes a plurality of posts composed of a material that can be anisotropically etched and having an electrically conductive portion that has at least a first surface and a second surface that communicate with each other, and an insulative substrate that supports the plurality of posts.

Abstract: One embodiment of a multiple flexible wiring board is a multiple flexible wiring board in which a plurality of flexible wiring boards are configured, and in which a first wiring base material, a first covering film layer, a second wiring base material, a second covering film layer, and an adhesive sheet that bonds the first wiring base material and the second wiring base material such that the first covering film layer and the second covering film layer are opposed, and has opening portions that have been formed corresponding to each of the plurality of flexible wiring boards, are layered. A hollow portion of each of the flexible wiring boards is formed between the first wiring base material and the second wiring base material by the opening portions, and auxiliary opening portions are formed alongside the opening portions.

Abstract: A substrate pad structure for connecting a lead connecting portion of an electronic device to a substrate is disclosed. The substrate pad structure includes a first pad portion and a second pad portion that are arranged on the substrate at corresponding positions of two end regions of the lead connecting portion, which has a continuous oblong shape. A space portion is provided between the first pad portion and the second pad portion, and the lead connecting portion includes a non-connected region located at a corresponding position of the space portion.

Abstract: A portable electronic device and a transferring method of a circuit element thereof are provided. The portable electronic device comprises a main body and a circuit element. The main body has a shell and a control element by a print way. The circuit element is integrated with the shell by transferring and is electrically connected with the control element.

Abstract: An optoelectronic system includes a printed circuit board having a ground pad and a bond pad as well as an optoelectronic element. The optoelectronic element is electrically connected to the bond pad via a bonding wire and is additionally fastened to the ground pad by a soldering connection. The ground pad is arranged such that one part of the space between the printed circuit board and the optoelectronic element is not filled with solder. Furthermore, a method is for manufacturing such an optoelectronic system.

Abstract: In one non-limiting aspect thereof this invention provides a structure having a generally planar quadrilateral shape that includes a bottom portion defining a mounting section; a vertical wall portion that extends upwards from the bottom portion and a top-most portion having a generally triangular shape in cross-section and forming along widest portion thereof a lip having a lower surface. The lower surface has a generally rectangular shape characterized by a concave cut-out along a middle portion of an outer edge for reducing an amount of force that is required to be applied to the top-most portion to bend the top-most portion about a central axis thereof.

Abstract: Multiple fully buffered DIMM circuits or instantiations are presented in a single module. In a preferred embodiment, memory integrated circuits (preferably CSPs) and accompanying AMBs are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete FB-DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile.

Abstract: A multilayer printed wiring board (10) includes: a build-up layer (30) that is formed on a core substrate (20) and has a conductor pattern (32) disposed on an upper surface; a low elastic modulus layer (40) that is formed on the build-up layer (30); lands (52) that are disposed on an upper surface of the low elastic modulus layer (40) and connected via solder bumps (66) to a IC chip (70); and conductor posts (50) that pass through the low elastic modulus layer (40) and electrically connect lands (52) with conductor patterns (32). The conductor posts (50) have the aspect ratio Rasp (height/minimum diameter) of not less than 4 and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts 50a, which are positioned at external portions of the low elastic modulus layer (40), is greater than or equal to the aspect ratio Rasp of internal conductor posts (50b), which are positioned at internal portions of the low elastic modulus layer (40).

Abstract: An electrical component is provided that provides at least a two shot injection molding structure. One of the at least two shots of plastic comprises a laser direct structuring material. Another of the at least two shots of plastic comprises a non-platable plastic. The laser direct structuring material is selectively activated such that a conductive trace can be plated on the laser direct structuring material.

Abstract: A flexible circuit is populated with integrated circuits. Integrated circuits populated on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. In a preferred embodiment, the overall module profile does not, consequently, include the thickness of the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile. The flex circuit may be aligned using tooling holes in the flex circuit and substrate. The flexible circuit may exhibit one or two or more conductive layers, and may have changes in the layered structure or have split layers. Other embodiments may stagger or offset the ICs.