Vent, Inlet Or Exit Patents (Class 174/522)
  • Patent number: 5090919
    Abstract: A seal structure for an electric device having an electrically conductive lead portion which passes through a through hole in a bottom surface of an electrically insulating housing. Additionally, the housing is provided with a lateral slot in a side surface thereof which is in communication with the through hole and which is filled with a sealant. Thus, the sealant which has been filled into the lateral slot adheres to the surface of the terminal piece exposed in the interior of the lateral slot and is solidified therein. Therefore, when this electric device is mounted on a printed circuit board, and its lead portions are soldered to a printed pattern of the printed circuit board, flux is prevented from reaching the internal part of the lead portion, and various problems which are otherwise caused by intrusion of flux into the interior of the housing can be effectively prevented.
    Type: Grant
    Filed: July 26, 1990
    Date of Patent: February 25, 1992
    Assignee: Omron Corporation
    Inventor: Hideaki Tsuji
  • Patent number: 5087497
    Abstract: On an electric circuit substrate comprising an electric circuit, a radiator plate is placed for heat radiation of an integrated circuit structure and a transistor which emits heat, and the integrated circuit structure and the transistor are placed on the radiator plate and a power supply terminal is integrally provided on the radiator plate.
    Type: Grant
    Filed: January 25, 1990
    Date of Patent: February 11, 1992
    Assignees: Canon Kabushiki Kaisha, Canon Seiki Kabushiki Kaisha
    Inventors: Koji Suzuki, Minoru Tanaka
  • Patent number: 5079673
    Abstract: An IC card module includes a substrate one side of which is provided with a connection terminal; and a resin-sealed semiconductor IC which has been previously sealed by a resin. This connection terminal and the resin-sealed semiconductor IC are electrically connected to each other and are covered with a molding resin. Accordingly, reliable modules can be efficiently manufactured and readily mounted on IC card substrates.
    Type: Grant
    Filed: November 30, 1990
    Date of Patent: January 7, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Syojiro Kodai, Katsunori Ochi, Fumiaki Baba
  • Patent number: 5075821
    Abstract: An improved DC to DC converter apparatus including a metal-backed PC board which serves as the base plate of the device and has the principal power consuming components affixed thereto, and a conventional circuit board having the relatively lower power consuming electronic components affixed to it, the latter board being secured in closely spaced relationship to the metal-backed board using connecting elements which provide both electrical and thermal interconnection between the two boards. All device connect pins extend from the conventional board, and the entire device is potted in a thermally conductive potting material.
    Type: Grant
    Filed: November 5, 1990
    Date of Patent: December 24, 1991
    Assignee: RO Associates
    Inventor: John E. McDonnal
  • Patent number: 5067229
    Abstract: The present invention provides a method of producing electronic components such as LED displays and hybrid IC's from a board supply frame. The frame comprises a parallel pair of elongate side bands, and a plurality of unit circuit boards integrally incorporated in the frame by means of connecting webs and arranged between the pair of side bands at a predetermined interval therealong. Various process steps such as chip bonding and wire bonding are performed with respect to the individual circuit boards while they are still in the frame. In a final step, each unit circuit board or electronic component is separated from the frame. The frame may be provided with an identification pattern to identify the type of unit circuit boards incorporated in the frame.
    Type: Grant
    Filed: October 22, 1990
    Date of Patent: November 26, 1991
    Assignee: Rohm Co., Ltd.
    Inventor: Nobuyuki Nakamura
  • Patent number: 5065281
    Abstract: A molded integrated circuit package includes an integrated circuit chip, a heat sink device attached directly to the chip or lead frame and a molded package encapsulating the chip. The heat sink preferably comprises a thermally conductive material having a stem which communicates between the IC chip and the exterior of the molded package for direct conduction of heat from the IC chip to the exterior of the package.
    Type: Grant
    Filed: February 12, 1990
    Date of Patent: November 12, 1991
    Assignee: Rogers Corporation
    Inventors: Jorge M. Hernandez, Scott Simpson
  • Patent number: 5059746
    Abstract: Housing assembly for components, such as Hall effect sensors, comprises an inner housing of premolded relatively firm plastic material and an outer housing which is overmolded on the inner housing. The components are contained in cavities in the inner housing. Passageways extend through the inner housing to the cavities and the soft overmolded material flows through these passageways and forms a surrounding cushion within the cavities for the components. Also disclosed is a system for mounting proximity sensors on an automotive door lock or the like in a manner which detects the fully closed and the partially closed conditions of the door.
    Type: Grant
    Filed: May 1, 1989
    Date of Patent: October 22, 1991
    Assignee: AMP Incorporated
    Inventors: Earl J. Hayes, Gary W. Hawk
  • Patent number: 5057648
    Abstract: A package for a heat generating, high voltage hybrid circuit is disclosed which comprises a package housing having a sidewall structure formed from an electrically insulative, thermally conductive ceramic material that obviates the need for using separate insulator structures between the sidewalls of the package and the electrical feedthroughs which afford electrical access to the circuit contained within the package housing. The feedthroughs include a layer of hardenable material for sealingly mounting a terminal connector through the sidewalls of the package. In one embodiment of the invention, the hardenable material sealingly mounts the terminal connectors of the electrical feedthroughs within circular openings in the sidewall structure.
    Type: Grant
    Filed: November 20, 1989
    Date of Patent: October 15, 1991
    Assignee: Westinghouse Electric Corp.
    Inventors: David N. Blough, Ngon B. Nguyen
  • Patent number: 5057348
    Abstract: A device e.g., an electrical or electromechanical assembly (62), comprising a housing (64) with a mechanism (66) disposed therein which is potted by a cured mass of self-leveling liquid composition. The composition comprises an actinic radiation cured first resin component (102) preferably (methacrylate resins, which immobilize the partially cured mass, and a subsequently cured second resin component (100), preferably epoxy resins, which is non-cured under the actinic radiation but curable at ambient or elevated temperature.
    Type: Grant
    Filed: July 25, 1990
    Date of Patent: October 15, 1991
    Assignee: Loctite Corporation
    Inventors: Kieran F. Drain, Larry A. Nativi
  • Patent number: 5043211
    Abstract: An epoxy resin composition useful for sealing a semiconductor device includes 100 parts by weight of epoxy resin, 30-75 parts by weight of phenolic resin, 320-570 parts by weight of silica powder, and 2-30 parts by weight of styrene-butadiene-methyl methacrylate copolymer. The surface of the silica powder is treated, at room temperature, by 0.05-1.00% by weight of silane coupling agent, 0.05-1.00% by weight of a silicone base surface active agent, and 0.15-3.00% by weight of thermosetting silicone rubber.
    Type: Grant
    Filed: March 30, 1988
    Date of Patent: August 27, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshizumi, Kazutaka Matsumoto, Shinetsu Fujieda, Ken Uchida
  • Patent number: 5039942
    Abstract: A measurement pickup comprising a housing having a side opening, a measuring element located in the housing, a connection cable extending through the side opening and connected with the measuring element, and a closing part located in the side opening closing the side opening and fixing the connection cable at least in one direction and a body of plastic material injected into the housing for sealing the measuring element.
    Type: Grant
    Filed: August 18, 1989
    Date of Patent: August 13, 1991
    Assignee: Robert Bosch GmbH
    Inventors: Emil Buchschmid, Erich Ebenhoh, Michael Moog, Werner Huber, Berthold Stritzel
  • Patent number: 5030796
    Abstract: A microelectronic device is rendered resistant to reverse engineering by encapsulating it in a dual layer encapsulant. The inner layer is compatible with the operation of the device, and has a greater resistance to chemical attack then does the device. The outer layer includes a filler of barium sulfate and gadolinium oxide, to absorb X-rays and N-rays respectively, is more resistant to chemical attack than the inner layer, and includes a groove around its periphery, to preferentially allow chemical attack radially. A full chemical attack damages the device beyond usable inspection, but a partial chemical attack is insufficient to remove X-ray and N-ray concealment.
    Type: Grant
    Filed: August 11, 1989
    Date of Patent: July 9, 1991
    Assignee: Rockwell International Corporation
    Inventors: Dale W. Swanson, James J. Licari
  • Patent number: 5028741
    Abstract: A high frequency, low cost power semiconductor device (60) is provided by combining a semiconductor die (46) with a leadframe (10,12) having a coplanar upper surface (36) with thin external leads (18,20) and a thicker central die bond region (24) whose upper face (16) and sides (42) are covered by an encapsulation (52) but whose lower face (54) is exposed. The leadframe (10,12) desirably has an "H" pattern with the arms (18,20) extending laterally from opposed sides of the encapsulation (52) and down-formed to have their lower surfaces (62) coplanar with the exposed lower face (54) of the central die bond region (16,24) which forms the cross-bar of the "H". The leadframe is monolithic and preferably formed by skiving. The device is especially suited for surface-mounting.
    Type: Grant
    Filed: May 24, 1990
    Date of Patent: July 2, 1991
    Assignee: Motorola, Inc.
    Inventors: Paul W. Sanders, Randy Pollock
  • Patent number: 5021736
    Abstract: A transducer arrangement comprising a magnetoresistive transducer including a magnetoresistive element responsive to magnetic flux passing therethrough in a predetermined direction to change its electrical resistance as a function of the intensity of the magnetic flux in the predetermined direction and a magnet to provide said magnetic flux. The transducer can include a permanent magnet having a planar surface with a magnetoresistive element offset from the axis of the magnet and optionally at an angle to the planar surface. The transducer can also include a concave surfaced magnet with the magnetoresistive element at an acute angle to the parallel flux lines emanating from the concave surface. As a further embodiment, the magnetoresistive element can be tilted on the magnet surface in two directions to provide a bias field and calibration.
    Type: Grant
    Filed: September 19, 1989
    Date of Patent: June 4, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Edward M. Gonsalves, Stephen B. Offiler, Douglas B. Strott, Steven Beringhause
  • Patent number: 5019673
    Abstract: A flip-chip package for integrated circuits is provided by over-molding an integrated circuit assembly which includes a flip-chip mounted to a very thin chip carrier. The flip-chip includes an array of bumped pads which fill an array of matching conductive through holes on the chip carrier and securely couple thereto. The chip carrier includes an array of bumped contacts on its back surface which correspond to the bumped pads of the flip-chip. The transfer over molding of the integrated circuit assembly provides a layer of epoxy around the exposed surfaces of the flip-chip providing an environmentally protected and removable integrated circuit package.
    Type: Grant
    Filed: August 22, 1990
    Date of Patent: May 28, 1991
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Barry M. Miles, Marc V. Papageorge
  • Patent number: 5015801
    Abstract: An electrical circuit module in which structural elements of the circuit module are foamed or cast over with synthetic resin. At least one component is located in the interior of the resin and has an actuating shaft allowing adjustment of the component. An extension shaft that is rotationally symmetrical and has a driver is coupled to the actuating shaft. The extension shaft has a rotation-symmetrical bead and is embedded in the synthetic resin in a positive-fitting manner. The extension shaft also has an adjustment and protruding to the outside of the resin, and a surface which forms a separation layer toward the resin.
    Type: Grant
    Filed: May 11, 1989
    Date of Patent: May 14, 1991
    Assignee: Schaller-Automation, Industrielle Automationstechnik KG
    Inventors: Werner Schaller, Manfred Durr
  • Patent number: 5010212
    Abstract: A printed circuit board having electrical components connected thereto in spaced relation is coated with a resin material by immersion in a container of resin material. The flow of resin between the electrical devices and the circuit board is facilitated by the provision of holes through the circuit board in alignment with each electrical component so that the formation of blow-holes is prevented.
    Type: Grant
    Filed: May 30, 1989
    Date of Patent: April 23, 1991
    Assignee: Aisin Seiki K.K.
    Inventors: Chiaki Sumi, Wataru Kuwayama
  • Patent number: 5001829
    Abstract: A Leadless Chip Carrier (LCC) is mounted on a circuit board on elongated solder posts to provide clearance between the LCC and the board. The process for producing solder posts involves the deposition of a temporary stencil surrounding the conductive pads on the board. The removable stencil around the pads provides support for molten solder during reflow and prevents the chip carrier from compressing the molten solder thereby insuring desirable spacing between the chip carrier and the board.
    Type: Grant
    Filed: January 2, 1990
    Date of Patent: March 26, 1991
    Assignee: General Electric Company
    Inventor: Robert L. Schelhorn
  • Patent number: 4991285
    Abstract: A multi-layer board is fabricated by plating up conductive posts on a nonconductive layer. The tops of the posts are planarized, resulting in sharp corners. The posts are aligned with a template, which has a hole above each post, and a second nonconductive layer is placed between the top of the posts and the bottom of the template. The two layers are laminated together by compressing the second layer between the first layer and the template, and the posts punch through the second layer. Conductive traces may then be etched or deposited between the posts tops, and the process may be repeated as many times as desired.
    Type: Grant
    Filed: November 17, 1989
    Date of Patent: February 12, 1991
    Assignee: Rockwell International Corporation
    Inventors: Joseph M. Shaheen, John Simone
  • Patent number: 4991286
    Abstract: A method of replacing a defective electronic component having a plurality of electrical leads bonded to electrical contacts on a support by cutting leads adjacent the bond site, rebonding the stubs to the contacts, replacing the defective component and bonding the leads of the replacement component to the electrical contacts. Preferably, the leads are cut simultaneously with the rebonding of the stubs. The leads may be bonded to the top of the stub or to the side of the stub. A bonding tool is provided for simultaneously cutting a lead and rebonding the resultant stub.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: February 12, 1991
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Alexander J. Russo, Daniel M. Andrews, Gregory E. Pitts
  • Patent number: 4982495
    Abstract: A process for producing a cheap carrier tape of a two layer structure having a superior heat resistance, difficultly susceptible of effect of impurities and having a superior flexibility is provided, which process comprising the following steps: coating a polyimide varnish onto a continuous, electrically-conductive metal foil and baking it; punching the resulting tape of a two layer structure of the metal foil and the polyimide film to form sprocket holes; cutting and removing the polyimide film to form a device hole; coating a resist onto the metal foil surface; light-exposing the resulting resist by the medium of a mask for separating a circuit pattern and a circuit from the sprocket parts; developing the resulting resist and etching the metal foil by the medium of a mask of the resist; removing the resist; and plating the metal foil.
    Type: Grant
    Filed: November 17, 1989
    Date of Patent: January 8, 1991
    Assignee: Chisso Corporation
    Inventors: Masamitsu Okamoto, Masami Wada, Hidenori Funikawa, Haruo Kato, Hideaki Shouji
  • Patent number: 4977009
    Abstract: This invention is directed to composite coating for maintaining low moisture levels at the surface of solid substrates. One embodiment of the invention comprises a coating having a desiccant layer between layers of the same or different elastomeric polymers. Another embodiment comprises a layer of elastomeric polymer covered with a layer of an elastomeric polymer/desiccant mixture. The composite coating may be applied to integrated circuits to prevent corrosion thereof.
    Type: Grant
    Filed: March 6, 1990
    Date of Patent: December 11, 1990
    Assignee: Ford Motor Company
    Inventors: James E. Anderson, Vlado Markovac, Philip R. Troyk
  • Patent number: 4974057
    Abstract: A semiconductor device package having a semiconductor element of elements sealed in resin wherein a plurality of resin types different in function are used for sealing in which the more expensive resins are selectively used in forming thin covering layers for the semiconductor element and other components of the device, and the less expensive resin is used in a larger amount as an outer cover of a molded package. In another aspect of the semiconductor device package, bonding pads are provided at least in the active region of the semiconductor element or elements for wireless bonding of the semiconductor element to a circuit board. A stacked type semiconductor device package is also proposed wherein a plurality of semiconductor devices are stacked one atop the other, at least one of which has outer leads of longer length than the outer leads of the other semiconductor devices.
    Type: Grant
    Filed: January 9, 1989
    Date of Patent: November 27, 1990
    Assignee: Texas Instruments Incorporated
    Inventor: Akira Tazima
  • Patent number: 4959505
    Abstract: At two large opposite end faces a component composed of a wafer-shaped or lamina-shaped body (1) has coatings (2, 3) and ribbon-shaped terminal elements (5, 6) and is pressure-coated with a lamina-shaped or cuboid insulating coat (7). The terminal elements (5, 6) of the component are conducted toward the outside through the insulating coat (7) at the level of the end faces of the body (1) without being bent off, the upper terminal element (5) is bent off in a downward direction and is then bent over onto the underside (19) of the insulating coat, and the lower terminal element (6) is first bent off in an upward direction, and is then arranged at the surface of the insulating coat (7) at the level of the exit location of the first terminal element (5), is then bent over by 180.degree. at this level and, lying against the terminal element (6), is bent down under the underside (19) of the insulating coat (7).
    Type: Grant
    Filed: January 27, 1989
    Date of Patent: September 25, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventor: Guenter Ott
  • Patent number: 4956561
    Abstract: An electrical connector for use in a vehicular smart power multiplexing network is disclosed. Smart power connectors provide for connections between the power network and the various peripheral devices and components in a vehicle. The connector is comprised of two body portions which are electrically coupled when closed. The first body portion includes three connectors for electrical connection to the power network and the peripheral devices and components. The second body portion includes the smart power circuit and heat sink for dissipating heat generated by the power stage components. The smart power connector also has diagnostic capabilities for detecting device and component load failures.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: September 11, 1990
    Assignee: Caterpillar Inc.
    Inventor: Antanios B. Tamer
  • Patent number: 4944401
    Abstract: A crash survivable enclosure for flight data recorders used in aircraft and other vehicles operating over land and water includes a strong, light-weight metal shell for enclosing and protecting an information storage device having power, signal, and address lines connected thereto. The memory device is supported inside the shell in a wax filler of the type having a high melting temperature and a high heat of fusion to act as a heat sink for absorbing a large quantity of heat to minimize possible damage to the memory device because of excessive heat, flames and/or high temperature. A strong lightweight metal shell is provided to enclose and protect the inner shell and contents against substantial, external mechanical forces commonly occurring in a crash and flames, heat and fire resulting therefrom.
    Type: Grant
    Filed: September 28, 1989
    Date of Patent: July 31, 1990
    Assignee: Sundstrand Data Control, Inc.
    Inventor: Johannes B. Groenewegen
  • Patent number: 4943464
    Abstract: The disclosure relates to memory cards having an electronic component housed in a cavity. The electronic support has a first base made of silicon, with a small thickness (between 50 and 100 microns) and a thicker (between 200 and 300 microns) second base, which is deposited on the first base and is formed by a material which is harder than silicon, such as cobalt, vanadium, titanium or ceramic.
    Type: Grant
    Filed: December 1, 1988
    Date of Patent: July 24, 1990
    Assignee: SGS-Thomson Microelectronics SA
    Inventors: Jean-Pierre Gloton, Philippe Peres
  • Patent number: 4942140
    Abstract: In a method of packaging a semiconductor device, the semiconductor device and a mounting body are positioned in such a manner that electrodes of the semiconductor device and leads of the mounting body are brought into slidable mechanical contact with each other, the electrodes being not bonded to the leads. Next, an insulating resin that shrinks on setting is supplied in such a manner that the contacted portions of the electrodes and the leads are covered. Subsequently, the resin is set while keeping the electrodes and the leads in contact with each other to bond the electrodes to the leads whereby the resin, when set, applies a compressive force between the electrodes and the leads.
    Type: Grant
    Filed: June 9, 1989
    Date of Patent: July 17, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideaki Ootsuki, Mitsuyuki Takada, Toru Kokogawa, Hayato Takasago
  • Patent number: 4935581
    Abstract: In a method of forming a protective cover of a pin grid array in which a semiconductor chip is mounted on an upper surface of a resin board having a plurality of contact pins on a lower surface thereof, the pin grid array is inserted in a recess of a lower mold so as to be at a level lower than an upper surface of the lower mold and to leave a space therearound, the lower mold having the recess for receiving the resin board, grooves, formed on a bottom of the recess, for receiving the contact pins, and projections, formed on a peripheral portion of the recess, for abutting against part of side surfaces of the resin board. An upper mold is then placed above the upper surface of the lower mold. Finally, a thermosetting resin is injected in a gap defined between the upper and lower molds, thereby performing transfer molding. A pin grid array manufactured by the above method is also disclosed.
    Type: Grant
    Filed: November 29, 1988
    Date of Patent: June 19, 1990
    Assignee: Citizen Watch Co., Ltd.
    Inventor: Kathuzi Komathu
  • Patent number: 4935165
    Abstract: The poor electrical conduction at an electrical switch contact caused by organopolysiloxane gas can be prevented by providing that a nitrogenous base gas be simultaneously present with the organopolysiloxane gas. Nitrogeneous base gases can be aliphatic amines or aromatic amines.
    Type: Grant
    Filed: October 30, 1987
    Date of Patent: June 19, 1990
    Assignee: Toray Silicone Company, Ltd.
    Inventors: Hiroyuki Asai, Katsutoshi Mine, Hiroshi Matsuoka
  • Patent number: 4933744
    Abstract: Resin encapsulated electronic devices are provided by encapsulating so-called flat-shaped, plate-like, or angular-shaped electronic devices with a resin composition containing rubber-like particles preferably having an average particle size of 150 .mu.m or less. In the course of production of said resin encapsulated electronic devices, no crack is produced in the electronic devices by the stress from the outside, and after production, said resin encapsulated electronic devices are amazingly lessened in formation of cracks by thermal stress and have high reliability.
    Type: Grant
    Filed: February 1, 1988
    Date of Patent: June 12, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Tadanori Segawa, Hiroshi Suzuki, Masahiro Kitamura, Shunichi Numata, Kunihiko Nishi
  • Patent number: 4924351
    Abstract: A packaged semiconductor device having a semiconductor chip mounted on a bed part, a first molded layer which seals the bed part and the semiconductor chip such that the back of the bed part is exposed, a heat sink under the exposed back of the bed part and with a prescribed distance between it and the back of the bed part a second molded layer which is formed such that it covers the outside of the heat sink and the first molded layer, and also fills the gap between the exposed surface of the bed part and the heat sink, and leads which are disposed such that they pass through the second molded layer and their ends are in the first molded layer, and which are connected via bonding wires to the internal terminals of the semiconductor chip.
    Type: Grant
    Filed: April 10, 1989
    Date of Patent: May 8, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihiro Kato, Shinjiro Kojima, Takao Emoto, Hiroshi Matsumoto
  • Patent number: 4920404
    Abstract: A light-emitting diode is mounted in the bottom of a cavity in a metal lead and the assembly is potted in a transparent plastic material. The walls of the cavity surround the sides of the light-emitting diode in sufficiently close proximity to effectively shield the light-emitting diode from thermal expansion stresses from the plastic potting material which would induce light output degradation. Such a cavity may be a right-circular cylinder with a diameter less than 75 micrometers greater than the largest transverse dimension of the light-emitting diode. The front face of the light-emitting diode may be flush or beneath the face of the metal lead for minimizing stress. The cavity may be deep enough that the front face of the light-emitting diode is closer to the bottom of the cavity than to its open end. The front face may protrude beyond the open end of the cavity and be surrounded by a reflective surface. The edges of the front face of the light-emitting diode may be beveled for minimizing stress.
    Type: Grant
    Filed: May 12, 1989
    Date of Patent: April 24, 1990
    Assignee: Hewlett-Packard Company
    Inventors: Dinesh C. Shrimali, Frank M. Steranka, Cheryl L. McLeod
  • Patent number: 4916174
    Abstract: A rubber-modified phenolic resin composition contains a novolak-type phenolic resin in which at least one modifying agent selected from the group consisting of an ABS resin and an MBS resin is homogeneously dispersed. The composition has good impact resistance and thermal shock resistance. The composition is prepared by adding at least one modifying agent described above to a novolak-type phenolic resin which is heated and melted at its softening point or more, so that the modifying agent is homogeneous dispersed in the resin. The resin composition is suitably used as a curing agent for an epoxy resin encapsulant for sealing electronic devices.
    Type: Grant
    Filed: September 13, 1988
    Date of Patent: April 10, 1990
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Chemical Corporation
    Inventors: Akira Yoshizumi, Shinetsu Fujieda, Ken Uchida, Naoko Kihara, Kazuhiro Sawai, Tsutomu Nagata, Shinji Murakami, Shigeyuki Kouchiyama
  • Patent number: 4908935
    Abstract: In a hybrid integrated circuit encapsulation process, each lead array (14) is encompassed by an elongated C-shaped barrier member (17) which clamps onto the portions of the lead array adjacent the substrate (11); that is, opposite sides of a slot (18) in the barrier member grasp opposite sides of the leads. Thereafter, the uncured RTV silicone (15) is dispensed onto the substrate, flows over and encompasses chips (12) mounted on the surface of the substrate and is prevented from flowing along the leads (14) by the C-shaped members (17), each of which, due to its configuration, constitutes a barrier to fluid flow, either along the length of the various leads or over the top of the C-shaped member. In one embodiment, levers (19) may be integrated onto the C-shaped member opposite the substrate to aid in prying open the slot to permit the leads to be easily inserted into the C-shaped member.
    Type: Grant
    Filed: March 22, 1989
    Date of Patent: March 20, 1990
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Brent J. Blumenstock
  • Patent number: 4908086
    Abstract: An adhesive composition for attaching semiconductor die to a substate of a semiconductor device package includes a crosslinkable resinous polyimide, and an aminosilane cross-linking agent. For applications where backside contact to the semiconductor die is desired, the composition also contains finely divided conductive metal, such as silver flakes. When used in a novel process in which the adhesive composition is placed on the semiconductor device substrate prior to gelling, outgassed, a semiconductor die is placed on the outgassed composition, and the composition cured, the resulting semiconductor device package meets military specifications with a substantial cost reduction.
    Type: Grant
    Filed: June 24, 1985
    Date of Patent: March 13, 1990
    Assignee: National Semiconductor Corporation
    Inventors: Gary B. Goodrich, Jadish G. Belani
  • Patent number: 4903119
    Abstract: A semi-conductor device in which a semi-conductor element is sealed with a molding resin is disclosed. In the device, adhesion between a semi-conductor chip and the molding resin is achieved mainly by oxygen-crosslinking between silicon in the semi-conductor chip and silicon in the molding resin. The device exhibits excellent moisture-resistant reliability even after mounting.
    Type: Grant
    Filed: March 27, 1989
    Date of Patent: February 20, 1990
    Assignee: Nitto Electric Industrial Co., Ltd.
    Inventors: Satoshi Ito, Akiko Kitayama, Takatoshi Hamada, Miho Yamaguchi
  • Patent number: 4899257
    Abstract: An electric device with an operation indicating light has a base and a case transversely divisible in a main frame and a case cover. The main frame is fitted to the base at one open end of the frame. A resin material is injected into the space provided by the base and the main frame. The case cover is fitted to the other open end of the main frame so that an operating indicating lamp can be seen through an indicating hole in the case cover. Thus, the device can be easily assembled, and the resin material does not leak from the gap between the operation indicating lamp and the indicating hole. Cracks are prevented from developing in the solder connecting the lamp to the circuit board. In addition, the lamp can be positioned at a high precision because no packing is required to prevent resin leakage.
    Type: Grant
    Filed: April 4, 1989
    Date of Patent: February 6, 1990
    Assignee: Omron Tateisi Electronics Co.
    Inventor: Masato Yamamoto
  • Patent number: 4895998
    Abstract: An encapsulated capacitor assembly for mounting onto the housing of an electric motor. The assembly (10) includes a capacitor (11) having a casing and conductor terminals (12) extending from the casing. A unitary housing (14) is provided to fully encapsulate the casing of said capacitor (11). Electrical access is provided to the terminals (14) when the capacitor (11) is fully encapsulated within the housing (14). A method for making the encapsulated capacitor assembly also is provided.
    Type: Grant
    Filed: August 15, 1988
    Date of Patent: January 23, 1990
    Assignee: McNeil (Ohio) Corporation
    Inventor: Jack T. Bevington
  • Patent number: 4893107
    Abstract: An improved electrical fuse having axial leads (5) and comprising a fuse wire in a cylindrical sleeve (2) supported at its ends by lead carrying end caps (3) is coated over the length of the fuse body by an insulating layer of thermo-plastic (7). Improved humidity resistance and mechanical strength are achieved and control of coating thickness is improved. Use of hot plastic for the insulating layer (7) reflows solder joint (4) reducing instances of open or high resistance fuses which must be rejected. Also, the I.sup.2 t performance is significantly improved over other adherent coatings.
    Type: Grant
    Filed: December 30, 1987
    Date of Patent: January 9, 1990
    Assignee: Cooper Industries, Inc.
    Inventor: John M. Moner
  • Patent number: 4891734
    Abstract: An elastomeric body encapsulates an electronic assembly, to be protected from vibration on shock, and is confined in a closed cavity of a structure subject to the vibration and shock. The body is cast in a separate mold having a cavity corresponding in shape and size to the closed cavity. The surface of the mold has projections to form indentations in the surface of the body. With the body in the closed cavities, the indentations are effectively voids and accept elastomeric material displaced from the body when the body expands relative to the cavity.The preferred embodiment provides a strongback support with open cavities, each to receive a body. The strongback is inserted into a tube to complete the structure and close the open cavities. The strongback has wiring chambers to accept flexible leads connected to each body, and channels into which wire is potted, to extend from the leads to external circuitry.
    Type: Grant
    Filed: June 15, 1988
    Date of Patent: January 2, 1990
    Assignee: Quantum Solutions, Inc.
    Inventors: Henry S. More, John L. Marsh
  • Patent number: 4888227
    Abstract: Zinc titanate is used in poly(arylene sulfide) compositions to improve encapsulation properties. Electronic components are encapsulated with poly(arylene sulfide) compositions containing zinc titanate.
    Type: Grant
    Filed: September 19, 1988
    Date of Patent: December 19, 1989
    Assignee: Phillips Petroleum Company
    Inventors: Robert J. Martinovich, John E. Leland
  • Patent number: 4888307
    Abstract: A method for correctly positioning a metallic plate supporting a semiconductor chip in a mold used for encapsulation, wherein according to a first solution, at least a pair of retractable locating pins are utilized together with a lead connected to the supporting plate. The ends of the locating pins are retracted in the final phase of encapsulation, from the surfaces of the plate, whereas in the initial phase they are in direct contact with the surfaces. According to a second solution, a pair of clamping pins are indirectly connected to the plate through the interposition of insulating thicknessings.
    Type: Grant
    Filed: August 27, 1987
    Date of Patent: December 19, 1989
    Assignee: SGS Microelettronica S.p.A.
    Inventors: Antonio P. Spairisano, Marino Cellai
  • Patent number: 4866841
    Abstract: An integrated circuit chip carrier with pin grid array is provided with at least two layers of plastics material on the upper of which is provided a central chip location area and a series of metallized areas provided by printed circuit board methods to a series of metallized holes disposed inwardly of the edges of the carrier, a wall of plastics material being disposed round the edges of said upper layer to form a central cavity, the lower layer of plastics material bonded to said upper layer having a series of openings for a pin grid array and an intermediate metallized printed circuit layer disposed between said upper and lower layers to provide electrical conductive paths from the metallized holes to the openings and pins extending downwardly from said lower layer with heads mounted in said openings said array of pins being capable of being across the entire under surface of the carrier. The structure provides superior arrays of pins and similar techniques for construction.
    Type: Grant
    Filed: September 15, 1988
    Date of Patent: September 19, 1989
    Assignee: Advanced Semiconductor Packages Ltd.
    Inventor: John B. Hubbard
  • Patent number: 4866566
    Abstract: A capacitor network mounted to an input-output unit of a computer for eliminating noises, which disposes on one surface of a dielectric substrate a plurality of electrodes and on the other surface of the same at least one common electrode opposite to the plurality of electrodes so that lead terminals connected to each of the plurality of electrodes and earth terminals connected to the common electrode are formed of metal strip.A pair of terminal blocks formed of the metal strip are inserted onto the dielectric substrate from both lateral sides thereof so as to hold the dielectric substrate between the lead terminals and the earth terminals, each terminal being fixed to the respective electrode, and thereafter the metal strip is cut off, thereby forming a three-terminal capacitor leading out the terminal from each electrode.
    Type: Grant
    Filed: August 5, 1988
    Date of Patent: September 12, 1989
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Katsumi Nishiyama
  • Patent number: 4864470
    Abstract: A surface acoustic wave (SAW) device is mounteed in such a manner that its functional surface faces a base plate and a space is formed therebetween to avoid inferiority in device characteristics. Electrodes of the SAW device and bumps formed on electrodes at predetermined positions of the base plate are connected to each other by applying pressure and heat to secure electrical continuity. A peripheral surface of the SAW device is bonded to the base plate by an adhesive to seal the functional surface of the SAW device.
    Type: Grant
    Filed: August 18, 1988
    Date of Patent: September 5, 1989
    Assignees: Pioneer Electronic Corporation, Pioneer Video Corporation
    Inventor: Takashi Nishio
  • Patent number: 4862246
    Abstract: Those portions (i.e., the inner lead portions) of the leads of a semiconductor device, which are sealed by a package, are formed with a plurality of depression in at least the surfaces and backs thereof such that the depressions have a smaller diameter at their bottoms than at their surfaces. As a result, both the adhesion strength between a sealer as the package and the inner lead portions of the leads and the mechanical strength of the leads are improved even in a semiconductor device having numerous leads. Moreover, the inner lead portions can be formed in their sides with a number of notches, which can be combined with those depressions to better improve the adhesion strength between the sealant and the inner lead portions of the leads and the mechanical strength of the leads.
    Type: Grant
    Filed: February 24, 1988
    Date of Patent: August 29, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Masachika Masuda, Akira Suzuki
  • Patent number: 4857940
    Abstract: A molded article containing an electrical element buried therein has at least two leads, and portions of the leads are left exposed. The article is improved in that all of the leads are left confined within the confines of the article, the exposed portions of the leads being disposed within at least one aperture through the article.Also a molding process for making the article useful as a catcher plate for an ink jet printer. Broadly, the process comprises the steps of placing the portions of the leads to be exposed, each in a groove in a post that is part of the mold, and closing the mold cavity with a closure plate containing an elastomeric material aligned with the post and leads, such elastomeric material having a coefficient of thermal expansion that is greater than that of the material used to make the mold.
    Type: Grant
    Filed: August 31, 1987
    Date of Patent: August 15, 1989
    Assignee: Eastman Kodak Company
    Inventor: John E. Rueping
  • Patent number: 4855868
    Abstract: A packaging arrangement for energy dissipating devices includes thermal elements adjacent first and second sides of the device, and a heat-flow modifier adjacent the thermal element for regulating the flow of heat therefrom. A plurality of electrically conductive leads extend from the device to the exterior of the packaging arrangement. Portions of the electrically conductive leads extend between the thermal elements and are in thermal contact with at least one of these elements. The leads are electrically isolated from the thermal elements and a seal is maintained between the leads and the elements. An outer casing surrounds the thermal elements, and the plurality of leads extend through the outer casing to provide for connecting the device to the environment. A seal is also maintained between the outer casing and the leads. The outer casing is formed from premolded thermoplastic base and cap sections.
    Type: Grant
    Filed: July 20, 1987
    Date of Patent: August 8, 1989
    Inventor: Ade'yemi S. K. Harding
  • Patent number: RE33754
    Abstract: A grease compatible cyclic olefin extended polyurethane comprising the reaction product of an isocyanate terminated polyisocyanate with a polyol in the presence of a cyclic olefin extender and, a plasticizer having a total solubility parameter of .[.between about 8.3 and 8.9 or.]. about 9.1 and 9.7. Certain extended polyurethanes are characterized as being reenterable, such that they can be used for repairing, encapsulation or reclaiming electrical or telephone cables. Alternate formulations can be used as hard volume encapsulants for general elastomer use.
    Type: Grant
    Filed: April 20, 1990
    Date of Patent: November 26, 1991
    Assignee: CasChem, Inc.
    Inventors: Melvin Brauer, William J. Downey, Frank C. Naughton, Jerry C. Chao