Vent, Inlet Or Exit Patents (Class 174/522)
  • Patent number: 5262925
    Abstract: The invention is embodied in a TAB frame with wide spaced area array contacts. The area array contacts serve to transform the narrow pitch contacts which connect to a chip mounted on the tab frame into wide spaced TAB edge contacts. These area array contacts allow for the convenient connection of the TAB frame to a printed circuit board and eliminate the need for fine line printed circuit board technology to support the TAB assembly.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: November 16, 1993
    Assignee: Hewlett-Packard Company
    Inventors: Farid Matta, Kevin Douglas, Rajendra D. Pendse, Brahram Afshari, Kenneth D. Scholz
  • Patent number: 5253415
    Abstract: A lead assembly and method for forming electrical connections between pads on an integrated circuit chip and pads on a circuit board includes small diameter wires adhesively bonded to a supporting tape. The wires may be inwardly fanned to form connections between relatively widely spaced circuit board pads and relatively closely spaced chip pads.
    Type: Grant
    Filed: September 14, 1992
    Date of Patent: October 19, 1993
    Assignee: Die Tech, Inc.
    Inventor: Richard K. Dennis
  • Patent number: 5254807
    Abstract: An RPM sensor for anti-lock and/or traction control systems of motor vehicles or for engine speed governing or gasoline or Diesel injection control. The RPM sensor has a housing, receiving electrical components, with a first housing part of plastic that is at least partly enveloped by a second housing part, produced in an injection molding process, likewise from plastic. To attain a moisture-proof, material bond between the two housing parts, a melting element of a plastic having a lower melting point than that of the plastic of the housing parts is disposed in a contact zone between the two housing parts. When the second housing part is formed, the melting element is heated above its melting point, and a material bond of the two housing parts is attained which protects the RPM sensor against moisture dirt, stress, etc.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: October 19, 1993
    Assignee: Robert Bosch GmbH
    Inventors: Werner Pfander, Kristian Leo, Klaus Heyer, Uwe Kohler, Hans-Jurgen Herderich
  • Patent number: 5255157
    Abstract: A plastic pin grid array package is detailed. Where the semiconductor device is mounted within a cavity in the printed wiring board, it is surrounded by a ring of holes that extend completely through the board. When the plastic housing is transfer molded around the face of the board, plastic will enter the holes thereby forming plastic pillars that lock the encapsulant to the board mechanically. When the package is flexed, the pillars will prevent any motion between the encapsulant and the board or the semiconductor device mounted thereupon. The invention can be applied to single or multichip packages. It can be employed in any package that is based upon a printed wiring board substrate.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: October 19, 1993
    Assignee: National Semiconductor Corporation
    Inventor: Uli Hegel
  • Patent number: 5252858
    Abstract: Disclosed is a refractory covercoat composition useful in making two-sided circuitries. The refractory composition contains glass frit, and an inorganic binder including at least one selected from the group consisting of ZrO.sub.2, Al.sub.2 O.sub.3, SiO.sub.2, BaO, CaO, MgO and La.sub.2 O.sub.3. The refractory covercoat has an elevated softening point so that the covercoat protects a printed conductor circuit from damage due to contact with a firing furnace conveyor belt.
    Type: Grant
    Filed: November 18, 1991
    Date of Patent: October 12, 1993
    Assignee: Delco Electronics Corporation
    Inventors: Carl W. Berlin, John K. Isenberg
  • Patent number: 5252783
    Abstract: A semiconductor package is provided having a die attach flag (12) with integral flanges (13) which prevent high pressure plastic encapsulant (18) from escaping or entering between the die attach flag (12) and a mold cavity plate (15) during encapsulation. The die attach flag (12) is held flush against the cavity plate (15) by the packing pressure of the encapsulant (18) during low pressure stages of the encapsulation process. Plastic flowing along the flange (13) solidifies more rapidly than plastic in the body of the semiconductor package, thereby damming plastic flow at the edges of the die attach flag (12) during high pressure stages of the encapsulation process.
    Type: Grant
    Filed: February 10, 1992
    Date of Patent: October 12, 1993
    Assignee: Motorola, Inc.
    Inventor: John Baird
  • Patent number: 5249101
    Abstract: A chip carrier is disclosed which includes a chip carrier substrate and at least one semiconductor chip mounted in a flip chip configuration, via solder balls, on a circuitized surface of the chip carrier substrate. The solder balls are encapsulated in a first encapsulant having a composition which includes an epoxy. In addition, at least a portion of the circuitry on the circuitized surface is encapsulated in a second encapsulant having a composition which includes a urethane, and which composition is chosen so that the second encapsulant exhibits a modulus of elasticity which is equal to or less than about 10,000 psi. As a consequence, the second encapsulant exhibits neither internal cracks, nor interfacial cracks at the interface with the first encapsulant, nor does the second encapsulant delaminate from the circuitized surface, when the chip carrier is thermally cycled.
    Type: Grant
    Filed: July 6, 1992
    Date of Patent: September 28, 1993
    Assignee: International Business Machines Corporation
    Inventors: Brenda D. Frey, Charles A. Joseph, Francis J. Olshefski, James W. Wilson
  • Patent number: 5243132
    Abstract: The drain hole core for a drain seal fitting includes an elongated elastomeric member having a handle on one end, a rod-like member on the other end, and a integral plug between the handle and rod-like member. The drain hole core is inserted into the drain opening of the drain seal fitting such that the rod-like member extends up into the bore extending through the drain seal fitting and the plug seals the drain opening. A dam seals that area between the electrical wiring and the internal circumferential wall of the lower portion of the drain seal fitting. A sealing compound is then poured into an access opening in the side of the drain seal fitting so as to seal the bore of the drain seal fitting and to cover a portion of the rod-like member. Once the rod-like member is removed, it acts as a mold and provides a drain path from that portion of the bore above the sealing compound to the drain opening. The drain opening is then closed with a drain fitting.
    Type: Grant
    Filed: January 17, 1992
    Date of Patent: September 7, 1993
    Assignee: Cooper Industries, Inc.
    Inventor: Garrett S. Yarbrough
  • Patent number: 5243133
    Abstract: A ceramic chip carrier is disclosed which includes a ceramic substrate having a circuitized surface, at least one semiconductor chip mounted on the circuitized surface, and a lead frame or edge clip which is mechanically and electrically connected to contact pads on the circuitized surface. Each mechanical/electrical connection between the lead frame or edge clip and the contact pads includes a conventional solder connection. In addition, each such solder connection is at least partially encapsulated in a material, including an epoxy resin, which is chosen in relation to the solder connection to enable the solder connection to withstand a standard thermal fatigue test.
    Type: Grant
    Filed: February 18, 1992
    Date of Patent: September 7, 1993
    Assignee: International Business Machines, Inc.
    Inventors: Stephen R. Engle, Scott P. Moore, Mukund K. Saraiya
  • Patent number: 5241454
    Abstract: An electronic package which includes a rigid first substrate (e.g., ceramic) having a plurality of conductive pins spacedly located therein. These pins each include one end portion extending below an undersurface of the substrate for positioning and electrically coupling within a second substrate (e.g., printed circuit board), while also including an opposite end portion which projects from an opposite, upper surface of the first substrate. These upwardly projecting end portions are designed for accommodating, in stacked orientation, a plurality of thin film, flexible circuitized substrates thereon, each of these substrates being electrically coupled to a respective pin, if desired, using a solder composition.
    Type: Grant
    Filed: January 22, 1992
    Date of Patent: August 31, 1993
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Ameen, Joseph Funari, David W. Sissenstein, Jr.
  • Patent number: 5241133
    Abstract: A leadless pad array chip carrier package is disclosed, employing a printed circuit board (22) having an array of solder pads (34) on the bottom side. A semiconductor device (24) is electrically wire bonded (49) and attached with conductive adhesive (47) to the metallization patterns (43, 25) of the printed circuit board (22). A protective plastic cover (26) is transfer molded about the semiconductor device (24) covering substantially all of the top side of the printed circuit board (22).
    Type: Grant
    Filed: November 16, 1992
    Date of Patent: August 31, 1993
    Assignee: Motorola, Inc.
    Inventors: William B. Mullen, III, Glenn F. Urbish, Bruce J. Freyman
  • Patent number: 5235496
    Abstract: The device comprises at least one printed circuit board (11,12) on which is fixed a heightening board (15) comprising at least one opening (16) for forming with the surface of the printed circuit board (12) located in facing relation to the opening, the bottom and the lateral walls of a cavity (17) for at least one integrated circuit (18) connected with the printed circuit carried by the board defining the bottom of the cavity by means of conductive wires (19). The cavity containing the integrated circuit is filled with a resin (22) completely covering the integrated circuit. The printed circuit board (11,12) is cut on its periphery along a line of through holes (23) provided with a metal coating (24) and connected to printed conductors of the board, metallized grooves (23,24) resulting from the cutting constituting connection terminals of the device.
    Type: Grant
    Filed: April 15, 1992
    Date of Patent: August 10, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Michel Chomette, Robert J. Mathews
  • Patent number: 5233130
    Abstract: A semiconductor device such as a semiconductor memory has a semiconductor chip bonded to an upper surface of a lead frame die pad, a polyimide film bonded to the upper surface of the semiconductor chip, and a quartz plate having a recess defined in a lower surface thereof, the quartz plate being bonded to an upper surface of the polyimide film with the recess being positioned over the integrated circuit of the semiconductor chip. The recess provides a gap between the polyimide film and the quartz plate for absorbing compressive stresses applied to the semiconductor device. The polyimide film, rather than the quartz plate, may have the recess. A plurality of leads are connected to the electrodes of the semiconductor chip by connecting wires. The lead frame, the semiconductor chip, the polyimide film, the quartz plate, the leads, and the connecting wires are sealed in a resin case.
    Type: Grant
    Filed: September 23, 1992
    Date of Patent: August 3, 1993
    Assignee: Sony Corporation
    Inventor: Tomoki Nishino
  • Patent number: 5224021
    Abstract: A surface-mount network device which is to be mounted on a mounting substrate is disclosed. This device has an insulating substrate having wirings and passive elements. A plurality of lead terminals sandwich the insulating substrate from an end face of the insulating substrate. Terminal connection conductors are formed on the main surfaces of the insulating substrate and connect the lead terminals and at least one of the wirings and the passive elements. Sealing material cover at least connecting portions between the terminal connection conductors and the lead terminals. End portions of the lead terminals are bent to extend in a direction substantially parallel to the mounting substrate. This device is to be mounted vertically on the mounting substrate through the bent end portions of the lead terminals.
    Type: Grant
    Filed: October 19, 1990
    Date of Patent: June 29, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kinji Takada, Kazuo Oishi, Syozo Yamashita, Koji Nishida
  • Patent number: 5223739
    Abstract: A plastic molded semiconductor device having a semiconductor chip mounted on a die pad supported by hanging pins. The semiconductor chip is encapsulated by mold plastic where the semiconductor chip has a lead portion protruding to a side, and in which practically the entire periphery of the semiconductor chip is covered by aluminum or some other moistureproof material that stops the entry of moisture.
    Type: Grant
    Filed: September 13, 1990
    Date of Patent: June 29, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akio Katsumata, Seiichi Hirata, Shinetsu Fujieda, Hiroshi Shimozawa
  • Patent number: 5221812
    Abstract: After a semiconductor die is placed onto a leadframe and electrically connected to the die, the die and the ends of the leads adjacent to the die are encased in a packaged body. The exposed ends of the leads are trimmed so that the leads are of desired lengths for leadforming, or for connection to substrates or sockets. The ends of the leads are enclosed in a protective body, so that when the package is tested and handled, the protective body reduces undesirable bending of the leads. By trimming the leads before forming the protective body, the leadframe used need, not be larger than those normally used.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: June 22, 1993
    Assignee: VLSI Technology, Inc.
    Inventor: Jon M. Long
  • Patent number: 5221859
    Abstract: A lead frame of a plastic encapsulated type semiconductor device is provided with a coating film which has a solderability higher than a solderability of a basic metal of the lead frame, and the coating film has a corrosion potential higher than a corrosion potential of the basic metal. The coating film protects the basic metal from corrosion caused by the plastic encapsulated member. The coating film of the lead frame made of a Fe-Ni alloy is an alloy comprising metal selected from Mo, W, Au, Cr, Cu, metals of the platinum group and a metal selected from Fe, Co, and Ni.
    Type: Grant
    Filed: February 26, 1991
    Date of Patent: June 22, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Shiro Kobayashi, Narutoshi Kazama, Masahiko Itoh, Noriyuki Ohnaka
  • Patent number: 5220489
    Abstract: An electronic package, comprising a circuit carrying substrate (30) and a semiconductor device (35). The substrate (30) has two opposing surfaces, the first or bottom surface having a plurality of solder pads (31) and the second or top surface having a circuitry pattern defined on it. A semiconductor device (35) is attached to the top surface of the circuit carrying substrate (30). A molded body (33) is formed completely around the semiconductor device (35) in order to encapsulate it, the molded body also substantially covering the top surface of the circuit carrying substrate (30). A layer of metal deposited directly on the molded body and the top surface of the circuit carrying substrate is delineated into another conductive circuitry pattern (38), with part of the pattern (36) connected to the circuitry pattern on the circuit carrying substrate. An electronic component (32) is mounted on the molded body (33) and electrically connected to the conductive circuitry pattern (38).
    Type: Grant
    Filed: October 11, 1991
    Date of Patent: June 15, 1993
    Assignee: Motorola, Inc.
    Inventors: Joaquin Barreto, Juan O. Alfonso, Frank J. Juskey
  • Patent number: 5214845
    Abstract: This invention creates a high speed semiconductor interconnect system which contains a plurality of signal traces, each in a flexible printed circuit, and each adhesively sandwiched between or adjacent to a flexible ground circuit and a flexible power circuit. The signal, power and ground circuits are stacked in multilayers and are connected to respective lead fingers and respective die circuits by standard, known methods such as TAB or wire bond and encapsulated in a known way. The ground plane and power plane being adjacent to the signal plane reduces the power-ground loop inductance and thus reduces the package noise. By reducing the inductance, the circuit can have a shorter switching time. Also, by adding the ground plane, the power-ground capacitance is increased, which serves to reduce the effect of power supply fluctuations in the system.
    Type: Grant
    Filed: May 11, 1992
    Date of Patent: June 1, 1993
    Assignee: Micron Technology, Inc.
    Inventors: Jerrold L. King, Walter L. Moden, Chender Huang
  • Patent number: 5210375
    Abstract: The exposed portions of the leads of a semiconductor chip package are first bent in a forming process so that the ends of the leads are in proper positions to be attached to and electrically connected to contacts on a printed circuit board. Intermediate portions of the leads between the distal ends and the package body for connection to the printed circuit board and the package body are enclosed and fixed in position by a carrier body to hold the leads in position and to reduce the effects of any bending in destroying the coplanarity of the distal lead ends of the package. The package with the carrier body may be mounted onto the printed circuit board without first removing the carrier body. After the distal ends of the leads have been soldered to the printed circuit board, the carrier body is then removed.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: May 11, 1993
    Assignee: VLSI Technology, Inc.
    Inventor: Jon M. Long
  • Patent number: 5206794
    Abstract: A molded, plastic integrated circuit package is formed wherein a silicone compound is first applied over the exposed surface of the integrated circuit, its bonding wires, and portions of the lead frame including those portions where the bonding wires are attached. Following application of the silicone compound and before molding in plastic, the silicone compound is cured to set and harden the material. With the bonding wires and bonding points thus encapsulated by the silicone compound, the bonding wires are protected from lateral bending forces caused by viscous forces during the process of forming the molded plastic package, and from longitudinal expansion and contraction forces during thermal temperature cycling of the package.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: April 27, 1993
    Assignee: VLSI Technology, Inc.
    Inventor: Jon M. Long
  • Patent number: 5198962
    Abstract: A light assembly for outdoor purposes utilizing a supportive and corrosion protective housing allowing below grade placement. Individualized lamp and electrical component assemblies are separately sealed from water infiltration and are located within the housing with electrical connections provided by submersible rated cable and connectors. A potting material in the lamp assembly encapsulates the electrical wires which are further surrounded by a solid soldering compound barrier. A closure assembly separately seals the electrical components using a mounting base, a harness and a potting body which form one body through molding of the potting body about the remainder of the elements. A harness assembly wicking barrier is employed which further isolates the transformer from water infiltration. Bare metal strips forming conductors are encapsulated in the potting material. A face ring with slotted openings permits air flow and water entry into the housing for cooling the lamp assembly.
    Type: Grant
    Filed: February 11, 1991
    Date of Patent: March 30, 1993
    Inventor: Glenn M. Tyson
  • Patent number: 5196794
    Abstract: A Hall-effect sensor, wherein a Hall element is disposed in a magnetic path being formed by a magnet and a flux guide, and the magnet, flux guide, and Hall element are integrally held with a molded frame, and the Hall element is fixed to the magnet (or flux guide) or the molded frame. This Hall-effect sensor can easily position the Hall element with higher sensitivity.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: March 23, 1993
    Assignee: Mitsubishi Denki K.K.
    Inventor: Shigemi Murata
  • Patent number: 5196651
    Abstract: A package for the encapsulation of an electronic component (50) includes a bottom (40), lateral faces (41) positioned around a main axis of the package and an open face (42) opposite the bottom (40). Each lateral face (41) includes guides (48) for guiding connection wires (45) of the component (50). These guides (48) are distributed evenly around the main axis of the package. The sides of the bottom (40) are equal.
    Type: Grant
    Filed: November 30, 1990
    Date of Patent: March 23, 1993
    Assignee: Compagnie Europeenne de Composants Electroniques LCC
    Inventors: Michel Pageaud, Michel Dautriche
  • Patent number: 5192995
    Abstract: An improved electric device and manufacturing method for the same are described. The device is for example an IC chip clothed with moulding. In advance of the moulding process, the rear surface of lead frame of the IC chip is cleaned and coated with an antioxidation film made of silicon nitride in order to avoid the oxidation of the lead frame. The antioxidation film ensures the connection of the moulding and the lead frame and protect the IC chip from moisture invaded through cracks or gaps. The coating of silicon nitride is carried out after cleaning the lead frame.
    Type: Grant
    Filed: February 14, 1991
    Date of Patent: March 9, 1993
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunepi Yamazaki, Kazuo Urata, Itaru Koyama, Naoki Hirose
  • Patent number: 5187328
    Abstract: An environmentally sealed vehicular air bag sensor. The sensor employs a conventional ball and tube accelerometer which supplies an electrical signal when subjected to a deceleration of force equal to or greater than a preset limit. All of the electrical connections of the sensor are disposed in the interior thereof, and the interior is sealed from the operating environment of the vehicle, thus enhancing reliability and minimizing accidental damage thereto.
    Type: Grant
    Filed: November 28, 1990
    Date of Patent: February 16, 1993
    Assignee: Electro Wire Products, Inc.
    Inventors: James P. Burgess, Dewey Mobley, Al Vanderstuyf
  • Patent number: 5185498
    Abstract: An acceleration sensor is packaged in an open can and encapsulated in an elastomeric polybutadiene compound which maintains its mechanical properties over a range of -40.degree. C. to 105.degree. C. and transmits acceleration to the sensor with a unity transfer function. The encapsulation material comprises about 90 to 100 pbw of polyol and about 20 pbw of isocyanate, the polyol consisting of at least 70% of hydroxy-polybutadiene. For enhanced adhesion a foaming agent and/or an epoxy is added to the mixture.
    Type: Grant
    Filed: June 11, 1991
    Date of Patent: February 9, 1993
    Assignees: Delco Electronics Corporation, Hughes Aircraft Company
    Inventors: Henry M. Sanftleben, Ralph D. Hermansen, Gary R. Shelton, Petrina L. Schnabel, Dennis T. Baird, Douglas C. Smith
  • Patent number: 5184064
    Abstract: A totalizer and rate meter is totally enclosed within a permanently sealed, fluid tight body formed of a low cost, transparent epoxy material. The meter can be programmed in the field by means of an optical transmitter communicating with an optical receiver enclosed within the transparent body of the meter.
    Type: Grant
    Filed: March 25, 1991
    Date of Patent: February 2, 1993
    Assignee: Stewart & Stevenson Services, Inc.
    Inventors: Bruce A. Vicknair, Robert A. Baten
  • Patent number: 5182424
    Abstract: An induction heating module encapsulation apparatus and method for its use is disclosed. The apparatus comprises a substantially airtight chamber which is composed of ceramic or some other high temperature insulating material in which a cap and a ceramic substrate having semiconductor chips joined thereon are placed. A sealband of solder or other brazing material is placed at the periphery of the cap where the cap end substrate are to be joined. An RF coil, which serves as inductor in the apparatus, is energized by a high frequency generator, generating an electromagnetic field in the radio frequency spectrum. The RF coil is oriented to localize the inducted current at the periphery of the cap and the sealband. The inducted current is dissipated in the form of heat until the sealband is molten. The RF power is then turned off.
    Type: Grant
    Filed: October 31, 1989
    Date of Patent: January 26, 1993
    Inventor: Vlastimil Frank
  • Patent number: 5180513
    Abstract: A shielded plastic enclosure for housing electronic equipment is provided, on at least one interior surface thereof, with a layer of shielding composition which is a suspension of silver-coated magnetite particles in a U.V. cured cycloaliphatic epoxy resin. The layer of this shielding composition has a thickness sufficient to effectively shield against electromagnetic interference, radio frequency interference and electrostatic discharge.
    Type: Grant
    Filed: January 30, 1990
    Date of Patent: January 19, 1993
    Assignee: Key-Tech, Inc.
    Inventor: David Durand
  • Patent number: 5172302
    Abstract: An ignition coil unit comprising within an electrically insulating casing (31) an ignition coil (A) and a packaged power switch circuit (E). The packaged power switch circuit (E), which comprises a plurality of electric and electronic components (F) hermetically sealed within a mold resin (G) to form a single compact unitary piece, is disposed within a power switch cavity (31d) of the casing (31). An aluminum heat dissipating plate (30) may be attached at its first end (30a) to said packaged power switch circuit (E) in a thermally conductive relationship and exposed at its second end (30b) to the exterior of said casing (31).
    Type: Grant
    Filed: September 24, 1991
    Date of Patent: December 15, 1992
    Assignee: Mitsubishi Denki K.K.
    Inventors: Masaaki Taruya, Mitsuru Koiwa, Nobuyuki Sawazaki
  • Patent number: 5168422
    Abstract: A neon or luminous tube transformer is provided having a primary coil located between a pair of secondary coils. Each of the coils comprises a plurality of windings and is associated with a laminated magnetic core. A secondary terminal extends vertically from each secondary coil and is provided with a threaded upper end. The primary and secondary coils are disposed in a housing defining an enclosed first compartment and the compartment is filled with asphalt to a level so that only the upwardly projecting secondary terminals are exposed. A pair of primary input conductors are connected to the transformer primary coil and pass through one of the walls defining the first compartment into a smaller second compartment adjacent the first compartment. One wall of the second compartment is provided with a knockout to permit the conductors extending from a low voltage power supply to be connected to the primary input conductors within the housing thereby allowing the primary coil to be energized.
    Type: Grant
    Filed: May 6, 1991
    Date of Patent: December 1, 1992
    Assignee: Allanson, Division of Jannock Limited
    Inventor: Richard C. Duncan
  • Patent number: 5164884
    Abstract: The invention relates to a cooling construction for cooling a power transistor (4) having a plastic encapsulation, wherein the waste heat produced is conducted away mainly via the collector lead (6), the collector lead being connected to the collector strip (3) on the circuit board. When it is desired to conduct the produced waste heat specifically on the component side of the circuit board (1), it is possible to use a construction according to the invention in which there is placed on the circuit board (1) a highly heat conductive insulation plate (8) which covers the collector strip (3) entirely over part of its length next to the transistor (4), and that to the insulation plate (8) there is fixed a cooling plate (9) to which the thermal energy produced in the transistor is conducted. The insulation plate (8) may in part also extend on top of the plastic encapsulation of the transistor.
    Type: Grant
    Filed: February 28, 1991
    Date of Patent: November 17, 1992
    Assignee: Nokia Mobile Phones, Ltd.
    Inventor: Mikko Pesola
  • Patent number: 5159750
    Abstract: A package for containing an integrated circuit component is provided which includes one or more layers with exposed edges surrounding a central opening. The integrated circuit component is positioned in the central opening. Bond wires connect the bond pads of the integrated circuit component to the continuous shelves of the various stepped-back stadium-like layers as well as to individual insulated leads. The layers are spaced apart by beads or columns of insulative material and the major portion of the layers are separated from each other by a gaseous dielectric, preferably air. The R-C constant is reduced and the speed of transmission is increased by the presence of the low dielectric material providing a device which can function rapidly. The stepped portions of the layers are exposed to allow for electrical interconnections within the layers, as well as from each layer to the integrated circuit.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: November 3, 1992
    Assignee: National Semiconductor Corporation
    Inventors: Vivek B. Dutta, Jeffrey C. Demmin, Mark L. Diorio, Jon T. Ewanich
  • Patent number: 5161092
    Abstract: The thermal mounting plate has a pocket therein which contains dielectric elastomer. The pins on the pin side of the circuit card assembly engage in the elastomer to conduct heat from the components through the pins and elastomer into the thermal mounting plate. The thermal mounting plate mounts into a cooled card box for heat removal.
    Type: Grant
    Filed: July 2, 1991
    Date of Patent: November 3, 1992
    Assignee: Hughes Aircraft Company
    Inventors: William A. Smith, Eugene L. Brodie
  • Patent number: 5157587
    Abstract: An automotive electronic module (22) including a sealing arrangement having a power transistor (4) attached to a printed circuit board (2); a sealing compound layer (18) encapsulating the transistor; a heat sink (8) contacting the transistor and extending through the sealing compound at a surface of the sealing compound remote from the transistor; and a flange (10) formed of flexible material secured to the heat sink and extending into the sealing compound from beyond the surface. The flange prevents loss of adhesion due to differential thermal expansion between the sealing compound and the heat sink (which could create a path for water ingress) by (i) intercepting the force caused by thermal contraction of the sealing compound, (ii) providing increased surface area for the sealing compound to adhere to, and (iii) re-distributing the thermal contraction force through its flexibility and that of the potting compound and the increased surface area of adhesion.
    Type: Grant
    Filed: December 24, 1990
    Date of Patent: October 20, 1992
    Assignee: Motorola
    Inventor: William E. Edwards
  • Patent number: 5155660
    Abstract: A semiconductor device is provided with a base plate on which a circuit board is disposed. A plurality of semiconductor elements such as diodes or transistors are supported on the circuit board and interconnected by circuit wiring. A container for the device includes side walls extending upwardly from the base plate and a top cover extending between the walls. An external terminal connection is provided by an internal terminal and an external terminal that are connected by a flexible wire within the container. The internal terminal has its lower end soldered to the circuit wiring at a predetermined location and its upper end disposed in a seat in the top cover. An upwardly extending slit within the seat receives the end of the internal terminal and a transverse window opens to the slit to receive a transverse protrusion from the upper terminal end. The external terminal extends through the cover with its lower end extending inwardly of the cover where the flexible wire is connected to it.
    Type: Grant
    Filed: September 17, 1991
    Date of Patent: October 13, 1992
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Toshifusa Yamada, Shin Soyano
  • Patent number: 5153379
    Abstract: A shielded low-profile electronic component assembly 100 providing shielding for electronic components is disclosed which includes a substrate 124, and shield 102. In a first embodiment the shield 102 is chamfered at each shield corner 110 and is attached to the substrate 124 at ground pad patterns 114, which are found at each corner of the substrate 124 on surface 128. A ground paddle 120 is also located in substrate 124 which lies substantially underneath the electronic component 112, and is utilized in maximizing shielding. In an alternate embodiment a substrate 124 is overmolded with encapsulation material 302 after the electronic component 112 is affixed to the substrate 124, with each of the encapsulation material corners 306 being chamfered exposing ground pads 114. The metallized shield 310 is then placed over the overmolded encapsulant and attached to the substrate 124 at ground pad patterns 114. The overmolded encapsulant 302 adding protection to the electronic component 112.
    Type: Grant
    Filed: October 9, 1990
    Date of Patent: October 6, 1992
    Assignee: Motorola, Inc.
    Inventors: Andrzej T. Guzuk, Todd W. Roshitsh, Scott M. Engstrom, Lonnie L. Bernardoni
  • Patent number: 5151559
    Abstract: This is a semiconductor chip in which the conductive path between the chip and the lead frame via wires can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires.
    Type: Grant
    Filed: December 11, 1991
    Date of Patent: September 29, 1992
    Assignee: International Business Machines Corporation
    Inventors: H. Ward Conru, Gary H. Irish, Francis J. Pakulski, William J. Slattery, Stephen G. Starr, William C. Ward
  • Patent number: 5147982
    Abstract: The disclosure concerns the encapsulation of integrated circuit chips, notably with a view to their being incorporated in a chip card. The encapsulation method comprises the formation of a pre-punched metallic conductive grid, the formation of a strip of pre-perforated plastic material, the transfer of a strip to the grid, the positioning of an integrated circuit chip in a perforation of the strip, and the formation of electrical connections between the chip and zones of the grid located in perforations of the strip. The perforations of the strip and the punched slots of the grid are arranged so that the strip covers and blocks all the interstices between conductors of the grid in the useful region corresponding to a module to be made. When a protecting resin is laid, it is confined and does not leak through the interstices of the grid. A plastic or metal ring defines the heightwise dimension of the micromodule.
    Type: Grant
    Filed: April 10, 1991
    Date of Patent: September 15, 1992
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Francis Steffen
  • Patent number: 5144234
    Abstract: A Hall-effect sensor, wherein a Hall element is disposed in a magnetic path being formed by a magnet and a flux guide, and the magnet, flux guide, and Hall element are integrally held with a molded frame, and the Hall element is fixed to the magnet (or flux guide) or the molded frame. This Hall-effect sensor can easily position the Hall element with higher sensitivity.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: September 1, 1992
    Assignee: Mitsubishi Denki K.K.
    Inventor: Shigemi Murata
  • Patent number: 5142103
    Abstract: An encapsulated electrical capacitor in which an end and a major portion of the cylindrical outer shell of the capacitor is positioned within a cup-shaped sleeve before an outer housing is molded around the capacitor and sleeve. The sleeve has axially extending internal ribs which stiffen its outer annular wall to thereby help to prevent damage to the capacitor from hydraulic forces during the encapsulating process. The internal ribs also define insulating air spaces between one another, and this helps to reduce thermal conduction into the capacitor during the molding process. The outer housing is preferably formed from polypropylene, and the sleeve is preferably formed from a material which will retain a major portion of its strength and rigidity at the molding temperature of the outer housing, for example, a polyester material when the outer housing is formed from polypropylene.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: August 25, 1992
    Assignee: R & R Plastics, Inc.
    Inventor: Harold R. Stine
  • Patent number: 5134773
    Abstract: According to the invention, the electronic module (1) which is to be contained in the card is formed by producing the electronic circuit out of a metal strip (19) which is pre-cut and pre-formed in order to present contact members (10), the electronic chip being then soldered and wired to said strip; the said electronic module (1) is then coated with resin forming a resin block (14), and during the moulding of the card, a pressure P is applied to the mould (103) for firmly clamping the electronic module (1) between the mold shells and for securing it within positioning and blocking means as well as for pressing its contact members (10) against the inner wall of the mould.
    Type: Grant
    Filed: May 22, 1990
    Date of Patent: August 4, 1992
    Inventors: Gerard LeMaire, Philippe LeMaire
  • Patent number: 5123538
    Abstract: A crash survivable protective enclosure for flight data recorders, cockpit voice recorders and memory devices employing a solid state memory element includes a conformal coating of air excluding plastic material around the memory element. An inner shell of metal having a low position on the periodic table in comparison to tin and copper associated with the memory element is provided to enclose the memory element and the conformal coating. Heat insulating fillers are provided around the inner metal shell which serves as a sacrificial anode when the enclosure is exposed to salt water. An outer metal shell formed of high strength material is provided around the insulating filler for resisting physical forces applied from an exterior of the protective enclosure during a crash.
    Type: Grant
    Filed: April 26, 1991
    Date of Patent: June 23, 1992
    Assignee: Sundstrand Corporation
    Inventor: Johannes B. Groenewegen
  • Patent number: 5121289
    Abstract: An encapsulatable sensor assembly includes an external housing with internal support components for retaining an active sensor element and associated electrical circuitry in a predetermined relationship while providing a plurality of internal sequentially interconnected cavities for facilitating a flow of an encapsulating material from an encapsulating material injection port to a vented overflow to assure a complete fill of the internal cavities to restrain the internal components. The sensor assembly provides a structure for a void free encapsulation and internal leadwire stress relief concurrently with location control of the internal components while also providing a combination which is easily adaptable to automatic assembly and encapsulation techniques.
    Type: Grant
    Filed: January 31, 1990
    Date of Patent: June 9, 1992
    Assignee: Honeywell Inc.
    Inventor: Michael A. Gagliardi
  • Patent number: 5120678
    Abstract: An improved method is provided for assembling an integrated circuit component to a substrate by a solder bump interconnection that is reinforced by a polymer film. The component is attached to a region of the substrate by a plurality of solder bump interconnections that create a gap between the component interface and the substrate region. A polymer dam is applied to the region encircling the attached component spaced apart therefrom. A liquid polymer precursor material is applied to the region including the gap and is confined by the dam to prevent indiscriminate flow across the substrate. In one aspect of this invention, gas is vented from the gap through a passage in the substrate to enhance fill by the precursor liquid. In another aspect of this invention, the precursor liquid is injected into the gap through a passage in the substrate and spread outwardly therefrom.
    Type: Grant
    Filed: November 5, 1990
    Date of Patent: June 9, 1992
    Assignee: Motorola Inc.
    Inventors: Kevin D. Moore, Steven C. Machuga, John W. Stafford, Kenneth Cholewczynski, Dennis B. Miller
  • Patent number: 5107327
    Abstract: A photosemiconductor device and an epoxy resin composition for use in molding a photosemiconductor used for the photosemiconductor device, the photosemiconductor device comprises a photosemiconductor element molded with a cured transparent epoxy resin composition, the cured transparent epoxy resin composition having a refractive index distribution curve characterized by the following (A), (B), and (C):(A) the refractive index difference X between refractive index values (b) and (c), which respectively are lower and higher than refractive index value (a) corresponding to the maximum peak of the refractive index distribution curve and respectively correspond to those points on the refractive index distribution curve which have a relative height of 20 with the height of the maximum peak being taken as 100, is 0.
    Type: Grant
    Filed: July 17, 1990
    Date of Patent: April 21, 1992
    Assignee: Nitto Denko Corporation
    Inventors: Syuuji Nishimori, Tadaaki Harada, Yasuhiko Yamamoto, Nobuyuki Hiromori, Yasumori Yoshimura, Katsuya Muramatsu, Katsumi Shimada
  • Patent number: 5101324
    Abstract: Semiconductor devices are each arranged such that a semiconductor chip is disposed on a film carrier, fingers of the film carrier are respectively connected to a multiplicity of electrodes provided on the semiconductor chip, and the fingers are then trimmed, or the fingers are trimmed after the semiconductor chip and parts of the fingers are sealed with a resin or the like. The semiconductor devices thus arranged are respectively mounted on both obverse and reverse surfaces of a substrate at mutually opposing positions thereof, the substrate having electrically conductive patterns formed on both surfaces thereof. The semiconductor devices are sealed with a resin or the like so as to be formed integrally with the substrate.
    Type: Grant
    Filed: February 28, 1990
    Date of Patent: March 31, 1992
    Assignee: Seiko Epson Corporation
    Inventor: Eiichi Sato
  • Patent number: 5093281
    Abstract: In a method for manufacturing semiconductor devices, to a case main body are bonded leads each having an inner end on the inner side of a side edge of the case main body and an outer end on the outer side of the side edge. A semiconductor chip is electrically connected to the inner ends of the leads on the case main body. Subsequently, a lid is adhesively bonded to the case main body. Accordingly, it is possible to reduce the total time period required to manufacture each semiconductor device and to enhance the reliability and yield of semiconductor devices.
    Type: Grant
    Filed: April 6, 1989
    Date of Patent: March 3, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Taizo Eshima
  • Patent number: RE33859
    Abstract: A ceramic substrate supports a thin or thick film electronic circuit hermetically enclosed by a vitreous glass covering sealed to the ceramic substrate by a heat fused vitreous sealing glass. The vitreous sealing glass is screened onto the vitreous glass covering in a composition comprising a binder material and a liquifier. The electronic circuit is trimmed by a laser beam directed through the vitreous glass covering as one of the final process steps after completion of those process steps which tend to affect the resistivity of the resistive element; process steps such as high temperature baking and soldering of component parts.
    Type: Grant
    Filed: November 2, 1990
    Date of Patent: March 24, 1992
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: I. Macit Gurol