Abstract: Disclosed herein are electronic device sealing resin compositions containing (A) 40-25 parts by weight of a thermoplastic resin composed of 100-10 wt. % of a poly(arylene thioether-ketone) and 0-90 wt. % of a poly(arylene sulfide), (B) 60-75 parts by weight of an inorganic filler, and per 100 parts by weight of the sum of the thermoplastic resin (A) and inorganic filler (B), (C) 1.5-5 parts by weight of a silicone oil, (D) 10-15 parts by weight of a silicone rubber or (C) 0.5-3 parts by weight of a silicone oil and (D) 5-13 parts by weight of a silicone rubber. Electronic devices sealed using such resin compositions are also disclosed.

Abstract: A chip-on chip type semiconductor device is provided in which semiconductor chips provided in a package cannot be displaced during a transfer molding process so as to eliminate a short circuit. At least two lead frames are provided in and extend from the package so that the first semiconductor chip and the second semiconductor chip can be electrically connected to external devices. A die stage is provided between the first semiconductor chip and the second semiconductor chip. A bonding wire is provided for wiring between the first semiconductor chip and the lead frames, and TAB leads connect the second semiconductor chip to the lead frames. The lead frames may extend between the first and second semiconductor devices instead of the die stage. The lead frames may include one having a portion extending in a direction perpendicular to the longitudinal direction of the lead frames between the first and second semiconductor chips.

Abstract: A method for making an improved semiconductor device package is provided. A semiconductor die (16) is attached to a supportive substrate (10, 12). A protective lid (20) is attached to the supportive substrate (10, 12), over the semiconductor die (16). The protective lid (20) is partially encapsulated with molding compound (28). The protective lid (20) prevents the molding compound (30) from contacting the semiconductor die (16), and associated wirebonded wires (18). A portion (30) of the protective lid (20) remains exposed. Thus, a molded package compatible with current product designs and assembly processes is provided, yet disadvantages caused by molding compound contacting the die (16) and wires (18) are avoided. Furthermore, the exposed protective lid (30) provides superior heat dissipation for the package.

Abstract: An electronic package assembly wherein a low profile package is soldered to an organic (e.g., epoxy resin) substrate (e.g., printed circuit board). The assembly's projecting conductive leads are soldered. An encapsulant material (e.g., polymer resin) is used to provide reinforcement for the solder-lead connections, the encapsulant material being dispensed only along opposing sides of the package's housing which do not include projecting leads (and which are oriented substantially normal to the stresses imposed on the package during operation wherein high temperatures are attained). This dispensing may follow solder reflow and solidification. The invention is particularly useful with thin, small outline package (TSOP) structures which occupy a minimum of height on the substrate surface.

Abstract: A resin-packaged electronic component is provided which comprises an electronic element enclosed in a thermosetting resin package having a mounting face. The resin package is provided with at least one stress concentrating portion extending substantially in parallel to the mounting face and contained in an imaginary plane extending between the electronic element and the mounting face.

Abstract: A semiconductor device having a substrate support (22) and a method of forming the semiconductor device. A substrate (11) has conductive traces (12) and a bonding pad (13) on a bottom surface and conductive traces (14) and a semiconductor chip attach pad (17) on a top surface. The substrate support (22) has an aperture (23) and is coupled to the substrate (11). A semiconductor chip (31) is coupled to the semiconductor chip attach pad (17). The semiconductor chip (31) is covered by an encapsulating material (38) or a cap (41, 51) which provide protection for the semiconductor chip (31).

Abstract: A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 .mu.m to 200 .mu.m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.

Abstract: Method and apparatus for connecting an I/O pad of an integrated circuit die to an electrical lead or contact on a lead frame that uses interposers formed directly on the die attach pad of the lead frame. Each interposer is formed by etching one or more grooves, preferably of depth no more than half the die attach pad thickness, in the die attach pad adjacent to the lead frame electrical lead(s). The exposed surfaces of the grooves and the die attach pad are coated with a layer of electrically insulating material, and the grooves are then filled with an electrically conducting material, such as conductive epoxy. An electrically conducting wire is then bonded between an I/O pad of an integrated circuit die and the electrically conducting material in the groove, and between the electrically conducting material and an electrical lead of a lead frame.

Abstract: Since an electronic device comprises an electronic component, an external connection terminal electrically connected to the electronic component, and an envelope for sealing the electronic part and having a thickness less than about 0.5 mm, the electronic device is miniaturized even in the case where it is provided with a large number of terminals. Further, since the electronic component is sealed by the envelope, moisture, etc. is not admitted into the electronic component, resulting in high reliability. In addition, since the thickness of the envelope is thin, the external terminal can be shortened. Thus, the inductance or capacitance of this terminal can be reduced.

Abstract: An electronic component is provided which comprises a resin package for enclosing inside parts. The package has a heat sensitive surface portion provided with a heat sensitive material which irreversibly discolors at a temperature higher than the soldering temperature for the electronic component. The component may be a solid tantalum capacitor, solid aluminum capacitor, diode or transistor which generates heat under abnormal operating conditions.

Abstract: A polar electronic component is provided which comprises a polar element, a first lead electrically connected to a first pole of the polar element, a second lead electrically connected to a second pole of the polar element, and an insulating package enclosing the polar element together with part of the first and second leads. The first lead has two terminal legs which are bent toward the underside of the package and transversely spaced from each other by an interval. The second lead has a terminal leg which is bent toward the underside of the package and extends into the spacing between the two terminal legs of the first lead in longitudinally overlapping relation.

Abstract: A method of producing a high frequency module comprises the steps of connecting leads to a circuit board, covering the circuit board with an insulating member such that the leads protrude from the insulating member, cutting off portions of the leads protruding from the insulating member having been molded, forming a metal film on the entire periphery of the insulating member, and removing the metal film around the leads to thereby form electrodes which are separate from the other portions of the metal film. The metal film is formed by evaporation, spraying or plating while the portions of the metal film around the leads are removed by chemical etching or machining. Further, the leads are connected to the circuit board on the same surface as electronic parts. The circuit board is covered with the insulating member in a rectangular parallelepiped configuration. The electrodes individually extend from the sides where the leads are present to the surface contiguous with the sides.

Abstract: A thermally enhanced semiconductor device (10) having an exposed backside (22) is described. In one embodiment, a PC board substrate (12) is provided having a pattern of conductive traces (14) on both upper and lower surfaces of the substrate. Electrical continuity is maintained between the two surfaces with conductive vias (16). A semiconductor die (18) is flip-mounted to the upper surface of the substrate. Solder bumps (26) electrically connect the die to the conductive traces, and an underfill (28) couples the active side (20) of the die to the upper surface of the substrate. A package body (40) is formed around the perimeter (24) of the die leaving the inactive backside exposed for enhanced thermal dissipation. The inactive backside can also be coupled to a heat sink for increased thermal dissipation. A plurality of solder balls (42) electrically connected to the conductive traces is attached to the lower surface of the substrate.

Abstract: A printed chip-on-board substrate is for mounting a high-power semiconductor chip. As a construction for efficiently releasing or dissipating heat to be generated in the semiconductor chip, the printed substrate has a printed interconnected substrate and a metal plate bonded on a back side of the substrate. The printed interconnected substrate is constructed by forming an interconnected layer on a surface of the substrate. At a mount area where the semiconductor chip is to be mounted, an opening is formed reaching the metal plate. The metal plate covers the opening on the side of the back side and is formed with a thickness capable of providing rigidity sufficient to support thereon at least the semiconductor chip to be mounted.

Abstract: An encapsulated electrically and thermally enhanced integrated circuit is disclosed. An integrated-circuit die is attached to a thermally conductive, electrically-insulated substrate. A lead frame having inwardly-extending bonding fingers has the bottom sides thereof attached to the top of the substrate. A contiguous layer of insulating material is bonded to the top sides of the bonding fingers, such that the layer of insulating material peripherally surrounds the integrated-circuit die. A conductive layer of material is then bonded to the top of the insulating layer. A second layer of insulating material followed by a second conductive layer may be bonded on top of the first conductive layer. Electrical connections are made from the integrated-circuit die to the conductive layers surrounding the die. The device is then encapsulated in a plastic material.

Abstract: A chip carrier (20) includes a substrate (11) having a first copper pattern (12) deposited on a first surface (13), and a second copper pattern (14) deposited on a second surface (16). The second copper pattern (14) is plated with a metallic material to form wire bondable areas (18) on the second copper pattern (14), however, the first copper pattern (12) is substantially devoid of the metallic material. A device (21) is wire bonded to the wire bondable areas (18) of the second copper pattern (14), and a protective covering (23) covers the wire bondable areas (18).

Abstract: A circuit board assembly including a shielding housing mounted on a circuit board (1), the shielding housing being intended for radio-frequency shieldings. The shielding housing (3) having a wall inclined at an angle .alpha. to a plane orthogonal to the plane of the circuit board. The housing of the circuit board assembly being suitable for at least a partial embedding into an exterior wall of an electronic apparatus.

Abstract: A memory assembly, comprises a wiring board having wiring patterns, the wiring patterns having a plurality of electrodes, each of the wiring patterns having a connecting terminal formed on a single main surface of the wiring board, a memory device mounted to the wiring board and having a plurality of electrodes connected to the electrodes of the wiring patterns, and an electrical insulator mounted to the main surface of the wiring board and having a shape to expose the connecting terminal to the atmosphere. The insulator insulates the wiring patterns, the electrodes of the wiring patterns and the connecting terminal from possible electrical charges on a surface of the memory assembly to protect the memory device from being electrically charged and discharged. Even if the exterior surface of the memory assembly is charged with possible static electricity, the interior of the memory assembly is protected from being electrically charged and discharged.

Abstract: An apparatus for isolating electronic devices from mechanical shock and thermal environments utilizes a metal outer protective shell surrounding the electronic device to be protected. Interposed between the protective shell and the electronic device are a thermal insulating layer, a layer of phase change material and a layer of mechanical shock absorbent material.

Abstract: An electrical path or interconnection arrangement is provided within a formed support body of polymeric material that exhibits volumetric changes during and after the forming thereof. The electrical path or interconnection arrangement provides an accurately positioned electrically conductive path through the material of the support body and also responds to, accommodates and alleviates the effects of forces at the interface between the material of the support body and the electrical path or interconnection arrangement that occur during and after the forming of the support body. The interconnection arrangement exhibits predetermined deformability/compressibility characteristics to alleviate stresses caused by the volumetric changes of the polymeric material. In a preferred arrangement, the interconnection arrangement includes an elongated tubular conductor fabricated from a metallic material.

Abstract: Disclosed are a printed circuit board which buries the leads of electronic parts mounted on a printed board into a coating material to prevent the occurrence of a leak between the leads, and an electronic part designed to suppress the occurrence of cracks in a coating layer formed by coating a coating material on the electronic part and a printed board after the former is mounted on the latter. The printed circuit board comprises a printed board, a frame provided on the soldering-surface side of the printed board to surround all or a part of the soldering surface of the printed board in such a way that the amount of protrusion of the frame from the soldering surface of the printed board is made larger than that of protrusion of the leads of the electronic parts from the soldering surface side of the printed board, and a coating material injected inside the frame to bury the leads that protrude from the printed board.

Abstract: An electronic component carrier for mounting an electronic component such as a semiconductor element, IC chip or the like comprises a printed wiring substrate having conductor pattern and thorugh-hole, an adhesive layer formed on the substrate, a lead frame joined to the substrate through the adhesive layer and comprised of plural leads for external connection, and a solder layer formed in the through-hole for electrical connection to the conductor pattern of the substrate.

Abstract: A sealed semiconductor unit includes an electrical component within a defined area on a semiconductor material. A cover with the dimensions of the semiconductor defined area is placed over the semiconductor material with a sealant there between. The dimensions of the cover are aligned with the dimensions of the semiconductor. The sealed unit includes electrical contacts extending from outside the sealed unit to the electrical component within the sealed unit on the semiconductor material. The sealed semiconductor unit, including the cover, the semiconductor material, and the electrical component, has an area of the semiconductor material.

Abstract: A case for housing an electronic apparatus has two main portions and a hinge portion which connects the main portions so as to be opened and closed. The case is formed of plastic molding. The hinge portion is formed of a soft resin having a resiliency, and the main portion is formed of a hard resin and integral with the hinge portion. A wiring member for provide an electric connection between the main portions extend through the hinge portion. The wiring member passes at a center of rotation on which the hinge portion is turned.

Abstract: Single, continuous bonding wires for an integrated-circuit die are supported in mid-span by a support ring which is snap-fit or adhesively bonded to a die-attach paddle of a leadframe. The support member includes a groove formed in its distal end for receiving an adhesive material, if necessary, for securing the bonding wires in position to prevent wire-wash and electrically shorting of the bonding wires when a plastic molding compound is formed around the die and leadframe. Alternatively the bonding wires are contained within notches formed in the distal end of the support ring. A lid placed over the support ring provides an enclosure for the integrated-circuit die. Stacking of support rings on each other and concentric support rings provide various optional arrangements for supporting bonding wires.

Abstract: A low cost package uses non-ceramic materials to environmentally seal an air chamber for an electronic component. The package includes a base formed by a plurality of essentially flat terminals molded in a polyphenylene sulfide resin so as to provide a planar surface for surface mounting to a circuit board. A component placement area on the base receives a cap which covers and seals the area from contaminants.

Abstract: A method for manufacturing a hybrid circuit-type charge-coupled device image sensor includes the steps of: forming a lead wire unit on a first layout surface of a ceramic base; attaching a charge-coupled device image sensor die on the first layout surface; wire bonding the charge-coupled device image sensor die to the lead wire unit; mounting a window frame on the first layout surface to enclose the charge-coupled device image sensor die by applying a layer of sealing material on a lower peripheral end of the window frame; mounting a glass lid on the window frame by applying another layer of sealing material on an upper peripheral end of the window frame; and heating an assembly of the glass lid, the window frame and the ceramic base in an oven so as to cure and harden the layers of sealing material and bond together the glass lid, the window frame and the ceramic base.

Abstract: Adhesion between a heat spreader (15) and a substance (19) to be adhered to the heat spreader can be enhanced by using thermal spray deposition to apply a coating (23) to the heat spreader. The substance to be adhered is applied to the coated heat spreader.

Abstract: A circuit assembly which includes a semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on the first surface. A first element having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on one of its surfaces is mounted on and at least partially supported at its second surface by the first surface of the semiconductor die. The first element is positioned such that the semiconductor die electrical contact is exposed. A fine wire conductor having first and second ends is connected at its first end to either the semiconductor die electrical contact or the first element electrical contact. A method of manufacturing this circuit assembly is also disclosed.

Abstract: A method of forming an environmentally sealed transponder type circuit wherein the circuit components are mounted on a lead type substrate frame, the components are encapsulated in a plastic housing in a plastic molding process so that the housing is supported in the frame only by a plurality of the leads, and then severing the leads at the periphery of the housing to provide a leadless package. The frame may be formed of a conductive material, an insulating material or as a printed circuit board. A novel printed circuit type lead frame whereby a coil of the circuit may be mechanically attached and directly secured to the frame is additionally disclosed.

Abstract: The present invention provides a method for fabricating an integrated circuit package, as well the resulting integrated circuit package, which retains a heatsink in close communication with a mold cavity. This precludes any encapsulant from flowing between the heatsink and the inner surface of a mold cavity. As a consequence, the bottom of the heatsink is not encapsulated and is thus exposed. This is accomplished by including posts, attached to the leadframe assembly, which have the function of exerting a downward force on a leadframe assembly and, in turn, on the heatsink. Tie bars, which are nonfunctional parts of a leadframe assembly, can be utilized as posts by bending the posts into an upright position.

Abstract: A polygonal capacitor including a polygonal capacitor case having an engaging portion at an inner surface thereof; a capacitor element accommodated in the polygonal capacitor case; a plurality of terminals respectively connected to a plurality of electrodes of the capacitor element through a base portion of each terminal; an insulating terminal base to which the terminals are fixed; and a resin filled in the polygonal capacitor case. An engaging member formed at the insulating terminal base is in pressure contact with the engaging portion of the polygonal capacitor case.

Abstract: The exposed portions of the leads of a semiconductor chip package are first bent in a forming process so that the ends of the leads are in proper positions to be attached to and electrically connected to contacts on a printed circuit board. Intermediate portions of the leads between the distal ends and the package body for connection to the printed circuit board and the package body are enclosed and fixed in position by a carrier body to hold the leads in position and to reduce the effects of any bending in destroying the coplanarity of the distal lead ends of the package. The package with the carrier body may be mounted onto the printed circuit board without first removing the carrier body. After the distal ends of the leads have been soldered to the printed circuit board, the carrier body is then removed.

Abstract: An electronics package is provided with a substrate on which a patterned circuit is printed, a plurality of conductive leads connected to the patterned circuit along the periphery of the substrate, a first mold body arranged along the periphery of the substrate to reinforce the connection of the conductive leads to the patterned circuit, a plurality of chips attached on the substrate, a plurality of bonding wires connecting an integral circuit formed in each of the chips to the patterned circuit, and a second mold body arranged over the chips and the substrate. The second mold body functions as an insulating protector to protect the chips from an external obstacle and corrosive gases. An electric signal applied to one of the conductive leads is transferred to one of the chips through the patterned circuit and one of the bonding wires. The electric signal is processed in the chip to produce an output signal.

Abstract: A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 .mu.m to 200 .mu.m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.

Abstract: The invention relates to a package for VLSI-chips. A substrate means (A1;B1;C1), a frame means (3;14) and a lid means (A5;B5;C5) makes a housing having an inside cavity. First connection means (4;16) are provided on the inside of said cavity in electrical contact with external contact means (6;22) on the outside of the housing. A chip (A3;B3;C3) having second connection means (8;B19) is placed inside the cavity. At least one interconnection film (A2;B2;C2) is placed adjacent the chip (A3;B3;C3) and has third and fourth connection means (9,5;21,20). The third connection means (9;21) are positioned to make contact with the second connection means (8;B19) on the chip. The fourth connection means (5;20) are positioned to make contact with the first connection means (4;16) inside the cavity. Individual ohmic contacts are provided individually between chosen among the third and fourth connection means (9, 5;21,20) for making connection between chosen of the first and second connection means (4,8;16,22).

Abstract: The present invention relates to a mounting structure adapted to be mainly used commercially and to an electronic device employing such mounting structure. A board carrying a plurality of chips is directly coated with resin to form a casing or a part thereof. Alternatively a plurality of the boards interconnected by flexible wiring sheets and coated with resin with retaining the flexibility of the wiring sheets. Such structure helps to provide a handy electric device which is required to be compact, light-weight and thin.

Abstract: A semiconductor-device package includes: a printed circuit board which has a chip-accommodating hole in its center portion and which has external connection terminals formed on its one side and a flexible substrate which has a supporting film having a central hole coaxial with the chip-accommodating hole, a given circuit pattern which is formed on the supporting film and inner leads which project inside the central hole and which have micro patterns, the flexible substrate being bonded on the other side of the circuit pattern of the printed circuit board with electrical conduction between them.

Abstract: A semiconductor circuit device includes a multi-layered substrate comprising a plurality of signal lines sandwiched between a power source line and a ground line, with insulation layers formed therebetween to reduce fluctuation of a ground line potential at the time of simultaneous switching of the signal lines and to increase the operational speed. The signal lines provides bidirectional current paths and is disposed between the current source line and the ground line. The multi-layered substrate is formed around a semiconductor pellet. Electrode pads are formed on the insulation layer over the ground line on the same level as the signal lines and generally on the same level as the main surface of the semiconductor pellet where electrodes pads are formed. Bonding wires are used to electrically connect the electrode pads on the pellet and the electrodes formed on the insulation layer.

Abstract: There is provided an electronic package where the package components define a cavity. A semiconductor device and a portion of a leadframe occupy part of the cavity. Substantially the remainder of the cavity is filled with a compliant polymer, such as a silicone gel. Since the cavity is no longer susceptible to gross leak failure, the seal width of adhesives used to assemble the package may be reduced, thereby increasing the area available for mounting the semiconductor device.

Abstract: The present invention comprises a semiconductor chip 1, chip electrodes 2 provided on one surface of the semiconductor chip 1, and connected to semiconductor elements formed in the semiconductor chip, a flexible insulating film 3 wrapping the chip electrodes, wiring layers 5 formed in the insulating film 3, and electrically connected to the chip electrodes 2, and terminal electrodes 6 provided on that surface of the insulating film 3 which extends on the upper surface of the chip 1, the electrodes 6 being electrically connected to the wiring layers 5, and functioning as external terminals of the chip 1. Thus, the terminal electrodes 6 are introduced, by means of the wiring layers 5 formed in the insulating film 3, onto that surface of the insulating film 3 which extends on the upper surface of the chip 1.

Abstract: A semiconductor device comprises a semiconductor chip carrier and a semiconductor chip packaged therein with a resin. The semiconductor chip carrier comprises a printed wiring substrate with conductor patterns, a first adhesive layer formed on at least an outer peripheral portion of the substrate, a second adhesive layer formed on the conductor pattern of the substrate, a lead frame joined to the substrate through the adhesive layers and comprised of plural leads for external connection. The conductor pattern is electrically connected to a part of inner leads of the lead frame.

Abstract: A chip carrier is disclosed which includes a chip carrier substrate and at least one semiconductor chip mounted in a flip chip configuration, via solder balls, on a circuitized surface of the chip carrier substrate. The solder balls are encapsulated in a first encapsulant having a composition which includes an epoxy. In addition, at least a portion of the circuitry on the circuitized surface is encapsulated in a second encapsulant having a composition which includes a urethane, and which composition is chosen so that the second encapsulant exhibits a modulus of elasticity which is equal to or less than about 10,000 psi. As a consequence, the second encapsulant exhibits neither internal cracks, nor interfacial cracks at the interface with the first encapsulant, nor does the second encapsulant delaminate from the circuitized surface, when the chip carrier is thermally cycled.

Abstract: A tamperproof arrangement for an integrated circuit device. The arrangement includes a package and lid fabricated of heavy metals to prevent X-radiation or infrared detection of circuit operation. Sensors and control circuitry are located on the integrated circuit die itself which detect increased temperature and radiation and clear or zeroize any sensitive information included within the integrated circuit device. Electrode finger grids above and below the integrated circuit die detect physical attempts to penetrate the integrated circuit die. Critical circuit functions are segregated from non-critical functions. Power applied to the integrated circuit device is monitored and separated for critical and non-critical circuit functions.

Abstract: An integrated circuit device package of this invention includes a flexible substrate having an upper patterned insulative layer, and a lower patterned conductive layer including a plurality of package leads. An integrated circuit die is fixed within a void of the upper surface of the flexible substrate, and is provided with electrical connections to the package leads. A rigid upper protective layer is provided to substantially enclose the integrated circuit die, and at least partially cover the top surface of the upper insulative layer. The integrated circuit device package further comprises a rigid or semi-rigid lower protective layer opposite the upper protective layer. The rigid lower protective layer is prefomed, and preferably is made from a material selected from the group consisting of rigid ceramic, glass, plastic, and combinations thereof.

Abstract: A unit for controlling valves being actuated by electromagnets for a pressure fluid includes a housing having a housing frame and a lid defining an interior. At least one valve coil and components of the at least one valve coil, such as a wound coil body and a yoke ring, are disposed in the housing. The at least one valve coil is spaced from the housing frame defining interstices therebetween, and the components are mutually spaced apart defining interstices therebetween. A circuit carrier is disposed in the interior of the housing and is electrically connected to each valve coil. The same resilient potting composition fills up the interstices between the components and between each valve coil and the housing frame, without any boundary layers. A method for producing such a unit includes resiliently embedding the components and the at least one valve coil in the housing frame in one operation with the resilient potting composition.

Abstract: A process for fabrication of a filler for a ballast container used with frescent lighting employs a mixture of a high-density polyethylene in powdered form (derived from recycled milk containers) and dry sand. After loading the specified mixture into a ballast container to fill the unfilled volume remaining after the ballast container has electrical components installed, a closure means is placed on the loaded and filled ballast container, subsequently heated for a predetermined time period to achieve melting of the specified high-density polyethylene and dry sand mixture. After cooling the melted, high-density polyethylene, the high-density polyethylene and dry sand mixture fuses into a solid mass. A preferred mixture is comprised of a 50/50 weight percent ratio of the specified high-density polyethylene and dry sand.

Abstract: Disclosed is a high temperature, high pressure process of encapsulating electronic devices. The high pressure process is particularly suitable for encapsulating flip-chip devices wherein the collapse of flip-chip solder bumps is prevented. A special mold may be used to prevent the ceramic substrate of the flip-chip device from breaking under the high injection pressure conditions. The encapsulant is a rigid liquid crystal polymer.

Abstract: An improved encapsulant and method of application for rework of a modular electronic assembly. A housing is provided with a structure that permits deformation with thermal expansion of the encapsulant and reduces stresses applied to the electronic components therewithin. The selected encapsulant provides mechanical stability from shock and vibration, thermal conductivity to the surroundings, and freedom from deterioration of electrical performance. Critically, the encapsulant is readily excised for repair and replacement of defective components, thus allowing rework and salvage of the assembly. A potting tool is adapted for selectively refilling the housing to replace the excised portions.

Abstract: A mass of dielectric material intimately surrounds a high frequency circuit having plural transformers in relative close proximity to one anther and provides mechanical stability and electrical protection to the circuit. The mass of dielectric material surrounding the circuit has a dielectric constant less than about 2.6 and a loss tangent less than about 0.009.