Dam Patents (Class 174/523)
  • Patent number: 11398413
    Abstract: A method for fabricating an electronic package is provided. A filling material is formed in an interval S, at which a plurality of electronic components disposed on a carrying structure are spaced apart from one another. The filling material acts as a spacer having a groove, and the groove acts as a stress buffering region. Therefore, the electronic components can be prevented from being broken due to stress concentration.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: July 26, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Hong-Da Chang, Chun-Chang Ting, Chi-Jen Chen
  • Patent number: 10938370
    Abstract: A piezoelectric resonator unit that includes a base, a piezoelectric resonator mounted on the base member, and a cover that is bonded to the base and that collectively forms an inner space that accommodates the piezoelectric resonator. The cover includes a top surface that faces the base with the piezoelectric resonator interposed therebetween, and a side wall that extends in a direction that intersects a main surface of the top surface. The piezoelectric resonator unit is designed so that the thickness of the top surface is larger than the thickness of the side wall.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: March 2, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kentaro Yoshii, Hiroaki Kaida, Takashi Saeki
  • Patent number: 10930524
    Abstract: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. A first electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a first lead. A second electrical interconnect is coupled between the control terminal of the semiconductor device and a second lead.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: February 23, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chun-Li Liu, Ali Salih, Mingjiao Liu
  • Patent number: 10032744
    Abstract: A variety of footed and leadless semiconductor packages, with either exposed or isolated die pads, are described. Some of the packages have leads with highly coplanar feet that protrude from a plastic body, facilitating mounting the packages on printed circuit boards using wave-soldering techniques.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: July 24, 2018
    Assignee: Adventive IPBank
    Inventors: Richard K. Williams, Keng-Hung Lin
  • Patent number: 9012947
    Abstract: A light emitting diode (LED) package is provided. According to an embodiment, a light emitting apparatus includes a substrate; at least two distinct electrodes on the substrate; a light emitting device on one of the at least two distinct electrodes, wherein the at least two distinct electrodes are electrically separated from each other and spaced from each other; a guide unit on the substrate and around the light emitting device, wherein the guide unit includes an inner side surface, an outer side surface, a top surface and a bottom surface; and lenses including a first lens and a second lens on the substrate, wherein at least one of the lenses includes a convex shape and a portion of the at least one of the lenses is located higher than the top surface of the guide unit.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: April 21, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Bo Geun Park
  • Patent number: 8963188
    Abstract: A light emitting diode (LED) package is provided. The LED package includes a printed circuit board (PCB), an electrode pad, an LED, a wire, and first and second moldings. The electrode pad and the LED are formed on the PCB. The wire electrically connects the LED with the electrode pad. The first molding is formed on the LED and the second molding is formed on the first molding.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: February 24, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Bo Geun Park
  • Patent number: 8881387
    Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: November 11, 2014
    Assignee: Apple Inc.
    Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mohammadinia, Ziv Wolkowicki, Amir Salehi
  • Patent number: 8853730
    Abstract: A light emitting device comprises a substrate including a top surface that is flat, a light emitting diode on the substrate, a lead frame formed on the flat top surface of the substrate. The lead frame includes a circuit with a predetermined pattern to electrically connect to the light emitting diode. A dam part is formed on the substrate and is adjacent to the light emitting diode. A first member is formed on the light emitting diode, the first member including a fluorescent substance to convert a light emission spectrum of light from the light emitting diode. A second member is surrounded by the dam part and is formed on the substrate adjacent to the first member, and a lens covers the first member, the second member and the light emitting diode.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: October 7, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Bo Geun Park
  • Patent number: 8748755
    Abstract: An electronic component includes: a substrate; a functional portion provided on the substrate; an interconnection line provided on the substrate and electrically connected to the functional portion; a metal wall provided on the substrate so as to surround the functional portion and the interconnection line; and a seal portion that contacts the metal wall and covers the functional portion and the interconnection line so as to define a cavity above the functional portion, the seal portion being made of liquid crystal polymer.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: June 10, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Kazunori Inoue, Tsutomu Miyashita, Kazuhiro Matsumoto
  • Patent number: 8624134
    Abstract: An encapsulation method of an environmental sensitive element is provided. An environmental sensitive element and a first rib are formed on a first substrate. The first rib surrounds the environmentally sensitive element. A getter layer is formed on the environmental sensitive element. A first encapsulation layer is formed to encapsulate the getter layer and the first rib. The first barrier layer is formed to encapsulate the first encapsulation layer located on the first rib. The first rib, a portion of the first encapsulation layer located on the first rib and the first barrier layer form a barrier structure. A second substrate is provided on the first substrate and a filling layer is formed between the first substrate and the second substrate. The second substrate is bonded to the first substrate by the filling layer. The filling layer encapsulates the environmental sensitive element, the first encapsulation layer and the barrier structure.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: January 7, 2014
    Assignee: Industrial Technology Research Institute
    Inventor: Kuang-Jung Chen
  • Patent number: 8501298
    Abstract: A resin-molded article 10 is formed by injecting molten resin into a molding die from a gate (11). Ribs (61, 62, 63 and 64) having widths larger than that of a thin molded portion (27) in the form of a thin wall are connected one after another from the position of the gate (11) to the thin molded portion (27). Spaces in the molding die for forming the ribs (61, 62, 63 and 64) define a path for the flow of the molten resin and the molten resin injected from the gate (11) flows into a space for forming the thin molded portion (27) through this path at the time of molding the resin-molded article (10). Therefore, the resin can be filled sufficiently for the thin molded portion (27) in the form of a thin wall located distant from the gate (11).
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: August 6, 2013
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Akihito Maegawa, Shinyu Nagashima
  • Patent number: 8101873
    Abstract: In a protective structure for a circuit board (1) that includes a casing (3) for receiving the circuit board, the casing is provided with a recess (11) for receiving a large component part protruding from the circuit board therein, and potting material (6) is filled in a space defined between the large component part and a surrounding wall of the recess. Typically, the potting material is filled in a gap between the large component part and the surrounding wall of the recess without substantially extending out of the recess. Because the large component part is not only supported by the circuit board but also by the casing via the cured potting material, the stress acting on a connection part that connects the large component part to the circuit board is minimized, and this enhances the mechanical integrity of the circuit board assembly.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: January 24, 2012
    Assignee: Honda Motor Co., Ltd.
    Inventor: Keiichiro Bungo
  • Patent number: 8093512
    Abstract: A package of an environmentally sensitive electronic device including a first substrate, a second substrate, an environmentally sensitive electronic device, a plurality of barrier structures, and a fill is provided. The second substrate is disposed above the first substrate. The environmentally sensitive electronic device is disposed on the first substrate and located between the first substrate and the second substrate. The barrier structures are disposed between the first substrate and the second substrate, wherein the barrier structures surround the environmental sensitive electronic device, and the water vapor transmission rate of the barrier structures is less than 10?1 g/m2/day. The fill is disposed between the first substrate and the second substrate and covers the environmentally sensitive electronic device and the barrier structures.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: January 10, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Kuang-Jung Chen, Jia-Chong Ho, Jing-Yi Yan, Shu-Tang Yeh
  • Patent number: 8071893
    Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: December 6, 2011
    Assignee: Apple Inc.
    Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mohammadinia, Ziv Wolkowicki, Amir Salehi
  • Patent number: 8063318
    Abstract: An electronic component that has a support structure with a plurality of electrical conductors, a series of wire bonds, each of the wire bonds extending from one of the electrical conductors respectively, each of the wire bonds having an end section contacting the electrical conductor and an intermediate section contiguous with the end section, a bead of dam encapsulant encapsulating the electrical conductors and the end section of each of the wire bonds, and a bead of fill encapsulant contacting the bead of dam encapsulant and encapsulating the intermediate portion of each of the wire bonds. The dam encapsulant has a higher modulus of elasticity than the fill encapsulant.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: November 22, 2011
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Susan Williams, Laval Chung-Long-Shan, Kiangkai Tankongchumruskul
  • Patent number: 8059411
    Abstract: An electronics assembly for use in a vehicle is provided. The assembly comprises a heat sink, a dam coupled to the heat sink, the dam and the heat sink combining to form a reservoir, an electronic component positioned within the reservoir, and a thermally conductive layer conformally molded to the electronic component and disposed between the electronic component and the heat sink.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: November 15, 2011
    Assignee: GM Global Technology Operations LLC
    Inventors: Yunqi Zheng, John E. Proulx
  • Patent number: 8023277
    Abstract: The electronic component integrated module includes a wiring board; an electronic component provided on the wiring board; solder for electrically connecting the electronic component onto the wiring substrate; and an encapsulating resin for encapsulating the electronic component and the solder. The average linear thermal expansion coefficient ? of the encapsulating resin, which is calculated by using the glass transition temperature of the encapsulating resin, a linear thermal expansion coefficient ?1 obtained at a temperature lower than the glass transition temperature, a linear thermal expansion coefficient ?2 obtained at a temperature exceeding the glass transition temperature, room temperature, and a peak temperature of reflow packaging of the electronic component integrated module, is not less than 17×10?6/° C. and not more than 110×10?6/° C.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: September 20, 2011
    Assignee: Panasonic Corporation
    Inventors: Yoshiyuki Arai, Hideki Takehara
  • Patent number: 7615712
    Abstract: An electronic assembly for use in a downhole tool includes a damming boot deployed about at least one integrated circuit component on a circuit board. The boot is disposed to house the integrated circuit leads and solder joints in a substantially sealed cavity between the circuit board, the integrated circuit body, and an inner surface of the damming boot. The boot is also disposed to support the integrated circuit body and thereby improve the shock and vibration resistance of various electronic assemblies used in downhole tools. The invention also tends to improve the reworkability of downhole electronic assemblies.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: November 10, 2009
    Assignee: Smith International, Inc.
    Inventor: Hugh Patton Hanley
  • Patent number: 6525931
    Abstract: The purpose of the present invention is to provide a cover for a hard disk drive which can prevent the outflow of a damping resin material and the loosening of a screw fixing the cover to a storage-enclosing case.
    Type: Grant
    Filed: January 9, 2001
    Date of Patent: February 25, 2003
    Assignee: Kokoku Intech Co., Ltd.
    Inventors: Sumihiko Yagenji, Takuya Funatsu, Takumi Unno
  • Patent number: 6166914
    Abstract: In an IC card in which an IC module constituted by a terminal plate 1 having a connection terminal pattern(3), arranged on a surface of an insulating substrate (2), for external power supply, signal connection, and grounding, an IC chip (4) mounted on the rear surface of the terminal plate 1 and electrically coupled to the connection terminal pattern (3), a sealing member (5) for the IC chip, and a reinforcing member (6) for reinforcing the sealing member (5) is mounted on a card base, the reinforcing member (6) consists of a conduction material, and integrally constituted by a ring portion (7) for covering the outer periphery of the sealing member (5) and a flange portion (8), having almost the same shape as that of the outer periphery of the terminal plate (1), for covering the rear surface of the insulating substrate (2).
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: December 26, 2000
    Assignee: Citizen Watch Co., Ltd.
    Inventors: Satoru Sugiyama, Toyoji Kanazawa, Tetsuo Satoh, Mikio Yamaguchi, Masashi Takahashi
  • Patent number: 6160218
    Abstract: A housing to accept at least one electronic component, e.g., a chip with a cover and an opposing cover. The cover and opposing cover are formed to surround the component. On the inner surface of the cover and the opposing cover, there are conductive paths arranged such that the paths on the cover connect terminal areas of the component to the paths on the opposing cover and the paths on the opposing cover open into external terminals of the housing. The cover and/or the opposing cover is/are flexible and are suitable to be interconnected with surrounding sub-housings.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: December 12, 2000
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V
    Inventors: Ghassem Azdasht, Elke Zakel, Herbert Reichl
  • Patent number: 6147869
    Abstract: An Adaptable Planar Module (APM) provides a new packaging concept suitable for motor control and other functions. An insulated metal substrate (IMS) supports power semiconductor devices and is formed in an opening in a support base and extends at or below a bottom surface of a base to allow for thermal contact with a heatsink. A circuit board for supporting and interconnecting lower power devices is mounted above and spaced from the support base and has an opening therein which is located above the IMS. The circuit board has bonding pads which are electrically connected to the low power devices. Bonding wires provide an electrical connection between the bonding pad of the printed circuit board and the power devices on the IMS substrate. Integral or procured terminals are also provided for external connections. Additional circuit boards may also be provided in the module and arranged co-planar with or above the first circuit board.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: November 14, 2000
    Assignee: International Rectifier Corp.
    Inventor: Courtney Furnival
  • Patent number: 6140580
    Abstract: A rectangular housing including a frame, which forms the side walls, a plate fastened on the frame and a door on the frame. On the side facing the plate, the frame includes an undercut groove which is open toward the plate. The groove is bounded by a closing web pointing toward the plate, a center web extending parallel to the plate and a side web extending approximately perpendicularly to the plate. On its side facing the frame, the plate includes a surrounding seal which rests on the front edge of the closing web. The plate is fastened to the frame by several fastening screws.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: October 31, 2000
    Assignee: H.-J. Bernstein GmbH
    Inventor: Jurgen Weiss
  • Patent number: 6137689
    Abstract: A protective enclosure apparatus includes a base and a cover. The base includes a plurality of pins each including cap portion. The cap portion includes a contact surface. A cover includes a plurality of cover openings formed therein for receiving the pins and a latch portion communicating with each of the cover openings. The latch portion is angled to allow an end portion of the latch portion to engage with the contact surface and to allow the latch portion to be biased toward the plurality pins when the cover is pulled away from the base.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: October 24, 2000
    Assignee: 3Com Corporation
    Inventors: Kevin J. Schechtel, David R. Zeiger, Michael B. Grimm
  • Patent number: 6136128
    Abstract: An electronic device, such as an integrated circuit, hybrid circuit or a transistor, is enclosed within an electronic package or module so as to be protected from contaminants and the external environment. An electronic device according to the present invention is enclosed within a package or module having a lid that is sealed with an adhesive preform that has been pre-applied onto the bonding areas of the lid. The adhesive preforms are formed of a wet adhesive deposited on a release substrate as a preform in predetermined locations with respect to a set of reference guide holes so as to facilitate subsequent attachment to lids with pick-and-place equipment or a guide plate. The wet-adhesive preforms are B-staged or dried to form dry solid adhesive preforms through chemical cross-linking or solvent removal, respectively. In most applications, both the lids and the adhesive preforms are formed of electrically insulating materials.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: October 24, 2000
    Assignee: Amerasia International Technology, Inc.
    Inventor: Kevin Kwong-Tai Chung
  • Patent number: 6128193
    Abstract: The present invention relates to two modules containing electronic equipment, one relatively small, and one relatively large, that will be physically connected and used for extended operation in an environment where the ambient atmosphere contains moisture filled air or some other specified environmental contaminant. An absorber such as desiccant of a prescribed amount is contained within at least the relatively large module to control the absolute humidity and/or environmental contaminants within each module during extended operation in the ambient environment. Permeable wall portions are placed in the region between the relatively small module and the relative large module to allow for moisture and/or other specified environmental contaminants to pass from the relatively small module to the relatively large module. As such, the lifespan of the small module can be extended.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: October 3, 2000
    Assignee: Nortel Networks Corporation
    Inventors: John Seaborn Moss, John Watkins, Michal Stefan Tencer, Richard Pierre Hughes
  • Patent number: 6127629
    Abstract: A microelectronic device is hermetically sealed at the wafer level. A substrate is provided having associated electronics and at least one metal bonding pad. A dielectric layer, such as pyrex glass film, is sputter deposited atop the substrate to form a glass/metal seal. A glass film is thereafter planarized, preferably by chemical-mechanical polishing, to remove surface variations. A cover wafer is thereafter anodically bonded to the dielectric layer/glass film so as to define a sealed cavity for housing and protecting the substrate electronics. The resultant microelectronic device is packaged in its own hermetically sealed container at the wafer level.
    Type: Grant
    Filed: October 3, 1994
    Date of Patent: October 3, 2000
    Assignee: Ford Global Technologies, Inc.
    Inventors: Kathirgamasundaram Sooriakumar, Allen Henry Meitzler, Shaun Leaf McCarthy, Russell J. Haeberle
  • Patent number: 6121546
    Abstract: An RF shield dividing components on a printed circuit board into separate compartments in the form of a divider wall having a lower edge surface soldered onto the printed circuit board and an upper edge surface including along the length thereof a plurality of adjacent upwardly extending metal Y-fold arms as a self-contained or built-in gasket to physically contact and electrically ground a metal cover section enclosing the components.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: September 19, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Maria M. Erickson, Richard G. Witty
  • Patent number: 6105226
    Abstract: A leadless ceramic chip carrier useful in surface mounting of SAW devices includes electrically conductive vias and metalization between input and output bond pads for improved crosstalk suppression between input and output device connections. A protrusion extending from a top layer of a multilayer ceramic carrier provides additional electrical contact to a package seal brazed thereto. The vias are positioned between input and output bond pads and connect the metalized protrusion to package ground pads through contact with multiple metalized layers of the package for enhancing the electrical connection between the package Kovar seal ring and customer accessed ground pads. For further suppression of crosstalk, bond pads within the package for connection to the SAW device are spaced at a greater distance from each other than their corresponding pads on the package bottom surface thus maintaining an optimum spacing for package connection to printed circuit board pads for minimizing thermal mismatch effects.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: August 22, 2000
    Assignee: Sawtek Inc.
    Inventors: John G. Gore, Neal J. Tolar, Roy B. Brown, Sunder Gopani
  • Patent number: 6105244
    Abstract: A process for manufacturing a memory card and the adapter thereof, each of which has a first cover, a second cover, a frame and a PC board. The process includes the steps of forming the frame on the second cover by using the Insert Molding Method; disposing the PC board on the second cover with the PC board held by the frame; and gluing the first cover to the frame by using thermal-bonding film.
    Type: Grant
    Filed: November 6, 1997
    Date of Patent: August 22, 2000
    Assignee: Uconn Technology Inc.
    Inventors: Samuel I-En Lin, Jyh-Cherng Yang
  • Patent number: 6094354
    Abstract: A chip component mounting board includes a chip mounting portion and a first groove. A chip component is mounted on the chip mounting portion. The chip mounting portion has a connection pad electrically connected to the chip component. The first groove is formed in the chip mounting portion to extend from a center of the chip mounting portion to one side of the chip mounting portion while gradually increasing its width. A method of manufacturing a chip component mounting board is also disclosed.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: July 25, 2000
    Assignee: NEC Corporation
    Inventors: Toshiaki Nakajoh, Kenichi Tokuno
  • Patent number: 6093889
    Abstract: A mounting socket for a semiconductor package has socket leads that contact the semiconductor package's external leads. The semiconductor package has a package body surrounding a semiconductor chip, as well as internal and external leads. The external leads are formed in an ingot shape and project outwardly from the package body, and are adapted to connect with the socket leads or external terminals. The external leads contact external walls of the package body, thereby preventing undesired bending or breaking of the leads when the package is handled. Fixing and reworking of the package in the socket is easy, since the semiconductor package is inserted into grooves in the socket. It is possible to stack-mount or side-by-side-mount the package, depending on the socket shape, thus improving socket density and making the arrangement suitable for miniaturization.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: July 25, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jae Myoung Choi
  • Patent number: 6091604
    Abstract: Power module for a current converter, particularly a frequency converter, having at least one printed circuit board equipped at least with power components and having a heat-conducting connection with a wall of the current converter housing serving as heat sink, the power module having electrically conducting connection parts arranged vertically to the housing wall, which parts laterally confine a chamber and are long enough to enable accommodation of large, passive electrical components, such as capacitors, in the chamber. To ensure a space saving embodiment of the power module, though maintaining a sufficient heat dissipation and simplifying the electrical connection between the power module and the remaining components of the converter, it is provided that the only electrical connection between the power module and other electrical components of the converter as well as to the supply mains and to a load supplied via the converter is established via the connection parts.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: July 18, 2000
    Assignee: Danfoss A/S
    Inventors: Helge S.o slashed.e Plougsgaard, Klaus Olesen
  • Patent number: 6078501
    Abstract: An electronic module or package is disclosed for providing high reliability and high performance operation. The package comprises a hermetically sealed enclosure having a metallic baseplate and a ceramic cover, and containing one or more circuits or devices therein which typically are power rectifiers, bridges or power control circuitry. One or more power terminals are disposed on a terminal block compliantly supported on or above the baseplate, the terminals extending through the cover in hermetically sealed manner. Signal or control terminals may also be disposed on a terminal block compliantly supported on or above the baseplate, these terminals also extending through the cover in hermetically sealed manner. An adapter plate may be mounted on the cover and containing a plurality of terminals connected to the module terminals. The terminals of the adapter plate can be in any configuration to suit user requirements without requiring a change in the terminal configuration of the module itself.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: June 20, 2000
    Assignee: Omnirel LLC
    Inventors: John Catrambone, David Doiron, Jay Greenspan, William Driscoll, Christopher Clarke, Boris Semenov
  • Patent number: 6051784
    Abstract: Disclosed herein is a semiconductor package having a wire bonding structure. The semiconductor package includes a packaging substrate having a multi-stepped opening extending to a selected depth from the surface of the substrate. The area of the opening decreases as the level from the upper surface decreases. The substrate also includes: a die attach region positioned at the lowest bottom plane of the multi-stepped opening, on which the semiconductor chip is attached; a step plane formed at the upper step plane over the die attach region, on which a plurality of first interconnections for signal transfer paths are printed; and a plurality of outer leads electrically connected to the plurality of first interconnections the plurality of alter leads, projected outwards from the packaging substrate. There is also provided in the package a connecting member having a through hole at its central portion and a plurality of second interconnections at its circumference.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: April 18, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Suck-Jun Yoon
  • Patent number: 6043437
    Abstract: A protective, biocompatible coating or encapsulation material protects and insulates a component or device intended to be implanted in living tissue. The coating or encapsulation material includes a thin layer or layers of alumina, zirconia, or other ceramic, less than 25 microns thick, e.g., 5-10 microns thick. The alumina layer(s) may be applied at relatively low temperature. Once applied, the layer provides excellent hermeticity, and prevents electrical leakage. Even though very thin, the alumina layer retains excellent insulating characteristics. In one embodiment, an alumina layer less than about 6 microns thick provides an insulative coating that exhibits less than 10 pA of leakage current over an area 75 mils by 25 mils while soaking in a saline solution at temperatures up to 80.degree. C. over a three month period.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: March 28, 2000
    Assignee: Alfred E. Mann Foundation
    Inventors: Joseph H. Schulman, Joseph Y. Lucisano, Rajiv Shah, Charles L. Byers, Shaun M. Pendo
  • Patent number: 6040526
    Abstract: A crash-survivable enclosure assembly (5) for protecting a data memory unit (45) used in vehicles. The crash-survivable enclosure assembly has an enclosure (10) which has an access opening (30) and an inner enclosure surface (22). A fixed position access panel support element (36), which has inner (73) and outer (74) support surfaces, extends inward from inner enclosure surface (22). Enclosure assembly (5) also has a removable access panel (50), which has a panel inner surface (51), positioned against outer support surface (74) of support element (36). The inner enclosure surface and the access panel inner surface form an inner cavity which is used to store the data memory unit. Enclosure assembly (5) has a retention device (60) which is used to secure access panel (50) to enclosure (10). Retention device (60) has a mechanical member, with a main surface mounted against the inner support surface of the support element. Extending from the main surface of the mechanical member is a fulcrum (62).
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: March 21, 2000
    Assignee: AlliedSignal
    Inventor: Richard A. Olzak
  • Patent number: 6040974
    Abstract: A capacitor cover for closing an open end of a capacitor, including an elastomeric outer layer, a rigid middle layer and a polypropylene inner layer, each with an aperture so as to allow passage of a terminal through the capacitor cover, is described. The inner layer has a peripheral skirt and an annular skirt which extend outwardly sufficiently to prevent electrolyte from the capacitor from coming into contact with the peripheral surface and the annular surface of the rigid middle layer. The capacitor cover can result in the capacitor achieving a temperature tolerance of at least about 105.degree. C. An electrolytic capacitor, including a capacitor body, an electrolyte and a capacitor cover is also described.
    Type: Grant
    Filed: July 19, 1994
    Date of Patent: March 21, 2000
    Assignee: Universal Products, Inc.
    Inventor: Steven A. Rubin
  • Patent number: 5999413
    Abstract: A resin sealing type semiconductor device capable of making a resin burr hard to occur when formed by molds and of restraining cracks in solder, is actualized by providing a stepped portion on a resin sealing body for covering a circuit forming surface of a semiconductor chip, making leads exposed from this exposed surface and joining solder bumps to the leads.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: December 7, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Shinji Ohuchi, Noritaka Anzai
  • Patent number: 5998733
    Abstract: An electronic package includes a graphite-aluminum metal matrix composite (MMC) housing or support member that dissipates heat from an electronic component or circuit and a hermetic glass feedthrough seal between the graphite-aluminum MMC material and one or more electrical feedthrough pins or wires connected to the electronic component. The glass feedthrough seal comprises a low melting point, low coefficient of expansion (CTE) solder glass, such as lead zinc borosilicate, effective to form a hermetic glass-to-composite seal by a combined chemical and mechanical compression sealing force. The vitreous solder glass preferably exhibits a CTE in the range of about 41 to about 78 ppm/degree C. and a melting temperature in the range of about 300 to about 500 degrees C.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: December 7, 1999
    Assignee: Northrop Grumman Corporation
    Inventor: Carl R. Smith
  • Patent number: 5951399
    Abstract: An ergonomic and weatherproof hand-held electronic device 10. The device 10 includes a housing 12 which surrounds internal electronics. An input 28 and a display screen 32 are mounted on the housing 12. The housing 12 is has a narrow width such that, when held in a hand, the thumb of that same hand may extend fully across the input 28 for full access. The display screen 32 is mounted vertically below the input 28 such that the device may be more stable and more easily grasped. The device includes two cylindrical cavities 48 to receive batteries 42. The cavities 48 are located at the rear vertical edges of the housing such that the rear of the housing 12 is relatively rounded and thus easier to grasp. The battery cavities open to the exterior of the housing. A battery cover 54 is mounted to the housing and seals the cavities 48. A contact for each cavity 48 is located on the cover, and a bus bar extends between the contacts to complete the circuit between the batteries 42.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: September 14, 1999
    Assignee: Garmin Corporation
    Inventors: Gary L. Burrell, Jonathan C. Burrell
  • Patent number: 5949655
    Abstract: A mounting for a flip chip integrated circuit device having a light sensitive cell is disclosed. The mounting includes an insulating substrate having an aperture between its first and second surfaces. A flip chip integrated circuit device is placed on the first surface of the substrate. A light sensitive cell of the integrated circuit device faces the aperture. Solder bumps on the integrated circuit are electrically connected to corresponding conductive metallizations on the first surface of the substrate. A transparent aperture cover is affixed to the second surface of the substrate with an adhesive bead. The aperture cover extends over the aperture, allowing light to be transmitted through the aperture cover to the light sensitive cell. The side surfaces of the aperture cover include features for locking the adhesive bead to the aperture cover.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: September 7, 1999
    Assignee: Amkor Technology, Inc.
    Inventor: Thomas P. Glenn
  • Patent number: 5929517
    Abstract: Semiconductor chip packages and methods of fabricating the same. The package includes a thermally conductive protective structure having an indentation open to a front side and a flange surface at least partially surrounding the indentation and facing to the front of the structure. A chip is disposed in the indentation so that the front surface of the chip, with contacts thereon, faces toward the front of the structure. A flexible dielectric film having terminals thereon is placed on the flange surface, and a compliant material is disposed between the film and the flange surface. The terminals on the film are connected to the contacts on the chip. The individual terminals on the film are movable with respect to the protective structure, which facilitates mounting and compensation for thermal expansion.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: July 27, 1999
    Assignee: Tessera, Inc.
    Inventors: Thomas H. Distefano, Konstantine Karavakis, Craig Mitchell, John W. Smith
  • Patent number: 5929629
    Abstract: The invention provides a high-accuracy and high-reliability magnetic sensor which can be produced with a high production yield at a low cost.
    Type: Grant
    Filed: September 11, 1997
    Date of Patent: July 27, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Naoki Hiraoka, Hiroshi Sakanoue, Noriaki Hayashi, Wataru Fukui, Yutaka Ohashi
  • Patent number: 5920242
    Abstract: A multielement-type piezoelectric filter capable of facilitating assembly and having a reduced size. The base substrate carries a conduction circuit. An input terminal portion, an output terminal portion and a ground terminal portion are formed on a bottom surface of the base substrate and connected to corresponding connection end portions of the conduction circuit. Furthermore, series resonators and parallel resonators are arranged side by side on the base substrate. The lower electrodes of the resonators are connected to the corresponding connection end portions of the conduction circuit via through-holes. In one embodiment, conductive sheets are attached onto exposed upper electrodes of some of the resonators so as to establish a required connection between the upper electrodes. In another embodiment, a common path layer is formed on the upper surface of the base substrate. The upper electrodes of some of the resonators are connected to the common path layer via bonding wires.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: July 6, 1999
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Kanji Oya, Eiji Ozeki, Kazuhiro Hayashi
  • Patent number: 5896268
    Abstract: A repeater case for high-density subscriber lines includes a repeater base and repeater case housing formed of a fiberglass composite and together forming a sealed enclosure for a pressurized atmosphere. The repeater case housing has a removable cover secured in position by torque bolts, a sealing gasket to sealingly receive the cover, a plurality of high-density subscriber line module slots and a plurality of printed circuit boards mounted to certain of the slots with gaps between adjacent printed circuit boards, the printed circuit boards being adapted to receive respective high-density subscriber line modules. The repeater base has a cable inlet, and each of the plurality of printed circuit boards is provided with a connection to the cable inlet and a connector to electrically receive one of the high-density subscriber line modules. The repeater base also includes an electrically insulating barrier between the cable inlet and the printed circuit boards.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: April 20, 1999
    Assignee: Abacon Telecommunications Corporation
    Inventor: Roger L. Beavers
  • Patent number: 5892417
    Abstract: A method for packaging an acoustic wave filter die, and an acoustic wave filter die packaged by the method. The method includes steps of providing an acoustic wave filter die having an active area disposed on a first surface thereof, providing a leadframe including a die flag and sealing the first surface to the die flag. The method also includes steps of molding a plastic package body about the die and the die flag and singulating the plastic body, the die and the die flag. The molding step desirably includes substeps of placing the acoustic wave filter die sealed to the leadframe in a mold, applying a thermosetting plastic material at a suitable temperature less than the glass transition temperature and at a suitable pressure to the acoustic wave filter die sealed to the leadframe in the mold and maintaining the suitable temperature for a suitable period of time.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: April 6, 1999
    Assignee: Motorola Inc.
    Inventors: Gary Carl Johnson, Michael J. Anderson, Gregory Jon Kennison, Jeffrey Eanes Christensen, Mark Phillip Popovich
  • Patent number: 5872331
    Abstract: An improved hermetically sealed case for enclosing an electronic element, wherein the case has an upper portion and a lower portion connected together by atomic bonding. The upper portion includes through holes. Each hole forms a lead to provide a connection from the outside of the case to the element within the case. Each lead is arranged in the through hole to seal the hole hermetically and yet provide an electrical contact for the element. The sealed case prevents the electronic element from being deteriorated by hazardous gas generated by the conventional welding process used to seal such cases.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: February 16, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizo Ando, Syuji Kondo, Kunihiko Oishi
  • Patent number: 5867368
    Abstract: A mounting for a semiconductor integrated circuit device, such as a charge coupled device ("CCD") or an erasable programmable read only memory device ("EPROM"), includes an insulating substrate having an aperture between its first and second surfaces. A first surface of the integrated circuit device is placed adjacent to and facing the first surface of the substrate. Light sensitive circuitry on the first surface of the integrated circuit device is aligned with the aperture. Solder bumps on the periphery of the first surface of the integrated circuit are electrically connected to corresponding conductive metallizations on the first surface of the substrate. A aperture cover transparent to light is affixed to the second surface of the substrate and extends over the aperture, so that light may be transmitted through the aperture cover and aperture to the light sensitive circuitry on the first surface of the integrated circuit device. The substrate may be a printed circuit board.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: February 2, 1999
    Assignee: Amkor Technology, Inc.
    Inventor: Thomas P. Glenn
  • Patent number: 5866878
    Abstract: A kettle includes a water tank, an electrical element under the bottom of the tank, connecting members to be connected to an electrical power supply and arrangements for regulating the operation of the element. The regulator arrangements and the connecting members include pins to be inserted in a connection module. Electrical connecting wires for connecting the pins are accommodated inside the connection module.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: February 2, 1999
    Assignee: SEB S.A.
    Inventor: Jacques Lacombe