On Lead Frame Patents (Class 174/529)
  • Patent number: 11410844
    Abstract: Devices, methods, and systems for enclosures for an ion trapping device are described herein. One enclosure for an ion trapping device includes a heat spreader base that includes a plurality of apertures. The ion trapping device may also include a grid array having a plurality of pins extending outward from a surface of the grid array. The apertures of the heat spreader base may be arranged such that the plurality of pins passes through the plurality of apertures.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: August 9, 2022
    Assignee: Honeywell International Inc.
    Inventors: Benjamin Spaun, Zachary Price, Matthew Swallows
  • Patent number: 11380535
    Abstract: Devices, methods, and systems for enclosures for an ion trapping device are described herein. One enclosure for an ion trapping device includes a heat spreader base that includes a plurality of apertures. The ion trapping device may also include a grid array having a plurality of pins extending outward from a surface of the grid array. The apertures of the heat spreader base may be arranged such that the plurality of pins passes through the plurality of apertures.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: July 5, 2022
    Assignee: Honeywell International Inc.
    Inventors: Benjamin Spaun, Zachary Price, Matthew Swallows
  • Patent number: 11348808
    Abstract: A method for manufacturing a switch-mode converter includes forming a plurality of windings by coiling one or more conductors. Each of the windings is secured to one of a plurality of module bases arranged in a module array. At least one side of the array is encapsulated in a magnetic mold compound.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: May 31, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kristen Nguyen Parrish, Charles Devries
  • Patent number: 11342276
    Abstract: In one example, an electronic device structure includes a substrate having a conductive structure adjacent to a surface. The conductive structure can include a plurality of conductive pads. First and second electronic devices are disposed adjacent to the top surface. The first electronic device is interposed between a first conductive pad and a second conductive pad, and the second electronic device is interposed between the second conductive pad and a third conductive pad.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: May 24, 2022
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Ji Young Chung, Jae Ho Lee, Byong Il Heo
  • Patent number: 11320466
    Abstract: Methods and apparatus for measuring a current difference between at least two current traces in a circuit board. Each wire or trace generates a magnetic field which may then be measured by at least one magnetic field sensing element positioned on an integrated circuit, such as a current sensor integrated circuit or a differential magnetic field sensor integrated circuit. An output disconnect signal may be provided from the current sensor or differential magnetic field sensing integrated circuit to indicate that a current difference above a predetermined threshold exists in the two or more current traces.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: May 3, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Robert A. Briano, Wade Bussing, Timothy A. Clark
  • Patent number: 11244774
    Abstract: A resistor includes: a first resin protruding part formed in the bottom surface of an exterior material (mold resin body), on an end opposite to a leading side of harness wires along the length of the exterior material near a through-hole piercing an upper surface and a lower surface of the exterior material, and a second resin protruding part, surrounding the circumference of a metal bush embedded in the through-hole and the entire circumference of the resistor substrate. Moreover, a concave part is formed in a region sandwiched between the first resin protruding part and the second resin protruding part.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: February 8, 2022
    Assignee: KOA Corporation
    Inventors: Masaki Miyagawa, Hironobu Nakajima, Kyohei Miyashita, Yuto Matsui
  • Patent number: 11240905
    Abstract: The invention relates to a method for producing a printed circuit board—cooling body structure and such a printed circuit board—cooling body structure, in particular for arrangement in a lighting device of a vehicle, the method comprising at least the following steps: providing a base plate; coating a carrier side of the base plate with an insulation layer and/or with a solder resist; fitting the carrier side with at least one electronic component and applying cooling rib bodies to a cooling side of the base plate opposite the carrier side.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: February 1, 2022
    Assignee: Hella GmbH & Co. KGaA
    Inventors: Dirk Boesch, Frank Brinkmeier, Markus Goesling, Christian Koerdt, Werner Koesters, Frank Muenzner, Sebastian Nordhoff, Marc Schlueter, Thomas Wiese
  • Patent number: 11134570
    Abstract: An electronic module includes: a lead frame having at least one metal strip and a plurality of metal leads, wherein a magnetic body encapsulates a portion of each of the at least one metal strip with two ends of each of the at least one metal strip not covered by the magnetic body; and a substrate disposed on the lead frame, wherein the substrate is electrically connected to the plurality of metal leads and the at least one metal strip.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: September 28, 2021
    Assignee: CYNTEC CO., LTD.
    Inventors: Chun Hsien Lu, Bau-Ru Lu, Kaipeng Chiang
  • Patent number: 11024576
    Abstract: A semiconductor package includes a leadframe including a sensor coil between sensor coil leads and further including a plurality of die leads physically and electrically separated from the sensor coil, and a semiconductor die over the leadframe with die contacts electrically connected to the die leads. The semiconductor die includes a sensor operable to detect magnetic fields created by electrical current through the sensor coil, the semiconductor die operable to output a signal representative of the detected magnetic fields via the die leads. The semiconductor package further includes a dielectric underfill filling a gap between the sensor coil and the semiconductor die, and a dielectric mold compound covering the sensor coil and the dielectric underfill and at least partially covering the semiconductor die and the die leads.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: June 1, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jeffrey Alan West, Byron Lovell Williams, Thomas Dyer Bonifield
  • Patent number: 10932366
    Abstract: Embedded PCB (printed circuit board) is used for the packaging and assembly of a low profile power conversion system module that can be employed in space constrained environment of small computer/electronic systems. The low profile power conversion system module may include an embedded PCB, a power silicon device embedded within the PCB, a magnetic component which is either embedded within the PCB or disposed on the PCB, or input/output terminals disposed on the side of the embedded PCB. The embedded PCB and the magnetic component may be thin planar shaped to save vertical space. The low profile power conversion system module can be placed inside a cavity formed in the system PCB to save even more vertical space.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: February 23, 2021
    Assignee: Apple Inc.
    Inventors: Sunil M. Akre, Shawn X. Arnold
  • Patent number: 10908190
    Abstract: Systems and methods described herein are directed towards differential current sensing a current sensor having two or more magnetic field sensing elements that are oriented to sense a magnetic field generated by a current through an external conductor in the same direction. The current sensor can be positioned such that at least one first magnetic field sensing element is vertically aligned with the external conductor and at least one second magnetic field sensing element is not vertically aligned with the external conductor. The magnetic field sensing elements may be spaced from each to measure a gradient field and can generate a magnetic field signal indicative of a distance between the respective magnetic field sensing element and the current carrying external conductor. A difference between the magnetic field signals can be determined that is indicative of the current through the external conductor.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: February 2, 2021
    Assignee: Allegro MicroSystems, LLC
    Inventors: Wade Bussing, Alexander Latham, Shaun D. Milano, Christian Feucht
  • Patent number: 10755940
    Abstract: A system, method, and silicon chip package for providing connections between a die of a silicon chip package and external leads of the silicon chip package is disclosed. The connections are formed using a pre-mold etched with a trace pattern. The trace pattern provides rigid traces that connect the die with the external leads.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: August 25, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jerard Canuto Malado, Antonio Rosario Taloban, Jr.
  • Patent number: 10643929
    Abstract: A coupling device provides galvanic isolation using a leadframe that is configured to support two integrated circuit chips in a coplanar manner. Each chip contains an inductive coupling coil. The lead frame includes a set of bond pads for attaching bond wires to couple to the two integrated circuit chips. Two separated die attach pads support the two chips. Each die attach pad is configured to support one of the two integrated circuit chips with a plurality of cantilevered fingers.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: May 5, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Michael Sutton, Sreenivasan K Koduri, Subhashish Mukherjee
  • Patent number: 10593566
    Abstract: A method for manufacturing a switch-mode converter includes forming a plurality of windings by coiling one or more conductors. Each of the windings is secured to one of a plurality of module bases arranged in a module array. At least one side of the array is encapsulated in a magnetic mold compound.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kristen Nguyen Parrish, Charles Devries
  • Patent number: 10481181
    Abstract: Systems and methods described herein are directed towards differential current sensing a current sensor having two or more magnetic field sensing elements that are oriented to sense a magnetic field generated by a current through an external conductor in the same direction. The current sensor can be positioned such that at least one first magnetic field sensing element is vertically aligned with the external conductor and at least one second magnetic field sensing element is not vertically aligned with the external conductor. The magnetic field sensing elements may be spaced from each to measure a gradient field and can generate a magnetic field signal indicative of a distance between the respective magnetic field sensing element and the current carrying external conductor. A difference between the magnetic field signals can be determined that is indicative of the current through the external conductor.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: November 19, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Wade Bussing, Alexander Latham, Shaun D. Milano, Christian Feucht
  • Patent number: 10427407
    Abstract: In an example, a method for making a fluid ejection apparatus may include forming a molding material over a fluid passage on a back surface of printhead die, embedding the printhead die in an encapsulant in a cavity in a printed circuit board such that at least one drop ejector of the printhead die is exposed at a front side of the printed circuit board, removing the encapsulant at a back side of the printed circuit board to expose the molding material, and removing the molding material to form a fluid feed slot through which fluid may flow to the fluid passage opening in the printhead die.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: October 1, 2019
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Chien-Hua Chen, Michael W Cumbie, Devin Alexander Mourey
  • Patent number: 10396112
    Abstract: An imaging apparatus includes: an interposer on which an image sensor including a light reception section is disposed; a translucent member that is provided on the light reception section; and a mold that is formed in sides of the interposer having a rectangular shape and bonded to the translucent member to support the translucent member, the mold including a seal surface that is bonded to the translucent member, the seal surface being provided with a protrusion.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: August 27, 2019
    Assignee: Sony Corporation
    Inventor: Kiyotaka Hori
  • Patent number: 10345343
    Abstract: A current sensor integrated circuit includes a lead frame having a primary conductor and at least one secondary lead, a semiconductor die disposed adjacent to the primary conductor, an insulation structure disposed between the primary conductor and the semiconductor die, and a non-conductive insulative material enclosing the semiconductor die, the insulation structure, a first portion of the primary conductor, and a first portion of the at least one secondary lead to form a package. The first portion of the at least one secondary lead (between a first end proximal to the primary conductor and a second end proximal to the second, exposed portion of the at least one secondary lead) has a thickness that is less than a thickness of the second, exposed portion of the least one secondary lead. A distance between the second, exposed portion of the primary conductor and the second, exposed portion of the at least one secondary lead is at least 7.2 mm.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: July 9, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Shaun D. Milano, Shixi Louis Liu
  • Patent number: 10340397
    Abstract: A package for an optical sensor device has a double-molded structure in which a first resin molded portion and a second resin molded portion are integrated. The first resin molded portion has a structure in which peripheries of a die pad portion on which an optical sensor element is mounted and a part of leads are molded with a resin so as to be integrated. The second resin molded portion has a structure in which the periphery of the first resin molded portion is molded with a resin so as to form an outer shape of the package. A glass substrate having a filter function is bonded to an upper surface of the resin molded portions to form a cavity in which is mounted the optical sensor element.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: July 2, 2019
    Assignee: ABLIC Inc.
    Inventor: Koji Tsukagoshi
  • Patent number: 10338019
    Abstract: A sensor substrate according to the present invention includes an insulating substrate, a detection electrode on a principal surface of the insulating substrate, and resistance wiring including a heating electrode in the insulating substrate. The resistance wiring includes a multilayer wiring portion which is connected to the heating electrode and in which wires and other wires are connected in parallel.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: July 2, 2019
    Assignee: KYOCERA CORPORATION
    Inventors: Takashi Kimura, Hidekazu Otomaru
  • Patent number: 10271448
    Abstract: Systems and methods are disclosed herein for a low cost, compact size, and thin half-etched leadframe quad-flat no-leads (QFN) package that integrates RF passive elements in the QFN leadframe for linearized PA design and RF FEMs. The integrated RF passive elements in the QFN leadframe may include RF inductors (e.g., meanders lines or spirals) for amplifier bias or RF matching, extension bar of the ground paddle for inter-stage matching or jumper pads for connection. The integrated RF passive elements may also include transmission lines for output power matching, coupled line structures such as RF couplers, RF divider or combiner realized using transmission lines with proper impedance and length, jumper pads for adjusting the bond wire length, etc. The RF parameters of the integrated passive elements are adjustable using different length and number of wire bond for fine tuning the performance of the PAM or the RF FEM.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: April 23, 2019
    Assignee: INVESTAR CORPORATION
    Inventors: Cindy Yuen, Duc Chu
  • Patent number: 10264695
    Abstract: A power converter includes a power semiconductor module, a control circuit board, and a case. The power semiconductor module includes a switching element and a metal module case for forming a storage space to store the switching element. The case includes a resin case, a metal case, and a metal base. The resin case stores the power semiconductor module. The metal case stores the control circuit board. The metal base is disposed so as to separate a storage space of the resin case and a storage space of the metal case. The resin case forms a refrigerant flow channel. The metal base includes a first opening. The power semiconductor module is disposed such that the storage space of the module case and the storage space of the metal case are connected via the first opening of the metal base.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: April 16, 2019
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventor: Takeshi Matsuo
  • Patent number: 10256379
    Abstract: An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment an optoelectronic component includes at least one metallic surface, a contacted optoelectronic semiconductor chip configured to emit radiation and a protective layer arranged on the at least one metallic surface, wherein the protective layer comprises a protective material of at least one N-heterocyclic carbene, and wherein a covalent bond is formed between the protective material and the at least one metallic surface.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: April 9, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Gudrun Lindberg
  • Patent number: 10243569
    Abstract: An apparatus includes a temperature measuring device within a thermally conductive package. A crystal within the package is thermally coupled to the temperature measuring device and subjected to a same temperature as the temperature measuring device. A controller external to the package is configured to receive a signal from the crystal and a temperature measurement from the temperature measuring device. The controller is configured to estimate a frequency error of the crystal based on the temperature measurement and to provide a frequency error estimate to an external system.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: March 26, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Rick A. Wilcox, Daniel F. Filipovic, Xu Mike Chi, Chris M. Rosolowski
  • Patent number: 10136533
    Abstract: A method is provided for producing an electronic module that includes an electronic assembly with a conductor which is arranged in a housing, and which includes an electrical contact guided out through the housing wall. In the method, a protective layer is removed from an area of the conductor by ablation, and then a potting or casting compound is introduced into the housing, so that the potting compound covers a location at which the electrical contact passes through the housing wall, and the potting compound adheres directly onto the exposed conductor at the area at which the protective layer was removed.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: November 20, 2018
    Assignees: Continental Teves AG & Co. oHG, Continental Automotive GmbH
    Inventors: Henryk Frenzel, Dietmar Huber, Jakob Schillinger, Joerg Moestl, Karl-Heinz Scherf, Georg Weber
  • Patent number: 10079543
    Abstract: An integrated circuit package includes an electromagnetic communication link formed by a portion of a lead frame within an encapsulation. The lead frame includes a first conductor forming a first conductive loop a second conductor forming a second conductive loop galvanically isolated from the first conductive loop. The second conductive loop is magnetically coupled to the first conductive loop to provide a magnetic communication link between the first and second conductors. A first transceiver circuit includes a transmit circuit coupled to the first conductive loop. A second transceiver circuit includes a receive circuit coupled to the second conductive loop. A signal transmitted from the transmit circuit included in first transceiver circuit and coupled to the first conductor is coupled to be magnetically communicated through the magnetic communication link to the receive circuit included in second transceiver circuit and coupled to the second conductor.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: September 18, 2018
    Assignee: Power Intergrations, Inc.
    Inventors: Balu Balakrishnan, David Michael Hugh Matthews
  • Patent number: 10070528
    Abstract: A semiconductor device, while being small, makes it possible to achieve low inductance responding to high speed switching. The semiconductor device includes a plurality of conductive pattern members, on each of which is mounted one or a plurality of power semiconductor chips, and a printed circuit board wherein a chip rod-form conductive connection member connected to the power semiconductor chip and a pattern rod-form conductive connection member connected to the conductive pattern member are disposed on the surface opposing the conductive pattern member. The conductive pattern member is formed of a narrow portion and a wide portion, the narrow portion of at least one conductive pattern member and the printed circuit board are connected by the pattern rod-form conductive connection member, and a current path is formed between the conductive pattern member and the power semiconductor chip connected via the chip rod-form conductive connection member to the printed circuit board.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: September 4, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hideyo Nakamura, Masafumi Horio
  • Patent number: 10048139
    Abstract: A flexible transducer structure suitable for attaching to a curved surface such as the leading edge of an aircraft wing is provided. In one example embodiment, a method may include receiving, at a sensor disposed on a flexible sheet, a pressure, wherein the sensor is electrically coupled to a conductive trace disposed on the flexible sheet; measuring, by the sensor, the pressure to generate a pressure signal; outputting, by the sensor, to the conductive trace, the pressure signal, wherein the conductive trace extends away from the sensor on the flexible sheet; and wherein the flexible sheet is adaptable to conform to a contour of a curved surface.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: August 14, 2018
    Assignee: KULITE SEMICONDUCTOR PRODUCTS, INC.
    Inventor: Nora Kurtz
  • Patent number: 10043839
    Abstract: An imaging apparatus includes: an interposer on which an image sensor including a light reception section is disposed; a translucent member that is provided on the light reception section; and a mold that is formed in sides of the interposer having a rectangular shape and bonded to the translucent member to support the translucent member, the mold including a seal surface that is bonded to the translucent member, the seal surface being provided with a protrusion.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: August 7, 2018
    Assignee: Sony Corporation
    Inventor: Kiyotaka Hori
  • Patent number: 10026625
    Abstract: A device that includes a component and an encapsulation arrangement for the encapsulation of the component with respect to moisture and/or oxygen, wherein the encapsulation arrangement has a first layer and thereabove a second layer on at least one surface of the component, the first layer and the second layer each comprise an inorganic material, and the second layer is arranged directly on the first layer.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: July 17, 2018
    Assignee: OSRAM OLED GmbH
    Inventors: Christian Schmid, Tilman Schlenker, Heribert Zull, Ralph Paetzold, Markus Klein, Karsten Heuser
  • Patent number: 9935040
    Abstract: A semiconductor module can be realized, which is formed by mounting an electronic component and a bus bar by solder on a lead frame including a plurality of terminals, wherein a solder flow suppressing section capable of restricting a direction of flow of solder on the lead frame is formed in the vicinity of the solder portion of the component mounted by solder, and by this configuration, positional deviation, such as rotation or movement of the mounted component, is suppressed and the size of the module can be made compact.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: April 3, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shunsuke Fushie, Yu Kawano, Yoshihito Asao
  • Patent number: 9893001
    Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: February 13, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Arrigoni, Alberto Da Dalt
  • Patent number: 9760132
    Abstract: Stiffening is provided for an electronic package assembly having a substrate. A first electronic package, having a first function, is electromechanically fastened to a first surface of the substrate with a first array of electrically conductive interconnects, which is disposed over a central area of the substrate first surface. A second electronic package, having a second function, is fastened to the first substrate surface with a second conductive interconnect array. At least a pair of the first array conductors is electrically coupled to at least a pair of the second array conductors for data/signal exchange and at least a component of the first electronic package interacts with at least a component of the second package. A metallic stiffener ring is disposed about an outer periphery of at least the central area of the substrate.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: September 12, 2017
    Assignee: Nvidia Corporation
    Inventors: Leilei Zhang, Ron Boja, Abraham Yee, Zuhair Bokharey
  • Patent number: 9698087
    Abstract: A semiconductor device includes a quadrilateral package with a first pair of opposed sides and a second pair of opposed sides. Both sides of the first pair of opposed sides are provided with electrical contact leads. Only one side of the second pair of opposed sides is provided with electrical contact leads. The side of the second pair of opposed sides without electrical contact leads is a leadless side. That side is not a molded side of the package, but rather is defined by a cut surface.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: July 4, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Arrigoni, Alberto Da Dalt
  • Patent number: 9679930
    Abstract: An imaging apparatus includes: an interposer on which an image sensor including a light reception section is disposed; a translucent member that is provided on the light reception section; and a mold that is formed in sides of the interposer having a rectangular shape and bonded to the translucent member to support the translucent member, the mold including a seal surface that is bonded to the translucent member, the seal surface being provided with a protrusion.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: June 13, 2017
    Assignee: Sony Corporation
    Inventor: Kiyotaka Hori
  • Patent number: 9590215
    Abstract: Disclosed are a power control module and a battery pack having the same. The battery pack includes a housing, a battery cell received in the housing and including a power terminal, a power control module provided at one side thereof with a first connection terminal, provided at an opposite side thereof with a battery connection terminal connected with the power terminal, and having a structure in which chip parts are packaged, and a cell cover coupled with an upper portion of the housing.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: March 7, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Dae Hun Kim
  • Patent number: 9548472
    Abstract: A display device comprises a first substrate including a first top portion, a first sidewall portion and a first bent portion, a second substrate including a second top portion, a second sidewall portion and a second bent portion, a display element and a packaging material. The first bent portion is disposed between the first top portion and the first sidewall portion. The second substrate is separated from the first substrate by a predetermined distance to form an accommodating space. The second top portion is disposed corresponding to the first top portion. The second bent portion is disposed between the second top portion and the second sidewall portion. The display element is disposed in the accommodating space. The packaging material is disposed in the accommodating space and corresponding to the first sidewall portion and the second sidewall portion.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: January 17, 2017
    Assignee: InnoLux Corporation
    Inventors: Yi-Xin Yang, Cheng-Hsiung Liu, Fang-Iy Wu, Cheng-Hsu Chou
  • Patent number: 9406595
    Abstract: A semiconductor package includes a die pad, wherein a semiconductor die is mounted on the die pad; a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad; at least one connecting bar connecting with the die pad; and a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead. A capacitor is mounted between the power bar and the connecting bar.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: August 2, 2016
    Assignee: MEDIATEK INC.
    Inventor: Nan-Jang Chen
  • Patent number: 9366700
    Abstract: A current sensor includes a conductive element, and at least two magnetic field sensors arranged on the conductive element and configured to sense a magnetic field generated by a current through the conductive element, wherein the at least two magnetic field sensors are arranged on opposite sides of a line perpendicular to a current flow direction in the conductive element. The current sensor further includes an insulating layer arranged between the conductive element and the magnetic field sensors, and at least two conductor traces provided on the insulating layer, wherein one end of the conductor traces connects to a respective magnetic field sensor, and the other end of the conductor traces providing a terminal for outputting the sensor signals. The conductor traces are arranged such that they do not extend entirely around the conductive element.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: June 14, 2016
    Assignee: Infineon Technologies AG
    Inventor: Udo Ausserlechner
  • Patent number: 9363901
    Abstract: A method of making a plurality of integrated circuit packages provides a metal strip. A first leadframe having a first die pad is formed on the metal strip. Also formed are a first plurality of leads with proximal ends adjacent to the first die pad, free distal ends positioned outwardly from the first die pad, and a first leadframe dam bar intersecting the proximal ends of the first plurality of leads. A second leadframe having a second die pad, a second plurality of leads with proximal ends adjacent to the second die pad and free distal ends positioned outwardly from the second die pad and a second leadframe dam bar intersecting the proximal ends of the second plurality of leads are formed on the metal strip. The free distal ends of said second plurality of leads are aligned with and adjacent to said free distal ends of said first plurality of leads.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: June 7, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Wen Yu Lee, Steven Su
  • Patent number: 9291881
    Abstract: An image sensor is positioned at a fixing member and adheres to and is fixed to the fixing member by pouring an adhesive into the opening. The opening is formed in a shape that extends in a short-side direction of the image sensor at a position corresponding to a substantially central portion of the image sensor in a long-side direction. The opening is formed such that an opening width on a side not facing the image sensor is larger than an opening width on a side facing the image sensor.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: March 22, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoshikazu Asai
  • Patent number: 9274140
    Abstract: A contactor uses a pogo block in a first configuration as a direct integrated circuit test socket and the contactor can be reconfigured to provide a pogo block assembly to interface between a main test printed circuit board (PCB) and a daughter card that is dedicated to a specific device handler and/or a specific package type that can be different from the main test PCB. A pogo block is inserted into a thick frame with an alignment plate for contactor use in which a device under test fits into a recess in the frame through an alignment plate to align the device under test to make contact with electrical contacts of the contactor. The frame and guide plate can be removed and a thinner frame coupled to the contactor, which changes its function to a pogo block assembly.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: March 1, 2016
    Assignee: Silicon Laboratories Inc.
    Inventors: Larry R. Rose, Craig N. Gabelmann, Wenshui Zhang
  • Patent number: 9263416
    Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: February 16, 2016
    Assignee: SUMITOMO BAKELITE CO., LTD.
    Inventors: Christopher Apanius, Robert A. Shick, Hendra Ng, Andrew Bell, Wei Zhang, Phillip S. Neal
  • Patent number: 9198281
    Abstract: A leadframe for semiconductor packages is provided. The leadframe includes a die pad, a side rail, a tie bar, and a plurality of leads. The side rail is around the die pad. The tie bar connects the die pad and the side rail. The leads extend from the side rail to close proximity to the die pad. The leads includes a first lead and a second lead being at opposite locations of the leadframe relative to a center line through the die pad. The first and second leads are substantially asymmetrical with each other relative to the center line and have different impedance values. The plurality of leads are disconnected from each other.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: November 24, 2015
    Assignee: MEDIATEK INC.
    Inventor: Tao Cheng
  • Patent number: 9190353
    Abstract: A semiconductor chip package includes a lead frame having a die paddle, leads surrounding the paddle and a central window through the paddle. A substrate has a base side and a superior side. A peripheral portion of the base side is secured to the paddle and a central portion of the base side is exposed through the central window. A semiconductor chip is secured to the superior side of the substrate. The semiconductor chip is electrically connected to the plurality of leads and the substrate. A mold compound covers at least portions of the lead frame, the substrate and the semiconductor chip. The chip package can be electrically connected to other devices or a circuit board by way of the leads and BGA pads of the substrate exposed in the central window.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: November 17, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mariano Layson Ching, Jr., Allen M. Descartin, Bo Li
  • Patent number: 8957311
    Abstract: A wire harness including a wire fitting that holds a wire in a predetermined shape is provided. A wire fitting includes a base molded to an uneven plate-shape and a cover covering a wiring space of the base. In the base, an outer frame portion formed projecting around the wiring space on a wiring portion forming a bottom plate includes an inner edge step portion, an intermediate plate portion, and an outer edge step portion. In the intermediate plate portion, which projects outward, a plurality of through holes for wire fastening are formed linearly along the perimeter of the wiring space, the number of the through holes for wire fastening being at least the number of wire fasteners attached to that portion of a wire that extends from the wiring portion to the outside thereof.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: February 17, 2015
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Tatsuya Shimada
  • Patent number: 8841559
    Abstract: To prevent the breakage of the joint between a ceramic substrate and a glass epoxy substrate. The copper column is formed by a wiredrawing step for drawing a copper wire formed linearly to a predetermined diameter; a cutting step for cutting the copper wire, which has been drawn in the wire drawing step, in a predetermined length; a pressing step for pressing one end of the copper wire, which has been cut in the cutting step, in a longitudinal direction to form a copper column member; and an annealing step for annealing the copper column member, which has been formed in the pressing step, by maintaining a heating period of 60 minutes or longer at 600° C. or higher. Thereby, the Vickers hardness of the copper column becomes is 55 HV or less and the copper column is softened.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: September 23, 2014
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Yutaka Chiba, Shinichi Nomoto, Koji Watanabe
  • Publication number: 20140203304
    Abstract: Provided is a light-emitting device package strip that includes a lead frame strip, a plurality of resin molding products that are injection-molded in the lead frame strip, and runner and gate members that are formed between adjacent resin molding products and on end sides of a line of adjacent resin molding products, each runner and gate member having a smaller thickness than a thickness of the resin molding products to facilitate cutting thereof.
    Type: Application
    Filed: December 3, 2013
    Publication date: July 24, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-hyun KIM, Wan-jong KIM, Jung-jin KIM, Jung-kyu PARK, Kyu-ho JANG
  • Patent number: 8787003
    Abstract: According to one embodiment of a capacitor module, the capacitor module includes a substrate having a metallization on a first side of the substrate, a plurality of connectors electrically coupled to the metallization and a plurality of capacitors disposed on the metallization. The plurality of capacitors includes a first set of capacitors electrically connected in parallel between a first set of the connectors and a second set of the connectors. The capacitor module further includes a housing enclosing the plurality of capacitors within the capacitor module.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: July 22, 2014
    Assignee: Infineon Technologies AG
    Inventors: Daniel Domes, Reinhold Bayerer
  • Patent number: 8737089
    Abstract: A Ferritic stainless steel, non Ferritic stainless steel or carbon steel based lead frame and method for producing same is provided. The lead frame is preferably used for TantalumNiobium capacitors but could possibly be applicable to other integrated circuits with the same operating parameters. Any reference to Tantalum capacitors in this application applies equally to Niobium capacitors unless otherwise noted. The lead frame is prepared by choosing one of Ferritic stainless steel, non Ferritic stainless steel or carbon steel as a base metal and rolling it to a final required thickness. The base metal is then preferably plated with a nickel strike or other conventional barrier layer and then with final outer plating layers(s). The exact thickness and choice of layering varies and can be tailored to meet the requirements of each lead attach process.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: May 27, 2014
    Assignee: Micro Stamping Corporation
    Inventors: Frank J. Semcer, Sr., Steven G. Santoro, James McClintock, Frank J. Jankoski, Jr.