Semiconductor Patents (Class 204/192.25)
  • Patent number: 10553790
    Abstract: A magnetic memory device includes a first magnetic tunnel junction pattern on a substrate, a second magnetic tunnel junction pattern on the first magnetic tunnel junction pattern, and a conductive line between the first magnetic tunnel junction pattern and the second magnetic tunnel junction pattern. The conductive line is configured such that a current flowing through the conductive line flows in parallel to an interface between the conductive line and each of the first and second magnetic tunnel junction patterns.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joonmyoung Lee, Ung Hwan Pi, Eunsun Noh, Yong Sung Park
  • Patent number: 10361121
    Abstract: Embodiments herein relate to a package using aluminum oxide as an adhesion and high-thermal conductivity layer with a buildup layer having a first side and a second side opposite the first side, a first trace applied to the first side of the buildup layer, an aluminum oxide layer coupled with the first trace and an exposed area of the first side of the buildup layer, a lamination buildup layer coupled with the aluminum oxide layer on a side of the aluminum oxide layer opposite the buildup layer, wherein the lamination buildup layer includes one or more vias to the trace, and a seed layer coupled with the lamination buildup layer. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: July 23, 2019
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Sri Ranga Sai Boyapati
  • Patent number: 10199467
    Abstract: A process to form an electrode of a semiconductor device is disclosed. The process includes steps of: forming the first electrode on the semiconductor layer; forming the first insulating film on the first electrode, where the first insulating film provides an opening that exposes a portion of the first electrode but fully covers the semiconductor layer; fully filling the opening by the second electrode; forming the mask so as to expose the second electrode but fully cover the sides of the second electrode; forming the third electrode in a region exposing from the mask; and removing the mask.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: February 5, 2019
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Ken Kikuchi
  • Patent number: 10062792
    Abstract: A method of making a CZTS/inorganic thin-film tandem solar cell including depositing a textured buffer layer on a substrate, depositing a metal-inorganic film from a eutectic alloy on the buffer layer, and depositing additional elements in CZTS forming a CZTS layer based on the metal from the metal-inorganic film, the metal being incorporated into the CZTS film.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: August 28, 2018
    Assignee: Solar-Tectic LLC
    Inventor: Ashok Chaudhari
  • Patent number: 9873100
    Abstract: An integrated circuit includes a plurality of sensing pixels. Each sensing pixel of the plurality of sensing pixels includes a sensing film portion, a potential-sensing device configured to generate a first signal responsive to an electrical characteristic of the sensing film portion, a temperature-sensing device configured to generate a second signal responsive to a temperature of the sensing film portion, and one or more heating elements configured to adjust the temperature of the sensing film portion.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: January 23, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tung-Tsun Chen, Yi-Shao Liu, Jui-Cheng Huang, Chin-Hua Wen, Felix Ying-Kit Tsui, Yung-Chow Peng
  • Patent number: 9863037
    Abstract: A deposition mask comprises a mask body comprising a plurality of through holes; and a deposition layer formed on external surfaces of the mask body. A method of manufacturing a deposition mask comprises: installing a deposition mask body in a chamber; forming a magnetic field between a plurality of magnet units within the chamber, wherein the deposition mask body is disposed between the magnet units; and applying voltages to first and second sputtering targets comprising a material to generate electric discharge such that particles of the material are sputtered from the first and second sputtering targets and deposited on the deposition mask body, thereby making a deposition mask with a layer of the material. The voltages having different magnitudes are applied to the first and second sputtering targets.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: January 9, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yongtack Kim, Jongwoo Kim, Jiyoung Moon, Minho Oh, Yoonhyeung Cho
  • Patent number: 9825197
    Abstract: A method of fabricating a buffer layer of a photovoltaic device comprises: providing a substrate having a back contact layer disposed above the substrate and an absorber layer disposed above the back contact layer; depositing a metal layer on the absorber layer; and performing a thermal treatment on the deposited metal layer in an atmosphere comprising sulfur, selenium or oxygen, to form a buffer layer.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: November 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Shih-Wei Chen
  • Patent number: 9816180
    Abstract: Methods are provided for selectively depositing a surface of a substrate relative to a second, different surface. An exemplary deposition method can include selectively depositing a material, such as a material comprising nickel, nickel nitride, cobalt, iron, and/or titanium oxide on a first surface, such as a SiO2 surface, relative to a second, different surface, such as a H-terminated surface, of the same substrate. Methods can include treating a surface of the substrate to provide H-terminations prior to deposition.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: November 14, 2017
    Assignee: ASM IP HOLDING B.V.
    Inventors: Suvi P. Haukka, Eva Tois
  • Patent number: 9700901
    Abstract: A solder joint may be used to attach components of an organic vapor jet printing device together with a fluid-tight seal that is capable of performance at high temperatures. The solder joint includes one or more metals that are deposited over opposing component surfaces, such as an inlet side of a nozzle plate and/or an outlet side of a mounting plate. The components are pressed together to form the solder joint. Two or more of the deposited metals may be capable of together forming a eutectic alloy, and the solder joint may be formed by heating the deposited metals to a temperature above the melting point of the eutectic alloy. A diffusion barrier layer and an adhesion layer may be included between the solder joint and each of the components.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: July 11, 2017
    Assignee: The Regents of the University of Michigan
    Inventors: Stephen R. Forrest, Gregory McGraw
  • Patent number: 9579876
    Abstract: A printing mechanism 1 including a mandrel 2, and a tubular sleeve 3; wherein the mandrel comprises a main body and sleeve support members 6, a plurality of the sleeve-support members being arranged on the main body at intervals in the axial direction; and wherein the sleeve-support member has a plurality of arm portions 7 extending radially so as to support the sleeve from an inside thereof, and moving mechanisms 8 for moving tip vicinities of the arm portions inward/outward in the radial direction; and wherein the sleeve-support member has an interlock mechanism 9 for synchronously driving each moving mechanism of the sleeve support members, the tip vicinities of the arm portions being engaged with the inner surface of the sleeve or released from the engaged inner surface of the sleeve by the synchronous motion of the tip vicinities of all arm portions inward/outward with the interlock mechanism.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: February 28, 2017
    Assignee: SIKO CO., LTD.
    Inventors: Hirotoshi Maeda, Takashi Fujioka
  • Patent number: 9564315
    Abstract: A manufacturing method for manufacturing a silicon carbide epitaxial wafer includes: introducing a cleaning gas into a growth furnace to remove dendrite-like polycrystal of silicon carbide attached to an inner wall of the growth furnace; after introducing the cleaning gas, bringing a silicon carbide substrate in the growth furnace; and growing a silicon carbide epitaxial layer on the silicon carbide substrate by introducing a processing gas into the growth furnace to manufacture a silicon carbide epitaxial wafer, wherein the cleaning gas having fluid energy of 1.6E-4 [J] or higher is introduced into the growth furnace.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: February 7, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Masashi Sakai, Yoichiro Mitani, Takahiro Yamamoto, Yasuhiro Kimura, Takuma Mizobe, Nobuyuki Tomita
  • Patent number: 9508864
    Abstract: To provide a crystalline oxide semiconductor which can be used as a semiconductor of a transistor or the like. The crystalline oxide semiconductor is an oxide over a surface and includes a plurality of flat-plate-like In—Ga—Zn oxides. Each of the plurality of flat-plate-like In—Ga—Zn oxides has a crystal structure and includes a first layer, a second layer, and a third layer. The first layer includes a gallium atom, a zinc atom, and an oxygen atom. The second layer includes an indium atom and an oxygen atom. The third layer includes a gallium atom, a zinc atom, and an oxygen atom. A flat plane of each of the plurality of flat-plate-like In—Ga—Zn oxides is substantially perpendicular to a normal vector of the surface.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: November 29, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9428828
    Abstract: The invention reduces generation of particles. An embodiment of the preset invention includes a target holder (6) for holding a target (4), a power source (12) for applying a power to the target holder (6), a substrate holder (7), a first shutter (14) capable of opening and closing between the target (4) and the substrate holder (7), a second shutter (19) located closer to the substrate holder (7) than to the first shutter (14), and capable of opening and closing between the target holder (6) and the substrate holder (7), and a controller (con) for controlling the power source (12) and the first and second shutters (14), (19). The controller (con) applies a first power to the target holder (6) in the state where the first shutter (14) is closed, then opens the first shutter (14), and further applies a second power higher than the first power to the target holder (6) in the state where the second shutter (19) is closed.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: August 30, 2016
    Assignee: CANON ANELVA CORPORATION
    Inventor: Shunsuke Yamamoto
  • Patent number: 9349395
    Abstract: A method according to one embodiment includes placing a substrate in a chamber; and plasma sputtering the substrate in a presence of a non-zero pressure of a vapor, wherein the vapor at the non-zero pressure is effective to diminish an etch rate of a first material of the substrate. A plasma sputtering apparatus according to one embodiment includes a chamber; a reservoir in the chamber for releasing a vapor at an established rate; a mount for a substrate; and a plasma source.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Biskeborn, Calvin S. Lo, Cherngye Hwang, Andrew C. Ting
  • Patent number: 9322095
    Abstract: A film-forming apparatus includes a plurality of target electrodes, a substrate holder for holding a substrate, a first shutter member rotatably provided between the plurality of target electrodes and the substrate holder and having a plurality of openings, first separating walls provided on a surface of the first shutter member, the surface being on the target electrode side; and second separating walls provided between the first shutter member and the target electrodes, wherein the first separating walls are provided so as to sandwich each of the plurality of openings of the first shutter member.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: April 26, 2016
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yuji Kajihara, Yasushi Yasumatsu, Kazuya Konaga
  • Patent number: 9306166
    Abstract: A fabrication method of a resistance variable memory apparatus includes forming an amorphous phase-change material layer on a semiconductor substrate in which a bottom structure is formed, and performing crystallization on the amorphous phase-change material layer through a low-temperature plasma treatment process.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: April 5, 2016
    Assignee: SK Hynix Inc.
    Inventors: Jun Kwan Kim, Young Ho Lee, Su Jin Chae
  • Patent number: 9157145
    Abstract: A substrate processing system particularly suitable for fabricating solar cells. The system has a front end module transporting cassettes, each cassette holding a preset number of substrates therein; a loading module coupled to the front end module and having mechanism for loading substrates from the cassettes onto carriers; and a plurality of processing chambers coupled to each other in series, each having tracks for transporting the carriers directly from one chamber to the next; wherein selected chambers of the plurality of processing chambers comprise at least one combination source having a sputtering module and an evaporation module arranged linearly in the direction of travel of the carriers.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: October 13, 2015
    Assignee: INTEVAC, INC.
    Inventors: D. Guy Eristoff, Michael S. Barnes, Arthur C. Wall, Terry Bluck
  • Publication number: 20150129416
    Abstract: A method for using a sputtering target which enables an oxide film with a high degree of crystallinity, which contains a plurality of metal elements, to be formed is provided. In the method for using a sputtering target including a polycrystalline oxide containing a plurality of crystal grains which include a cleavage plane, an ion is made to collide with the sputtering target to separate sputtered particles from the cleavage plane, and the sputtered particles are positively charged, so that the sputtered particles are deposited uniformly on a deposition surface while repelling each other.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 14, 2015
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20150107988
    Abstract: A method for forming an oxide semiconductor film using a sputtering apparatus including a target containing a crystalline In—Ga—Zn oxide, a substrate, and a magnet includes the following steps: generating plasma between the target and the substrate; and separating a flat-plate-like In—Ga—Zn oxide in which a first layer including a gallium atom, a zinc atom, and an oxygen atom, a second layer including an indium atom and an oxygen atom, and a third layer including a gallium atom, a zinc atom, and an oxygen atom are stacked in this order. The flat-plate-like In—Ga—Zn oxide passes through the plasma and thus is negatively charged. Then, while keeping crystallinity, the oxide gets close to a top surface of the substrate, moves over the top surface of the substrate due to a magnetic field of the magnet and current flowing from the substrate to the target, and then is deposited.
    Type: Application
    Filed: May 19, 2014
    Publication date: April 23, 2015
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20150102371
    Abstract: The present invention has an object to provide an epitaxial film forming method of epitaxially growing a high-quality group III nitride semiconductor thin film on an ?-Al2O3 substrate by a sputtering method. An epitaxial film forming method according to an embodiment of the present invention includes forming an epitaxial film of a group III nitride semiconductor thin film on an ?-Al2O3 substrate placed on a substrate holder (111) including a heater electrode (104) and a bias electrode (103) in a sputtering apparatus (1) by applying high-frequency power to a target electrode (102) and applying high-frequency bias power to the bias electrode (103) while the heater electrode (104) maintains the ?-Al2O3 substrate at a predetermined temperature. In this process, the high-frequency power and the high-frequency bias power are applied so that frequency interference therebetween may not occur.
    Type: Application
    Filed: December 19, 2014
    Publication date: April 16, 2015
    Inventor: Yoshiaki DAIGO
  • Publication number: 20150093583
    Abstract: A C12A7 electride thin film fabrication method includes a step of forming an amorphous C12A7 electride thin film on a substrate by vapor deposition under an atmosphere with an oxygen partial pressure of less than 0.1 Pa using a target made of a crystalline C12A7 electride having an electron density within a range of 2.0×1018 cm?3 to 2.3×1021 cm?3.
    Type: Application
    Filed: December 11, 2014
    Publication date: April 2, 2015
    Applicants: TOKYO INSTITUTE OF TECHNOLOGY, ASAHI GLASS COMPANY, LIMITED
    Inventors: Hideo HOSONO, Yoshitake TODA, Katsuro HAYASHI, Setsuro ITO, Satoru WATANABE, Naomichi MIYAKAWA, Toshinari WATANABE, Kazuhiro ITO
  • Patent number: 8992744
    Abstract: A method of fabricating by co-sputtering deposition a lanthanoid aluminate film with enhanced electrical insulativity owing to suppression of deviation in composition of the film is disclosed. Firstly within a vacuum chamber, hold two separate targets, one of which is made of lanthanoid aluminate (LnAlO3) and the other of which is made of aluminum oxide (Al2O3). Then, transport and load a substrate into the vacuum chamber. Next, introduce a chosen sputtering gas into this chamber. Thereafter, perform sputtering of both the targets at a time to thereby form a lanthanoid aluminate film on the substrate surface. This film is well adaptable for use as ultra-thin high dielectric constant (high-k) gate dielectrics in highly miniaturized metal oxide semiconductor (MOS) transistors.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsunehiro Ino, Akira Takashima
  • Patent number: 8980066
    Abstract: The present invention generally relates to a semiconductor film and a method of depositing the semiconductor film. The semiconductor film comprises oxygen, nitrogen, and one or more elements selected from the group consisting of zinc, cadmium, gallium, indium, and tin. Additionally, the semiconductor film may be doped. The semiconductor film may be deposited by applying an electrical bias to a sputtering target comprising the one or more elements selected from the group consisting of zinc, cadmium, gallium, indium, and tin, and introducing a nitrogen containing gas and an oxygen containing gas. The sputtering target may optionally be doped. The semiconductor film has a mobility greater than amorphous silicon. After annealing, the semiconductor film has a mobility greater than polysilicon.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventor: Yan Ye
  • Publication number: 20150064860
    Abstract: Provided are semiconductor films, methods of forming the same, transistors including the semiconductor films, and methods of manufacturing the transistors. Provided are a semiconductor film including zinc (Zn), nitrogen (N), oxygen (O), and fluorine (F), and a method of forming the semiconductor film. Provided are a semiconductor film including zinc, nitrogen, and fluorine, and a method of forming the semiconductor film. Sputtering, ion implantation, plasma treatment, chemical vapor deposition (CVD), or a solution process may be used in order to form the semiconductor films. The sputtering may be performed by using a zinc target and a reactive gas including fluorine. The reactive gas may include nitrogen and fluorine, or nitrogen, oxygen, and fluorine.
    Type: Application
    Filed: June 2, 2014
    Publication date: March 5, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae-sang KIM, Jong-baek SEON, Myung-kwan RYU, Chil Hee CHUNG
  • Patent number: 8969114
    Abstract: A method of manufacturing an organic light emitting display apparatus, the method includes loading a substrate on a moving unit, determining an angle formed between a side of the substrate and an opening in a patterning slit sheet, rotating the patterning slit sheet by two X motors so that the side of the substrate and the opening in a patterning slit sheet extend along the same direction and forming a layer on the substrate while conveying the substrate on the moving unit in the first direction in a chamber. The patterning slit sheet moves along a direction perpendicular to the first direction during the forming the layer on the substrate so that a deposition layer having a linear pattern that extends along the first direction is formed on the substrate.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Joo-Nyung Jang
  • Patent number: 8961745
    Abstract: The plant is suitable to produce a semiconductor film (8) having a desired thickness and consisting substantially of a compound including at least one element for each of the groups 11, 13, and 16 of the periodic classification of elements. The plant comprises an outer case (1) embedding a chamber (2) divided into one deposition zone (2a) and one evaporation zone (2b), which are separated by a screen (3) interrupted by at least one cylindrical transfer member provided with actuation means rotating about its axis (5). To the deposition zone (2a) a magnetron device (7) is associated, for the deposition by sputtering of at least one element for each of the groups 11 and 13 on the side surface (?) of the cylindrical member that is in the deposition zone (2a). To the evaporation zone (2b) a cell (10) for the evaporation of at least one element of the group 16 is associated, and such an evaporation zone (2b) houses a substrate (8a) on which the film (8) is produced.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: February 24, 2015
    Assignee: VOLTASOLAR S.r.l.
    Inventors: Maurizio Filippo Acciarri, Simona Olga Binetti, Leonida Miglio, Maurilio Meschia, Raffaele Moneta, Stefano Marchionna
  • Publication number: 20150047972
    Abstract: A method of manufacturing a sputtering target includes: preparing a sputtering target material including a low temperature viscosity transition (LVT) inorganic material, melting the sputtering target material at a working pressure that is lower than atmospheric pressure, and processing the melted sputtering target material to thereby form the sputtering target.
    Type: Application
    Filed: May 13, 2014
    Publication date: February 19, 2015
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: SUN-YOUNG JUNG, SANG-WOOK SHIN, IL-SANG LEE, JIN-WOO PARK, DONG-JIN KIM
  • Publication number: 20150050776
    Abstract: A deposition technique for forming an oxynitride film is provided. A highly reliable semiconductor element is manufactured with the use of the oxynitride film. The oxynitride film is formed with the use of a sputtering target including an oxynitride containing indium, gallium, and zinc, which is obtained by sintering a mixture of at least one of indium nitride, gallium nitride, and zinc nitride as a raw material and at least one of indium oxide, gallium oxide, and zinc oxide in a nitrogen atmosphere. In this manner, the oxynitride film can contain nitrogen at a necessary concentration. The oxynitride film can be used for a gate, a source electrode, a drain electrode, or the like of a transistor.
    Type: Application
    Filed: November 3, 2014
    Publication date: February 19, 2015
    Inventor: Shunpei Yamazaki
  • Publication number: 20150048510
    Abstract: A semiconductor device includes a semiconductor substrate and a metal film formed on the semiconductor substrate. The metal film includes a Ni base and a material having condensation energy higher than that of Ni. In a method of manufacturing a semiconductor device, a semiconductor substrate and a target, which is formed by melting P in Ni, are prepared, and sputtering is performed with the target while a portion of the semiconductor substrate where the metal film is to be formed is heated to a temperature of from 280° C. inclusive to 870° C. inclusive.
    Type: Application
    Filed: April 22, 2013
    Publication date: February 19, 2015
    Inventors: Manabu Tomisaka, Yoshifumi Okabe, Mikimasa Suzuki
  • Publication number: 20150028297
    Abstract: A sputtering apparatus, an organic light-emitting display apparatus manufactured using the sputtering apparatus, and a method for manufacturing the organic light-emitting display apparatus are provided. The sputtering apparatus includes: a chamber including a mounting portion configured to hold a deposition target material; a gas supply unit that faces the mounting portion and supplies gas to the chamber; a first target portion and a second target portion that are disposed to face each other within the chamber; and a magnetic field induction coil that surrounds an outside of the chamber.
    Type: Application
    Filed: January 21, 2014
    Publication date: January 29, 2015
    Applicant: Samsung Display Co., Ltd.
    Inventors: Su-Hyuk CHOI, Hun KIM, Jin-Woo PARK
  • Publication number: 20150027538
    Abstract: A solar battery capable of increasing conversion efficiency compared with a conventional solar battery using a chalcopyrite p-type light absorption layer. A light absorption layer of the solar battery is a p-type semiconductor layer including Cu, Ga, and an element selected from group VIb elements. A photoluminescence spectrum or a cathode luminescence spectrum obtained from the light absorption layer includes an emission peak with the half-value width of not less than 1 meV and not more than 15 meV. The ratio of the particles with the grain size of not less than 2 ?m and not more than 8 ?m in a surface of the light absorption layer to the surface area of the entire film is not less than 90%.
    Type: Application
    Filed: February 28, 2013
    Publication date: January 29, 2015
    Inventors: Yasuhiro Aida, Daisuke Tanaka, Masato Kurihara
  • Patent number: 8936703
    Abstract: Embodiments of the invention relate generally to semiconductor device fabrication and processes, and more particularly, to methods for implementing arrangements of magnetic field generators configured to facilitate physical vapor deposition (“PVD”) and/or for controlling impedance matching associated with a non-metal-based plasma used to modify a non-metal film, such as a chalcogenide-based film.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: January 20, 2015
    Assignee: Semicat, Inc.
    Inventors: Jin Hyun Kim, Michael Nam, Jae Yeol Park, Jonggu Park
  • Publication number: 20150004435
    Abstract: The present invention relates to a method for growing a non-polar m-plane epitaxial layer on a single crystal oxide substrate, which comprises the following steps: providing a single crystal oxide with a perovskite structure; using a plane of the single crystal oxide as a substrate; and forming an m-plane epitaxial layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process, wherein the non-polar m-plane epitaxial layer may be GaN, or III-nitrides. The present invention also provides an epitaxial layer having an m-plane obtained according to the aforementioned method.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 1, 2015
    Inventors: Li CHANG, Yen-Teng HO
  • Publication number: 20140362879
    Abstract: This disclosure demonstrates successfully using single, polycrystalline, hot pressed ceramic, and thin film Fe doped binary chalcogenides (such as ZnSe and ZnS) as saturable absorbing passive Q-switches. The method of producing polycrystalline ZnSe(S) yields fairly uniform distribution of dopant, large coefficients of absorption (5-50 cm?1) and low passive losses while being highly cost effective and easy to reproduce. Using these Fe2+:ZnSe crystals, stable Q-switched output was achieved with a low threshold and the best cavity configuration yielded 13 mJ/pulse single mode Q-switched output and 85 mJ in a multipulse regime.
    Type: Application
    Filed: August 26, 2014
    Publication date: December 11, 2014
    Applicant: The UAB Research Foundation
    Inventors: Sergey B. Mirov, Andrew Gallian, Alan Martinez, Vladimir V. Fedorov
  • Publication number: 20140360864
    Abstract: A method generally comprises providing heat to a substrate in at least one buffer chamber and transferring the substrate to at least one deposition chamber that is coupled to the buffer chamber via an conveyor. The method also includes depositing a first set of a plurality of elements, using sputtering, and a second set of a plurality of elements, using evaporation, onto at least a portion of the substrate in the deposition chamber.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 11, 2014
    Inventors: Wen-Tsai YEN, Chung-Hsien WU, Chi-Yu CHIANG, Shih-Wei CHEN, Wen-Chin LEE
  • Patent number: 8900421
    Abstract: A method of fabricating a variable resistance layer of a resistance memory is disclosed. The method includes placing a substrate in a sputtering chamber that has a copper target and a silicon oxide (SiO2) target or has a complex target made from copper and silicon oxide therein. Thereafter, a co-sputtering process is performed by using the copper target and the silicon oxide target, or a sputtering process is performed by using the complex target, so that a compound film is deposited on a surface of the substrate, wherein the compound film serves as a variable resistance layer of a resistance memory, and the mole percentage of Cu/(Cu+Si) of the compound film is 1-15%.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: December 2, 2014
    Assignee: National Taiwan University of Science and Technology
    Inventors: Shyan-kay Jou, Chia-Jen Li
  • Publication number: 20140346500
    Abstract: To provide a crystalline oxide semiconductor film. By collision of ions with a target including a crystalline In—Ga—Zn oxide, a flat-plate-like In—Ga—Zn oxide is separated. In the flat-plate-like In—Ga—Zn oxide, a first layer including a gallium atom, a zinc atom, and an oxygen atom, a second layer including a zinc atom and an oxygen atom, a third layer including an indium atom and an oxygen atom, and a fourth layer including a gallium atom, a zinc atom, and an oxygen atom are stacked in this order. After the flat-plate-like In—Ga—Zn oxide is deposited over a substrate while maintaining the crystallinity, the second layer is gasified and exhausted.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 27, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei YAMAZAKI
  • Patent number: 8894826
    Abstract: A method and apparatus for forming a thin film of a copper indium gallium selenide (CIGS)-type material are disclosed. The method includes providing first and second targets in a common sputtering chamber. The first target includes a source of CIGS material, such as an approximately stoichiometric polycrystalline CIGS material, and the second target includes a chalcogen, such as selenium, sulfur, tellurium, or a combination of these elements. The second target provides an excess of chalcogen in the chamber. This can compensate, at least in part, for the loss of chalcogen from the CIGS-source in the first target, resulting in a thin film with a controlled stoichiometry which provides effective light absorption when used in a solar cell.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: November 25, 2014
    Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Robel Y. Bekele, Vinh Q Nguyen, Ishwar D. Aggarwal, Allan J. Bruce, Michael Cyrus, Sergey V. Frolov
  • Publication number: 20140339073
    Abstract: A sputtering target containing oxides of indium (In), gallium (Ga) and zinc (Zn), which includes a compound shown by ZnGa2O4 and a compound shown by InGaZnO4.
    Type: Application
    Filed: July 17, 2014
    Publication date: November 20, 2014
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Koki YANO, Futoshi UTSUNO
  • Publication number: 20140339545
    Abstract: To manufacture a semiconductor device using an oxide semiconductor with high reliability and less variation in electrical characteristics, objects are to provide a method for manufacturing a semiconductor device with which an oxide semiconductor film with a fairly uniform thickness is formed, a manufacturing apparatus, and a method for manufacturing a semiconductor device with the manufacturing apparatus. In order to form an oxide semiconductor film with a fairly uniform thickness with use of a sputtering apparatus, an oxide semiconductor film the thickness uniformity of which is less than ±3%, preferably less than or equal to ±2% is formed by using a manufacturing apparatus in which a deposition chamber is set to have a reduced pressure atmosphere, preferably, to have a high degree of vacuum and power is adjusted to be applied uniformly to the entire surface of a substrate during film deposition.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 20, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20140339074
    Abstract: A wafer clamp assembly for holding a wafer during a deposition process comprises an outer annular member defining a central recess that has a diameter slightly greater than the diameter of the wafer. A plurality of finger members are carried by the outer annular member and extend radially inwardly from the outer annular member into the central recess, wherein each of the finger members has a free end for contacting the wafer during the deposition process.
    Type: Application
    Filed: August 5, 2014
    Publication date: November 20, 2014
    Inventors: Hermann Bichler, Reinhard Hanzlik, Stefan Fries, Frank Mueller, Heinrich Wachinger
  • Patent number: 8882971
    Abstract: A sputtering apparatus (1) includes: a chamber (10) having an inside maintained in a depressurized state to generate plasma discharge (20); a cathode (22) placed in the chamber (10) and holding a target (21); and a substrate holder (60) holding a substrate (110) so that one surface of the substrate (110) faces the surface of the target (21). The substrate (110) is arranged at an upper portion in the sputtering apparatus (1) with the surface of the substrate (110) facing downward. The target (21) is arranged at a lower portion in the sputtering apparatus (1) with the surface of the target (21) facing upward. The sputtering apparatus (1) includes a heater (65) for heating the substrate (110). The temperature of the substrate (110) is raised by absorbing electromagnetic waves radiated from the heater (65). A method of manufacturing a semiconductor light-emitting element using the sputtering apparatus is also disclosed.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: November 11, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Kenzo Hanawa, Yasunori Yokoyama, Yasumasa Sasaki
  • Publication number: 20140327117
    Abstract: The embodiments herein provides methods for forming a PVD silicon oxide or silicon rich oxide, or PVD SiN or silicon rich SiN, or SiC or silicon rich SiC, or combination of the preceding including a variation which includes controlled doping of hydrogen into the compounds heretofore referred to as SiOxNyCz:Hw, where w, x, y, and z can vary in concentration from 0% to 100%, is produced as a hardmask with optical properties that are substantially matched to the photo-resists at the exposure wavelength. Thus making the hardmask optically planarized with respect to the photo-resist. This allows for multiple sequences of litho and etches in the hardmask while the photo-resist maintains essentially no optical topography or reflectivity variations.
    Type: Application
    Filed: May 2, 2014
    Publication date: November 6, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Christopher Dennis BENCHER, Daniel Lee DIEHL, Huixiong DAI, Yong CAO, Tingjun XU, Weimin (Wilson) ZENG, Peng XIE
  • Publication number: 20140315027
    Abstract: The invention relates to a process for the manufacture of a hydrophobic glazing comprising the following successive stages: (a) formation of a carbon-rich silicon oxycarbide (SiOxCy) layer at the surface of a substrate made of mineral glass by chemical vapor deposition (CVD) over at least a portion of the surface of said substrate by bringing said surface into contact with a stream of reactive gases comprising ethylene (C2H4), silane (SiH4) and carbon dioxide (CO2) at a temperature of between 600° C. and 680° C., the ethylene/silane (C2H4/SiH4) ratio by volume during stage (a) being less than or equal to 3.3, (b) formation of an SiO2 layer on the silicon oxycarbide layer deposited in stage (a) or (b?) formation of a carbon-poor silicon oxycarbide layer exhibiting a mean C/Si ratio of less than 0.2, (c) annealing and/or shaping the substrate obtained on conclusion of stage (b) or (b?) at a temperature of between 580° C. and 700° C.
    Type: Application
    Filed: November 14, 2012
    Publication date: October 23, 2014
    Applicant: SAINT-GOBAIN GLASS FRANCE
    Inventors: Claire Thoumazet, Martin Melcher, Arnaud Huignard, Raphael Lante
  • Patent number: 8858844
    Abstract: A sputtering target including an oxide sintered body which includes In, Ga and Zn and includes a structure having a larger In content than that in surrounding structures and a structure having larger Ga and Zn contents than those in surrounding structures.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: October 14, 2014
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Koki Yano, Masayuki Itose
  • Publication number: 20140290739
    Abstract: A thin-film solar battery includes a substrate, a first electrode, a photoelectric conversion layer, and a second electrode. The first electrode, the photoelectric conversion layer, and the second electrode are laminated on the substrate. The photoelectric conversion layer has a laminated layer structure which includes at least a p-type layer and an n-type layer. The p-type layer is formed of Cu, In, Ga, and Se, and a composition ratio of Se of the p-type layer is equal to or higher than 40 atomic % and less than 50 atomic %. The n-type layer is a compound of an element of at least one Group selected from Group 2, Group 7, and Group 12, an element of Group 13, and an element of Group 16, and contains at least In as the element of Group 13 and at least S as the element of Group 16.
    Type: Application
    Filed: March 21, 2014
    Publication date: October 2, 2014
    Applicant: RICOH COMPANY, LTD.
    Inventor: Hiroshi Deguchi
  • Patent number: 8840763
    Abstract: Embodiments disclosed herein generally relate to a method for seasoning a sputtering target in-situ with a substrate to be processed. New semiconductor compounds containing oxygen, nitrogen, and an element such as zinc, cadmium, tin, indium, and gallium are beginning to replace silicon as the material for active channels in TFTs. The new semiconductor compounds may be deposited by a reactive sputtering process. During the sputtering process, reactive gas reacts with the metal from the sputtering target and deposits on the substrate. Some of the reactive gas may react at the surface and lead to a buildup of a compound at the target surface. Because oxygen and nitrogen are quite reactive, an oxide or nitride compound may develop at the target surface. The oxide or nitride may be removed by seasoning the sputtering target. The seasoning may occur while the substrate is within the processing chamber.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: September 23, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Yan Ye
  • Publication number: 20140261668
    Abstract: An article made by: sputtering molybdenum onto a flexible glass substrate, and depositing a photovoltaic material on the molybdenum by sputtering, thermal evaporation, multi-target ternary or binary sputtering, or nanoparticle techniques.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Jason D. Myers, Jesse A. Frantz, Robel Y. Bekele, Jasbinder S. Sanghera
  • Publication number: 20140262754
    Abstract: Embodiments relate generally to semiconductor device fabrication and processes, and more particularly, to systems and methods that implement magnetic field generators configured to generate rotating magnetic fields to facilitate physical vapor deposition (“PVD”). In one embodiment, a system generates a first portion of a magnetic field adjacent a first circumferential portion of a substrate, and can generate a second portion of the magnetic field adjacent to a second circumferential portion of the substrate. The second circumferential portion is disposed at an endpoint of a diameter that passes through an axis of rotation to another endpoint of the diameter at which the first circumferential portion resides. The second peak magnitude can be less than the first peak magnitude. The system rotates the first and second portions of the magnetic fields to decompose a target material to form a plasma adjacent the substrate.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: JEONGHEE PARK, Jae Yeol PARK
  • Publication number: 20140272396
    Abstract: A method for preparing a device having a film on a substrate is disclosed. In the method, a film is deposited on a polymeric substrate. The film includes at least one metal. A metal in the film is converted to a metal oxide using microwave radiation. One example device prepared by the method includes a polyethylene napthalate substrate and a film on the substrate, wherein the film includes a semiconducting copper oxide and silver as a dopant.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Inventors: Terry Alford, Sayantan Das