Semiconductor Patents (Class 204/192.25)
  • Publication number: 20100304571
    Abstract: A bonded assembly to reduce particle contamination in a semiconductor vacuum chamber such as a plasma processing apparatus is provided, including an elastomeric sheet adhesive bond between mating surfaces of a component and a support member to accommodate thermal stresses. The elastomeric sheet comprises a silicone adhesive to withstand a high shear strain of ?800% at a temperature range between room temperature and 300° C. such as heat curable high molecular weight dimethyl silicone with optional fillers. The sheet form has bond thickness control for parallelism of bonded surfaces. The sheet adhesive may be cut into pre-form shapes to conform to regularly or irregularly shaped features, maximize surface contact area with mating parts, and can be installed into cavities. Installation can be manually, manually with installation tooling, or with automated machinery. Composite layers of sheet adhesive having different physical properties can be laminated or coplanar.
    Type: Application
    Filed: December 18, 2008
    Publication date: December 2, 2010
    Inventors: Dean J. Larson, Tom Stevenson, Victor Wang
  • Publication number: 20100301379
    Abstract: A method for manufacturing a Group III nitride semiconductor of the present invention includes a sputtering step of forming a single-crystalline Group III nitride semiconductor on a substrate by a reactive sputtering method in a chamber in which a substrate and a Ga element-containing target are disposed, wherein said sputtering step includes respective substeps of: a first sputtering step of performing a film formation of the Group III nitride semiconductor while setting the temperature of the substrate to a temperature T1; and a second sputtering step of continuing the film formation of the Group III nitride semiconductor while lowering the temperature of the substrate to a temperature T2 which is lower than the temperature T1.
    Type: Application
    Filed: November 21, 2008
    Publication date: December 2, 2010
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Publication number: 20100294364
    Abstract: A solar concentrator including a substantially-transparent optical element, a reflective material disposed on a convex surface of the optical element, an insulator layer on the reflective material, a conductive material that is thermal sprayed onto the insulator layer, and a solar cell mounted in a central region of the convex surface and electrically coupled to the conductive material. The optical element includes a flat surface disposed opposite to the convex surface and a concave surface defined in the flat surface. The convex surface and concave surface are arranged and the reflective material is deposited such that light passing through the flat surface is reflected by the reflective material toward the concave surface, and is re-reflected by the reflective material disposed on the concave surface onto an active surface of the solar cell. Thermal spraying the conductive material may include spraying a molten metal powder onto the insulator layer.
    Type: Application
    Filed: July 22, 2010
    Publication date: November 25, 2010
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Hing Wah Chan, John S. Fitch, Michael C. Weisberg, David G. Duff
  • Patent number: 7838763
    Abstract: A method of manufacturing improved thin-film solar cells entirely by sputtering includes a high efficiency back contact/reflecting multi-layer containing at least one barrier layer consisting of a transition metal nitride. A copper indium gallium diselenide (Cu(InxGa1-x)Se2) absorber layer (X ranging from 1 to approximately 0.7) is co-sputtered from specially prepared electrically conductive targets using dual cylindrical rotary magnetron technology. The band gap of the absorber layer can be graded by varying the gallium content, and by replacing the gallium partially or totally with aluminum. Alternately the absorber layer is reactively sputtered from metal alloy targets in the presence of hydrogen selenide gas. RF sputtering is used to deposit a non-cadmium containing window layer of ZnS. The top transparent electrode is reactively sputtered aluminum doped ZnO. A unique modular vacuum roll-to-roll sputtering machine is described.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: November 23, 2010
    Assignee: MiaSole
    Inventor: Dennis Hollars
  • Publication number: 20100206719
    Abstract: A method for manufacturing a solar cell provided with an upper electrode which functions as an electrode for extracting electric power at a light incidence side of the solar cell and includes a ZnO-based transparent conductive film, the method comprising: forming the upper electrode by sputtering a target on which a formation material of the transparent conductive film is provided while applying sputtering voltage of 340V or less and generating a horizontal magnetic field on a target surface.
    Type: Application
    Filed: September 17, 2008
    Publication date: August 19, 2010
    Applicant: ULVAC, INC.
    Inventors: Hirohisa Takahashi, Satoru Ishibashi, Isao Sugiura, Satoru Takasawa
  • Publication number: 20100193352
    Abstract: The present invention relates to a method for manufacturing a solar cell provided with a buffer layer or an intermediate electrode. The buffer layer is disposed between a rear electrode and a photovoltaic cell. The rear electrode is disposed on the opposite side of a light incidence side and functions as an electrode for extracting electric power. The intermediate electrode is disposed between a plurality of photovoltaic cells. The intermediate electrode or the buffer layer comprises a ZnO-based transparent conductive film. The method comprises forming the intermediate electrode or the buffer layer by sputtering a target on which a formation material of the transparent conductive film is provided while applying sputtering voltage to generate a horizontal magnetic field on a surface of the target. The intermediate electrode or the buffer layer is formed through sputtering at a sputtering voltage of 340V or less.
    Type: Application
    Filed: September 17, 2008
    Publication date: August 5, 2010
    Applicant: ULVAC, INC.
    Inventors: Hirohisa Takahashi, Satoru Ishibashi, Isao Sugiura, Satoru Takasawa
  • Publication number: 20100187693
    Abstract: Provided are methods and apparatuses for depositing barrier layers for blocking diffusion of conductive materials from conductive lines into dielectric materials in integrated circuits. The barrier layer may contain copper. In some embodiments, the layers have conductivity sufficient for direct electroplating of conductive materials without needing intermediate seed layers. Such barrier layers may be used with circuits lines that are less than 65 nm wide and, in certain embodiments, less than 40 nm wide. The barrier layer may be passivated to form easily removable layers including sulfides, selenides, and/or tellurides of the materials in the layer.
    Type: Application
    Filed: January 26, 2009
    Publication date: July 29, 2010
    Inventors: Thomas W. Mountsier, Roey Shaviv, Steven T. Mayer, Ronald A. Powell
  • Publication number: 20100189950
    Abstract: The optical storage medium according to the invention uses a mask layer as a super resolution near field structure, which comprises a doped semiconductor material. The semiconductor material is n-doped particularly such that the reflectivity of the semiconductor material is increased, when irradiated with a laser beam. As a semiconductor material advantageously an indium alloy and as a doping material selenium or tellurium can be used. For the manufacturing of a respective optical storage medium a sputtering method for depositing the doped semiconductor material as the mask layer can be used, wherein the dopant is included already in the semiconductor sputtering target.
    Type: Application
    Filed: October 11, 2007
    Publication date: July 29, 2010
    Inventors: Christophe Fery, Larisa von Riewet, Gael Pilard, Stephan Knappmann
  • Publication number: 20100181706
    Abstract: The invention relates in general level to radiation transference techniques as applied for utilisation of material handling. The invention relates to a radiation source arrangement comprising a path of radiation transference, or an improved path of radiation transference, which path comprises a turbine scanner or an improved turbine scanner. The invention also concerns a target material suitable for vaporization and/or ablation. The invention concerns an improved turbine scanner. The invention concerns also to a vacuum vaporization/ablation arrangement that has a radiation source arrangement according to invention. The invention concerns also a target material unit, to be used in coating and/or manufacturing target material.
    Type: Application
    Filed: July 13, 2006
    Publication date: July 22, 2010
    Inventors: Jari Ruuttu, Reijo Lappalainen, Vesa Myllymäeki, Lasse Pulli, Juha Mäkitalo
  • Publication number: 20100140079
    Abstract: Preparation of a pH sensor, the prepared pH sensor, system comprising the same, and measurement using the system. The pH sensor is an extended gate field effect transistor (EGFET) structure. The preparation includes the steps of providing an extended gate ion sensitive field effect transistor comprising an extended gate region, forming a titanium nitride film on the extended gate region by RF sputtering deposition to obtain a pH sensor.
    Type: Application
    Filed: February 12, 2010
    Publication date: June 10, 2010
    Applicant: NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jung-Chuan CHOU, Chih-Hsien YEN
  • Publication number: 20100133093
    Abstract: A method of manufacturing a solar cell includes providing a substrate, depositing a first electrode comprising an alkali-containing transition metal layer over the substrate, depositing at least one p-type semiconductor absorber layer over the first electrode, wherein the p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, depositing an n-type semiconductor layer over the p-type semiconductor absorber layer, and depositing a second electrode over the n-type semiconductor layer. The step of depositing the alkali-containing transition metal layer includes sputtering from a first target comprising the transition metal and a second target comprising the alkali metal, where a composition of the first target is different from a composition of the second target.
    Type: Application
    Filed: April 13, 2009
    Publication date: June 3, 2010
    Inventors: Neil M. MacKie, Daniel R. Juliano, Robert B. Zubeck
  • Publication number: 20100110144
    Abstract: A nozzle layer is described that has a semiconductor body having a first surface, a second surface opposing the first surface, and a nozzle formed through the body connecting the first and second surfaces, wherein the nozzle being configured to eject fluid through a nozzle outlet on the second surface, and a metal layer around the outlet on the second surface and at least partially inside the nozzle, the metal layer inside the nozzle being completely exposed.
    Type: Application
    Filed: October 27, 2009
    Publication date: May 6, 2010
    Inventors: Andreas Bibl, Jeffrey Birkmeyer
  • Publication number: 20100078315
    Abstract: The invention provides a microwave source to assist in sputtering deposition. Such a microwave source comprises a microstrip antenna that is attached to an end of a dielectric layer outside a sputtering target or cathode. The microstrip antenna comprising a dielectric coated metal strip radiates microwave between the sputtering cathode and a cathode dark space that is formed near the sputtering cathode. The microwave enhances plasma density in the cathode dark space. With the assistance of the microwave source, the sputtering target is able to operate at a lower pressure, a lower voltage and may yield higher deposition rates than without the microwave source. The target may have a generally circular or rectangular cross section. The microstrip may be of a curved strip such as a ring shape or a straight strip, depending upon the shape of the sputtering target.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: Applied Materials, Inc.
    Inventor: Michael W. Stowell
  • Publication number: 20100052176
    Abstract: A semiconductor device includes a first wiring extending in a first direction and a second wiring extending in a second direction which crosses the first direction and being disposed with a space interposed between the first wiring and the second wiring, and including a tantalum layer, a tantalum nitride layer formed over the tantalum layer, and a metal layer formed over the tantalum nitride layer.
    Type: Application
    Filed: August 13, 2009
    Publication date: March 4, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Yoichi Kamada, Naoya Okamoto
  • Publication number: 20100015754
    Abstract: A method and a system are provide for forming planar precursor structures which are subsequently converted into thin film solar cell absorber layers. A precursor structure is first formed on the front surface of the foil substrate and then planarized through application of force or pressure by a smooth surface to obtain a planar precursor structure. The precursor structure includes at least one of a Group IB material, Group IIIA material and Group VIA material. The planar precursor structures are reacted to form planar and compositionally uniform thin film absorber layers for solar cells.
    Type: Application
    Filed: July 21, 2008
    Publication date: January 21, 2010
    Inventor: Bulent M. Basol
  • Publication number: 20100006425
    Abstract: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD chamber, sputtering a source material from a target disposed in the processing chamber in the presence of a plasma formed from the gas mixture, and forming a metal containing dielectric layer on the substrate from the source material. In another embodiment, the method includes providing a substrate into a PVD chamber, supplying a reactive gas the PVD chamber, sputtering a source material from a target disposed in the PVD chamber in the presence of a plasma formed from the reactive gas, forming a metal containing dielectric layer on the substrate from the source material, and post treating the metal containing layer in presence of species generated from a remote plasma chamber.
    Type: Application
    Filed: September 18, 2009
    Publication date: January 14, 2010
    Inventors: Xinyu Fu, Keyvan Kashefizadeh, Ashish Subhash Bodke, Winsor Lam, Yiochiro Tanaka, Wonwoo Kim
  • Publication number: 20090309188
    Abstract: A semiconductor device includes a substrate and a ferroelectric capacitor including a lower electrode, a ferroelectric film, and an upper electrode. The upper electrode includes a first layer formed of an oxide whose stoichiometric composition is expressed as AOx1 and whose actual composition is expressed as AOx2; a second layer formed on the first layer and formed of an oxide whose stoichiometric composition is expressed as BOy1 and whose actual composition is expressed as BOy2; and a metal layer formed on the second layer. The second layer is higher in ratio of oxidation than the first layer. The composition parameters x1, x2, y1, and y2 satisfy y2/y1>x2/x1, and the second layer includes an interface layer of the stoichiometric composition formed at an interface with the metal layer. The interface layer is higher in ratio of oxidation than the rest of the second layer.
    Type: Application
    Filed: August 25, 2009
    Publication date: December 17, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Wensheng Wang
  • Publication number: 20090294280
    Abstract: A multilayer film formation method enables the formation of a multilayer including a complex oxide layer and having the desired shape of an element without performing an etching process. The method positions a first mask (30A) above a substrate (S), forms an adhesion layer (36) and a lower electrode layer (37) on the substrate with the first mask by sputtering an adhesion layer target (T1) and a lower electrode layer target (T2), positions a second mask (30B) formed from a ceramic material above the lower electrode layer, superimposes a complex oxide layer (38) on the lower electrode layer with the second mask by sputtering an oxide layer target (T3), positions a third mask (30C) above the complex oxide layer, and superimposes an upper electrode layer (39) on the complex oxide layer with the third mask by sputtering an upper electrode layer target (T4).
    Type: Application
    Filed: December 20, 2007
    Publication date: December 3, 2009
    Applicant: ULVAC, INC.
    Inventors: Isao Kimura, Takehito Jinbo, Shin Kikuchi, Yutaka Nishioka, Koukou Suu
  • Publication number: 20090289270
    Abstract: According to the invention it is possible to obtain a flat AlN crystal film seed layer with a high degree of crystallinity, and particularly, a flat AlN crystal film seed layer that is homogeneous throughout can be used even with large substrates having diameters of 100 mm and greater, in order to obtain highly crystalline GaN-based thin-films for highly reliable, high-luminance LED elements and the like. The invention relates to a Group III nitride semiconductor multilayer structure obtained by layering an n-type semiconductor layer, composed of a Group III nitride semiconductor, a luminescent layer and a p-type semiconductor layer, on a sapphire substrate, the Group III nitride semiconductor multilayer structure having an AlN crystal film that is accumulated as the seed layer by sputtering on the sapphire substrate surface, and the AlN crystal film having a grain boundary spacing of 200 nm or greater.
    Type: Application
    Filed: May 19, 2009
    Publication date: November 26, 2009
    Applicant: SHOWA DENKO K.K.
    Inventors: Kenzo HANAWA, Yasunori YOKOYAMA, Yasumasa SASAKI
  • Publication number: 20090273087
    Abstract: This disclosure provides a method of fabricating a semiconductor device layer and an associated memory cell. Empirical data may be used to generate a hysteresis curve associated with metal oxide deposition for a metal-insulator-metal structure, with curve measurements reflecting variance of a desired electrical property as a function of cathode voltage used during a sputtering process that uses a biased target. By generating at least one voltage level to be used during the sputtering process, where the voltage reflects a suitable value for the electrical property from among the values obtainable in mixed-mode deposition, a semiconductor device layer may be produced with improved characteristics and durability. A multistable memory cell or array of such cells manufactured according to this process can, for a set of given materials (e.g.
    Type: Application
    Filed: October 1, 2008
    Publication date: November 5, 2009
    Inventors: Wayne French, Pragati Kumar, Prashant Phatak, Tony Chiang
  • Patent number: 7608544
    Abstract: An etching method which makes it possible to obtain a desired etching shape with ease, and a computer-readable storage medium storing a program for implementing the method. The etching method is executed by a substrate processing apparatus that performs plasma processing on a semiconductor wafer by plasma. The apparatus comprises a substrate accommodating chamber for accommodating the semiconductor wafer which has an oxide film and a resist film formed on the oxide film, and an upper electrode plate disposed in the substrate accommodating chamber and exposed in a processing space in the substrate accommodating chamber. At least part of the upper electrode plate is formed of a silicon-containing material. The upper electrode plate is sputtered by plasma, and the oxide film is etched by plasma.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: October 27, 2009
    Assignee: Tokyo Electron Limited
    Inventor: Akitoshi Harada
  • Publication number: 20090242887
    Abstract: A display substrate is disclosed comprising: a supporting substrate; an organic resin layer formed on the supporting substrate; and a transparent electrode formed on the organic resin layer, wherein the transparent electrode includes: a first layer containing a zinc oxide and formed in close contact with the organic resin layer; and a second layer containing a zinc oxide and which has a thickness thicker than a thickness of the first layer and is formed on the first layer, wherein the first layer is deposited by either one of a DC sputtering and a DC magnetron sputtering, and the second layer is deposited by any one of a radio frequency sputtering, a radio frequency magnetron sputtering, a radio frequency superimposing a DC sputtering, and a radio frequency superimposing a DC magnetron sputtering, and the display substrate is available, for example, as the substrate having a transparent electrode for counter electrode of liquid crystal display device.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Applicants: CASIO COMPUTER CO., LTD., Kochi University of Technology
    Inventors: Tetsuya YAMAMOTO, Naoki YAMAMOTO, Hisao MAKINO, Akira UJIHARA, Yoshinori HIRASHIMA, Hiroaki IWAOKA, Hisashi AOKI, Hitoshi HOKARI, Motohiko YOSHIDA
  • Publication number: 20090236603
    Abstract: A wiring film having excellent adhesion and a low resistance is formed. A barrier film having copper as a main component and containing oxygen is formed on an object to form a film thereon by introducing an oxygen gas into a vacuum chamber in which the object to form a film thereon and sputtering a pure copper target. Then, after the introduction of the oxygen gas is stopped, a low-resistance film made of pure copper is formed by sputtering the pure copper target. Since the barrier film and the low-resistance film have copper as the main component, they can be patterned at a time. Since the low-resistance film has a resistance lower than that of the barrier film, the resistance of the entire wiring film is reduced. Since the barrier layer has high adhesion to glass and silicon, the entire wiring film has high adhesion.
    Type: Application
    Filed: June 8, 2009
    Publication date: September 24, 2009
    Applicant: ULVAC, INC.
    Inventors: Satoru Takasawa, Masaki Takei, Hirohisa Takahashi, Hiroaki Katagiri, Sadayuki Ukishima, Noriaki Tani, Satoru Ishibashi, Tadashi Masuda
  • Publication number: 20090233424
    Abstract: The present invention generally relates to a semiconductor film and a method of depositing the semiconductor film. The semiconductor film comprises oxygen, nitrogen, and one or more elements selected from the group consisting of zinc, cadmium, gallium, indium, and tin. Additionally, the semiconductor film may be doped. The semiconductor film may be deposited by applying an electrical bias to a sputtering target comprising the one or more elements selected from the group consisting of zinc, cadmium, gallium, indium, and tin, and introducing a nitrogen containing gas and an oxygen containing gas. The sputtering target may optionally be doped. The semiconductor film has a mobility greater than amorphous silicon. After annealing, the semiconductor film has a mobility greater than polysilicon.
    Type: Application
    Filed: March 14, 2008
    Publication date: September 17, 2009
    Inventor: YAN YE
  • Publication number: 20090220801
    Abstract: The disclosure relates to a method and apparatus for growth of high-purity 6H SiC single crystal using a sputtering technique. In one embodiment, the disclosure relates to a method for depositing a high purity 6H-SiC single crystal film on a substrate, the method including: providing a silicon substrate having an etched surface; placing the substrate and an SiC source in a deposition chamber; achieving a first vacuum level in the deposition chamber; pressurizing the chamber with a gas; depositing the SiC film directly on the etched silicon substrate from a sputtering source by: heating the substrate to a temperature below silicon melting point, using a low energy plasma in the deposition chamber; and depositing a layer of hexagonal SiC film on the etched surface of the substrate.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Inventors: Brian Wagner, Travis J. Randall, Thomas J. Knight, David J. Knuteson, David Kahler, Andre E. Berghmans, Sean R. McLaughlin, Narsingh B. Singh, Mark Usefara
  • Publication number: 20090202807
    Abstract: Disclosed is a method for producing a film selected from the group consisting of a metal nitride film, a metal oxide film, a metal carbide film and a film of composite material thereof. The method for producing a film comprises a first step wherein a metal film is formed on a substrate by physical vapor deposition, and a second step wherein a radical, which is produced by bringing a raw material gas containing an atom selected from the group consisting of a nitrogen atom, an oxygen atom and a carbon atom into contact with a metal catalyst, is reacted with the metal film. This method for producing a film enables to form a thin metal nitride film or the like having low resistance by easily causing a radical reaction even without heating or heating at low temperatures, since the metal film is formed by physical vapor deposition without using a chemical reaction, and then an energetically activated radial is reacted with the metal film.
    Type: Application
    Filed: June 22, 2007
    Publication date: August 13, 2009
    Applicant: NATIONAL KUNIVERSITY CORPORATION KITAMI INSTITUE OF TECHNOLOGY
    Inventors: Mayumi Takeyama, Atsushi Noya
  • Publication number: 20090194155
    Abstract: Certain example embodiments of this invention relate to a photovoltaic (PV) device including an electrode such as a front electrode/contact, and a method of making the same. In certain example embodiments, the front electrode has a textured (e.g., etched) surface that faces the photovoltaic semiconductor film of the PV device. In certain example embodiments, the front electrode is formed on a flat or substantially flat (non-textured) surface of a glass substrate (e.g., via sputtering), and the surface of the front electrode is textured (e.g., via etching). In completing manufacture of the PV device, the etched surface of the front electrode faces the active semiconductor film of the PV device.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 6, 2009
    Applicant: Guardian Industries Corp.
    Inventors: Willem den Boer, Alexey Krasnov, John A. Vanderploeg
  • Publication number: 20090184322
    Abstract: An electroconductive film having high adhesion and a low resistivity is formed. An electroconductive film composed mainly of copper and containing an addition metal such as Ti is formed by sputtering a target composed mainly of copper in a vacuum atmosphere into which a nitriding gas is introduced. Such an electroconductive film has high adhesion to a silicon layer and a substrate, and is hardly peeled from the substrate. Further, since the electroconductive film has a low resistivity and a low contact resistance to a transparent electroconductive film, the electric characteristics do not degrade even when it is used as an electrode film. The electroconductive film formed by the present invention is suitable particularly as a barrier film for an electrode of a TFT or a semiconductor element.
    Type: Application
    Filed: February 24, 2009
    Publication date: July 23, 2009
    Applicant: ULVAC, INC.
    Inventors: Satoru TAKASAWA, Masaki Takei, Hirohisa Takahashi, Sadayuki Ukishima, Noriaki Tani, Satoru Ishibashi
  • Publication number: 20090166577
    Abstract: A method for manufacturing an electrode of a supercapacitor is provided. First, a poly(acrylonitrile) (PAN) fabric is provided. The PAN fabric includes a plurality of PAN fibers each having a diameter of about 50-500 nm. Then, the PAN fabric undergoes a heat treatment so that the PAN fibers are carbonized to form a carbon fiber textile. The carbon fiber fabric includes a plurality of carbon fibers each having a diameter of about 50-500 nm. The surface of each carbon fiber is nano-porous having a plurality of nano pores of about 1-50 nm in diameter. The total surface area of the nano pores account for about 85-95% of the total surface area of the carbon fibers. The carbon fiber fabric is then cut to acquire the electrode of the supercapacitor.
    Type: Application
    Filed: December 15, 2008
    Publication date: July 2, 2009
    Applicant: TAIWAN TEXTILE RESEARCH INSTITUTE
    Inventors: Chao-Chun Peng, Haw-Jer Chang, Wen-Ting Lin
  • Publication number: 20090166640
    Abstract: The present invention relates to a copper wire in a semiconductor device in which a barrier layer is formed for improving adhesion of a copper wire without any additional fabricating step; a method for fabricating the same, and a flat panel display device with the same. The copper wire includes a barrier layer formed on an underlying structure, and a copper conductive layer on the barrier layer, wherein the barrier layer includes at least one of a Cu2O layer and a CuOxNy layer.
    Type: Application
    Filed: December 12, 2008
    Publication date: July 2, 2009
    Inventors: Gyu Won Han, Dong Sun Kim, Won Joon Ho, Hee Jung Yang
  • Publication number: 20090145746
    Abstract: A method of manufacturing improved thin-film solar cells entirely by sputtering includes a high efficiency back contact/reflecting multi-layer containing at least one barrier layer consisting of a transition metal nitride. A copper indium gallium diselenide (Cu(InxGa1-x)Se2) absorber layer (X ranging from 1 to approximately 0.7) is co-sputtered from specially prepared electrically conductive targets using dual cylindrical rotary magnetron technology. The band gap of the absorber layer can be graded by varying the gallium content, and by replacing the gallium partially or totally with aluminum. Alternately the absorber layer is reactively sputtered from metal alloy targets in the presence of hydrogen selenide gas. RF sputtering is used to deposit a non-cadmium containing window layer of ZnS. The top transparent electrode is reactively sputtered aluminum doped ZnO. A unique modular vacuum roll-to-roll sputtering machine is described.
    Type: Application
    Filed: January 16, 2009
    Publication date: June 11, 2009
    Inventor: Dennis R. Hollars
  • Publication number: 20090133752
    Abstract: The present invention relates to a method of fabricating an organic photovoltaic device with improved power conversion efficiency by reducing lateral contribution of series resistance between subcells through active area partitioning by introducing a patterned structure of insulating partitioning walls inside the device. According to the method of the present invention, since the lateral contribution of series resistance between the partitioned subcells is minimized and each subcell works independently, there is no interference phenomenon against the current output of each subcells. As such, the function of a charge extraction layer with high conductivity can be maximized. Thus, the method of the present invention can be effectively used in the fabrication and development of a next-generation large area organic thin layer photovoltaic cell device.
    Type: Application
    Filed: August 13, 2008
    Publication date: May 28, 2009
    Inventors: Jae-Woong Yu, Byung Doo Chin, Jai Kyeong Kim, Nam Soo Kang
  • Publication number: 20090134016
    Abstract: A metallic adhesion layer is formed on a last level metal plate exposed in an opening of a passivation layer. A Ni—Cu alloy in which the weight percentage of Ni is from about 50% to about 70% is deposited by sputtering onto the metallic adhesion layer to form an underbump metallic layer. Optionally, a wetting layer comprising Cu or Au may be deposited by sputtering. A C4 ball is applied to a surface of the underbump metallic layer comprising the Ni—Cu alloy or the wetting layer for C4 processing. The sputter deposition of the Ni—Cu alloy offers economic advantages relative to known methods in the art since the Ni—Cu alloy in the composition of the present invention is non-magnetic and easy to sputter, and the consumption of the inventive Ni—Cu alloy is limited during C4 processing.
    Type: Application
    Filed: November 28, 2007
    Publication date: May 28, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Luc Belanger, Srinivasa S.N. Reddy, Brian R. Sundlof
  • Publication number: 20090120787
    Abstract: A barrier film of a semiconductor device is formed. The present invention forms a middle layer having copper as a main component and including a predetermined quantity of diffusible metal with the addition of a reaction gas, by sputtering an alloy target having copper as a main component with the addition of a diffusible metal, while supplying a reaction gas including oxygen or nitrogen. Since contents of the diffusible metal are accurately controlled when heating the middle layer, the barrier film is certainly formed. Additionally, the reaction gas is added to the middle layer so that the reactivity of the diffusible metal becomes high; and accordingly, it is possible to form the barrier film at a heating temperature lower than the conventional art.
    Type: Application
    Filed: January 12, 2009
    Publication date: May 14, 2009
    Applicant: ULVAC, INC.
    Inventors: Yoshihiro OKAMURA, Satoru Toyoda, Michio Ishikawa
  • Publication number: 20090120501
    Abstract: The present application discloses a method and system of depositing a lead selenide film onto another material. The lead selenide film may used in a photoconductive application or a photovoltaic application. Furthermore, the applications may be responsive to infrared radiation at ambient temperature. In one embodiment, a method includes sputtering the lead selenide film, performing a sensitization process, and applying a passivation film. In one exemplary embodiment, a p-n junction is formed by directly adhering a lead selenide film to a silicon substrate.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 14, 2009
    Inventor: George Engle
  • Publication number: 20090116169
    Abstract: A method for forming an alpha-tantalum layer comprising disposing a nitrogen containing base layer on a semiconductor substrate, bombarding the nitrogen containing base layer with a bombarding element, thereby forming an alpha-tantalum seed layer, and sputtering a layer of tantalum on the alpha-tantalum seed layer, thereby forming a surface layer of substantially alpha-tantalum.
    Type: Application
    Filed: November 1, 2007
    Publication date: May 7, 2009
    Inventors: Jung-Chih Tsao, Miao-Cheng Liao, Phil Sun, Kei-Wei Chen
  • Publication number: 20090114942
    Abstract: The present invention provides an apparatus for manufacturing a group-III nitride semiconductor layer having high crystallinity. An embodiment of the present invention provides an apparatus for manufacturing a group-III nitride semiconductor layer on a substrate 11 using a sputtering method. The apparatus includes: a chamber 41; a target 47 that is arranged in the chamber 41 and includes a group-III element; a first plasma generating means 51 that generates a first plasma for sputtering the target 47 to supply raw material particles to the substrate 11; a second plasma generating means 52 that generates a second plasma including a nitrogen element; and a control means that controls the first plasma generating means 51 and the second plasma generating means 52 to alternately generate the first plasma and the second plasma in the chamber 41.
    Type: Application
    Filed: October 23, 2008
    Publication date: May 7, 2009
    Applicant: SHOWA DENKO K.K.
    Inventors: Yasunori YOKOYAMA, Takehiko OKABE, Hisayuki MIKI
  • Publication number: 20090090618
    Abstract: It is an object of the present invention to provide a solar cell, and a method for manufacturing the same, that includes a layer having Zn, Mg, and O, and with which an increase in efficiency can be achieved. The solar cell includes a first electrode layer, a second electrode layer, a p-type semiconductor layer disposed between the first electrode layer and the second electrode layer, and a layer A disposed between the second electrode layer and the p-type semiconductor layer, the layer A includes Zn, Mg, O, and at least one element M selected from Ca, Sr, Ba, Al, In, and Ga, and photoelectromotive force is generated due to light that is incident from the second electrode layer side.
    Type: Application
    Filed: December 12, 2008
    Publication date: April 9, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Yasuhiro HASHIMOTO, Takayuki NEGAMI, Takuya SATOH
  • Publication number: 20090084421
    Abstract: One or more thin-film layers of thermoelectric material are formed on one or both sides of a substrate (e.g., a flexible substrate). In some embodiments, the thin-film layers have features that scatter phonons. A flexible substrate and its attached layers of thermoelectric material can be rolled up and/or arranged in a serpentine configuration for incorporation into a thermoelectric power source. In some embodiments, thin-film layers on one side of a substrate form a single, continuous thermoelectric element. In particular embodiments, one or more thin-film layers are fabricated on a substrate using an arrangement where the substrate is wrapped around a wheel and rotated one or more times past a sputtering device or other device for depositing material.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Larry C. Olsen, John G. DeSteese
  • Publication number: 20090078566
    Abstract: The present invention relates to a method of forming a deposited film including a first step for setting a deposited film forming target (10) into a reaction chamber (4), a second step for filling the reaction chamber (10) with a reaction gas and a third step for applying pulse DC voltage between a first conductor (3) and a second conductor (40) spaced from each other in the reaction chamber (10). The present invention further relates to a deposited film forming device for performing the above method. Preferably, in the third step, potential difference between the first conductor (3) and the second conductor (40) is set to not less than 50V and not more than 3000V, and pulse frequency of the pulse DC voltage applied to the first and second conductors (3, 40) is set to not more than 300kHz. Duty ratio of the pulse DC voltage is set to not less than 20% and not more than 90%.
    Type: Application
    Filed: June 1, 2006
    Publication date: March 26, 2009
    Applicant: KYOCERA CORPORATION
    Inventors: Akihiko Ikeda, Daigorou Ookubo, Tetsuya Kawakami, Takashi Nakamura, Masamitsu Sasahara, Daisuke Nagahama, Tomomi Fukaya
  • Publication number: 20090053453
    Abstract: A structure including a substrate, an intermediate layer provided and formed directly onto the substrate, a transition region, and a group II-VI bulk crystal material provided and formed as an extension of the transition region. The transition region acts to change the structure from the underlying substrate to that of the bulk crystal. In a method of manufacture, a similar technique can be used for growing the transition region and the bulk crystal layer.
    Type: Application
    Filed: December 21, 2006
    Publication date: February 26, 2009
    Applicant: DURHAM SCIENTIFIC CRYSTALS LIMITED
    Inventors: Arnab Basu, Max Robinson, Ben Cantwell, Andy Brinkman
  • Publication number: 20090020417
    Abstract: Methods of depositing a protective coating of a silicon-containing or metallic material onto a semiconductor substrate include sputtering such material from an electrode onto a semiconductor substrate in a plasma processing chamber. The protective material can be deposited onto a multi-layer mask overlying a low-k material and/or onto the low-k material. The methods can be used in dual damascene processes to protect the mask and enhance etch selectivity, to protect the low-k material from carbon depletion during resist strip processes, and/or protect the low-k material from absorption of moisture.
    Type: Application
    Filed: September 29, 2004
    Publication date: January 22, 2009
    Inventors: Jisoo Kim, Jong Shon, Bi Ming Yen, Peter Loewenhardt
  • Publication number: 20080297302
    Abstract: The present invention discloses an on chip zinc oxide thin film varistor, a fabrication method thereof and applications thereof. In the present invention, a zinc oxide-containing film is directly formed on a substrate with a sputtering method, and then the zinc oxide-containing film is processed with a post-annealing treatment to raise the resistance thereof. Thus, an on chip zinc oxide thin film varistor having a superior performance is attained. The fabrication process of the present invention is easy to control and has a high reliability. Further, the fabrication process of the present invention can fully integrate with the semiconductor processes, which benefits the surge protection of semiconductor components.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 4, 2008
    Inventors: Liann-Be CHANG, Uan-Hsong CHANG
  • Publication number: 20080264777
    Abstract: The present invention generally comprises a semiconductor film and the reactive sputtering process used to deposit the semiconductor film. The sputtering target may comprise pure zinc (i.e., 99.995 atomic percent or greater), which may be doped with aluminum (about 1 atomic percent to about 20 atomic percent) or other doping metals. The zinc target may be reactively sputtered by introducing nitrogen and oxygen to the chamber. The amount of nitrogen may be significantly greater than the amount of oxygen and argon gas. The amount of oxygen may be based upon a turning point of the film structure, the film transmittance, a DC voltage change, or the film conductivity based upon measurements obtained from deposition without the nitrogen containing gas. The reactive sputtering may occur at temperatures from about room temperature up to several hundred degrees Celsius. After deposition, the semiconductor film may be annealed to further improve the film mobility.
    Type: Application
    Filed: July 26, 2007
    Publication date: October 30, 2008
    Inventor: YAN YE
  • Publication number: 20080173537
    Abstract: High performance thin film thermoelectric couples and methods of making the same are disclosed. Such couples allow fabrication of at least microwatt to watt-level power supply devices operating at voltages greater than one volt even when activated by only small temperature differences.
    Type: Application
    Filed: September 28, 2007
    Publication date: July 24, 2008
    Inventors: John G. DeSteese, Larry C. Olsen, Peter M. Martin
  • Publication number: 20080169186
    Abstract: A magnetron sputtering apparatus includes a vacuum chamber, a target and a substrate holder disposed to face one another in the vacuum chamber, a magnetron disposed on the target side which is opposite to where the substrate holder is disposed, and a rotating mechanism for rotating the magnetron about an axis perpendicular to a face of the target. The magnetron includes an inner magnet formed of a sector-shaped frame and an outer magnet formed of a sector-shaped frame, these inner and outer magnets having a different polarity each other, the outer magnet being disposed to surround the inner magnet leaving a gap between the arcuate segments of the inner and outer magnets as well as a gap between straight segments of the inner and outer magnets, the width of these frames being substantially the same with each other.
    Type: Application
    Filed: September 21, 2007
    Publication date: July 17, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsumi Iyanagi, Shigeki Matsunaka
  • Publication number: 20080163928
    Abstract: The invention relates to a photovoltaic cell and to a process for producing a photovoltaic cell comprising a photovoltaically active semiconductor material of the formula (I) or (II): ZnTe ??(I) Zn1-xMnxTe ??(II) where x is from 0.01 to 0.
    Type: Application
    Filed: March 7, 2006
    Publication date: July 10, 2008
    Inventor: Hans-Josef Sterzel
  • Publication number: 20080099326
    Abstract: A plasma sputtering method for metal chalcogenides, such as germanium antimony telluride (GST), useful in forming phase-change memories. The substrate is held at a selected temperature at which the material deposits in either an amorphous or crystalline form. GST has a low-temperature amorphous range and a high-temperature crystalline range separated by a transition band of 105-120° C. Bipolar pulsed sputtering with less than 50% positive pulses of less than 10:s pulse width cleans the target while maintain the sputtering plasma. The temperature of chamber shields is maintained at a temperature favoring crystalline deposition or they may be coated with arc-spray aluminum or with crystallographically aligned copper or aluminum.
    Type: Application
    Filed: July 17, 2007
    Publication date: May 1, 2008
    Applicant: Applied Meterials, Inc.
    Inventors: MENGQI YE, Keith A. Miller, Peijun Ding, Goichi Yoshidome, Rong Tao
  • Publication number: 20080011603
    Abstract: Systems and methods are disclosed to form an exemplary memory structure by forming patterned semiconductor structures on a wafer; moving the wafer to a back-biased FTS deposition chamber; providing ultra high vacuum condition; and depositing PCMO material on patterned semiconductor structure.
    Type: Application
    Filed: July 14, 2006
    Publication date: January 17, 2008
    Inventor: Makoto Nagashima
  • Publication number: 20070241327
    Abstract: Provided is a method of fabricating a ZnO thin film structure and a ZnO thin film transistor (TFT), and a ZnO thin film structure and a ZnO thin film transistor. The method of fabricating a ZnO thin film structure may include forming a ZnO thin film on a substrate in an oxygen atmosphere, forming oxygen diffusion layers of a metal having an affinity for oxygen on the ZnO thin film and heating the ZnO thin film and the oxygen diffusion layers to diffuse oxygen of the ZnO thin film into the oxygen diffusion layers.
    Type: Application
    Filed: February 5, 2007
    Publication date: October 18, 2007
    Inventors: Chang-Jung Kim, I-Hun Song, Dong-Hun Kang, Young-Soo Park, Eun-Ha Lee