Specified Deposition Material Or Use Patents (Class 204/192.15)
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Patent number: 12246647Abstract: A vehicular interior rearview mirror assembly includes a mirror head that accommodates an electronic component and a heatsink assembly. The heatsink assembly includes (i) a first portion that is thermally coupled to the electronic component and draws heat from the electronic component, (ii) a second portion that extends from the first portion, (iii) a chamber extending between the first and second portions and (iv) a phase-changing refrigerant within the chamber. With the refrigerant in a liquid phase and responsive to heating of the first portion, the refrigerant draws heat from the first portion and changes to a gaseous phase. With the refrigerant in the gaseous phase, the refrigerant flows within the chamber and along the second portion and condenses at an inner surface of the second portion to transfer heat to the second portion. The heat is dissipated from the second portion to exterior the mirror head.Type: GrantFiled: June 11, 2024Date of Patent: March 11, 2025Assignee: Magna Mirrors of America, Inc.Inventors: Austen C. Peterson, Anthony J. LaCross, Jason A. Durfee, Joel W. Stiverson
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Patent number: 12249496Abstract: Embodiments of the present disclosure provide a semiconductor processing apparatus and a magnetron mechanism thereof. The magnetron mechanism is applied to the semiconductor processing apparatus and includes a backplane, an outer magnetic pole, and an inner magnetic pole. The outer magnetic pole is arranged on a bottom surface of the backplane and encloses to form accommodation space. The inner magnetic pole is arranged on the bottom surface of the backplane and located in the accommodation space. The inner magnetic pole can move to change corrosion areas of the target material. The distance between the inner magnetic pole and the outer magnetic pole is always greater than a predetermined distance during the movement. With the semiconductor processing apparatus and the magnetron mechanism thereof of embodiments of the present disclosure can achieve the full target corrosion in a sputtering environment in a high-pressure state.Type: GrantFiled: April 16, 2021Date of Patent: March 11, 2025Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.Inventors: Yujie Yang, Xiaoyan Wang
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Patent number: 12241152Abstract: Provided is a hard coating film having excellent sand abrasion resistance. The present invention relates to a hard coating film (20) including a nitride containing Al and Cr as main components, the hard coating film (20) having a thickness of 6 ?m or more.Type: GrantFiled: March 12, 2021Date of Patent: March 4, 2025Assignee: KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)Inventor: Koichiro Akari
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Patent number: 12239761Abstract: Disclosed herein are methods for laser cladding a coating the surface of a biomedical implant. The biomedical implant may be an implant with a laser-cladded silicon nitride coating for promoting osteogenesis.Type: GrantFiled: April 22, 2021Date of Patent: March 4, 2025Assignee: SINTX Technologies, Inc.Inventors: Bryan J. McEntire, Bhajanjit Singh Bal, Ryan M. Bock
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Patent number: 12225782Abstract: A display apparatus includes a substrate including a main display area, a component area, and a peripheral area. The component area includes a transmission area, and the peripheral area is arranged outside the main display area. The display apparatus further includes a main thin-film transistor arranged in the main display area, a main organic light-emitting diode arranged in the main display area and connected to the main thin-film transistor, an auxiliary thin-film transistor arranged in the component area, an auxiliary organic light-emitting diode arranged in the component area and connected to the auxiliary thin-film transistor, and a lower metal layer arranged between the substrate and the auxiliary thin-film transistor in the component area and having an undercut structure.Type: GrantFiled: August 23, 2023Date of Patent: February 11, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Chungi You, Hyounghak Kim
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Patent number: 12224159Abstract: A gas mixing method to enhance plasma includes: providing a reaction chamber; wherein the reaction chamber includes an accommodating space and the reaction chamber includes a top opening connected to the accommodating space; providing an adapter plate, and fixing the adapter plate to the reaction chamber to be arranged corresponding to the top opening; wherein the adapter plate further includes a window area communicating both sides of the adapter plate; providing a target disposed on top of the adapter plate to seal the top opening; premixing a plasma gas and an auxiliary gas into a gas mixture, and introducing the gas mixture into the accommodating space; and providing a biasing field to the accommodating space.Type: GrantFiled: August 9, 2023Date of Patent: February 11, 2025Assignee: SKY TECH INC.Inventors: Ta-Hao Kuo, Chi-Hung Cheng, Yao-Syuan Cheng, Kuo-Ju Liu, Ching-Liang Yi
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Patent number: 12221685Abstract: Diamond-like carbon materials and methods of making diamond-like carbon materials are provided. The diamond-like carbon materials are made and tested to specific desirable properties of conductivity and overpotential for undesired reactions. Methods of making the diamond-like carbon include sputtering using a DC magnetron, where the sputtering gas includes argon and nitrogen.Type: GrantFiled: March 15, 2023Date of Patent: February 11, 2025Assignee: Coulombic, Inc.Inventor: David Andrew Sopchak
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Patent number: 12212023Abstract: A cell stack device includes a cell stack and an end current collector. The cell stack includes a plurality of cells arrayed therein. The end current collector is located in an end portion of the cell stack in an array direction of the plurality of cells. The end current collector includes a surface exposed to an oxidizing atmosphere covered with a covering material including manganese and a surface exposed to a reducing atmosphere covered with a film different from the covering material.Type: GrantFiled: October 8, 2020Date of Patent: January 28, 2025Assignee: Kyocera CorporationInventors: Koji Yamazaki, Fumito Furuuchi
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Patent number: 12195384Abstract: One or more aspects of the disclosure pertain to an article including an optical film structure disposed on an inorganic oxide substrate, which may include a strengthened or non-strengthened substrate that may be amorphous or crystalline, such that the article exhibits scratch resistance and retains the same or improved optical properties as the inorganic oxide substrate, without the optical film structure disposed thereon. In one or more embodiments, the article exhibits an average transmittance of 85% or more, over the visible spectrum (e.g., 380 nm-780 nm). Embodiments of the optical film structure include aluminum-containing oxides, aluminum-containing oxy-nitrides, aluminum-containing nitrides (e.g., AlN) and combinations thereof. The optical film structures disclosed herein also include a transparent dielectric including oxides such as silicon oxide, germanium oxide, aluminum oxide and a combination thereof. Methods of forming such articles are also provided.Type: GrantFiled: April 18, 2023Date of Patent: January 14, 2025Assignee: Corning IncorporatedInventors: Karl William Koch, III, Charles Andrew Paulson, James Joseph Price
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Patent number: 12191199Abstract: The present disclosure describes a method to a metallization process with improved gap fill properties. The method includes forming a contact opening in an oxide, forming a barrier layer in the contact opening, forming a liner layer on the barrier layer, and forming a first metal layer on the liner layer to partially fill the contact opening. The method further includes forming a second metal layer on the first metal layer to fill the contact opening, where forming the second metal layer includes sputter depositing the second metal layer with a first radio frequency (RF) power and a direct current power, as well as reflowing the second metal layer with a second RF power.Type: GrantFiled: March 29, 2021Date of Patent: January 7, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tien-Pei Chou, Ken-Yu Chang, Sheng-Hsuan Lin, Yueh-Ching Pai, Yu-Ting Lin
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Patent number: 12183687Abstract: A semiconductor device has a substrate. A first semiconductor die and second semiconductor die are disposed over the substrate. A metal bar has an EMI-absorbing material disposed over the metal bar. The metal bar is disposed over the substrate between the first semiconductor die and second semiconductor die. An encapsulant is deposited over the first semiconductor die, second semiconductor die, and metal bar. A shielding layer is formed over the encapsulant.Type: GrantFiled: April 6, 2022Date of Patent: December 31, 2024Assignee: STATS ChipPAC Pte. Ltd.Inventors: KyouYong Han, WonJung Kim, WoongHui Park
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Patent number: 12184173Abstract: A pulsed-DC power generator is used to sputter a substrate in a chamber, and the power generator includes a first voltage source, a second voltage source, a switch unit, a control unit, and a detection unit. The control unit provides a first control signal to control the switching of the switch unit to integrate a first voltage of the first voltage source and a second voltage of the second voltage source into a pulse voltage. The control unit adjusts parameters of a first predetermined time period for arc extinction when the pulse voltage is in a working time period of the first voltage, and the number that a voltage value of the first voltage in a voltage variation to be higher than a range is higher than the number of occurrence.Type: GrantFiled: April 5, 2022Date of Patent: December 31, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Wei-Hsun Lai, Chien-Yu Wang
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Patent number: 12176205Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.Type: GrantFiled: June 19, 2023Date of Patent: December 24, 2024Assignee: Applied Materials, Inc.Inventors: Chunming Zhou, Jothilingam Ramalingam, Yong Cao, Kevin Vincent Moraes, Shane Lavan
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Patent number: 12142514Abstract: A clamp ring including an inner periphery of increased diameter at locations where inwardly extending tabs are not located reduces the risk a workpiece that is placed in close proximity to the clamp ring or which contacts the clamp ring during processing will stick to the clamp ring.Type: GrantFiled: August 27, 2021Date of Patent: November 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Wei Chou, Yuan-Hsin Chi, Yin-Tun Chou, Hung-Chih Wang, Yu-Chi Liu, Chih-Ming Wang
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Patent number: 12134835Abstract: The present disclosure generally relates to a substrate support for processing of semiconductor substrates. In one example, the substrate support has a body. The body has a top surface configured to support a substrate thereon. The body has a bottom surface opposite the top surface. The body has an upper portion disposed at the top surface and a lower portion disposed at the bottom surface. An IR blocking material is encased by the upper portion and the lower portion, wherein the IR blocking material is an optically opaque at IR wavelengths and the lower portion is optically transparent at IR wavelengths.Type: GrantFiled: September 1, 2021Date of Patent: November 5, 2024Assignee: Applied Materials, Inc.Inventor: Kim Ramkumar Vellore
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Patent number: 12115585Abstract: The present application relates to fiber cloth having functional composite particles and a preparation method therefor. The preparation method comprises: placing a solid metal block consisting of functional metal particles into a crucible using an evaporation and condensation process, and heating and evaporating the same into a vacuum physical vapor deposition (PVD) process furnace for condensation; depositing PVD ceramic layers on the outer surfaces of the functional metal particles under the condensed state using a PVD process to form the functional composite particles; and screening the functional composite particles by means of a particle filter and accelerating the particles to bombard the fiber cloth, thereby implanting the functional composite particles into the fiber cloth to form the fiber cloth having the functional composite particles.Type: GrantFiled: July 18, 2018Date of Patent: October 15, 2024Assignee: NAXAU NEW MATERIAL (ZHEJIANG) CO., LTD.Inventors: Ansu Yuan, Zhenwei Wen
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Patent number: 12116665Abstract: Disclosed are a transition metal chalcogenide thin-layer material, a preparation method and an application thereof. The preparation method comprises: uniformly spreading a transition metal source between two substrates to prepare a sandwich structure; performing a heat treatment on the sandwich structure to fuse and bond the two substrates together, and performing a chemical vapor deposition reaction on a chalcogen element source and the fused and bonded sandwich structure under the protection of a protective gas, wherein the transition metal source is heated to dissolve and diffuse at a reaction temperature, separated out from surfaces of the substrates, and reacts with the chalcogen element source. The prepared thin-layer material is uniformly distributed in a centimeter-level substrate.Type: GrantFiled: July 19, 2019Date of Patent: October 15, 2024Assignee: TSINGHUA-BERKELEY SHENZHEN INSTITUTE IN PREPARATIONInventors: Huiming Cheng, Zhengyang Cai, Yongjue Lai, Bilu Liu
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Nitride semiconductor structure, nitride semiconductor device, and method for fabricating the device
Patent number: 12100936Abstract: A nitride semiconductor structure includes a Group III nitride semiconductor portion and a Group II-IV nitride semiconductor portion. The Group III nitride semiconductor portion is single crystalline. The Group III nitride semiconductor portion has a predetermined crystallographic plane. The Group II-IV nitride semiconductor portion is provided on the predetermined crystallographic plane of the Group III nitride semiconductor portion. The Group II-IV nitride semiconductor portion is single crystalline. The Group II-IV nitride semiconductor portion contains a Group II element and a Group IV element. The Group II-IV nitride semiconductor portion forms a heterojunction with the Group III nitride semiconductor portion. The predetermined crystallographic plane is a crystallographic plane other than a (0001) plane.Type: GrantFiled: October 8, 2020Date of Patent: September 24, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Toshiyuki Takizawa -
Patent number: 12094699Abstract: Methods and apparatus for processing substrates are disclosed. In some embodiments, a process chamber for processing a substrate includes: a body having an interior volume and a target to be sputtered, the interior volume including a central portion and a peripheral portion; a substrate support disposed in the interior volume opposite the target and having a support surface configured to support the substrate; a collimator disposed in the interior volume between the target and the substrate support; a first magnet disposed about the body proximate the collimator; a second magnet disposed about the body above the support surface and entirely below the collimator and spaced vertically below the first magnet; and a third magnet disposed about the body and spaced vertically between the first magnet and the second magnet. The first, second, and third magnets are configured to generate respective magnetic fields to redistribute ions over the substrate.Type: GrantFiled: August 25, 2023Date of Patent: September 17, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Xiaodong Wang, Joung Joo Lee, Fuhong Zhang, Martin Lee Riker, Keith A. Miller, William Fruchterman, Rongjun Wang, Adolph Miller Allen, Shouyin Zhang, Xianmin Tang
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Patent number: 12089506Abstract: A sputtering target structure includes a back plate characterized by a first size, and a plurality of sub-targets bonded to the back plate. Each of the sub-targets is characterized by a size that is a fraction of the first size and is equal to or less than a threshold target size. Each sub-target includes a ferromagnetic material containing iron (Fe) and boron (B). Each of the plurality of sub-targets is in direct contact with one or more adjacent sub-targets.Type: GrantFiled: January 18, 2022Date of Patent: September 10, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Hao Cheng, Hsuan-Chih Chu, Yen-Yu Chen
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Patent number: 12083722Abstract: The present invention achieves cost reduction by simplifying the manufacturing process for a film-formed molded product provided with a metal coating film capable of transmitting electromagnetic waves therethrough. This method for manufacturing a film-formed molded product which includes a molded product and a metal coating film covering the molded product comprises: forming the molded product between a movable mold and a fixed mold; and then forming the metal coating film which covers the molded product by a film-forming part of a second mold without taking the molded product out from between the movable mold and the fixed mold. The metal coating film is capable of transmitting electromagnetic waves therethrough as a result of generation of cracks after being formed.Type: GrantFiled: December 24, 2019Date of Patent: September 10, 2024Assignee: MITSUBA CorporationInventors: Takao Umezawa, Hitoshi Konuma, Mitsunori Sato
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Patent number: 12077848Abstract: A vacuum processing apparatus includes: a stage on which a substrate is placed; and a shutter configured to be able to move between a shielding position at which the stage is covered and a retracted position that is retracted from the shielding position, wherein the shutter arranged at the shielding position forms a processing space between the shutter and the stage, and includes: a gas supplier configured to supply a gas into the processing space; and a gas exhauster provided closer to a center side of the processing space than the gas supplier and configured to exhaust the gas from the processing space.Type: GrantFiled: April 13, 2022Date of Patent: September 3, 2024Assignee: Tokyo Electron LimitedInventors: Kanto Nakamura, Hiroyuki Yokohara, Yuki Motomura
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Patent number: 12069812Abstract: The present invention relates to a housing for a multifunctional electronic device and a method for preparing the same. The housing comprises an upper cover and a lower cover fixed together to form an internal space, wherein the upper cover comprises a first layer formed of a first thermoplastic material, said first layer having a thickness in the range of 0.8 mm to 1.5 mm and comprising at least two functional components integrated thereon; the lower cover comprises a second layer formed of a second thermoplastic material, said second layer having a thickness in the range of 2 mm to 4 mm; and the housing for the multifunctional electronic device comprises at least 90 wt % of the thermoplastic materials, relative to the total weight of the housing.Type: GrantFiled: December 29, 2021Date of Patent: August 20, 2024Assignee: Covestro Deutschland AGInventors: Jiru Meng, Meiying Zhu, Guanghui Wu
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Patent number: 12062614Abstract: A method of forming a contact to a semiconductor device is provided that forms an alloy composed of nickel (Ni), platinum (Pt), aluminum (Al), titanium (Ti) and a semiconductor material. The methods may include forming a nickel and platinum semiconductor alloy at a base of a via. A titanium layer having an angstrom scale thickness is deposited in the via in contact with the nickel platinum semiconductor alloy. An aluminum containing fill is deposited atop the titanium layer. A forming gas anneal including an oxygen containing atmosphere is applied to the structure to provide a contact alloy comprising nickel, platinum, aluminum, titanium and a semiconductor element from the contact surface of the semiconductor device.Type: GrantFiled: July 13, 2021Date of Patent: August 13, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John Bruley, Jack O. Chu, Kam-Leung Lee, Ahmet S. Ozcan, Paul M. Solomon, Jeng-Bang Yau
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Patent number: 12040574Abstract: The invention relates to a device for introducing lines through an opening having a frame arranged around the opening, which frame comprises slots for elastic grommets to receive the lines. According to the invention, it is provided that a coupling housing of a coupling of a plug connection is formed integrally with the frame or with a breadboard matching one of the slots, wherein the coupling housing, the part of the frame connected thereto and/or the breadboard are adapted to be screwed to a plug housing of a plugged-in plug of the plug connection or to be clamped with at least one latch.Type: GrantFiled: March 25, 2020Date of Patent: July 16, 2024Assignee: ICOTEK PROJECT GMBH & CO. KGInventors: Valentin Ehmann, Bruno Ehmann
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Patent number: 12034080Abstract: To suppress a change in electrical characteristics in a transistor including an oxide semiconductor film. The transistor includes a first gate electrode, a first insulating film, an oxide semiconductor film, a source electrode, a drain electrode, a second insulating film, a second gate electrode, and a third insulating film. The oxide semiconductor film includes a first oxide semiconductor film on the first gate electrode side, and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film include In, M, and Zn (M is Al, Ga, Y, or Sn). In a region of the second oxide semiconductor film, the number of atoms of In is smaller than that in the first oxide semiconductor film. The second gate electrode includes at least one metal element included in the oxide semiconductor film.Type: GrantFiled: July 24, 2019Date of Patent: July 9, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Kenichi Okazaki, Yasuharu Hosaka, Masami Jintyou, Takahiro Iguchi, Shunpei Yamazaki
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Patent number: 12018389Abstract: The present invention provides a surface treatment method for magnesium alloy object, the method comprising: providing a magnesium alloy object; preprocessing the magnesium alloy object; performing micro-arc oxidation (MAO) treatment on the magnesium alloy object to form a micro-arc oxidation layer; Sputtering at least one metal layer or at least one non-metal layer on a surface of the micro-arc oxidation layer, the metal layer or non-metal layer which is sputtered on the micro-arc oxidation layer has different angles by using surface roughness of the micro-arc oxidation layer when a light source is projected on the metal layer or non-metal layer; and Sputtering a paint layer on the metal layer or non-metal layer to make the surface metallic lustrous and corrosion-resistant. The present invention further provides a surface structure of a magnesium alloy object.Type: GrantFiled: July 10, 2020Date of Patent: June 25, 2024Assignee: JU TENG INTERNATIONAL HOLDINGS LTD.Inventors: Hsiang-Jui Wang, Shun-Jie Yang, Cheng-Ping Hsiao
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Patent number: 12012650Abstract: [Object] To provide a sputtering target for producing an oxide semiconductor thin film having high properties, which serves as a substitute for IGZO, and a method of producing the same. [Solving Means] In order to achieve the above-mentioned object, a sputtering target according to an embodiment of the present invention includes: an oxide sintered body including indium, tin, and germanium, in which an atom ratio of germanium with respect to a total of indium, tin, and germanium is 0.07 or more and 0.40 or less, and an atom ratio of tin with respect to the total of indium, tin, and germanium is 0.04 or more and 0.60 or less. As a result, it is possible to achieve transistor characteristics of having mobility of 10 cm2/Vs or more.Type: GrantFiled: April 27, 2020Date of Patent: June 18, 2024Assignee: ULVAC, INC.Inventors: Kentarou Takesue, Masaru Wada, Kouichi Matsumoto, Yuu Kawagoe, Motohide Nishimura
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Patent number: 12002955Abstract: Disclosed are a cathode active material for a lithium secondary battery including a core containing lithium composite metal oxide, and a coating layer disposed on the core, containing a mixture of lithium oxide, tungsten oxide, boron oxide and phosphorus oxide, and having an amorphous phase, and a lithium secondary battery including the same.Type: GrantFiled: November 29, 2018Date of Patent: June 4, 2024Assignee: L&F CO., LTD.Inventors: Jaeshin Shin, Sun Hye Lim, Jeongsoo Son, Jihye Ku, Sung Kyun Chang, Sang Hoon Jeon, Ji Sun An
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Patent number: 11970400Abstract: There is described a carbon material comprising sp2 and sp3 hybridised carbon. Also described is a method of making a carbon material the method comprising: exposing a substrate to a flux of at least 1011 carbon ions per cm2 of substrate per 1 ms, a majority of the carbon ions having a kinetic energy of at least 10 eV. Further, electrodes comprising the carbon material are described. The electrodes may operate as an anode in Li ion battery characterised with improved specific capacity and operation life-time.Type: GrantFiled: September 23, 2019Date of Patent: April 30, 2024Assignee: PLASMA APP LTD.Inventors: Dmitry Yarmolich, Denis Yarmolich, Ramachandran Vasant Kumar, Rumen Tomov, Hyun-Kyung Kim, Teng Zhao
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Patent number: 11964328Abstract: A coated tool may include a base member including a first surface, and a coating layer located at least on the first surface of the base member. The coating layer may include a first layer located on the first surface and including a titanium compound, and a second layer contactedly located on the first layer and including aluminum oxide. The second layer may include an orientation coefficient Tc(0012) of 3.0 or more by X-ray diffraction analysis. The coating layer may include a plurality of voids located in a direction along an interface between the first layer and the second layer, and an average value of widths of the voids in a direction along the interface is smaller than an average value of distances between the voids adjacent to each other in a cross section orthogonal to the first surface.Type: GrantFiled: September 3, 2019Date of Patent: April 23, 2024Assignee: KYOCERA CorporationInventor: Tadashi Katsuma
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Patent number: 11961722Abstract: A method and apparatus are for controlling stress variation in a material layer formed via pulsed DC physical vapour deposition. The method includes the steps of providing a chamber having a target from which the material layer is formed and a substrate upon which the material layer is formable, and subsequently introducing a gas within the chamber. The method further includes generating a plasma within the chamber and applying a first magnetic field proximate the target to substantially localise the plasma adjacent the target. An RF bias is applied to the substrate to attract gas ions from the plasma toward the substrate and a second magnetic field is applied proximate the substrate to steer gas ions from the plasma to selective regions upon the material layer formed on the substrate.Type: GrantFiled: December 4, 2022Date of Patent: April 16, 2024Assignee: SPTS TECHNOLOGIES LIMITEDInventors: Anthony Wilby, Steve Burgess, Ian Moncrieff, Clive Widdicks, Scott Haymore, Rhonda Hyndman
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Patent number: 11952654Abstract: A sputtering device to sputter a liquid target. The sputtering device including a trough to receive a liquid target material and a device to stir or agitate the liquid target material. The device configured to degas the liquid target material or/and to dissipate solid particles or islands on a surface of the target or/and to move such particles or islands from an active surface region to a passive surface region and/or vice-versa, whereby the passive surface region is at least 50% less exposed to sputtering as the active surface region.Type: GrantFiled: October 22, 2019Date of Patent: April 9, 2024Assignee: EVATEC AGInventors: Dominik Jaeger, Thomas Tschirky, Marco Rechsteiner, Heinz Felzer, Hartmut Rohrmann
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Patent number: 11947261Abstract: A method of making photolithography mask plate is provided. The method includes: providing a carbon nanotube layer on a substrate; depositing a chrome layer on the carbon nanotube layer, wherein the chrome layer includes a first patterned chrome layer and a second patterned chrome layer, the first patterned chrome layer is located on the carbon nanotube layer, and the second patterned chrome layer is deposited on the substrate corresponding to holes of the carbon nanotube layer; transferring the carbon nanotube layer with the first patterned chrome layer thereon from the substrate to a base, and the carbon nanotube layer being in contact with the base; and depositing a cover layer on the first patterned chrome layer.Type: GrantFiled: January 15, 2021Date of Patent: April 2, 2024Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Mo Chen, Qun-Qing Li, Li-Hui Zhang, Yuan-Hao Jin, Dong An, Shou-Shan Fan
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Patent number: 11948848Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, the electronic package comprises a substrate and a conductive feature over the substrate. In an embodiment, a metallic mask is positioned over the conductive feature. In an embodiment, the metallic mask extends beyond a first edge of the conductive feature and a second edge of the conductive feature.Type: GrantFiled: February 12, 2019Date of Patent: April 2, 2024Assignee: Intel CorporationInventors: Jeremy Ecton, Oscar Ojeda, Leonel Arana, Suddhasattwa Nad, Robert May, Hiroki Tanaka, Brandon C. Marin
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Patent number: 11932932Abstract: A magnetron sputtering system includes a substrate mounted within a vacuum chamber. A plurality of cathode assemblies includes a first set of cathode assemblies and a second set of cathode assemblies, and is configured for reactive sputtering. Each cathode assembly includes a target comprising sputterable material and has an at least partially exposed planar sputtering surface. A target support is configured to support the target in the vacuum chamber and rotate the target relative to the vacuum chamber about a target axis. A magnetic field source includes a magnet array. A cathode assemblies controller assembly is operative to actuate the first set of cathode assemblies without actuating the second set of cathode assemblies, and to actuate the second set of cathode assemblies without actuating the first set of cathode assemblies.Type: GrantFiled: October 24, 2022Date of Patent: March 19, 2024Assignee: Alluxa, Inc.Inventors: Michael A. Scobey, Shaun Frank McCaffery
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Patent number: 11925125Abstract: The disclosure provides a magnetic random access memory element. The magnetic random access memory element includes a magnetic reference layer, a magnetic free layer, and a non-magnetic barrier layer between the magnetic free layer and the magnetic reference layer. The magnetic random access memory element further includes a MgO layer contacting the magnetic free layer. The MgO layer includes multiple homogeneous layers of MgO that provide excellent interfacial perpendicular magnetic anisotropy to the magnetic free layer while also having a low RA.Type: GrantFiled: January 23, 2022Date of Patent: March 5, 2024Assignee: Integrated Silicon Solution, (Cayman) Inc.Inventors: Bartlomiej Adam Kardasz, Jorge Vasquez, Mustafa Pinarbasi, Georg Wolf
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Patent number: 11908669Abstract: The present disclosure provides systems and methods of controlling a magnetically confined plasma sputtering process using the waste heat transferred from the plasma into the target material and then into thermally controlled magnetic field adjustment assemblies that modify the strength of the plasma confinement magnetic fields on the target material.Type: GrantFiled: January 7, 2022Date of Patent: February 20, 2024Assignee: Arizona Thin Film Research, LLCInventor: Patrick Morse
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Patent number: 11908887Abstract: Provided are a capacitor and a semiconductor device including the capacitor. The capacitor includes a first electrode; a plurality of dielectric films on the first electrode in a sequential series, the plurality of dielectric layers having different conductances from each other; and a second electrode on the plurality of dielectric films, wherein the capacitor has a capacitance which converges to a capacitance of one of the plurality of dielectric films.Type: GrantFiled: May 4, 2021Date of Patent: February 20, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Jaeho Lee, Boeun Park, Younggeun Park, Jooho Lee
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Patent number: 11901564Abstract: An anode for batteries having a columnar nanostructured porous germanium for its active material. This nanostructured porous germanium can be produced with the novel etching method disclosed herein. Such anode can be easily mass-produced with the presented method that requires pre-existing, affordable and easy to integrate equipment. In some embodiments, the produced columnar porous germanium can be directly used as a monolithic anode after its etching nanostructuration for on-chip anodes for example, where the anisotropic nanostructured germanium acts as the active material and where the remaining bulk germanium layer act as the current collector. This can be easily implemented in lithium batteries. The cycle life of such anodes could be extended by a factor of 26 and 1.8 for high rate and high energy applications, respectively.Type: GrantFiled: February 9, 2022Date of Patent: February 13, 2024Inventors: Arthur Dupuy, Abderraouf Boucherif, Richard Ares
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Patent number: 11891686Abstract: Apparatus for depositing one or more variable interference filters onto one or more substrates comprises a vacuum chamber, at least one magnetron sputtering device and at least one movable mount for supporting the one or more substrates within the vacuum chamber. The at least one magnetron sputtering device is configured to sputter material from a sputtering target towards in the mount, thereby defining a sputtering zone within the vacuum chamber. At least one static sputtering mask is located between the sputtering target and the mount. The at least one static sputtering mask is configured such that, when each substrate is moved through the sputtering zone on the at least one movable mount, a layer of material having a non-uniform thickness is deposited on each said substrate.Type: GrantFiled: February 13, 2018Date of Patent: February 6, 2024Inventors: Shigeng Song, Desmond Gibson, David Hutson
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Patent number: 11885763Abstract: A gas concentration measurement system includes a limiting current-type gas sensor, a voltage source connected to the limiting current-type gas sensor, a current detector connected to the limiting current-type gas sensor, and a gas concentration arithmetic unit connected to the current detector. The voltage source supplies first and second voltages to the limiting current-type gas sensor. The first and second voltages generate first and second limiting currents corresponding to first and second gases, respectively, in the limiting current-type gas sensor. The current detector acquires first and second limiting current values of the limiting current-type gas sensor when the first and second voltages are applied to the limiting current-type gas sensor, respectively.Type: GrantFiled: February 3, 2021Date of Patent: January 30, 2024Assignee: ROHM Co., LTD.Inventors: Shunsuke Akasaka, Yurina Amamoto, Ken Nakahara
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Patent number: 11873551Abstract: An ultraflat and ultralow-friction metallic glass thin film is fabricated. The metallic glass thin film is a binary alloy, wherein a content of one metal element of the binary alloy is between 45 atomic % and 64 atomic %. The metallic glass thin film has an atomically smooth surface with a surface roughness Ra less than 0.1 nm and a total height of profile Rt less than 0.15 nm; the friction coefficient is below 1×10?2. Due to the metallic glass thin film being treated by ion bombardment, the metallic glass thin film is thermally ultrastable.Type: GrantFiled: March 27, 2022Date of Patent: January 16, 2024Assignee: City University of Hong KongInventors: Jian Lu, Jialun Gu, Yan Bao
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Patent number: 11867656Abstract: Disclosed herein is a limiting-current type gas sensor including a solid electrolyte, a first electrode disposed on the solid electrolyte, a second electrode disposed on the solid electrolyte, and a gas feed passage extending between a gas inlet and a first portion of the first electrode, the first portion facing the solid electrolyte. The first electrode is a first porous metal electrode. The gas feed passage is formed of a first porous transition metal oxide having a second melting point higher than a first melting point of the first electrode. The first porous transition metal oxide is Ta2O5, TiO2, or Cr2O3.Type: GrantFiled: February 3, 2021Date of Patent: January 9, 2024Assignee: ROHM Co., LTD.Inventors: Shunsuke Akasaka, Yurina Amamoto, Hiroyuki Yuji
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Patent number: 11862439Abstract: In a substrate processing apparatus for processing a substrate, a processing chamber accommodating the substrate is provided. A mounting table is disposed in the processing chamber and configured to attract and hold the substrate using an electrostatic attractive force. A charge amount measurement unit is disposed in the processing chamber and configured to measure charge amount of a substrate attraction surface of the mounting table. A charge neutralization mechanism is configured to neutralize the substrate attraction surface of the mounting table. A retreating mechanism is configured to make the charge amount measurement unit retreat from a measurement position facing the substrate attraction surface of the mounting table.Type: GrantFiled: March 17, 2020Date of Patent: January 2, 2024Assignee: Tokyo Electron LimitedInventors: Takahiro Kawawa, Hideomi Hosaka, Kouichi Nakajima, Masamichi Hara
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Patent number: 11851749Abstract: A semiconductor device is manufactured by modifying an electromagnetic field within a deposition chamber. In embodiments in which the deposition process is a sputtering process, the electromagnetic field may be modified by adjusting a distance between a first coil and a mounting platform. In other embodiments, the electromagnetic field may be adjusted by applying or removing power from additional coils that are also present.Type: GrantFiled: May 27, 2022Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jen-Chun Wang, Ya-Lien Lee, Chih-Chien Chi, Hung-Wen Su
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Patent number: 11851755Abstract: A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber.Type: GrantFiled: November 19, 2020Date of Patent: December 26, 2023Assignee: ASM IP Holding B.V.Inventors: Jan Willem Maes, Werner Knaepen, Krzysztof Kamil Kachel, David Kurt de Roest, Bert Jongbloed, Dieter Pierreux
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Patent number: 11842961Abstract: An approach to provide a semiconductor structure using different two metal materials for interconnects in the middle of the line and the back end of the line metal layers of a semiconductor chip. The semiconductor structure includes the first metal material connecting both horizontally and vertically with the second metal material and the second metal material connecting both horizontally and vertically with the first metal material where the second metal material is more resistant to electromigration than the first metal material.Type: GrantFiled: August 26, 2021Date of Patent: December 12, 2023Assignee: International Business Machines CorporationInventors: Lawrence A. Clevenger, Kisik Choi, Nicholas Anthony Lanzillo, Brent Anderson
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Patent number: 11821084Abstract: Methods for depositing rhenium-containing thin films are provided. In some embodiments metallic rhenium-containing thin films are deposited. In some embodiments rhenium sulfide thin films are deposited. In some embodiments films comprising rhenium nitride are deposited. The rhenium-containing thin films may be deposited by cyclic vapor deposition processes, for example using rhenium halide precursors. The rhenium-containing thin films may find use, for example, as 2D materials.Type: GrantFiled: September 23, 2021Date of Patent: November 21, 2023Assignee: ASM IP Holding, B.V.Inventors: Jani Hamalainen, Mikko Ritala, Markku Leskela
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Patent number: 11823875Abstract: Systems and methods for real-time control of temperature within a plasma chamber are described. One of the methods includes sensing a voltage in real time of a rail that is coupled to a voltage source. The voltage source supplies a voltage to multiple heater elements of the plasma chamber. The voltage that is sensed is used to adjust one or more duty cycles of corresponding one or more of the heater elements. The adjusted one or more duty cycles facilitate achieving and maintaining a temperature value within the plasma chamber over time.Type: GrantFiled: July 26, 2021Date of Patent: November 21, 2023Assignee: Lam Research CorporationInventor: Changyou Jing