Specified Deposition Material Or Use Patents (Class 204/192.15)
  • Patent number: 11195735
    Abstract: A load lock for a substrate container for receiving flat substrates, wherein the load lock has a load chamber for receiving the substrate container that has a bottom, a ceiling, a rear wall, a front wall, a first side wall and a second side wall that connect the rear wall to the front wall, and wherein a carrier unit for receiving the substrate container is arranged in the load chamber. Here, it is provided that the load chamber can be divided into a first part and a second part along a dividing plane to open the load chamber, wherein the dividing plane extends toward the rear wall offset from the front wall through the first side wall, the second side wall, the bottom and the ceiling of the load chamber.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: December 7, 2021
    Inventor: Uwe Beier
  • Patent number: 11152325
    Abstract: A semiconductor device package includes a package substrate having a die attach region, a silicon carbide (SiC) substrate having a first surface including a semiconductor device layer thereon and a second surface that is opposite the first surface, and a die attach metal stack. The die attach metal stack includes a sputtered die attach material layer that attaches the second surface of the SiC substrate to the die attach region of the package substrate, where the sputtered die attach material layer comprises a void percent of about 15% or less. The sputtered die attach material layer may be formed using a sputter gas including at least one of krypton (Kr), xenon (Xe), or radon (Rn). The die attach metal stack may further include a metal interlayer that prevent contacts with a first barrier metal layer during a phase transition of the die attach material layer.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: October 19, 2021
    Assignee: Cree, Inc.
    Inventors: Alexander Komposch, Kevin Schneider, Scott Sheppard
  • Patent number: 11150211
    Abstract: Provided is a fabrication method for a composite planar pH sensor modified by graphene film including: slotting into substrate, setting copper foil on both sides, and setting leads on the copper foil; coating graphene film on the copper foils using micro mechanical stripping method to form the first graphene film and the second graphene film; depositing Sb layer and Sb2O3 layer successively on the first graphene film by magnetron sputtering method, and coating Nafion™ perfluorinated sulfonic acid membrane on the Sb2O3 layer by spin-coating method to fabricate pH working electrode; depositing Ag layer on the second graphene film and dipping in FeCl3 solution to form AgCl layer; coating the third graphene film on the AgCl layer to fabricate reference electrode. The composite planar pH sensor modified by graphene film may be used in pH measurement for solid, semisolid, mash and solution samples.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: October 19, 2021
    Assignee: Jiangsu University
    Inventors: Xiliang Zhang, Kun Xu, Shoujuan Cui, Miaomiao Geng, Pingping Li, Shiqing Zhang
  • Patent number: 11101116
    Abstract: A target includes a target plate and a stabilizing layer which is joined to the rear side of the target plate. The stabilizing layer was produced by high-kinetic-energy spraying of stabilizing material onto the target plate. A process for producing a target is also provided.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: August 24, 2021
    Assignees: Plansee SE, Plansee Composite Materials GmbH
    Inventors: Rudolf Gradinger, Martin Kathrein, Szilard Kolozsvari, Peter Polcik
  • Patent number: 11078718
    Abstract: A coated article includes a substrate, a first dielectric layer, a first metallic layer, a second dielectric layer, a second metallic layer, a third dielectric layer, a third metallic layer, a fourth dielectric layer, a fourth metallic layer and a fifth dielectric layer. At least one of the metallic layers is a discontinuous metallic layer having discontinuous metallic regions. An optional primer is positioned over any one of the metallic layers. Optionally a protective layer is provided as the outer most layer over the fifth dielectric layer.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: August 3, 2021
    Assignee: VITRO FLAT GLASS LLC
    Inventors: Patrick Fisher, Paul A. Medwick, Adam D. Polcyn, Andrew V. Wagner
  • Patent number: 11072853
    Abstract: The disclosure provides a metal protective layer, sequentially comprising an organic powder coating, a high-gloss organic coating, a ductile periodic variable alloy protective film and a transparent powder coating, wherein the base powder layer is an epoxy resin or pure polyester powder coating; the high-gloss organic coating is an epoxy resin powder coating, a polyester powder coating, or a polybutadiene organic coating; the ductile periodic variable alloy protective film is formed by direct current magnetron sputtering with two targets in a high vacuum environment, and the material of the targets is composed of a Ni—Cr alloy layer and pure Cr; and the transparent powder layer is an acrylic powder coating or a polyester transparent powder coating.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: July 27, 2021
    Assignee: CITIC DICASTAL CO., LTD
    Inventors: Zuo Xu, Guoyuan Xiong, Zaide Wang, Huanming Ma, Shengchao Zhang, Shuai Li, Qingwang Wei, Chuanming Li
  • Patent number: 11066739
    Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: July 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsunori Maruyama, Yuki Imoto, Hitomi Sato, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Takashi Shimazu
  • Patent number: 11004665
    Abstract: A plasma processing apparatus includes a vacuum container, a conveyance unit including a rotator and circulating and carrying a workpiece through the conveyance path, a cylindrical member having an opening at one end extended in the direction toward the conveyance path, a window member provided at the cylindrical member, and dividing a gas space from the exterior thereof, a supply unit supplying the process gas in the gas space, and an antenna generating inductive coupling plasma on the workpiece. The supply unit supplies the process gas from plural locations where a passing time at which the surface of the rotator passes through a process region is different, and the plasma processing apparatus further includes an adjusting unit individually adjusting the supply amounts of the process gas from the plural locations of the supply unit per a unit time in accordance with the passing time.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: May 11, 2021
    Assignee: SHIBAURA MECHATRONICS CORPORATION
    Inventors: Yoshio Kawamata, Daisuke Ono
  • Patent number: 10975465
    Abstract: A method of forming an internal stress control film on one surface of an object to be processed by a sputtering method, includes selecting a pressure of a process gas at the time of forming the internal stress control film from a pressure region higher than a threshold value of 5 (Pa) so that stress of the object to be processed when a bias is applied to the object to be processed becomes larger stress on a tensile side and the internal stress control film has higher density, as compared with stress in a case in which a bias is not applied thereto.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: April 13, 2021
    Assignee: ULVAC, INC.
    Inventors: Katsuaki Nakano, Daisuke Hiramatsu, Yukinobu Numata
  • Patent number: 10964590
    Abstract: The present disclosure describes a method to a metallization process with improved gap fill properties. The method includes forming a contact opening in an oxide, forming a barrier layer in the contact opening, forming a liner layer on the barrier layer, and forming a first metal layer on the liner layer to partially fill the contact opening. The method further includes forming a second metal layer on the first metal layer to fill the contact opening, where forming the second metal layer includes sputter depositing the second metal layer with a first radio frequency (RF) power and a direct current power, as well as reflowing the second metal layer with a second RF power.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Pei Chou, Ken-Yu Chang, Sheng-Hsuan Lin, Yueh-Ching Pai, Yu-Ting Lin
  • Patent number: 10921392
    Abstract: A stacked structure is positioned on a nonmagnetic metal layer. The stacked structure includes a ferromagnetic layer and an intermediate layer interposed between the nonmagnetic metal layer and the ferromagnetic layer. The intermediate layer includes a NiAlX alloy layer represented by Formula (1): Ni?1Al?2X?3 . . . (1), [X indicates one or more elements selected from the group consisting of Si, Sc, Ti, Cr, Mn, Fe, Co, Cu, Zr, Nb, and Ta, and satisfies an expression of 0<?<0.5 in a case of ?=?3/(?1+?2+?3)].
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: February 16, 2021
    Assignee: TDK CORPORATION
    Inventors: Kazuumi Inubushi, Katsuyuki Nakada
  • Patent number: 10923690
    Abstract: A refined microcrystalline electrode manufacturing method is provided. The refined microcrystalline electrode manufacturing method includes the following step. First, an active material electrode layer is subjected to a conventional thermal annealing (CTA) process in an oxygen-containing environment at a first temperature interval to form an active material crystallization precursor; the active material crystallization precursor is subjected to a rapid thermal annealing (RTA) process in the oxygen-containing environment at a second temperature interval to form an active material coating layer with uniformly distributed fine microcrystal grains, wherein the temperature range of the second temperature interval is greater than the temperature range of the first temperature interval. In addition, a thin film battery and a thin film battery manufacturing method are also provided.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: February 16, 2021
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN, R.O.C
    Inventors: Tien-Hsiang Hsueh, Yuh-Jenq Yu, Chi-Hung Su, Der-Jun Jan
  • Patent number: 10903086
    Abstract: A titanium silicide region forming method includes: performing a pretreatment to expose a clean surface of a silicon layer of a workpiece; forming a titanium-containing region and a titanium silicide region on the silicon layer after performing the pretreatment; and supplying a fluorine-containing gas to the workpiece including the titanium-containing region and the titanium silicide region so as to selectively etch the titanium-containing region with respect to the titanium silicide region.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: January 26, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hideaki Yamasaki, Kensaku Tanaka, Yuji Kobayashi
  • Patent number: 10870904
    Abstract: BMG parts having an uniform and consistently thick metal oxide layer. The metal oxide layer, also known as an interference layer, exhibits a consistent color and durability over the entire surface of the part. Methods and devices involved in forming the BMG parts with uniformly thick interference layers are also provided.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: December 22, 2020
    Assignee: Crucible Intellectual Property, LLC
    Inventors: Joseph W. Stevick, Adrian Lopez
  • Patent number: 10861685
    Abstract: The fluoro-based polymer composite target for sputtering according to the present invention is excellent in adhesion with a metal electrode to which a voltage is applied, can prevent bending, and is capable of stably forming plasma by imparting conductivity even with industrially widely used DC and MF power supply systems, thereby allowing a fluorinated polymer to be effectively deposited on an adherend by sputtering.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: December 8, 2020
    Assignee: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY
    Inventors: Sang Jin Lee, Jae Heung Lee, Woo Jin Choi, Cheol Hwan Kim, Sung Hyun Kim, Seong Geun Cho, Dong Seok Ham, Kwang Je Kim, Dong Soon Park, Jae Seong Park
  • Patent number: 10830933
    Abstract: Certain example embodiments of this invention relate to coated articles having a metamaterial-inclusive layer, coatings having a metamaterial-inclusive layer, and/or methods of making the same. Metamaterial-inclusive coatings may be used, for example, in low-emissivity applications, providing for more true color rendering, low angular color dependence, and/or high light-to-solar gain. The metamaterial material may be a noble metal or other material, and the layer may be made to self-assemble by virtue of surface tensions associated with the noble metal or other material, and the material selected for use as a matrix. An Ag-based metamaterial layer may be provided below a plurality (e.g., 2, 3, or more) continuous and uninterrupted layers comprising Ag in certain example embodiments. In certain example embodiments, barrier layers comprising TiZrOx may be provided between adjacent layers comprising Ag, as a lower-most layer in a low-E coating, and/or as an upper-most layer in a low-E coating.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: November 10, 2020
    Assignee: Guardian Glass, LLC
    Inventors: Brent Boyce, Patricia Tucker, Shashi Shah, Cesar Clavero
  • Patent number: 10816615
    Abstract: To more improve detection accuracy of a magnetic sensor. A magnetic sensor includes a substrate; an element part in which a free layer, a non-magnetic layer, and a pinned layer are stacked on the substrate; and a magnetic flux concentrator, wherein an area of the free layer is larger than an area of the pinned layer in a top view, and the free layer and the magnetic flux concentrator have a first overlap region in which the free layer and the magnetic flux concentrator at least partially overlap in the top view.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: October 27, 2020
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Masanori Masuda
  • Patent number: 10808319
    Abstract: A deposition system includes a system housing having a housing interior, a fixture transfer assembly having a generally sloped fixture transfer rail extending through the housing interior, a plurality of sequentially ordered deposition chambers connected by the fixture transfer rail, a controller interfacing with the processing chambers and at least one fixture carrier assembly carried by the fixture transfer rail and adapted to contain at least one substrate. The fixture carrier assembly travels along the fixture transfer rail under influence of gravity. A substrate fixture contains a substrate. The substrate fixture comprises a fixture frame. The fixture frame is defined by multiple circular members adjacently joined in a circular arrangement. Each circular member has a fixture frame opening sized to receive the substrate. Lens support arms may integrate into the circular members, extending in a curved disposition into the fixture frame opening to retain the substrate. A deposition method is also disclosed.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: October 20, 2020
    Assignee: Quantum Innovations, Inc.
    Inventors: Norman L. Kester, Cliff J. Leidecker, John B. Glarum, Wade E. Nielson, Briant D. Walton
  • Patent number: 10808325
    Abstract: In one aspect, coated cutting tools are described herein comprising a substrate and a coating comprising a refractory layer deposited by physical vapor deposition adhered to the substrate, the refractory layer comprising M1?xAlxN wherein x?0.68 and M is titanium, chromium or zirconium, the refractory layer including a cubic crystalline phase and having hardness of at least 25 GPa.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: October 20, 2020
    Assignee: KENNAMETAL INC.
    Inventors: Vineet Kumar, Ronald Penich, Yixiong Liu
  • Patent number: 10797353
    Abstract: A method of manufacturing an electrochemical cell may comprise exposing a surface of a metal substrate to a chalcogen in gas phase such that a metal chalcogenide layer forms on the surface of the metal substrate. A lithium metal foil may be laminated onto the metal chalcogenide layer on the surface of the metal substrate such that a surface of the lithium metal foil physically and chemically bonds to the metal chalcogenide layer on the surface of the metal substrate.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: October 6, 2020
    Assignee: GM Global Technology Operations LLC
    Inventors: Keegan Adair, Fang Dai, Mei Cai
  • Patent number: 10797301
    Abstract: In a method of manufacturing an electrochemical cell, a porous or non-porous electrically conductive metal substrate may be provided. A conformal metal chalcogenide layer may be formed on a surface of the metal substrate. The metal substrate with the conformal metal chalcogenide layer may be immersed in a nonaqueous liquid electrolyte solution comprising a lithium salt dissolved in a polar aprotic organic solvent. An electrical potential may be established between the metal substrate and a counter electrode immersed in the nonaqueous liquid electrolyte solution such that lithium ions in the electrolyte solution are reduced to metallic lithium and deposited on the surface of the metal substrate over the metal chalcogenide layer to form a conformal lithium metal layer on the surface of the metal substrate over the metal chalcogenide layer.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: October 6, 2020
    Assignee: GM Global Technology Operations LLC
    Inventors: Fang Dai, Shuru Chen, Meinan He, Mei Cai
  • Patent number: 10782427
    Abstract: A radiation detector has a structure enabling suppression of polarization in a thallium bromide crystalline body and suppression of corrosion of an electrode in the air. The radiation detector comprises a first electrode, a second electrode, and a thallium bromide crystalline body provided between the first and second electrodes. At least one of the first electrode and the second electrode includes an alloy layer. The alloy layer is comprised of an alloy of metallic thallium and another metal different from the metallic thallium.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: September 22, 2020
    Assignee: HAMAMATSU PHOTONIX K.K.
    Inventors: Masanori Kinpara, Toshiyuki Onodera, Keitaro Hitomi
  • Patent number: 10752998
    Abstract: Disclosed herein is an aging resistance coating film for a hub, sequentially comprising an aluminum alloy matrix, a silane conversion film, a high-gloss organic resin coating, a periodic variable alloy black chromium coating film and a transparent resin coating. In the coating film, the thickness of the black chromium coating film is increased and the blackness thereof is adjusted according to different content of C. The residual stress of the deposited metal layer is reduced, the problem of cracking during heating and rapid cooling of the coating film is solved, and the binding force between the coating film and the underlying high-gloss resin material is improved. Also disclosed herein is a method for forming an aging resistance coating film for a hub, comprising: (1) silane pretreatment, (2) spraying of high-gloss medium powder, (3) PVD coating, and (4) spraying of transparent powder.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: August 25, 2020
    Assignee: CITIC Dicastal Co., Ltd.
    Inventors: Zaide Wang, Huanming Ma, Junfu Li, Shengchao Zhang, Guangcai Chen, Meng Liu
  • Patent number: 10703673
    Abstract: An architectural transparency includes a substrate; a first dielectric layer over at least a portion of the substrate, a first metallic layer over the first dielectric layer, a first primer layer over the first metallic layer, a second dielectric layer over the first primer layer, a second metallic layer over the second dielectric layer, a second primer layer over the second metallic layer, a third dielectric layer over the second primer layer, a third metallic layer over the third dielectric layer, a third primer layer over the third dielectric layer, and a fourth dielectric layer over the third primer layer. At least one of the metallic layers is a subcritical metallic layer.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: July 7, 2020
    Assignee: Vitro Flat Glass LLC
    Inventors: Adam D. Polcyn, Andrew V. Wagner, Harry Buhay, Abhinav Bhandari, James J. Finley, Paul R. Ohodnicki, Jr., Dennis J. O'Shaughnessy, Jeffrey A. Benigni, Paul A. Medwick, James P. Thiel
  • Patent number: 10689748
    Abstract: At least one layer in a coating located on a surface of a substrate is a domain structure layer constituted of two or more domains different in composition. The average value of the size of each of first domains, defined as the diameter of a virtual circumcircle in contact with each first domain, is 1 nm to 10 nm. The average value of the nearest neighbor distance of each first domain, defined as the length of the shortest straight line connecting the center of the circumcircle with the center of another circumcircle adjacent to the circumcircle, is 1 nm to 12 nm. 95% or more of the first domains has a size within ±25% of the average value of the size, and 95% or more of the first domains has a nearest neighbor distance within ±25% of the average value of the nearest neighbor distance.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: June 23, 2020
    Assignees: Sumitomo Electric Industries, Ltd., Mimsi Materials AB
    Inventors: Yoshiharu Utsumi, Paer Christoffer Arumskog, Keiichi Tsuda, Konstantinos Sarakinos, Daniel Gunnar Magnfaelt
  • Patent number: 10669620
    Abstract: A vapor deposition apparatus disclosed by an embodiment comprises: a vacuum chamber (8); a mask holder (15) for holding a deposition mask 1; a substrate holder (29) for holding a substrate for vapor deposition (2); an electromagnet (3) disposed above a surface; a vapor deposition source 5 for vaporizing or sublimating a vapor deposition material; and a heat pipe (7) including at least a heat absorption part (71) and a heat dissipation part (72), the heat absorption part being in contact with the electromagnet (3), and the heat dissipation part being derived to an outside of the vacuum chamber (8). The heat pipe (7) and the electromagnet (3) are in intimate contact with each other at an area of a contact part between the heat pipe (7) and the electromagnet (3), the area being equal to or more than a cross-sectional area within an inner perimeter of a coil (32).
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: June 2, 2020
    Assignee: Sakai Display Products Corporation
    Inventors: Susumu Sakio, Katsuhiko Kishimoto
  • Patent number: 10665543
    Abstract: An integrated circuit and method comprising an underlying metal geometry, a dielectric layer on the underlying metal geometry, a contact opening through the dielectric layer, an overlying metal geometry wherein a portion of the overlying metal geometry fills a portion of the contact opening, and an oxidation resistant barrier layer disposed between the underlying metal geometry and overlying metal geometry. The oxidation resistant barrier layer is formed of TaN or TiN with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: May 26, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey A. West, Kezhakkedath R. Udayakumar, Eric H. Warninghoff, Alan G. Merriam, Rick A. Faust
  • Patent number: 10654747
    Abstract: A coated article includes a substrate, a first dielectric layer, a subcritical metallic layer having discontinuous metallic regions, a primer over the subcritical layer, and a second dielectric layer over the primer layer. The primer can be a nickel-chromium alloy. The primer can be a multilayer primer having a first layer of a nickel-chromium alloy and a second layer of titania.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: May 19, 2020
    Assignee: Vitro Flat Glass LLC
    Inventors: Adam D. Polcyn, Paul A. Medwick, Andrew V. Wagner, Paul R. Ohodnicki, James P. Thiel, Dennis J. O'Shaughnessy, Benjamin Lucci
  • Patent number: 10643843
    Abstract: The present disclosure provides a film forming method and an aluminum nitride film forming method for a semiconductor device. The film forming method for a semiconductor device includes performing multiple sputtering routes sequentially. Each sputtering routes includes: loading a substrate into a chamber; moving a shielding plate between a target and the substrate; introducing an inert gas into the chamber to perform a surface modification process on the target; performing a pre-sputtering to pre-treat a surface of the target; moving the shielding plate away from the substrate, and performing a main sputtering on the substrate to form a film on the substrate; and moving the substrate out of the chamber.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: May 5, 2020
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Jun Wang, Boyu Dong, Bingliang Guo, Yujie Geng, Huaichao Ma
  • Patent number: 10636635
    Abstract: A device for cooling a target, having a component that includes a cooling duct and having an additional thermally conductive plate that is detachably fastened to the cooling side of the component, the cooling side being the side on which the cooling duct exerts its cooling action, characterized in that between the additional thermally conductive plate and the cooling side of the component, a first self-adhesive carbon film is provided, which is extensively and self-adhesively glued to the one side of the additional thermally conductive plate that faces the cooling side.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: April 28, 2020
    Assignee: Oerlikon Surface Solutions AG, Pfäffikon
    Inventors: Denis Kurapov, Siegfried Krassnitzer
  • Patent number: 10636670
    Abstract: A method of planarizing a semiconductor device includes forming a first region and a second region on a semiconductor substrate. The first region has a larger thickness than a thickness of the second region. An interlayer dielectric layer is conformally deposited on the first region and the second region. A photoresist is formed on the second region. A bottom anti-reflective coating layer is formed on the photoresist, first region and second region. A planarization process is performed to the semiconductor substrate. The planarization process to the first region and the second region includes removing portions of the interlayer dielectric layer, the photoresist and the BARC layer.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: April 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Jen Tsai, Yuan-Tai Tseng, Shih-Chang Liu
  • Patent number: 10593931
    Abstract: An electrochemical cell comprising a lithium metal negative electrode layer physically and chemically bonded to a surface of a negative electrode current collector via an intermediate metal chalcogenide layer. The intermediate metal chalcogenide layer may comprise a metal oxide, a metal sulfide, a metal selenide, or a combination thereof. The intermediate metal chalcogenide layer may be formed on the surface of the negative electrode current collector by exposing the surface to a chalcogen in gas phase. Then, the lithium metal negative electrode layer may be formed on the surface of the negative electrode current collector over the intermediate metal chalcogenide layer by contacting at least a portion of the metal chalcogenide layer with a source of lithium such that the lithium actively wets the metal chalcogenide layer and forms a conformal lithium metal layer on the surface of the negative electrode current collector over the metal chalcogenide layer.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: March 17, 2020
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Keegan Adair, Fang Dai, Mei Cai
  • Patent number: 10553780
    Abstract: The invention relates to a method for producing a polycrystalline ceramic film on a surface (12) of a substrate (10), in which a particle stream is directed onto the surface (12) and the ceramic film is formed by deposition of the particles onto the surface (12), wherein the particle stream is directed by means of a diaphragm onto the surface (12) along a preferred direction until a first specified layer thickness is reached, the preferred direction and a surface normal of the surface (12) enclosing a specified angle of incidence. According to the invention, the diaphragm is removed from the particle stream after the specified layer thickness has been reached, and additional particles are directed onto the surface (12) until a specified second layer thickness has been reached.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: February 4, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventors: Matthias Schreiter, Wolfram Wersing
  • Patent number: 10526695
    Abstract: A sputter unit is introduced comprising a housing, a gas inlet, an interface for removable connecting the sputter unit to a vacuum chamber, a gas outlet arranged for supplying a process gas received via the gas inlet to the vacuum chamber, an interface for removable connecting the sputter unit to a base unit comprising a vacuum pump for generating a vacuum in the vacuum chamber, and a transformer arranged in the housing for increasing a supply voltage into an ionisation voltage for ionising the process gas supplied via the gas outlet to the vacuum chamber.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: January 7, 2020
    Assignee: safematic GmbH
    Inventors: Walter Colleoni, Patrick Capeder, Christof Graf
  • Patent number: 10522695
    Abstract: A multilayer stack is described. The multilayer stack includes: (i) one or more inorganic barrier layers for reducing transport of gas or vapor molecules therethrough; (ii) an inorganic reactive layer disposed adjacent to one or more of the inorganic barrier layers, and the reactive layer capable of reacting with the gas or the vapor molecules; and (iii) wherein, in an operational state of the multilayer stack, the vapor or the gas molecules that diffuse through one or more of the inorganic barrier layers react with the inorganic reactive layer, and thereby allow said multilayer stack to be substantially impervious to the gas or the vapor molecules.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: December 31, 2019
    Assignee: VITRIFLEX, INC.
    Inventors: Ravi Prasad, Dennis R. Hollars
  • Patent number: 10511021
    Abstract: A nonaqueous electrolyte secondary battery has both high capacity and high regeneration. A nonaqueous electrolyte secondary battery includes a positive electrode, a negative electrode, and a nonaqueous electrolyte. The positive electrode contains a Ni-containing lithium transition metal oxide having a layered structure and also contains a tungsten compound and/or a molybdenum compound. The percentage of Ni is greater than 90 mole percent with respect to the molar amount of the lithium transition metal oxide. The amount of the compound is 0.1 mole percent to 1.5 mole percent with respect to the molar amount of the lithium transition metal oxide in terms of tungsten element and/or molybdenum element.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: December 17, 2019
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Takaaki Oka, Kaoru Nagata, Manabu Takijiri, Takeshi Ogasawara
  • Patent number: 10502878
    Abstract: Disclosed herein are systems, methods, and apparatus for forming low emissivity panels. In some embodiments, a partially fabricated panel may be provided that includes a substrate, a reflective layer formed over the substrate, and a barrier layer formed over the reflective layer such that the reflective layer is formed between the substrate and the barrier layer. The barrier layer may include a partially oxidized alloy of three or more metals. A first interface layer may be formed over the barrier layer. A top dielectric layer may be formed over the first interface layer. The top dielectric layer may be formed using reactive sputtering in an oxygen containing environment. The first interface layer may prevent further oxidation of the partially oxidized alloy of the three or more metals when forming the top dielectric layer. A second interface layer may be formed over the top dielectric layer.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: December 10, 2019
    Assignee: GUARDIAN GLASS, LLC
    Inventors: Guowen Ding, Jeremy Cheng, Muhammad Imran, Minh Huu Le, Daniel Schweigert, Yongli Xu, Guizhen Zhang
  • Patent number: 10487393
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a carrier having first and second ends extending in a first direction, and third and fourth ends extending in a second direction and being not shorter than the first and second ends. The apparatus further includes a member holder having a magnet placement face on which first and second magnetic-pole portions are placed, the magnet placement face having fifth and sixth ends extending in the first direction and being shorter than the first and second ends, and seventh and eighth ends extending in the second direction, being longer than the fifth and sixth ends, and being longer than the third and fourth ends. The apparatus further includes a carrier transporter transporting the carrier along the first direction. The carrier transporter can transport the carrier such that the third and fourth ends pass under a center line of the magnet placement face.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: November 26, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Tatsuhiko Miura, Kazuhiro Murakami
  • Patent number: 10449532
    Abstract: Exemplary embodiments of methods and systems for hydrogen production using an electro-activated material (catalyst) are provided. The catalysts can be chosen from various elements that have characteristics that fall within a particular range. In some exemplary embodiments, a material can be electro-activated and used as a catalyst in a chemical reaction with a fuel such as water or another hydrogen containing molecule. Another fuel can also be added, such as aluminum, to generate hydrogen. Controlling the temperature of the reaction, the amount of the catalyst and/or the amounts of aluminum can provide hydrogen on demand at a desired rate of hydrogen generation.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: October 22, 2019
    Inventor: Douglas Howard Phillips
  • Patent number: 10446403
    Abstract: A wafer processing method for processing a wafer having, on a face side, a device formed in each of areas demarcated by a plurality of crossing projected cutting lines includes a holding step of holding the wafer on a chuck table with the face side exposed and a cutting step of cutting the wafer held on the chuck table along the projected cutting lines with a cutting blade. In the cutting step, cutting is carried out while cutting water with a low resistivity is supplied to the face side of the wafer and cutting water with a high resistivity is supplied to the cutting blade.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: October 15, 2019
    Assignee: DISCO CORPORATION
    Inventor: Kazuma Sekiya
  • Patent number: 10435301
    Abstract: The present application provides a method for producing a graphene quantum dot using thermal plasma, comprising injecting a carbon source into a thermal plasma jet to pyrolyze the carbon source so as to form a carbon atomic beam and allowing the carbon atomic beam to flow in a tube connected to an anode to produce a graphene quantum dot. The present application also provides an isolated graphene quantum dot from different types of graphene quantum dots and method for obtaining each of an isolated graphene quantum dot from different types of graphene quantum dots.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: October 8, 2019
    Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jung Sang Suh, Juhan Kim, Myung Woo Lee
  • Patent number: 10421125
    Abstract: An additive manufacturing apparatus includes a platform, a dispenser to dispense layers of feed material on the platform, and a fusing system including an energy source to generate an energy beam having an adjustable intensity profile, an actuator to cause the energy beam to traverse across an outermost layer of feed material, and a controller coupled to the actuator and the energy source. The controller is configured to cause the energy source to adjust the intensity profile of the energy beam on the outermost layer of feed material based on a traversal velocity and/or a traversal direction of the light beam across the outermost layer of feed material.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: September 24, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Hou T. Ng, Ron Naftali, Christopher G. Talbot
  • Patent number: 10421691
    Abstract: A joined body 20 according to the present invention includes a first member 22 made of a porous ceramic, a second member 24 made of a metal, and a joint 30 formed of an oxide ceramic of a transition metal, the joint 30 joining the first member 22 to the second member 24. Alternatively, a joined body may include a first member made of a dense material, a second member made of a dense material, and a joint formed of an oxide ceramic of a transition metal, the joint joining the first member to the second member.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: September 24, 2019
    Assignee: NGK Insulators, Ltd.
    Inventors: Yunie Izumi, Yoshimasa Kobayashi, Kenji Morimoto, Shinji Kawasaki
  • Patent number: 10418660
    Abstract: In manufacturing a lithium battery, a plasma deposition of a layer of LiPON is made on a structure that includes an anode contact zone and a cathode contact zone. Before making the deposition of layer of LiPON, a conductive portion is deposited to short the anode contact zone to the cathode contact zone. After the deposition of the layer of LiPON in completed, the conductive portion is cut to sever the short between the anode and cathode contact zones.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: September 17, 2019
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Julien Ladroue, Fabien Pierre
  • Patent number: 10408976
    Abstract: A light transmissive member includes a substrate having a light transmission property, wherein on one surface of the substrate, an antireflection layer in which a low-refractive index layer composed mainly of silicon oxide (SiO2) and a high-refractive index layer composed mainly of silicon nitride (SiN) are alternately stacked is formed, and on the other surface of the substrate, an antistatic layer including at least a transparent electrically conductive film layer is formed.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: September 10, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Daiki Furusato, Katsumi Suzuki
  • Patent number: 10407767
    Abstract: A method is provided for depositing a layer on a substrate inside a vacuum chamber by a magnetron sputtering device comprising at least two magnetron cathodes, each equipped with one target, at least one additional electrode, wherein a separate power supply unit is allocated to each magnetron cathode and wherein, in addition to at least one working gas, at least one reactive gas is introduced into the vacuum chamber. In a first phase, a pulsed negative direct current voltage is conducted from each power supply unit to the corresponding magnetron cathode, wherein the power supply units are operated in the push-pull mode. In a second phase, the pulsed direct current voltages provided by the power supply units are switched between the corresponding magnetron cathode and the additional electrode. An electric voltage is applied to the substrate or an electrode at the back of the substrate.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: September 10, 2019
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Hagen Bartzsch, Peter Frach, Jan Hildisch
  • Patent number: 10352894
    Abstract: The limiting-current type gas sensor includes: a porous lower electrode disposed on a substrate; an insulating film disposed on the porous lower electrode; a solid electrolyte layer disposed on the porous lower electrode in an opening formed by patterning the insulating film, and further disposed on the insulating film surrounding the opening; and a porous upper electrode disposed on the solid electrolyte layer, wherein the insulating film realizes non-contact between an edge face of the solid electrolyte layer and the porous lower electrode, in order to suppress the intake of oxygen (O) ion from the edge face of the solid electrolyte layer, and thereby the surface-conduction current component between the porous upper electrode and the porous lower electrode can be reduced. There can be provided the limiting-current type gas sensor capable of reducing the surface-conduction current component and realizing low power consumption.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: July 16, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Shunsuke Akasaka
  • Patent number: 10343893
    Abstract: Low friction coating of the present invention includes a boron-doped zinc oxide thin film, wherein piezoelectric polarization in a vertical direction perpendicular to a film surface and a lateral direction horizontal to the film surface occurs and a magnitude of the piezoelectric polarization in the vertical direction is within 150 pm and a magnitude of the piezoelectric polarization in the lateral direction is within 100 pm at 90% or more of measurement points. This makes it possible to greatly decrease the friction in a nanometer order.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: July 9, 2019
    Assignee: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Michiko Sasaki, Masahiro Goto, Akira Kasahara, Masahiro Tosa
  • Patent number: 10328672
    Abstract: Disclosed herein is a method for applying metals to clay. More particularly, the present invention relates to applying malleable metals, such as silver, to clay, such that the metal attaches to the clay and as an added feature forms beads on the surface of the clay.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: June 25, 2019
    Inventor: Susan Kadish
  • Patent number: 10325779
    Abstract: A technique to inhibit the growth of colloidal silica deposits on surfaces treated in phosphoric acid is described. In one embodiment, the disclosed techniques include the use of a colloidal silica growth inhibitor as an additive to a phosphoric acid solution utilized for a silicon nitride etch. In some embodiments, the additive may have chemistry that may contain strong anionic groups. A method and apparatus is provided that monitors the silica concentration and/or the colloidal silica growth inhibitor concentration in the phosphoric acid solution during processing and adjusts the amount of those components as needed. Techniques are provided for a method and apparatus to control the additive concentration to be used as well as the silica concentration in the phosphoric acid solution. The techniques described herein provide a high selectivity etch of silicon nitride towards silicon dioxide without the growth of colloidal silica deposits on the exposed surfaces.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 18, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Antonio L.P. Rotondaro, Wallace P. Printz