Etching Specified Material Patents (Class 204/192.35)
  • Patent number: 11708294
    Abstract: A glass substrate for a high-frequency device, which contains SiO2 as a main component, the glass substrate having a total content of alkali metal oxides in the range of 0.001-5% in terms of mole percent on the basis of oxides, the alkali metal oxides having a molar ratio represented by Na2O/(Na2O+K2O) in the range of 0.01-0.99, and the glass substrate having a total content of alkaline earth metal oxides in the range of 0.1-13% in terms of mole percent on the basis of oxides, wherein at least one main surface of the glass substrate has a surface roughness of 1.5 nm or less in terms of arithmetic average roughness Ra, and the glass substrate has a dielectric dissipation factor at 35 GHz of 0.007 or less.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: July 25, 2023
    Assignee: AGC Inc.
    Inventors: Kazutaka Ono, Shuhei Nomura, Nobutaka Kidera, Nobuhiko Takeshita
  • Patent number: 11651944
    Abstract: A treatment method performed by a film processing apparatus including: a first discharge electrode unit and a second discharge electrode unit respectively including magnets that form a magnetic field; and an AC power source capable of alternately switching polarities of the first discharge electrode unit and the second discharge electrode unit. In the treatment method, a predetermined surface treatment of a film F is performed by generating a plasma P while alternately switching polarities of the first discharge electrode unit and the second discharge electrode unit by using high-frequency power supplied from the AC power source.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: May 16, 2023
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Kengo Okamura, Ken Takahara, Takahiro Hayakawa, Michihiro Hanami, Takayuki Tani
  • Patent number: 11424134
    Abstract: The present disclosure generally relates to methods for selectively etching copper, cobalt, and/or aluminum layers on a substrate semiconductor manufacturing applications. A substrate comprising one or more copper layers, cobalt layers, or aluminum layers is transferred to a processing chamber. The surface of the copper, cobalt, or aluminum layer is oxidized. The oxidized copper, cobalt, or aluminum surface is then exposed to hexafluoroacetylacetonate vapor. The hexafluoroacetylacetonate vapor reacts with the oxidized copper, cobalt, or aluminum surface to form a volatile compound, which is then pumped out of the chamber. The reaction of the oxidized copper, cobalt, or aluminum surface with the hexafluoroacetylacetonate vapor selectively atomic layer etches the copper, cobalt, or aluminum surface.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: August 23, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Nitin Deepak, Prerna Sonthalia Goradia
  • Patent number: 11324850
    Abstract: An air purification unit and/or system for an environment with multiple seated individuals, including an air collector and air purification chamber, to be used independently from or in conjunction with the environment's air handling system.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: May 10, 2022
    Assignee: Air-Clenz Systems, LLC
    Inventors: Ronald Blum, Anita Broach, Russell French
  • Patent number: 11309168
    Abstract: A maintenance apparatus includes a case and a maintenance mechanism. The case includes an opening having a size corresponding to a second gate of a vacuum processing apparatus including a processing chamber having a first gate through which a substrate is loaded and unloaded and the second gate different from the first gate. The case is attachable to the second gate while maintaining airtightness. The maintenance mechanism is provided in the case and is configured to perform at least one of an operation of detaching a consumed part in the processing chamber through the opening, an operation of attaching a replacement part in the processing chamber and an operation of cleaning the processing chamber.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: April 19, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takehiro Ueda, Jun Hirose
  • Patent number: 11120976
    Abstract: A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: September 14, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhaskar Kumar, Anup Kumar Singh, Vivek Bharat Shah, Sidharth Bhatia, Ganesh Balasubramanian
  • Patent number: 10971540
    Abstract: Systems and methods may be provided for coupling together semiconductor devices. One or more of the semiconductor devices may be provided with an array of bump contacts formed in an etch back process. The bump contacts may be indium bumps. The indium bumps may be formed by depositing a sheet of indium onto a surface of a device substrate, depositing and patterning a layer of photoresist over the indium layer, and selectively etching the indium layer to the surface of the substrate using the patterned photoresist layer to form the indium bumps. The substrate may be an infrared detector substrate. The infrared detector substrate may be coupled to a readout integrated circuit substrate using the bumps.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: April 6, 2021
    Assignee: FLIR SYSTEMS, INC.
    Inventors: Richard E. Bornfreund, Joseph H. Durham
  • Patent number: 10714319
    Abstract: A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: July 14, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhaskar Kumar, Anup Kumar Singh, Vivek Bharat Shah, Sidharth Bhatia, Ganesh Balasubramanian
  • Patent number: 10692729
    Abstract: An etching process method is provided that includes outputting a first high frequency power from a first high frequency power supply in a cryogenic temperature environment where the temperature of a substrate is controlled to be less than or equal to ?35° C., supplying a sulfur fluoride-containing gas and a hydrogen-containing gas, generating a plasma from the supplied sulfur fluoride-containing gas and hydrogen-containing gas, and etching a laminated film made up of laminated layers of silicon-containing films having different compositions with the generated plasma.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: June 23, 2020
    Assignee: Tokyo Electron Limited
    Inventors: Jin Kudo, Wataru Takayama, Maju Tomura
  • Patent number: 10544505
    Abstract: A method of performing deposition of diamond-like carbon on a workpiece in a chamber includes supporting the workpiece in the chamber facing an upper electrode suspended from a ceiling of the chamber, introducing a hydrocarbon gas into the chamber, and applying first RF power at a first frequency to the upper electrode that generates a plasma in the chamber and produces a deposition of diamond-like carbon on the workpiece. Applying the RF power generates an electron beam from the upper electrode toward the workpiece to enhance ionization of the hydrocarbon gas.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: January 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Yang Yang, Kartik Ramaswamy, Kenneth S. Collins, Steven Lane, Gonzalo Antonio Monroy, Lucy Chen, Yue Guo
  • Patent number: 10401536
    Abstract: The invention concerns an item comprising a substrate having at least one main surface coated with a layer A in direct contact with a hydrophobic outer layer B, characterized in that said layer A has been obtained by depositing, under ion beam, activated species from at least one compound C, in gas form, containing, in the structure of same: at least one carbon atom, at least one hydrogen atom, at least one Si—X group, in which X is a hydroxy group or a hydrolysable group chosen from the H, halogen, alkoxy, aryloxy and acyloxy groups, —NR1R2 in which R1 and R2 separately designate a hydrogen atom, an alkyl group or an aryl group, and —N(R3)—Si in which R3 designates an alkyl group or an aryl group, said compound C being neither tetramethyldisiloxane nor tetraethoxysilane, nor vinylmethyldiethoxysilane, nor hexamethylcyclotrisilazane, said layer A not being formed from inorganic precursor compounds.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: September 3, 2019
    Assignee: Essilor International
    Inventors: Sebastien Chiarotto, Bruce Faure, Stephanie Pega, Karin Scherer
  • Patent number: 10312141
    Abstract: A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a superconducting interconnect element in a first dielectric layer, such that the superconducting interconnect element has a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The method also includes performing a plasma clean on a top surface of the first interconnect layer, and depositing a second dielectric layer over the first dielectric layer.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: June 4, 2019
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Christopher F. Kirby, Sandro J. Di Giacomo, Michael Rennie
  • Patent number: 10297497
    Abstract: In accordance with at least one embodiment of the disclosure, a method of patterning platinum on a substrate is disclosed. In an embodiment, an adhesive layer is deposited over the substrate, a sacrificial layer is deposited over the adhesive layer, and a patterned photoresist layer is formed over the sacrificial layer. Then, the sacrificial layer is patterned utilizing the photoresist layer as a mask such that at least a portion of the adhesive layer is exposed. Subsequently, the top and sidewall surfaces of the patterned sacrificial layer and the first portion of the adhesive layer are covered by a platinum layer. Finally, the sacrificial layer and a portion of the platinum layer covering the top and sidewall surfaces of the sacrificial layer are etched, thereby leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: May 21, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sebastian Meier, Helmut Rinck, Kai-Alexander Schachtschneider, Fromund Metz, Mario Schmidpeter, Javier Gustavo Moreira
  • Patent number: 10201095
    Abstract: A method for manufacturing a circuit board system comprising mechanical protection of electrical components is presented. The circuit board system comprises a circuit board (101) furnished with electrical components (103-111) and a protection element (102) attached to areas of the circuit board which are free from the electrical components. The protection element has thickness in the direction perpendicular to the circuit board and it is shaped to leave the electrical components unscreened in the direction perpendicular to the circuit board. Thus, the protection element constitutes barriers protecting the electrical components but still allows the electrical components to be accessed from the direction perpendicular to the circuit board for example in a flying probe testing. Furthermore, the protection element provides electrical connections between functional entities of the circuit board system.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: February 5, 2019
    Assignee: CORIANT OY
    Inventors: Antti Holma, Peter Kokko
  • Patent number: 10113229
    Abstract: Approaches herein increase a ratio of reactive ions to a neutral species in a plasma processing apparatus. Exemplary approaches include providing a processing apparatus having a plasma source chamber including a first gas inlet, and a deposition chamber coupled to the plasma source chamber, wherein the deposition chamber includes a second gas inlet for delivering a point of use (POU) gas to an area proximate a substrate disposed within the deposition chamber. Exemplary approaches further include generating an ion beam for delivery to the substrate, and modifying a pressure within the deposition chamber in the area proximate the substrate to increase an amount of reactive ions present for impacting the substrate when the ion beam is delivered to the substrate.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: October 30, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tsung-Liang Chen, John Hautala, Shurong Liang, Joseph Olson
  • Patent number: 10068781
    Abstract: Systems and methods for drying a substrate including a plurality of high aspect ratio (HAR) structures are performed after at least one of wet etching and/or wet cleaning the substrate using at least one of wet etching solution and/or wet cleaning solution, respectively, and without drying the substrate. Fluid between the plurality of HAR structures is displaced using a solvent including a bracing material. After the solvent evaporates, the bracing material precipitates out of solution and at least partially fills the plurality of HAR structures. The substrate is exposed to plasma generated using a plasma gas chemistry that is hydrogen rich to remove the bracing material thereby drying the substrate including the HAR structures without damaging the plurality of HAR structures.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: September 4, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Stephen M. Sirard, Ilia Kalinovski, Jeff Hahn
  • Patent number: 9761458
    Abstract: The invention relates to an apparatus for reactive ion etching of a substrate, comprising: a plasma etch zone including an etch gas supply and arranged with a plasma generating structure for igniting a plasma and comprising an electrode structure arranged to accelerate the etch plasma toward a substrate portion to have ions impinge on the surface of the substrate; a passivation zone including a cavity provided with a passivation gas supply; said supply arranged for providing a passivation gas flow from the supply to the cavity; the cavity in use being bounded by the injector head and the substrate surface; and a gas purge structure comprising a gas exhaust arranged between said etch zone and passivation zone; the gas purge structure thus forming a spatial division of the etch and passivation zones.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: September 12, 2017
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Freddy Roozeboom, Adriaan Marinus Lankhorst, Paulus Willibrordus George Poodt, Norbertus Benedictus Koster, Gerardus Johan Jozef Winands, Adrianus Johannes Petrus Maria Vermeer
  • Patent number: 9711679
    Abstract: Methods for fabricating mid-infrared light emitting diodes (LEDs) based upon antimonide-arsenide semiconductor heterostructures and configured into front-side emitting high-brightness LED die and other LED die formats.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: July 18, 2017
    Assignee: Terahertz Device Corporation
    Inventor: Mark S. Miller
  • Patent number: 9706637
    Abstract: Methods for producing a circuit board system and a circuit board arrangement are disclosed. One method for producing a circuit board system includes: providing a first circuit board including a top side, a bottom side, a top metallization layer arranged at the top side, and a bottom metallization layer arranged at the bottom side, wherein the bottom metallization layer comprises a number of soldering pads; applying a first solder over the soldering pads; and applying a second solder over the top metallization layer. The method further includes providing a number of electronic components and a metallic or metallized shielding frame; arranging the number of electronic components and the shielding frame on the applied second solder; and soldering the number of electronic components and the shielding frame to the top metallization layer with the second solder.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: July 11, 2017
    Assignee: Harman Becker Automotive Systems GmbH
    Inventors: Guenther Kraft, Stephan Joos, Krunoslav Orcic, Walter Knappich, Didier Berthomier
  • Patent number: 9696619
    Abstract: During a calculation technique, a modification to a reflective photo-mask is calculated. In particular, using information specifying a defect associated with a location on a top surface of the reflective photo-mask, the modification to the reflective photo-mask is calculated. For example, the calculation may involve an inverse optical calculation in which a difference between a pattern associated with the reflective photo-mask at an image plane in a photo-lithographic process and a reference pattern at the image plane in the photo-lithographic process is used to calculate the modification at an object plane in the photo-lithographic process. Note that the modification includes a material added to the top surface of the reflective photo-mask using an additive fabrication process. Moreover, the modification is proximate to the location.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: July 4, 2017
    Assignee: Dino Technology Acquisition LLC
    Inventors: Masaki Satake, Ying Li
  • Patent number: 9660182
    Abstract: A plasma processing method of etching a multilayered material having a structure where a first magnetic layer 105 and a second magnetic layer 103 are stacked with an insulating layer 104 therebetween is performed by a plasma processing apparatus 10 including a processing chamber 12 where a processing space S is formed; and a gas supply unit 44 of supplying a processing gas into the processing space, and includes a first etching process where the first magnetic layer is etched by supplying a first processing gas and generating plasma, and the first etching process is stopped on a surface of the insulating layer; and a second etching process where a residue Z is removed by supplying a second processing gas and generating plasma. The first magnetic layer and the second magnetic layer contain CoFeB, the first processing gas contains Cl2, and the second processing gas contains H2.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: May 23, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takashi Sone, Daisuke Urayama, Masato Kushibiki, Nao Koizumi, Wataru Kume, Eiichi Nishimura, Fumiko Yamashita
  • Patent number: 9622354
    Abstract: A method for manufacturing a circuit-board structure wherein a conductor foil is provided on an insulating material layer, a resist layer is spread on the conductor foil and a recess formed in the conductor foil and insulating material layer. The resist layer is patterned to form a conductor-pattern having openings wherein conductor patterns may be grown. A component is attached to the conductor foil and conductor pattern and conductor material is removed which does not form part of a conductor pattern.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: April 11, 2017
    Assignee: GE Embedded Electronics Oy
    Inventors: Risto Tuominen, Antti Iihola, Petteri Palm
  • Patent number: 9589835
    Abstract: Top-down methods of increasing reflectivity of tungsten films to form films having high reflectivity, low resistivity and low roughness are provided. The methods involve bulk deposition of tungsten followed by a removing a top portion of the deposited tungsten. In particular embodiments, removing a top portion of the deposited tungsten involve exposing it to a fluorine-containing plasma. The methods produce low resistivity tungsten bulk layers having lower roughness and higher reflectivity. The smooth and highly reflective tungsten layers are easier to photopattern than conventional low resistivity tungsten films. Applications include forming tungsten bit lines.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: March 7, 2017
    Assignee: Novellus Systems, Inc.
    Inventors: Anand Chandrashekar, Raashina Humayun
  • Patent number: 9396965
    Abstract: In one embodiment, a method for etching a metal layer on a substrate may include providing a hydrogen-containing gas and an impurity gas to a plasma chamber; generating a plasma from the hydrogen-containing gas and the impurity gas in the plasma chamber, the plasma comprising hydrogen-containing ions; providing gaseous species from the plasma chamber to the substrate, wherein the providing the gaseous species comprises directing an ion beam comprising the hydrogen-containing ions formed from the plasma through an extraction aperture of an extraction plate disposed between the substrate and the plasma.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: July 19, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tristan Ma, Ludovic Godet, Thomas R. Omstead
  • Patent number: 8966729
    Abstract: In sputter etching to improve the adhesion between upper electrodes and lead electrodes, the sputter etching of surfaces of the upper electrodes under an Ar gas flow at a flow rate of 60 sccm or more can reduce the residence time of Ar ions on the surfaces of the upper electrodes because of the Ar gas flow. This can prevent the charging of the upper electrodes due to the buildup of ionized Ar gas on the surfaces, reduce the influence of charging on piezoelectric elements, and provide a method for manufacturing a piezoelectric actuator that includes the piezoelectric elements each including a piezoelectric layer having small variations in hysteresis characteristics and deformation characteristics.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: March 3, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Hironobu Kazama, Takahiro Kamijo, Masato Shimada, Hiroyuki Kamei, Yuka Yonekura, Motoki Takabe
  • Publication number: 20150037710
    Abstract: The invention relates to an article, such as a plate for a use in a fuel cell, which has a base onto which a coating is applied which is electrically conductive and which includes a substantially carbon material layer and at least one intermediate layer which can be a nitride, carbide, metal and metal alloy. The multilayer coating which is formed allows the protection of the article in an efficient and effective manner.
    Type: Application
    Filed: February 25, 2013
    Publication date: February 5, 2015
    Inventors: Kevin Cooke, Gunter Eitzinger, Susan Field, Hailin Sun
  • Publication number: 20150037972
    Abstract: Described are cleaning methods for removing contaminants from an electrical contact interface of a partially fabricated semiconductor substrate. The methods may include introducing a halogen-containing species into a processing chamber, and forming an adsorption-limited layer, which includes halogen from the halogen-containing species, atop the electrical contact interface and/or the contaminants thereon. The methods may further include thereafter removing un-adsorbed halogen-containing species from the processing chamber and activating a reaction between the halogen of the adsorption-limited layer and the contaminants present on the electrical contact interface. The reaction may then result in the removal of at least a portion of the contaminants from the electrical contact interface. In some embodiments, the halogen adsorbed onto the surface and reacted may be fluorine. Also described herein are apparatuses having controllers for implementing such electrical contact interface cleaning techniques.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 5, 2015
    Inventors: Michal Danek, Juwen Gao, Aaron Fellis, Francisco Juarez, Chiukin Steven Lai
  • Patent number: 8900471
    Abstract: Methods and apparatus for in-situ plasma cleaning of a deposition chamber are provided. In one embodiment a method for plasma cleaning a deposition chamber without breaking vacuum is provided. The method comprises positioning a substrate on a susceptor disposed in the chamber and circumscribed by an electrically floating deposition ring, depositing a metal film on the substrate and the deposition ring in the chamber, grounding the metal film deposited on the deposition ring without breaking vacuum, and removing contaminants from the chamber with a plasma formed in the chamber without resputtering the metal film on the grounded deposition ring and without breaking vacuum.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: December 2, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Richard J. Green, Cheng-hsiung Tsai, Shambhu N. Roy, Puneet Bajaj, David H. Loo
  • Patent number: 8894828
    Abstract: Etch assisting agents for focused ion beam (FIB) etching of copper for circuit editing of integrated circuits both prevent loss of adjacent dielectric due to sputtering by the ion beam, and render sputtered re-deposited copper on adjacent surfaces non-conductive to avoid electrical short circuits. The agents are characterized by having an N—N (N being Nitrogen) bonding in their molecules and boiling points between about 70° C. and about 220° C., and include hydrazine and water solutions, hydrazine derivatives, NitrosAmine derivatives saturated with two hydrocarbon groups selected from Methyl, Ethyl, Propyl and Butyl, NitrosAmine related compounds, and Nitrogen Tetroxide. Preferred agents are Hydrazine monohydrate (HMH), HydroxyEthylHydrazine (HEH), CEH, BocMH, BocMEH, NDMA, NDEA, NMEA, NMPA, NEPA, NDPA, NMBA, NEBA, NPYR, NPIP, NMOR and Carmustine, alone or in combination with Nitrogen Tetroxide. The agents are effective for etching copper in high aspect ratio (deep) holes.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: November 25, 2014
    Assignee: Tiza Lab, LLC
    Inventor: Vladimir V. Makarov
  • Patent number: 8864959
    Abstract: Planetary carriers (22) for workpieces mounted on a carousel (19) are provided within a vacuum chamber. A source (24) for a cloud comprising ions (CL) is provided so that a central axis (ACL) of the cloud intercepts the rotary axis (A20) of the carousel (19). The cloud (CL) has an ion density profile at the moving path (T) of planetary axes (A22) which drops to 50% of the maximum ion density at a distance from the addressed center axis (ACL) which is at most half the diameter of the planetary carriers (22). When workpieces upon the planetary carriers (22) are etched by the cloud comprising ions material which is etched off is substantially not redeposited on neighboring planetary carriers but rather ejected towards the wall of the vacuum chamber.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: October 21, 2014
    Assignee: Oerlikon Trading AG, Truebbach
    Inventors: Siegfried Krassnitzer, Oliver Gstoehl, Markus Esselbach
  • Publication number: 20140262755
    Abstract: In some embodiments, a plasma etching apparatus is provided for etching copper that includes (1) a chamber body having a process chamber adapted to receive a substrate; (2) an RF source coupled to an RF electrode; (3) a pedestal located in the processing chamber and adapted to support a substrate; and (4) a UV source configured to delivery UV light to the processing chamber during at least a portion of an etch process performed within the plasma etching apparatus. Numerous other aspects are provided.
    Type: Application
    Filed: March 9, 2014
    Publication date: September 18, 2014
    Inventors: Subhash Deshmukh, Jingjing Liu, He Ren
  • Patent number: 8815060
    Abstract: A method for applying a protective layer to an electronic device such as the ABS of a slider, magnetic head, etc. for reducing paramagnetic deadlayer thickness includes selecting an etching angle for minimizing formation of a paramagnetic deadlayer at an interface of an electronic device and an adhesive layer subsequently formed on the electronic device, etching a surface of an electronic device at the selected angle, the selected angle being less than about 75 degrees from an imaginary line extending perpendicular to the surface, forming an adhesive layer on the etched surface of the electronic device, and forming a protective layer on the adhesive layer. A magnetic head formed by the process is also disclosed.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: August 26, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Eric Wayne Flint, Ning Shi, Qi-Fan Xiao
  • Patent number: 8764952
    Abstract: In a method of irradiating a gas cluster ion beam on a solid surface and smoothing the solid surface, the angle formed between the solid surface and the gas cluster ion beam is chosen to be between 1° and an angle less than 30°. In case the solid surface is relatively rough, the processing efficiency is raised by first irradiating a beam at an irradiation angle ? chosen to be something like 90° as a first step, and subsequently at an irradiation angle ? chosen to be 1° to less than 30° as a second step. Alternatively, the set of the aforementioned first step and second step is repeated several times.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: July 1, 2014
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Akinobu Sato, Akiko Suzuki, Emmanuel Bourelle, Jiro Matsuo, Toshio Seki, Takaaki Aoki
  • Patent number: 8709219
    Abstract: A structured diamond tool having a predefined grayscale grating profile shape allows a corresponding grayscale grating profile to be machined into a work piece with a single pass with high accuracy. Manufacture of grayscale gratings using this technique saves time compared to the situation where the profile is machined by a single-point diamond tool with multiple passes. Also, more time-saving is realized if more than one period is machined in the diamond tool. Such a tool can be manufactured using a high precision focused ion beam (FIB), which is a true nanomachining tool that can machine features on the order of tens of nanometers. The diamond tool made by FIB therefore has extremely fine resolution and features required by the grayscale grating.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: April 29, 2014
    Assignee: Panasonic Corporation
    Inventor: Xinbing Liu
  • Publication number: 20140061033
    Abstract: A method according to one embodiment includes placing a substrate in a chamber; and plasma sputtering the substrate in a presence of a non-zero pressure of a vapor, wherein the vapor at the non-zero pressure is effective to diminish an etch rate of a first material of the substrate. A plasma sputtering apparatus according to one embodiment includes a chamber; a reservoir in the chamber for releasing a vapor at an established rate; a mount for a substrate; and a plasma source.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert G. Biskeborn, Calvin S. Lo, Cherngye Hwang, Andrew C. Ting
  • Publication number: 20140050656
    Abstract: The present invention provides a method for treating the particle surface of a cathode active material for a lithium secondary battery, the method comprising (a) preparing a cathode active material having a lithium compound; (b) generating a plasma from a gas comprising at least one of a fluorine-containing gas and a phosphorus-containing gas as a part of a reactive gas; and (c) removing lithium impurities present on the particle surface of the cathode active material with the plasma. In accordance with the present invention, the amount of the lithium impurities present on the particle surface of the cathode active material can be reduced to suppress a side reaction of the lithium impurities and an electrolyte.
    Type: Application
    Filed: October 10, 2013
    Publication date: February 20, 2014
    Applicant: LG CHEM, LTD.
    Inventors: Sung-Joong Kang, Hong-Kyu Park, Joo-Hong Jin, Dae-Jin Lee
  • Publication number: 20130248358
    Abstract: An etching chamber is equipped with an actively-cooled element preferentially adsorbs volatile compounds that are evolved from a polymeric layer of a wafer during etching, which compounds will act as contaminants if re-deposited on the wafer, for example on exposed metal contact portions where they may interfere with subsequent deposition of metal contact layers. In desirable embodiments, a getter sublimation pump is also provided in the etching chamber as a source of getter material. Methods of etching in such a chamber are also disclosed.
    Type: Application
    Filed: October 3, 2011
    Publication date: September 26, 2013
    Applicant: OC OERLIKON BALZERS AG
    Inventor: Juergen Weichart
  • Patent number: 8540852
    Abstract: Disclosed are method and apparatus for manufacturing a magnetoresistive device which are suitable for manufacturing a high-quality magnetoresistive device by reducing damages caused during the processing of a multilayer magnetic film as a component of the magnetoresistive device, thereby preventing deterioration of magnetic characteristics due to such damages. Specifically disclosed is a method for manufacturing a magnetoresistive device, which includes processing a multilayer magnetic film by performing a reactive ion etching on a substrate which is provided with the multilayer magnetic film as a component of the magnetoresistive device. This method for manufacturing a magnetoresistive device includes irradiating the multilayer magnetic film with an ion beam after the reactive ion etching.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: September 24, 2013
    Assignee: Canon Anelva Corporation
    Inventors: Naoki Watanabe, Yoshimitsu Kodaira, David D. Djayaprawira, Hiroki Maehara
  • Patent number: 8449818
    Abstract: The invention is directed at sputter targets including 50 atomic % or more molybdenum, a second metal element of titanium, and a third metal element of chromium or tantalum, and deposited films prepared by the sputter targets. In a preferred aspect of the invention, the sputter target includes a phase that is rich in molybdenum, a phase that is rich in titanium, and a phase that is rich in the third metal element.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: May 28, 2013
    Assignee: H. C. Starck, Inc.
    Inventors: Gary Alan Rozak, Mark E. Gaydos, Patrick Alan Hogan, Shuwei Sun
  • Patent number: 8361284
    Abstract: A method for reducing the height of a defect associated with an air bearing surface of a hard disk drive slider is disclosed. The technology initially ion mills for a first period of time at a first angle relative to an air bearing surface of a disk drive slider to remove a first portion of the air bearing surface. Then the technology ion mills for a second period of time at a second angle relative to an air bearing surface of the disk drive slider to remove a second portion of the air bearing surface. The second portion of the air bearing surface comprises a defect wherein the ion milling at the second angle reduces the height of the defect with respect to the air bearing surface.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: January 29, 2013
    Assignee: HGST, Netherlands B.V.
    Inventors: Roberto Cabral Frias, Mario Garcia De la Cruz, Cherngye Hwang, Tetsuya Matsusaki, Omar E. Montero Camacho, Yongjian Sun
  • Patent number: 8287744
    Abstract: Fluidic conduits, which can be used in microarraying systems, dip pen nanolithography systems, fluidic circuits, and microfluidic systems, are disclosed that use channel spring probes that include at least one capillary channel. Formed from spring beams (e.g., stressy metal beams) that curve away from the substrate when released, channels can either be integrated into the spring beams or formed on the spring beams. Capillary forces produced by the narrow channels allow liquid to be gathered, held, and dispensed by the channel spring probes. Because the channel spring beams can be produced using conventional semiconductor processes, significant design flexibility and cost efficiencies can be achieved.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: October 16, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Hantschel, David K. Fork, Eugene M. Chow, Dirk De Bruyker, Michel A. Rosa
  • Patent number: 8273257
    Abstract: In a method for processing a nanotube, a vapor is condensed to a solid condensate layer on a surface of the nanotube and then at least one selected region of the condensate layer is locally removed by directing a beam of energy at the selected region. The nanotube can be processed with at least a portion of the solid condensate layer maintained on the nanotube surface and thereafter the solid condensate layer removed. Nanotube processing can include, e.g., depositing a material layer on an exposed nanotube surface region where the condensate layer was removed. After forming a solid condensate layer, an electron beam can be directed at a selected region along a nanotube length corresponding to a location for cutting the nanotube, to locally remove the condensate layer at the region, and an ion beam can be directed at the selected region to cut the nanotube at the selected region.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: September 25, 2012
    Assignee: President and Fellows of Harvard College
    Inventors: Jene A Golovchenko, Gavin M King, Gregor M Schurmann, Daniel Branton
  • Patent number: 8266785
    Abstract: A method for manufacturing a magnetoresistive sensor having improved pinned layer stability at small track widths. The method includes providing a substrate, and depositing a plurality of sensor layers. A layer of material that is resistant to removal by chemical mechanical polishing (CMP stop layer) and an antireflective coating layer are deposited. A photoresist mask is formed on the antireflective layer, and a reactive ion etch (RIE) is performed to remove portions of the ion mill resistant mask that are not covered by the photoresist mask, the RIE being performed in a plasma chamber having a platen, the performing the RIE further comprising applying a platen power of at least 70 W. An ion milling is performed to remove a portion of the sensor layers, the ion milling being terminating before all of the sensor materials have been removed.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: September 18, 2012
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: James Mac Freitag, Wipul Pemsiri Jayasekara, Mustafa Michael Pinarbasi
  • Patent number: 8257560
    Abstract: A patterned media has a substrate, and a magnetic recording layer on the substrate including protruded magnetic patterns and a nonmagnetic material filled in between the protruded magnetic patterns. In the patterned media, a depth Db and a depth Da, which are defined that Db is a depth from a surface of the magnetic patterns to a surface of the nonmagnetic material filled in a first central part between the magnetic patterns adjacent to each other in a cross-track direction or a down-track direction, and Da is a depth from a surface of the magnetic patterns to a surface of the nonmagnetic material filled in a second central part in a portion surrounded by the magnetic patterns, have a relationship that the depth Da is greater than the depth Db.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Kamata, Masatoshi Sakurai, Satoshi Shirotori, Kaori Kimura
  • Patent number: 8221595
    Abstract: The invention provides a method for forming a patterned material layer on a structure, by condensing a vapor to a solid condensate layer on a surface of the structure and then localized removal of selected regions of the condensate layer by directing an ion beam at the selected regions, exposing the structure at the selected regions. A material layer is then deposited on top of the solid condensate layer and the exposed structure at the selected regions. Then the solid condensate layer and regions of the material layer that were deposited on the solid condensate layer are removed, leaving a patterned material layer on the structure.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: July 17, 2012
    Assignee: President and Fellows of Harvard College
    Inventors: Daniel Branton, Jene A Golovchenko, Gavin M King, Warren J MoberlyChan, Gregor M Schurmann
  • Publication number: 20120094435
    Abstract: A method of bonding of germanium to aluminum between two substrates to create a robust electrical and mechanical contact is disclosed. An aluminum-germanium bond has the following unique combination of attributes: (1) it can form a hermetic seal; (2) it can be used to create an electrically conductive path between two substrates; (3) it can be patterned so that this conduction path is localized; (4) the bond can be made with the aluminum that is available as standard foundry CMOS process. This has the significant advantage of allowing for wafer-level bonding or packaging without the addition of any additional process layers to the CMOS wafer.
    Type: Application
    Filed: December 21, 2011
    Publication date: April 19, 2012
    Applicant: Invensense Inc.
    Inventors: Steven S. Nasiri, Anthony Francis Flannery, JR.
  • Patent number: 8043484
    Abstract: Conductive or barrier material is deposited on a semiconductor substrate having recessed features by a method that has at least two operations. The first operation involves depositing a layer of the material on at least a portion of the field regions of the wafer. The second operation involves resputtering at least the layer residing on the field region of the wafer under high pressure. If the pressure is sufficiently high, momentum transfer reflection of the resputtered material will take place, such that at least some of the resputtered material is placed in the recessed features of the wafer. This approach can, among other advantages, offer improved step coverage and better utilization of the material.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: October 25, 2011
    Assignee: Novellus Systems, Inc.
    Inventor: Robert Rozbicki
  • Patent number: 8039400
    Abstract: A conductive barrier material of a metallization system of a semiconductor device may be formed on the basis of one or more deposition/etch cycles, thereby providing a reduced material thickness in the bevel region, while enhancing overall thickness uniformity in the active region of the semiconductor substrate. In some illustrative embodiments, two or more deposition/etch cycles may be used, thereby providing the possibility to select reduced target values for the barrier thickness in the die regions, while also obtaining a significantly reduced thickness in the bevel region.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: October 18, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Frank Koschinsky, Matthias Lehr, Holger Schuehrer
  • Publication number: 20110200884
    Abstract: A positive current collector provided by the present invention is a positive current collector including an electrically conductive layer on a base material of aluminum or an aluminum alloy. The base material has a surface oxide film at an interface of the base material body and the conductive layer, and a thickness of the surface oxide film is 3 nm or less.
    Type: Application
    Filed: November 13, 2009
    Publication date: August 18, 2011
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Yozo Uchida
  • Patent number: 7993538
    Abstract: The invention provides a method for forming a patterned material layer on a structure, by condensing a vapor to a solid condensate layer on a surface of the structure and then localized removal of selected regions of the condensate layer by directing a beam of energy at the selected regions. The structure can then be processed, with at least a portion of the patterned solid condensate layer on the structure surface, and then the solid condensate layer removed. Further there can be stimulated localized reaction between the solid condensate layer and the structure by directing a beam of energy at at least one selected region of the condensate layer.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: August 9, 2011
    Assignee: President and Fellows of Harvard College
    Inventors: Jene A. Golovchenko, Gavin M. King, Gregor M. Schurmann, Daniel Branton