Etching Specified Material Patents (Class 204/192.35)
-
Patent number: 7989093Abstract: The present invention relates to a method of making a coated cutting tool comprising providing a substrate, depositing on said substrate a cathodic arc evaporation PVD coating of nitrides, oxides, borides, carbides, carbonitrides, carbooxynitrides, or combinations thereof wherein the coating during deposition is subjected to more than one ion etching step. Cutting tools made according to the present invention will exhibit an increased life time due to increased smoothness of the PVD coating which is due to a reduced number of surface defects.Type: GrantFiled: September 18, 2008Date of Patent: August 2, 2011Assignee: Sandvik Intellectual Property ABInventor: Toril Myrtveit
-
Publication number: 20110108956Abstract: A process for etching semiconductors, such as II-VI or III-V semiconductors is provided. The method includes sputter etching the semiconductor through an etching mask using a nonreactive gas, removing the semiconductor and cleaning the chamber with a reactive gas. The etching mask includes a photoresist. Using this method, light-emitting diodes with light extracting elements or nano/micro-structures etched into the semiconductor material can be fabricated.Type: ApplicationFiled: November 2, 2010Publication date: May 12, 2011Inventors: Michael A. HAASE, Terry L. SMITH, Jun-Ying ZHANG
-
Patent number: 7927467Abstract: According to one embodiment, a method of manufacturing a discrete track recording medium includes forming protruded magnetic patterns on a substrate, and repeating processes of depositing a nonmagnetic material so as to be filled in recesses between the magnetic patterns and etching back the nonmagnetic material two or more times with rotating the substrate in a plane thereof by an angle less than one revolution.Type: GrantFiled: March 9, 2009Date of Patent: April 19, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiyuki Kamata, Satoshi Shirotori, Kaori Kimura, Masatoshi Sakurai
-
Patent number: 7883607Abstract: A method according to one embodiment includes ion milling at a first angle of greater than about 25 degrees from normal relative to a media facing side of a thin film region of a magnetic head or component thereof for recessing the thin film region at about a constant rate for films of interest of the thin film region, planes of deposition of the films being oriented about perpendicular to the media facing side; and ion milling or plasma sputtering at a second angle of less than about 25 degrees from normal relative to the media facing side of the thin film region for recessing magnetic films therein faster than insulating films therein, the second angle being smaller than the first angle.Type: GrantFiled: August 19, 2008Date of Patent: February 8, 2011Assignee: International Business Machines CorporationInventors: Robert Glenn Biskeborn, Cherngye Hwang, Calvin Shyhjong Lo, Andrew C. Ting
-
Publication number: 20110027618Abstract: The subject matter disclosed herein provides methods for manufacturing an electronic lapping guide and a magnetic read head assembly. The magnetoresistive head assembly includes a sensing element that has a front edge and a front flux guide that has a back edge, such that the sensing element front edge and the front flux guide back edge share a common interface that defines an interface plane normal to the surface of a wafer substrate. The electronic lapping guide comprises a conductive material adapted to attach to two electrical leads for measuring a resistance through the conductive material. The conductive material may include a conductive material back edge aligned with the interface plane. The resistance of the conductive material may be inversely proportional to a conductive material length normal to the interface plane.Type: ApplicationFiled: July 28, 2009Publication date: February 3, 2011Inventors: Edward Hin Pong Lee, David John Seagle
-
Patent number: 7875199Abstract: The method for generating radicals comprises: feeding F2 gas or a mixed gas of F2 gas and an inert gas into a chamber of which the inside is provided with a carbon material, supplying a carbon atom from the carbon material by applying a target bias voltage to the carbon material, and thereby generating high density radicals, wherein the ratio of CF3 radical, CF2 radical and CF radical is arbitrarily regulated by controlling the target bias voltage applied to the carbon material while measuring the infrared absorption spectrum of radicals generated inside the chamber.Type: GrantFiled: November 9, 2004Date of Patent: January 25, 2011Assignee: Showa Denko K.K.Inventors: Toshio Goto, Masaru Hori, Mikio Nagai
-
Patent number: 7788798Abstract: A method for manufacturing a magnetic write head having a wrap around magnetic shield. The method allows a highly accurate short wavelength such as 193 mm photolithography to be used to accurately define the placement and critical dimension of wrap around magnetic shield. The method includes the formation of a magnetic write pole, top gap, and side gap and the deposition of a RIEable fill layer thereover, and CMP to planarization. A 193 nm photolithography and ion milling is used to form a mask over the RIEable layer and one or more reactive ion etching processes are performed to pattern the RIEable layer through 193 nm photolithography mask. A wrap around shield can then be electroplated into the opening formed in the RIEable layer.Type: GrantFiled: November 21, 2007Date of Patent: September 7, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Hung-Chin Guthrie, Ming Jiang, Changqing Shi, Sue Siyang Zhang
-
Publication number: 20100213161Abstract: Fluidic conduits, which can be used in microarraying systems, dip pen nanolithography systems, fluidic circuits, and microfluidic systems, are disclosed that use channel spring probes that include at least one capillary channel. Formed from spring beams (e.g., stressy metal beams) that curve away from the substrate when released, channels can either be integrated into the spring beams or formed on the spring beams. Capillary forces produced by the narrow channels allow liquid to be gathered, held, and dispensed by the channel spring probes. Because the channel spring beams can be produced using conventional semiconductor processes, significant design flexibility and cost efficiencies can be achieved.Type: ApplicationFiled: May 6, 2010Publication date: August 26, 2010Applicant: Palo Alto Research Center IncorporatedInventors: Thomas Hantschel, David K. Fork, Eugene M. Chow, Dirk De Bruyker, Michel A. Rosa
-
Publication number: 20100206720Abstract: A method of producing inorganic nanoparticles includes: (a) providing a layered structure including a substrate and an inorganic layer; (b) disposing the layered structure in a vacuum chamber, vacuuming the vacuum chamber, and introducing a gas into the vacuum chamber; and (c) applying microwave energy to the gas to produce a microwave plasma of the gas within the vacuum chamber so that the inorganic layer is acted by the microwave plasma and formed into a plurality of inorganic nanoparticles on the substrate. A system for producing the nanoparticles is also disclosed.Type: ApplicationFiled: May 22, 2009Publication date: August 19, 2010Inventors: Kuan-Jiuh Lin, Chuen-Yuan Hsu
-
Publication number: 20100180635Abstract: This invention provides a molding die in which increase of the surface roughness due to crystal growth of chromium oxide is restrained, and thereby allowing long term use without deteriorating surface roughness of a glass gob or a molded glass article. The invention also provides a method for manufacturing the molding die, a glass gob, and a molded glass article. A molding die is provided with a substrate having a molding surface and protective film containing chromium formed thereon, and the protective film has the X-ray diffraction peak intensity of (110) plane of chromium higher than the X-ray diffraction peak intensity of (200) plane.Type: ApplicationFiled: January 13, 2010Publication date: July 22, 2010Inventors: Naoyuki Fukumoto, Shunichi Hayamizu
-
Publication number: 20100084263Abstract: Methods for fabricating thin film magnetic head coil structures are disclosed. The methods disclose deposition of a first thick seed layer, followed by deposition of an ultra-thin second seed layer. Coil structures having sub-micron pitch and high aspect ratios are deposited on the second ultra-thin seed layer, which is removed from between the coil windings via an isotropic etch process such as wet etching or RIE. Subsequent to selective removal of the ultra-thin second seed layer, the first thick seed layer is utilized to deposit pole and backgap structures, eliminating the need to deposit (and remove) a subsequent seed layer on the coil structure.Type: ApplicationFiled: October 2, 2008Publication date: April 8, 2010Inventors: Christian Rene Bonhote, Quang Le, Ihavin Sinha
-
Publication number: 20100051448Abstract: A vacuum process for etching a metal strip running over a backing roll facing a counterelectrode by magnetron sputtering, and a vacuum chamber etching installation implementing the process. A plasma is created in a gas close to the metal strip so as to generate radicals and/or ions that act on the strip, and at least one closed magnetic circuit, the width of which is approximately equal to that of the metal strip, is selected from a series of at least two closed magnetic circuits of different and fixed widths, then the selected magnetic circuit is positioned so as to face the metal strip, and then the etching of the moving metal strip is carried out.Type: ApplicationFiled: October 26, 2006Publication date: March 4, 2010Applicant: ArcelorMittal FranceInventors: Hugues Cornil, Benoit Deweer, Claude Maboge, Jacques Mottoulle
-
Publication number: 20100022030Abstract: The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.Type: ApplicationFiled: September 2, 2009Publication date: January 28, 2010Applicant: TEGAL CORPORATIONInventor: Robert Anthony Ditizio
-
Patent number: 7641998Abstract: An electrically conductive separator element and assembly for a fuel cell which comprises an electrically conductive substrate having a monoatomic layer coating overlying the substrate. The monatomic layer coating may comprise an electrically conductive material, for example, a noble metal, desirably Ru, Rh, Pd, Ag, Ir, Os and preferably Au. Methods of making such separator elements and assemblies are also provided.Type: GrantFiled: September 20, 2006Date of Patent: January 5, 2010Assignee: GM Global Technology Operations, Inc.Inventors: Gayatri Vyas, Mahmoud H. Abd Elhamid, Youssef M. Mikhail
-
Patent number: 7611610Abstract: An improved method of controlling topographical variations when milling a cross-section of a structure, which can be used to reduce topographical variation on a cross-section of a write-head in order to improve the accuracy of metrology applications. Topographical variation is reduced by using a protective layer that comprises a material having mill rates at higher incidence angles that closely approximate the mill rates of the structure at those higher incidence angles. Topographical variation can be intentionally introduced by using a protective layer that comprises a material having mill rates at higher incidence angles that do not closely approximate the mill rates of the structure at those higher incidence angles.Type: GrantFiled: November 18, 2003Date of Patent: November 3, 2009Assignee: Fei CompanyInventors: James P. Nadeau, Pei Zou, Jason H. Arjavac
-
Patent number: 7550174Abstract: A separator assembly for use in a stack of electrochemical cells is provided, having a first conductive metallic substrate with a first surface and a second conductive metallic substrate with a second surface, wherein each of the first and second surfaces are overlaid with an ultra-thin electrically conductive metal coating. The first and second surfaces form electrically conductive paths at regions where the metal coating of the first and second layer contact one another. The contact of the surfaces overlaid with metal coating is sufficient to join the first and second substrates to one another. Preferred metal coatings comprise gold (Au). Methods of making such separator assemblies are also provided.Type: GrantFiled: January 31, 2008Date of Patent: June 23, 2009Assignee: GM Global Technologies Operations, Inc.Inventors: Gayatri Vyas, Michael Budinski, Brian K Brady, Michael K Lukitsch, Harald Schlag
-
Patent number: 7524431Abstract: The invention provides a method for forming a patterned material layer on a structure, by condensing a vapor to a solid condensate layer on a surface of the structure and then localized removal of selected regions of the condensate layer by directing a beam of energy at the selected regions, exposing the structure at the selected regions. A material layer is then deposited on top of the solid condensate layer and the exposed structure at the selected regions. Then the solid condensate layer and regions of the material layer that were deposited on the solid condensate layer are removed, leaving a patterned material layer on the structure.Type: GrantFiled: December 9, 2004Date of Patent: April 28, 2009Assignee: President and Fellows of Harvard CollegeInventors: Daniel Branton, Jene A. Golovchenko, Gavin M. King, Warren J. MoberlyChan, Gregor M. Schürmann
-
Patent number: 7509729Abstract: A method for making a write pole in a perpendicular magnetic recording write head uses a metal mask to pattern the primary resist and only ion milling during the subsequent patterning steps. A layer of primary resist is deposited over the magnetic write pole material and a metal mask layer is deposited on the primary resist layer. An imaging resist layer is formed on the metal mask layer and lithographically patterned generally in the desired shape of the write pole. Ion milling without a reactive gas is then performed over the imaging resist pattern to pattern the underlying metal mask layer, which is then used as the mask to define the shape of the primary resist pattern. Ion milling with oxygen is then performed over the metal mask pattern to pattern the underlying primary resist. Ion milling without a reactive gas is then performed over the primary resist pattern to form the underlying write pole.Type: GrantFiled: April 25, 2006Date of Patent: March 31, 2009Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Donald G. Allen, Amanda Baer, Michael Feldbaum, Hung-Chin Guthrie, Aron Pentek
-
Publication number: 20090053439Abstract: There are provided a film type antenna, a case structure using the same, and a method of manufacturing the same. A film type antenna according to aspect of the invention may include: a first polymer film; a decorative layer provided on one surface of the first polymer film; a second polymer film stacked on the decorative layer and having one surface in contact with the decorative layer; and an antenna pattern provided on the other surface of the second polymer film.Type: ApplicationFiled: August 21, 2008Publication date: February 26, 2009Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae Suk SUNG, Jang Ho Park, Young Suk Kim, Dae Seong Jeon, Kyongkeun Lee, Ha Ryong Hong
-
Patent number: 7435353Abstract: The invention provides a method for forming a patterned material layer on a structure, by condensing a vapor to a solid condensate layer on a surface of the structure and then localized removal of selected regions of the condensate layer by directing a beam of energy at the selected regions. The structure can then be processed, with at least a portion of the patterned solid condensate layer on the structure surface, and then the solid condensate layer removed. Further there can be stimulated localized reaction between the solid condensate layer and the structure by directing a beam of energy at at least one selected region of the condensate layer.Type: GrantFiled: December 9, 2004Date of Patent: October 14, 2008Assignee: President and Fellows of Harvard CollegeInventors: Jene A. Golovchenko, Gavin M. King, Gregor M. Schürmann, Daniel Branton
-
Publication number: 20080179183Abstract: A non-axisymmetric electromagnet coil used in plasma processing in which at least one electromagnet coil is not symmetric with the central axis of the plasma processing chamber with which it is used but is symmetric with an axis offset from the central axis. When placed radially outside of an RF coil, it may reduce the azimuthal asymmetry in the plasma produced by the RF coil. Axisymmetric magnet arrays may include additional axisymmetric electromagnet coils. One axisymmetric coil is advantageously placed radially inside of the non-axisymmetric coil to carry opposed currents. The multiple electromagnet coils may be embedded in a molded encapsulant having a central bore about a central axis providing the axisymmetry of the coils.Type: ApplicationFiled: January 31, 2007Publication date: July 31, 2008Applicant: Applied Materials, Inc.Inventors: CHRISTOPHER BOITNOTT, KEITH A. MILLER
-
Publication number: 20080110748Abstract: Etchants for selective removal of high dielectric constant materials are described herein that comprise at least one fluorin-based constituent; water and at least one solvent or solvent mixture. Methods are also described herein for producing a wet etching chemistry solution that include providing at least one fluorine-based constituent, providing water, providing at least one solvent mixture, and combining the fluorine-based constituent and water into the least one solvent or solvent mixture to form the wet etching chemistry solution.Type: ApplicationFiled: March 18, 2005Publication date: May 15, 2008Inventor: John Starzynski
-
Patent number: 7351986Abstract: A wafer support for an ion implanter includes a wafer holder and a support arm for the holder in the implant chamber. A portion of the support arm adjacent the wafer holder is at least intermittently exposed to the ion beam during implantation, as a result of the relative scanning of the ion beam and the wafer holder. An arm shield mechanism has a plurality of shielding surfaces which can be selectively disposed to receive the ion beam to protect the exposed portion of the support arm. The shielding surfaces may form a sleeve arranged over the arm which may be rotatable above the arm to present selected surfaces to the ion beam. Cross contamination when successively implanting different species can be reduced by presenting different shield surfaces to the beam.Type: GrantFiled: July 1, 2003Date of Patent: April 1, 2008Assignee: Applied Materials, Inc.Inventor: Adrian Murrell
-
Patent number: 7313854Abstract: A method of manufacturing a tactile sensor, which is capable of implementing a wide range of senses, including sensing contact pressure (vertical force and horizontal force) with an external object and heat caused by the contact pressure, comprises forming a side block formation pattern of a force sensor and forming a piezo-resistor formation pattern of a heat sensor; forming a piezo-resistor and depositing an oxide film on the piezo-resistor; forming contact holes and forming a line hole formation pattern; forming a metal line, a temperature measurement metal line, and a heater; depositing an oxide film on the metal line, the temperature measurement metal line, and the heater, and forming a load block on the oxide film; and forming a side block by etching a bottom surface of the wafer on which the load block is formed.Type: GrantFiled: December 28, 2004Date of Patent: January 1, 2008Assignee: Korea Research Institute of Standards and ScienceInventors: Jong-ho Kim, Dae-im Kang, Yon-kyu Park, Min-seok Kim
-
Patent number: 7270729Abstract: First and second electrodes and magnets between the electrodes define an enclosure. The first electrode is biased at a high voltage to produce a high intensity electrical field. The second electrode is biased at a low negative voltage by a low alternating voltage to produce a low intensity electrical field. Electrons movable in a helical path in the enclosure near the first electrode ionize inert gas molecules in the enclosure. A wafer having a floating potential and an insulating layer is closely spaced from the second electrode. The second electrode and the wafer define plates of a first capacitor having a high impedance. The wafer and the inert gas ions in the enclosure define opposite plates of a second capacitor. The first capacitor accordingly controls and limits the speed at which the gas ions move to the insulating layer surface to etch this surface. The resultant etch, only a relatively few angstroms, of the insulating layer is smooth, uniform and accurate.Type: GrantFiled: August 4, 2003Date of Patent: September 18, 2007Assignee: Tegal CorporationInventor: Pavel N. Laptev
-
Patent number: 7251878Abstract: A method and apparatus for defining leading edge taper of a write pole tip is disclosed. The fabrication process uses reactive ion etching to fabricate LET with tight control of the placement of LET's edge and to achieve higher angle for providing a higher effective write field at the pole tip while minimizing ATI for high-density perpendicular recording. The placement of a resist's edge is used to define the LET's edge and a CMP process is used to provide a planar surface for the fabrication of the write pole.Type: GrantFiled: June 30, 2004Date of Patent: August 7, 2007Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Quang Le, Jui-Lung Li, Yvette Chung Nga Winton, Sue Siyang Zhang, Yi Zheng
-
Patent number: 7213322Abstract: A piezoelectric substrate is provided with interdigital transducer electrodes including a first electrode layer, a second electrode layer, and a third electrode layer that is principally made of aluminum. The piezoelectric substrate has a stepped structure on the surface of the piezoelectric substrate, the stepped structure including terraces each having a width of about 50 nm or less and steps each having a width of a mono-molecular layer (e.g., about 14 ?).Type: GrantFiled: March 3, 2004Date of Patent: May 8, 2007Assignee: Murata Manufacturing Co., Ltd.Inventors: Osamu Nakagawara, Akinori Shinoda
-
Patent number: 7152305Abstract: A magnetoresistive (MR) read head is disclosed including a shield layer with a recessed portion and a protruding portion defined by the recessed portion. Also included is an MR sensor located in vertical alignment with the protruding portion of the shield layer. Further provided is at least one gap layer situated above and below the MR sensor. At least one of such gap layers is positioned in the recessed portion of the shield layer. By this design, a combined thickness of the gap layers is thinner adjacent to the MR sensor and the protruding portion of the shield layer, while being thicker adjacent to the recessed portion of the shield layer. As such, optimum insulation is provided while maintaining planar gap layer surfaces to avoid the detrimental ramifications of reflective notching and the swing curve effect.Type: GrantFiled: June 19, 2003Date of Patent: December 26, 2006Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventor: Douglas Werner
-
Patent number: 7150811Abstract: A charged particle beam apparatus and method for locally removing material from a predetermined location on a workpiece, such as the removal of a metallization layer covering an alignment mark on a wafer. The invention is particularly suited for high-volume mass production of semiconductor chips or electromechanical devices. According to one embodiment of the invention, a layer of material covering an alignment mark on a wafer is removed by ion beam sputtering using a non-LMIS beam directed at an oblique angle to the sample surface.Type: GrantFiled: September 24, 2003Date of Patent: December 19, 2006Assignee: PEI CompanyInventor: Brian Miller
-
Patent number: 7007374Abstract: A narrow track width read sensor having a high magnetoresistive sensitivity is made using a self-aligned process which requires the use of only a single resist mask. A plurality of sensor layers is deposited over a substrate. After forming a resist mask in the central region, first lead layers are deposited in the end regions and over the resist mask. Using the resist mask, ion milling is performed such that the first lead layers and sensor layers in the end regions are substantially removed but sensor layers in the central region remain, to thereby form a read sensor having lead overlays on the edges thereof. Hard bias and second lead layers are then deposited in the end regions and over the resist mask. After the resist mask is removed, the top of the read sensor may be oxidized through an exposure to oxygen plasma.Type: GrantFiled: August 9, 2002Date of Patent: March 7, 2006Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventor: Jeffrey Scott Lille
-
Patent number: 6908562Abstract: A method of forming an electrode for a surface acoustic wave (SAW) device comprises the steps of forming an alloy film (32) made of aluminum (Al) and magnesium (Mg) on a substrate (31) and selectively etching the alloy film (32) by using a gaseous mixture composed of BCl3, Cl2, and N2 to form the electrode such that the electrode has at least one sidewall polymer film (33). The method controls the production of hillocks and voids to provide high withstand voltage.Type: GrantFiled: January 27, 2003Date of Patent: June 21, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Shinichi Hakamada
-
Patent number: 6868856Abstract: Methods and apparatus for cleaning semiconductor processing equipment. The apparatus include both local and remote gas dissociators coupled to a semiconductor processing chamber to be cleaned. The methods include introducing a precursor gas into the remote dissociator where the gas is dissociated and introducing a portion of the dissociated gas into the chamber. Another portion of the dissociated gas which re-associates before introduction into the chamber is also introduced into the chamber where it is again dissociated. The dissociated gas combines with contaminants in the chamber and is exhausted from the chamber along with the contaminants.Type: GrantFiled: July 13, 2001Date of Patent: March 22, 2005Assignee: Applied Materials, Inc.Inventors: Thomas Nowak, Ian Latchford, Tsutomu Tanaka, Bok Heon Kim, Ping Xu, Jason Foster, Heath B. DeShong, Martin Seamons
-
Patent number: 6863787Abstract: A method of improving focused ion beam milling particularly suitable for uniformly removing multiple layers of conductor and dielectric, such as the removal of multiple layers consisting of dummy copper pads and SiO2 on a semiconductor device. Variable Pixel Milling is first used to more uniformly remove most of a layer of conductor and dielectric. The use of Variable Pixel Milling may also be used in conjunction with a technique whereby incoming ions pass through a sacrificial layer formed on the surface of the layer being removed in order to further increase uniformity of material removal. Focused ion beam sputtering in conjunction with an oxygen containing gas, such as H2O vapor or oxygen, is then used to smooth out the trench floor before the next layer is removed.Type: GrantFiled: April 2, 2003Date of Patent: March 8, 2005Assignee: FEI CompanyInventors: Chuong T. Huynh, Neil J. Bassom
-
Patent number: 6854175Abstract: A method of manufacturing a thin film magnetic head capable of improving a yield while making a pole width extremely minute with high precision is provided. A write gap layer and a bottom pole are selectively etched in a region other than a portion corresponding to a front end part through the RIE with the front end part having an extremely minute uniform width as a mask in an atmosphere of gas including at least chlorine out of chlorine and boron trichloride and at an ambient temperature within a range of 30° C. to 300° C. The width (pole width) of a pole portion can be made uniform with high precision along a length direction so that the yield of the thin film magnetic head can be improved.Type: GrantFiled: October 12, 2001Date of Patent: February 15, 2005Assignee: TDK CorporationInventor: Yoshitaka Sasaki
-
Patent number: 6846391Abstract: A process for filling high aspect ratio gaps on substrates uses conventional high density plasma deposition processes to deposit fluorine-doped films, with an efficient sputtering inert gas, such as Ar, replaced or reduced with an inefficient sputtering inert gas such as He and/or hydrogen. By reducing the sputtering component, sidewall deposition from the sputtered material is reduced. Consequently, gaps with aspect ratios greater than 3.0:1 and spacings between lines less than 0.13 microns can be filled with low dielectric constant films without the formation of voids and without damaging circuit elements.Type: GrantFiled: December 21, 2001Date of Patent: January 25, 2005Assignee: Novellus SystemsInventors: George D. Papasouliotis, Robert D. Tas, Patrick A. Van Cleemput, Bart van Schravendijk
-
Patent number: 6824655Abstract: A micro-machining process that includes etching a substrate having copper overlying a dielectric layer to a charged particle beam in the presence of an etch assisting agent. The etch assisting agent is selected from the group consisting of ammonia, acetic acid, thiolacetic acid, and combinations thereof.Type: GrantFiled: August 26, 2002Date of Patent: November 30, 2004Assignee: Credence Systems CorporationInventors: Vladimir V. Makarov, Javier Fernandez Ruiz, Tzong-Tsong Miau
-
Patent number: 6810566Abstract: A method of manufacturing a surface acoustic wave element includes the steps of providing a piezoelectric body having an interdigital transducer, where the interdigital transducer is made of a metal having a higher density than the piezoelectric body, and performing ion bombardment of the interdigital transducer and the piezoelectric body simultaneously so as to reduce the thickness of the interdigital transducer and the piezoelectric body.Type: GrantFiled: January 25, 2002Date of Patent: November 2, 2004Assignee: Murata Manufacturing Co., LtdInventors: Eiichi Takata, Yasuji Yamamoto, Toshimaro Yoneda, Michio Kadota
-
Patent number: 6809066Abstract: Ion texturing methods and articles are disclosed.Type: GrantFiled: July 30, 2001Date of Patent: October 26, 2004Assignee: The Regents of the University of CaliforniaInventors: Ronald P. Reade, Paul H. Berdahl, Richard E. Russo, Leslie G. Fritzemeier
-
Patent number: 6789297Abstract: A method of manufacturing a surface acoustic wave element includes the steps of providing a piezoelectric body having an interdigital transducer, where the interdigital transducer is made of a metal having a higher density than the piezoelectric body, and performing ion bombardment of the interdigital transducer and the piezoelectric body simultaneously so as to reduce the thickness of the interdigital transducer and the piezoelectric body.Type: GrantFiled: January 25, 2002Date of Patent: September 14, 2004Assignee: Murata Manufacturing Co., LtdInventors: Eiichi Takata, Yasuji Yamamoto, Toshimaro Yoneda, Michio Kadota
-
Patent number: 6773558Abstract: A fluorine generator includes a vacuum chamber filled with a working gas. An r-f antenna is positioned outside the chamber across a dielectric window from a potassium fluoride (KF) source located in the chamber. The r-f antenna radiates through the window to heat the working gas and sublime the PK source to create a plasma. Crossed electric and magnetic fields in the chamber drive the heavier potassium ions in the plasma toward a collector in the chamber while confining the lighter fluorine and working gas ions for evacuation from the chamber.Type: GrantFiled: October 15, 2002Date of Patent: August 10, 2004Assignee: Archimedes Technology Group, Inc.Inventors: Stephen F. Agnew, Sergei Putvinski
-
Patent number: 6746960Abstract: Techniques are used to detect and identify analytes. Techniques are used to fabricate and manufacture sensors to detect analytes. An analyte (1810) is sensed by sensors (1820) that output electrical signals in response to the analyte. The electrical signals are preprocessed (1830) by filtering and amplification. In an embodiment, this preprocessing includes adapting the sensor and electronics to the environment in which the analyte exists. The electrical signals are further processed (1840) to classify and identify the analyte, which may be by a neural network.Type: GrantFiled: January 18, 2002Date of Patent: June 8, 2004Assignee: California Institute of TechnologyInventor: Rodney M. Goodman
-
Patent number: 6743729Abstract: The present invention relates to etching for removing a carbon thin film formed on a surface of a sample, to prevent a damage on a sample and eliminate the necessity of providing a special device (such as vacuum pump) as is required in plasma etching. A sealed reaction chamber 100A in which a sample 500 formed with a carbon thin film 510 on its surface is to be set, a gas feed means 200A for feeding argon gas which is an inert gas Ar into which a predetermined proportion of oxygen gas O2 has been mixed from one end to the interior of the reaction chamber 100A, an exhaust means 300A for discharging carbon dioxide gas CO2 from the downstream side of the inert gas Ar fed from the gas feed means 200A, and a heating means 400A for heating the sample 500 to 550° C. or higher are provided.Type: GrantFiled: February 19, 2002Date of Patent: June 1, 2004Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Keiji Mine, Yoshiaki Ohbayashi, Fumihiko Jobe
-
Patent number: 6730605Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.Type: GrantFiled: April 12, 2001Date of Patent: May 4, 2004Assignee: Tokyo Electron LimitedInventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
-
Publication number: 20040079632Abstract: A method of depositing a film on a substrate disposed in a substrate processing chamber. In one embodiment the method includes depositing a first portion of the film to at partially fill a gap formed between to adjacent features formed on the substrate. The first portion of film is deposited using a high density plasma formed from a first gaseous mixture flown into the process chamber. The film deposition process is then stopped before or shortly after the entry of the gap pinches off and the film is etched to widen entry to the gap using a two step etching process that includes a first physical etch step and a subsequent chemical etch step. The physical etch step sputter etches the first portion of film by forming a plasma from a sputtering agent introduced into the processing chamber and biasing the plasma towards the substrate. After the physical etching step, the film is chemically etched by forming a plasma from a reactive etchant gas introduced into the processing chamber.Type: ApplicationFiled: October 23, 2002Publication date: April 29, 2004Applicant: Applied Materials, Inc.Inventors: Farhan Ahmad, Michael Awdshiew, Alok Jain, Bikram Kapoor
-
Patent number: 6709553Abstract: A method and apparatus for depositing a film on a substrate comprising a deposition interval wherein DC power is applied to a target to form a first plasma and material is sputtered from the target onto a substrate and, during a subsequent forming interval, high frequency power is applied to the target to remove material from at least a portion of the substrate. The sputtering working gas admitted to the chamber may be maintained at a first pressure during the deposition interval and the pressure of the sputtering working gas may be increased to a second pressure during the forming interval.Type: GrantFiled: May 9, 2002Date of Patent: March 23, 2004Assignee: Applied Materials, Inc.Inventors: Wei Wang, Praburam Gopalraja, Jianming Fu
-
Patent number: 6709554Abstract: A method of repairing opaque defects in lithography masks entails focused ion beam milling in at least two steps. The first step uses a large pixel spacing to form multiple holes in the defect material, with the milled area extending short of the defect material edge. The final step uses a pixel spacing sufficiently close to produce a smooth floor on the milled area, and extends to the edge of the defect. During the second step, an etch enhancing gas such as bromine is preferably used.Type: GrantFiled: March 9, 2001Date of Patent: March 23, 2004Assignee: FEI CompanyInventors: David C. Ferranti, Sharon M. Szelag, J. David Casey, Jr.
-
Patent number: 6695954Abstract: A method and apparatus for depositing a layer of a material which contains a metal on a workpiece surface, in an installation including a deposition chamber; a workpiece support providing a workpiece support surface within the chamber; a coil within the chamber, the coil containing the metal that will be contained in the layer to be deposited; and an RF power supply connected to deliver RF power to the coil in order to generate a plasma within the chamber, a DC self bias potential being induced in the coil when only RF power is delivered to the coil. A DC bias potential which is different in magnitude from the DC self bias potential is applied to the coil from a DC voltage source.Type: GrantFiled: October 11, 2001Date of Patent: February 24, 2004Assignee: Applied Materials, Inc.Inventor: Liubo Hong
-
Patent number: 6668443Abstract: The possibility of shorting between a spin valve and its underlying magnetic shield layer can be largely eliminated by choosing the bottom spin valve structure. However, doing so causes the hard longitudinal bias that is standard for all such devices to degrade. The present invention overcomes this problem by inserting a thin NiCr, Ni, Fe, or Cr layer between the antiferromagnetic layer and the longitudinal bias layers. This provides a smoother surface for the bias layers to be deposited onto, thereby removing structural distortions to the longitudinal bias layer that would otherwise be present. A process for manufacturing the structure is also described.Type: GrantFiled: July 30, 2001Date of Patent: December 30, 2003Assignee: Headway Technologies, Inc.Inventors: Chen-Jung Chien, Chyu-Jiuh Torng, Cherng-Chyi Han, Moris Dovek, Po-Kang Wang, Mao-Min Chen
-
Patent number: 6607613Abstract: A metal alloy solder ball comprising a first metal and a second metal, the first metal having a sputtering yield greater than the second metal. The solder ball comprises a bulk portion having a bulk ratio of the first metal to the second metal, an outer surface, and a surface gradient having a depth and a gradient ratio of the first metal to the second metal that is less than the bulk ratio. The gradient ratio increases along the surface gradient depth from a minimum at the outer surface. The solder ball may be formed by the process of exposing the ball to energized ions of a sputtering gas for an effective amount of time to form the surface gradient.Type: GrantFiled: February 1, 2001Date of Patent: August 19, 2003Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart
-
Patent number: RE39143Abstract: A method for fabricating a wafer-pair having at least one recess in one wafer and the recess formed into a chamber with the attaching of the other wafer which has a port plugged with a deposited layer on its external surface. The deposition of the layer may be performed in a very low pressure environment, thus assuring the same kind of environment in the sealed chamber. The chamber may enclose at least one device such as a thermoelectric sensor, bolometer, emitter or other kind of device. The wafer-pair typically will have numerous chambers, with devices, respectively, and may be divided into a multiplicity of chips.Type: GrantFiled: December 3, 2001Date of Patent: June 27, 2006Assignee: Honeywell International Inc.Inventors: R. Andrew Wood, Jeffrey A. Ridley, Robert E. Higashi