Abstract: A method includes providing a voltage switchable dielectric material having a characteristic voltage, exposing the voltage switchable dielectric material to a source of ions associated with an electrically conductive material, and creating a voltage difference between the source and the voltage switchable dielectric material that is greater than the characteristic voltage. Electrical current is allowed to flow from the voltage switchable dielectric material, and the electrically conductive material is deposited on the voltage switchable dielectric material. A body comprises a voltage switchable dielectric material and a conductive material deposited on the voltage switchable dielectric material using an electrochemical process. In some cases, the conductive material is deposited using electroplating.

Abstract: The use of at least one diazonium salt bearing an initiator function, for forming an undercoat obtained by grafting a graft derived from the diazonium salt and bearing an initiator function at the surface of a conductive or semiconductive material on the undercoat, and for forming on the undercoat a polymeric layer obtained by polymerization, in particular free radical polymerization, in situ of at least one monomer, initiated from the initiator function.

Abstract: Disclosed herein is a method of forming a CIGS thin film, comprising the steps of: immersing a substrate comprising an electrode into an electrolyte solution comprising Na2SO4, a water-soluble copper (Cu) precursor, a water-soluble indium (In) precursor, a water-soluble gallium (Ga) precursor, and a water-soluble selenium (Se) precursor; performing electrodeposition in such a way as to apply a direct current (DC) voltage of ?0.95V˜?0.85V to the electrolyte solution at room temperature and normal pressure for 10˜120 minutes to form a preliminary CIGS thin film; and heat-treating the preliminary CIGS thin film at 230˜270° C. to form a CIGS thin film.

Abstract: A disclosed electrolytic plating method includes a first step of immersing a substrate in electrolytic plating liquid including copper salt to form a first Cu layer on the substrate; and a second step of forming a second Cu layer over the first Cu layer. The first step is continued for ten seconds or less after the immersion. In the first step, the substrate is rotated at a first speed N (rpm) which satisfies D×N×??6000×? (mm/min), where D is the diameter of the substrate (mm), and D×N×? represents the peripheral speed of the substrate, and a current is supplied to the substrate at a first density of 10 mA/cm2 or less. In the second step, the substrate is rotated at a second speed higher than the first speed, and the current is supplied to the substrate at a second density higher than the first density.

Abstract: A semiconductor wafer holder includes first and second holding members between which a semiconductor wafer is held. The second holding member includes a second conductive element placed in contact with a first conductive element of the first holding member and the semiconductor wafer. A ring clamp is used to press the second holding member against the first holding member for holding of the semiconductor wafer.

Abstract: A lead frame for optical semiconductor devices in which a layer 2 composed of silver or a silver alloy is formed on an electrically-conductive substrate 1, having: a surface layer 4 composed of a metal or alloy thereof excellent in corrosion resistance as an outermost layer, wherein a concentration of a metallic component excellent in corrosion resistance of the surface layer is 50% by mass or more at the uppermost portion of the surface layer, and wherein a solid-solution layer 3 of silver and a metallic material which is a main component of the surface layer is formed between the surface layer and the layer composed of silver or a silver alloy.

Abstract: Provided are novel multidimensional electrode structures containing high capacity active materials for use in rechargeable electrochemical cells. These structures include main support structures and multiple nanowires attached to the support structures and extending into different directions away from these supports. The active material may be deposited as a layer (uniform or non-uniform) surrounding the nanowires and, in certain embodiments, the main supports and even substrate. The active material layer may be sufficiently thin to prevent pulverization of the layer at given operating conditions. Interconnections between the electrode structures and/or substrate may be provided by overlaps formed during deposition of the active layer. Silicide-based nano wires structures may be formed on the main supports in a fluidized bed reactor by suspending the metal-containing main supports in a silicon-containing process gas. A layer of silicon may be then deposited over these silicide nanowires.

Abstract: A method includes: immersing a semiconductive substrate in an electrodeposition composition, wherein at least 20 percent by weight of resin solids in the composition is a highly cross-linked microgel component, and applying a voltage between the substrate and the composition to form a dielectric coating on the substrate. A composition for use in electrodeposition includes a resin blend, a coalescing solvent, a catalyst, water, and a highly cross-linked migrogel, wherein at least 20 percent by weight of resin solids in the composition is the highly cross-linked microgel. Another composition for use in electrodeposition includes a surfactant blend, a low ion polyol, phenoxypropanol, a catalyst, water, a flexibilizer, and a highly cross-linked migrogel, wherein at least 20 percent by weight of resin solids in the composition is the highly cross-linked microgel.

Abstract: The methods practiced in an electrochemical deposition apparatus with two or more electrodes, described in earlier inventions, are disclosed. The methods produce uniform copper films with WFNU less than 2.5% on semiconductor wafers bearing a resistive copper seed layer with a thickness ranging from 50 to 9O0 A in a copper sulfate based electrolyte whose conductivity is between 0.02 to 0.8 S/cm.

Abstract: The present disclosure provides a method of electrodeposition of a metal or metal alloy on at least one surface of a semiconductor material. The method of the present invention provides full coverage of an electrodeposited metallic film on the at least one surface of the semiconductor material. The method of the present disclosure includes providing a semiconductor material. A metallic film is applied to at least one surface of the semiconductor material by an electrodeposition process. The electrodeposition process employed uses current waveforms that apply a low current density initially, and after a predetermined period of time, the current density is changed to a high current density.

Abstract: Manufacture of semiconductor products such as LCD driver requires a bump plating step for forming a gold bump electrode having a size of from about 15 to 20 ?m. This bump plating step is performed by electroplating with a predetermined plating solution, but projections intermittently appear on the bump electrode during a mass production process. In the invention, abnormal growth of projections over the gold bump electrode is prevented by adding, prior to the gold bump plating step, a step of circulating and stirring a plating solution while erecting a plating cup and efficiently dissolving/discharging a precipitate. This step is performed for each wafer to be treated.

Abstract: The present invention relates to a carbon electrode having a conical or pyramidal tip, wherein the tip is surrounded on its side by a raised edge.

Abstract: A method of forming a bioelectronic device including a protein on an electrically conductive substrate, by electro-depositing aminopolysaccharide chitosan on the substrate while applying a cathodic voltage to the substrate, to form an aminopolysaccharide chitosan film thereon, applying an anodic voltage to the substrate in the presence of NaCl to activate the aminopolysaccharide chitosan film so that it is reactive with protein. The method also optionally includes reacting the aminopolysaccharide film, after activation thereof, with the protein, so that the protein assembles on and is coupled to the substrate, thereby forming a bioelectronic device. The protein can include single or multiple protein species, and including biosensing proteins. Additional methods include biosensing of electrochemically active compounds either present in a sample or generated during a biological recognition event and devices useful in such methods.

Abstract: A multi-chambered system for electroplating metal layers on a semiconductor substrate. The system comprises a fluid reservoir having at least a first chamber and a second chamber. A cathode is located in the first chamber, an anode is located in the second chamber, and a shield is located between the cathode and anode. The cathode is configured to be electrically coupled to a semiconductor substrate locatable in the first chamber. The anode is configured to oppose a first major surface of the semiconductor substrate. The shield is configured to deter electrolytic fluid communication between the first and second chamber, other than through predefined openings in the shield.

Abstract: A plating method, employing a face-down manner of plating and using a resistor body between a substrate and an anode, can securely bring an entire surface to be plated of the substrate into contact with a plating solution without permitting intrusion of air bubbles to the surface to be plated. A resistor body is disposed above the anode and immersed in the plating solution, allowing the plating solution to flow along an upper surface of the resistor body from the periphery toward the center of the resistor body. Thus, a raised portion of the plating solution is created in the center of the upper surface of the resistor body. The substrate is then lowered with the surface facing downwardly so as to fill the space between the surface to be plated of the substrate and the upper surface of the resistor body with the plating solution.

Abstract: A method of electroplating conductive material on semiconductor wafers controls undesirable surface defects by reducing the electroplating current as the wafer is being initially immersed in a plating bath. Further defect reduction and improved bottom up plating of vias is achieved by applying a static charge on the wafer before it is immersed in the bath, in order to enhance bath accelerators used to control the plating rate. The static charge is applied to the wafer using a supplemental electrode disposed outside the plating bath.

Abstract: The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10 as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.

Abstract: A method and apparatus for measuring gas flow are provided. In one embodiment, a calibration circuit for gas control may be utilized to verify and/or calibrate gas flows utilized for backside cooling, process gas delivery, purge gas delivery, cleaning agent delivery, carrier gases delivery and remediation gas delivery, among others.

Abstract: This invention relates to compounds and compositions used to prepare semiconductor and optoelectronic materials and devices. This invention provides a range of compounds, compositions, materials and methods directed ultimately toward photovoltaic applications, as well as devices and systems for energy conversion, including solar cells. In particular, this invention relates to molecular precursor compounds, precursor materials and methods for preparing photovoltaic layers.

Abstract: A material (20) is coated to enhance and add desirable properties through a metalliding process employing an atmosphere (14) substantially free of oxygen and an electrolytic bath (18) within the atmosphere (14). An electrically conductive substrate (20) to be coated is submerged within the bath (18) as a cathode (20) along with multiple anodes (26), each anode (26a, 26b, 26c) having a distinctive composition from the other. A variable power source (30) provides distinctly selected current densities to each of the anodes (26) so as to result in a coating of the substrate (20) by each anode material (26a, 26b, 26c) in proportion to the applied current densities.

Abstract: The present invention is a wafer fixture comprising a housing body, a thrust plate, a flexure clamp, gaskets, flexure pins on an inner circumference of the housing body, locking grooves on an outer circumference of the flexure clamp, and a handle. A wafer may be placed between the gaskets of the housing body and the thrust plate. The flexure clamp may be placed over the thrust plate and secured to the housing body by rotating the flexure clamp such that locking grooves of the fixture plate mate with the flexure pins on the inner circumference of the housing body. The present invention in yet another embodiment is a wafer etch tool comprising a housing, a flexure clamp, and means for securing a wafer between the housing and the flexure clamp upon rotation of the flexure clamp within the housing.

Abstract: The present invention provides an excellent durable cathode for hydrogen generation, which has a low hydrogen overvoltage and reduced dropping-off of a catalyst layer against the reverse current generated when an electrolyzer is stopped, and a method for producing the same. The present invention provides a cathode for hydrogen generation having a conductive base material and a catalyst layer formed on the conductive base material, wherein the catalyst layer includes crystalline iridium oxide, platinum and iridium-platinum alloy.

Abstract: A method of electrodepositing germanium compound materials on an exposed region of a substrate structure, which includes forming a plating solution by dissolving at least one germanium salt and at least one salt containing an element other than germanium in water; obtaining a substrate with a clean surface; immersing the substrate in the solution; and electroplating germanium compound materials on the substrate by applying an electrical potential between the substrate and an anode in the plating solution, in which the substrate is included in a semiconductor or phase change device.

Abstract: A method for maintaining a smooth surface of crystallizable material is disclosed. First, a substrate is provided. A target material layer is then formed on the substrate, with the target material being a crystallizable material. A protecting layer is subsequently formed on the target material layer. Next, an annealing treatment is implemented, with the surface of the target material layer, facing the protecting layer, being maintained in its original smooth state by the pressure and/or adhesion of the protecting layer. Finally, the protecting layer is removed to leave an open and smooth surface of the processed crystallizable material.

Abstract: The electrolyte composition is used in a method of depositing metals, in particular, onto substrates, especially solar cells. The electrolyte composition is particularly suitable for the deposition of metals, in particular silver, onto solar cells. The electrolyte composition is preferably free of cyanides and contains at least one metal, preferably silver, and an iminodisuccinate derivative, preferably a sodium or postassium iminodisuccinate.

Abstract: The problem addressed by the invention is that of improving on an electrodeposition method for the production of nanostructured ZnO in such a manner that this method enables the production of nanostructured ZnO with a high internal quantum efficiency (IQE) without additional tempering steps. According to the invention, the electrodeposition method use an aqueous solution of a Zn salt, for example Zn(NO3)2, and a doping agent, for example HNO3 or NH4NO3. ZnO nanotubes produced in this way show an intense emission band edge in the UV range and only a weak emission in the range from 450 to 700 nm in the photoluminescence spectrum.

Abstract: To generate a very uniform copper deposit in particular in blind micro vias (BMVs) and trenches, an aqueous, acid bath for the electrolytic deposition of copper is provided, said bath containing at least one copper ion source, at least one acid ion source, at least one brightener compound and at least one leveler compound, wherein at least one leveler compound is selected from the group comprising synthetically produced non-functionalized peptides and synthetically produced functionalized peptides and synthetically produced functionalized amino acids.

Abstract: A method of forming a Group IBIIIAVIA absorber layer on a base for manufacturing a solar cell is provided. The method, in one embodiment, includes forming a precursor stack by electroplating a first metallic layer on the base. The first metallic layer includes at least one of copper, indium and gallium. A first selenium layer is deposited on the first metallic layer, and an interlayer is electrodeposited on the selenium layer. The interlayer includes one of gold and silver. A second metallic layer is electrodeposited on the interlayer, the second metallic layer comprising at least one of copper indium and gallium. The interlayer inhibits dissolution of selenium during the electrodeposition of the second metallic layer. Such prepared precursor stack is reacted at a temperature range of 300-600° C. to form the Group IBIIIAVIA absorber layer.

Abstract: An article and method of forming the article is disclosed. The article includes a heat source, a heat-sink, and a thermal interface element having a plurality of freestanding nanosprings, a top layer, and a bottom layer. The nanosprings, top layer, and the bottom layers of the article include at least one inorganic material. The article can be prepared using a number of methods including the methods such as GLAD and electrochemical deposition.

Abstract: A method and apparatus for processing a microfeature workpiece. In one embodiment, the apparatus includes a support member configured to carry a microfeature workpiece at a workpiece plane, and a vessel positioned at least proximate to the support member. The vessel has a vessel surface facing toward the support member and positioned to carry a processing liquid. The vessel surface is shaped to provide an at least approximately uniform current density at the workpiece plane. At least one electrode, such as a thieving electrode, is disposed within the vessel. In a further aspect of this embodiment, the thieving electrode can be easily removable along with conductive material it attracts from the processing liquid. The shape of the vessel surface, the current supplied to the thieving electrode and/or the diameter of an aperture upstream of the workpiece are changed dynamically in other embodiments.

Abstract: A plating method and a plating apparatus, which has a plurality of plating units, for plating a substrate. Each of the plating units includes a plating tank for containing a plating solution therein, a water cleaning tank, disposed adjacent to said plating tank for cleaning the substrate with water, a substrate holder for holding the substrate in a vertical orientation, a vertical displacing mechanism for vertically dipping the substrate holder and a substrate held thereby in the plating solution in the plating tank, and a lateral displacing mechanism or a back-and-forth displacing mechanism for moving the substrate holder while holding the substrate in a vertical orientation between the plating tank and the water cleaning tank. The plating unit also includes a loading/unloading station for loading and unloading the substrate, and a transfer device for transferring the substrate between the plating unit and the loading/unloading station.

Abstract: The present invention pertains to an electrolytic copper plating method characterized in employing pure copper as the anode upon performing electrolytic copper plating, and performing electrolytic copper plating with the pure copper anode having a crystal grain diameter of 10 ?m or less or 60 ?m or more. Provided are an electrolytic copper plating method and a pure copper anode for electrolytic copper plating used in such electrolytic copper plating method capable of suppressing the generation of particles such as sludge produced on the anode side within the plating bath upon performing electrolytic copper plating, and capable of preventing the adhesion of particles to a semiconductor wafer, as well as a semiconductor wafer plated with the foregoing method and anode having low particle adhesion.

Abstract: A plating protocol is employed to control plating of metal onto a wafer comprising a conductive seed layer. Initially, the protocol employs cathodic protection as the wafer is immersed in the plating solution. In certain embodiments, the current density of the wafer is constant during immersion. In a specific example, potentiostatic control is employed to produce a current density in the range of about 1.5 to 20 mA/cm2. The immersion step is followed by a high current pulse step. During bottom up fill inside the features of the wafer, a constant current or a current with a micropulse may be used. This protocol may protect the seed from corrosion while enhancing nucleation during the initial stages of plating.

Abstract: Solid and hollow cylindrical nanopillars with nanoscale diameters are provided. Also provides is a method of making such nanopillars using electron beam lithography followed by the electroplating.

Abstract: The invention relates to a process for forming a polymeric organic film on an electrically conductive or semiconductive surface by application of an electric potential between a gel, in contact with said surface, and said surface, the gel comprising (i) a protic solvent, (ii) compounds having colloidal properties, (iii) an adhesion primer, optionally (iv) a monomer and the potential applied being at least equal to the reduction potential of the adhesion primer. The invention also relates to said gel, to its use and to a kit for forming an organic film.

Abstract: A plating method and a plating apparatus, which has a plurality of plating units, for plating a substrate. Each of the plating units includes a plating tank for containing a plating solution therein, a water cleaning tank, disposed adjacent to said plating tank for cleaning the substrate with water, a substrate holder for holding the substrate in a vertical orientation, a vertical displacing mechanism for vertically dipping the substrate holder and a substrate held thereby in the plating solution in the plating tank, and a lateral displacing mechanism or a back-and-forth displacing mechanism for moving the substrate holder while holding the substrate in a vertical orientation between the plating tank and the water cleaning tank. The plating unit also includes a loading/unloading station for loading and unloading the substrate, and a transfer device for transferring the substrate between the plating unit and the loading/unloading station.

Abstract: The present invention is a wafer fixture comprising a housing body, a thrust plate, a flexure clamp, gaskets, flexure pins on an inner circumference of the housing body, locking grooves on an outer circumference of the flexure clamp, and a handle. A wafer may be placed between the gaskets of the housing body and the thrust plate. The flexure clamp may be placed over the thrust plate and secured to the housing body by rotating the flexure clamp such that locking grooves of the fixture plate mate with the flexure pins on the inner circumference of the housing body. The present invention in yet another embodiment is a wafer etch tool comprising a housing, a flexure clamp, and means for securing a wafer between the housing and the flexure clamp upon rotation of the flexure clamp within the housing.

Abstract: A method of fabricating an energy storage device with a large surface area electrode comprises: providing an electrically conductive substrate; depositing a semiconductor layer on the electrically conductive substrate, the semiconductor layer being a first electrode; anodizing the semiconductor layer, wherein the anodization forms pores in the semiconductor layer, increasing the surface area of the first electrode; after the anodization, providing an electrolyte and a second electrode to form the energy storage device. The substrate may be a continuous film and the electrode of the energy storage device may be fabricated using linear processing tools. The semiconductor may be silicon and the deposition tool may be a thermal spray tool. Furthermore, the semiconductor layer may be amorphous. The energy storage device may be rolled into a cylindrical shape. The energy storage device may be a battery, a capacitor or an ultracapacitor.

Abstract: A method of forming a non-rectifying, ohmic contact on a p-type semiconductor CdTe thin film, which comprises the steps of depositing a layer of As2Te3 on a CdTe layer at a substrate temperature generally within a range of ambient temperature and 200° C.; depositing a layer of Cu on the As2Te3 layer; and bringing at least the deposited Cu layer to a temperature generally within a range of 150° C. and 250° C. The method is used to form a stable contact on CdTe/CdS thin film solar cells.

Abstract: Polymerizable diazonium salts having redox properties and absorption in the visible range, a process for preparing them and uses thereof are disclosed. The salts have the general formula: [XX+LnDdEm(N2+)p][(B?)p+x] in which: X is chosen from transition metals, preferably X is chosen from ruthenium (Ru), osmium (Os), iron (Fe), cobalt (Co) and iridium (Ir), x is an integer ranging from 1 to 5 inclusive, L is a ligand chosen from pyridine, bipyridine, terpyridine, phenanthroline and phenylpyridine groups, and mixtures thereof, n is an integer ranging from 1 to 5 inclusive, D is a saturated or unsaturated, C1-C5 alkyl spacer compound, d=0 or 1, E is an aromatic or polyaromatic spacer compound that can contain one or more heteroatoms, m is an integer ranging from 0 to 5 inclusive, p is an integer, and B is a counterion.

Abstract: First and second electrodes are disposed at first and second locations, respectively, proximate to a periphery of a wafer support, wherein the first and second location are substantially opposed to each other relative to the wafer support. Each of the first and second electrodes can be moved to electrically connect with and disconnect from a wafer held by the wafer support. An anode is disposed over and proximate to the wafer such that a meniscus of electroplating solution is maintained between the anode and the wafer. As the anode moves over the wafer from the first location to the second location, an electric current is applied through the meniscus between the anode and the wafer. Also, as the anode is moved over the wafer, the first and second electrodes are controlled to connect with the wafer while ensuring that the anode does not pass over an electrode that is connected.

Abstract: A method and apparatus for measuring gas flow are provided. In one embodiment, a calibration circuit for gas control may be utilized to verify and/or calibrate gas flows utilized for backside cooling, process gas delivery, purge gas delivery, cleaning agent delivery, carrier gases delivery and remediation gas delivery, among others.

Abstract: Methods, apparatuses, and various apparatus components, such as base plates, lipseals, and contact ring assemblies are provided for reducing contamination of the contact area in the apparatuses. Contamination may happen during removal of semiconductor wafers from apparatuses after the electroplating process. In certain embodiments, a base plate with a hydrophobic coating, such as polyamide-imide (PAI) and sometimes polytetrafluoroethylene (PTFE), are used. Further, contact tips of the contact ring assembly may be positioned further away from the sealing lip of the lipseal. In certain embodiments, a portion of the contact ring assembly and/or the lipseal also include hydrophobic coatings.

Abstract: The present invention provides a method of manufacturing a crystalline silicon solar cell, comprising: —providing a crystalline silicon substrate having a front side and a back side; —forming a thin silicon oxide film on at least one of the front and the back side by soaking the crystalline silicon substrate in a chemical solution; —forming a dielectric coating film on the thin silicon oxide film on at least one of the front and the back side. The thin silicon oxide film may be formed with a thickness of 0.5-10 nm. By forming a oxide layer using a chemical solution, it is possible to form a thin oxide film for surface passivation wherein the relatively low temperature avoids deterioration of the semiconductor layers.

Abstract: The present invention provides a method and precursor structure to form a solar cell absorber layer. The method includes electrodepositing a first layer including a film stack including at least a first film comprising copper, a second film comprising indium and a third film comprising gallium, wherein the first layer includes a first amount of copper, electrodepositing a second layer onto the first layer, the second layer including at least one of a second copper-indium-gallium-ternary alloy film, a copper-indium binary alloy film, a copper-gallium binary alloy film and a copper-selenium binary alloy film, wherein the second layer includes a second amount of copper, which is higher than the first amount of copper, and electrodepositing a third layer onto the second layer, the third layer including selenium; and reacting the precursor stack to form an absorber layer on the base.

Abstract: Provided is a printed circuit board (PCB) with multiple metallic layers and a method of manufacturing the PCB to improve adhesion between a metal film and a polymer film, on which a circuit pattern is formed. The PCB includes: a first metal film; a polymer film formed on one surface of the first metal film; and a second metal film, interposed between the first metal film and the polymer film, having a first surface facing the first metal film and a second surface facing the polymer film, wherein the second surface is rougher than the first surface.

Abstract: A method for forming front contacts on a silicon solar cell which includes texture etching the front surface of the solar cell, forming an antireflective layer over the face, diffusing a doping material into the face to form a heavily doped region in valleys formed during the texture-etching of the face, depositing an electrically conductive material on the heavily doped regions in the valleys and annealing the solar cell.

Abstract: A nozzle layer is described that has a semiconductor body having a first surface, a second surface opposing the first surface, and a nozzle formed through the body connecting the first and second surfaces, wherein the nozzle being configured to eject fluid through a nozzle outlet on the second surface, and a metal layer around the outlet on the second surface and at least partially inside the nozzle, the metal layer inside the nozzle being completely exposed.

Abstract: A method of selectively depositing metal features on a conductive surface of a substrate. An electrode assembly that includes a plurality of electrodes connected in series so as to be oppositely polarized when a voltage is applied thereacross is positioned over the conductive surface of the substrate. The plurality of electrodes is in close proximity to, but does not contact, the conductive surface of the substrate. Positively charged portions and negatively charged portions of the conductive surface of the substrate are created and metal ions are deposited on the negatively charged portions.

Abstract: A method of electroplating conductive material on semiconductor wafers controls undesirable surface defects by reducing the electroplating current as the wafer is being initially immersed in a plating bath. Further defect reduction and improved bottom up plating of vias is achieved by applying a static charge on the wafer before it is immersed in the bath, in order to enhance bath accelerators used to control the plating rate. The static charge is applied to the wafer using a supplemental electrode disposed outside the plating bath.