Forming Or Treating Mask Used For Its Nonetching Function (e.g., Shadow Mask, X-ray Mask, Etc.) Patents (Class 216/12)
-
Publication number: 20040023129Abstract: Phase shift mask which is a single side engraving type phase shift mask, which comprises a shifter part and a non-shifter part adjacent mutually on a substrate, and a shading layer pattern formed with a shading film which covers continuously from the end of the shifter part to the adjacent end of the non-shifter part including the side wall part of a dug-down part for forming said shifter part, and wherein the side wall part inclines so that the side wall part spreads toward the substrate surface.Type: ApplicationFiled: April 14, 2003Publication date: February 5, 2004Inventor: Haruo Kokubo
-
Patent number: 6667215Abstract: A method for making transistors comprises depositing source electrode and drain electrode features onto a substrate through a single aperture in a stationary shadow mask, said aperture having at least two opposing edges; wherein the shapes of the features are defined by the aperture and location of source materials in relation to the substrate.Type: GrantFiled: May 2, 2002Date of Patent: December 23, 2003Assignee: 3M Innovative PropertiesInventors: Steven D. Theiss, Paul F. Baude, Michael A. Haase, Silva K. Theiss
-
Patent number: 6664032Abstract: Disclosed is a method of producing a two-dimensional phase type optical element, wherein a first mask and a second mask made of different materials and both having a stripe-like shape are superposedly formed on a substrate, along different directions, respectively, and wherein positions of all levels to be defined are determined on the basis of at least one of the first and second masks.Type: GrantFiled: February 15, 2000Date of Patent: December 16, 2003Assignee: Canon Kabushiki KaishaInventor: Ichiro Tanaka
-
Patent number: 6656373Abstract: An optical element which controls both the phase and irradiance distribution, thereby completely specifying the E-field, of light, allowing completely arbitrary control of the light at any plane. Such an optical element includes a portion that controls the phase and a portion that controls the irradiance. The portion that controls the irradiance is an apodized irradiance mask having its transmission varying with position in a controlled fashion. This apodized irradiance mask is preferably a pattern of metal. In order to insure a smoothly varying pattern of metal with minimized diffraction effects, a very thin mask spaced from a substrate is used to provide the metal on the substrate. The apodized irradiance mask may be placed directly on the phase control portion, or may be on an opposite side of a substrate of the phase controlled portion.Type: GrantFiled: July 7, 2000Date of Patent: December 2, 2003Assignee: Wavefront Sciences, Inc.Inventors: Daniel R. Neal, Justin D. Mansell
-
Publication number: 20030215722Abstract: A photomask repair method including scanning an electron beam across a main surface of the photomask, thereby producing a pattern image of the photomask, identifying the position of a defective portion from the pattern image thus produced, and applying an electron beam to a region to be etched including a defective portion under an atmosphere of a gas capable of performing a chemical etching of a film material forming the photomask pattern, thereby removing a defect. In this method, the electron beam to be applied to the region to be etched is a shaped beam. The electron beam is set such that the side of the electron beam is applied in parallel to a borderline between a non-defective pattern and the defect.Type: ApplicationFiled: December 23, 2002Publication date: November 20, 2003Inventors: Shingo Kanamitsu, Takashi Hirano, Fumiaki Shigemitsu, Motosuke Miyoshi, Kazuyoshi Sugihara, Yuichiro Yamazaki, Makoto Sekine, Takayuki Sakai, Ichiro Mori, Katsuya Okumura
-
Publication number: 20030180631Abstract: A halftone phase shift mask blank for use in manufacturing a halftone phase shift mask comprises a transparent substrate, a light transmitting portion formed on the substrate for transmitting an exposure light beam, a phase shifter portion formed on the substrate for transmitting a part of the exposure light beam as a transmitted light beam and for shifting a phase of the transmitted light beam by a predetermined amount, and a phase shifter film for forming the phase shifter portion. The halftone phase shift mask has an optical characteristic such that light beams passing through the light transmitting portion and through the phase shifter portion cancel each other in the vicinity of a boundary portion therebetween, thereby maintaining and improving an excellent contrast at a boundary portion of an exposure pattern to be transferred onto the surface of an object to be exposed.Type: ApplicationFiled: February 24, 2003Publication date: September 25, 2003Applicant: HOYA CORPORATIONInventors: Yuuki Shiota, Osamu Nozawa, Ryo Ohkubo, Hideaki Mitsui
-
Publication number: 20030180627Abstract: The present invention relates to a method of producing a structure of etch-resistant polymer on a substrate. A layer of sterol capable of polymerizing to form this structure is first deposited on a face of the substrate. Then, a first region of the layer of sterol is exposed to an electron beam to locally polymerize this layer and form the structure of etch-resistant polymer. A second region of the layer of sterol that has not been exposed to the electron beam is removed to leave on the face of the substrate only the structure of etch-resistant polymer. Finally, a region of the face of the substrate not covered by the structure of etch-resistant polymer can be etched away, and the structure of etch-resistant polymer removed following this etching.Type: ApplicationFiled: March 20, 2002Publication date: September 25, 2003Applicant: QUANTISCRIPT INC.Inventors: Eric Lavallee, Jacques Beauvais, Dominique Drouin, Melanie Cloutier
-
Patent number: 6607674Abstract: A phase shifting mask repair process is described. The process uses an etching gas or a hydrofluoric acid solution to etch the quartz substrate and the characteristics of the phase shifter layer being only slightly etched when clean with a NH3/H2O2/H2O2 solution to calculate and adjust the respective processing time accordingly. As a result, the phase difference between the quartz substrate and the MoSiON phase shifter layer stays relatively the same before and after the repair process.Type: GrantFiled: November 30, 2000Date of Patent: August 19, 2003Assignee: Macronix International CO, Ltd.Inventor: Ching-Yu Chang
-
Patent number: 6605226Abstract: A method is disclosed for speeding workpiece thoughput in low pressure, high temperature semiconductor processing reactor. The method includes loading a workpiece into a chamber at atmospheric pressure, bringing the chamber down to an intermediate pressure, and heating the wafer while under the intermediate pressure. The chamber is then pumped down to the operating pressure. The preferred embodiments involve single wafer plasma ashers, where a wafer is loaded onto lift pins at a position above a wafer chuck, the pressure is rapidly pumped down to about 40 Torr by rapidly opening and closing an isolation valve, and the wafer is simultaneously lowered to the heated chuck. Alternatively, the wafer can be pre-processed to remove an implanted photoresist crust at a first temperature and the chamber then backfilled to about 40 Torr for further heating to close to the chuck temperature. At 40 Torr, the heat transfer from the chuck to the wafer is relatively fast, but still slow enough to avoid thermal shock.Type: GrantFiled: June 10, 2002Date of Patent: August 12, 2003Assignee: Matrix Integrated Systems, Inc.Inventors: Albert Wang, Scott Baron, Prasad Padmanabhan, Gerald M. Cox
-
Patent number: 6582889Abstract: A two layer structure resist pattern with a T-shaped cross section, consisting of a lower layer and an upper layer with overhang portions is formed, and then the formed two layer structure resist pattern is heat-treated so that the overhang portions of the upper layer incline downward.Type: GrantFiled: July 10, 2000Date of Patent: June 24, 2003Assignee: TDK CorporationInventor: Akifumi Kamijima
-
Patent number: 6562253Abstract: A method of producing an optical element having a multiple-level step-like structure includes a first process for providing a first mask pattern at a position corresponding to a predetermined boundary among boundaries at steps of the multiple-level step-like structure of a substrate, the first mask pattern having a width narrower than that of a single step, a second process for providing a second mask pattern upon the substrate having the first mask pattern formed thereon, the second mask pattern having a width corresponding to a single step or plural steps of the multiple-level step-like structure and a third process for processing the substrate by use of the first and second mask patterns and thereafter for removing the second mask pattern while leaving the first mask pattern there. After repeating the second and third processes plural times of a predetermined number, the first mask pattern is removed.Type: GrantFiled: July 28, 2000Date of Patent: May 13, 2003Assignee: Canon Kabushiki KaishaInventor: Makoto Ogusu
-
Patent number: 6562249Abstract: In an improved method of etching apertures in a thin metal sheet to form a shadow mask for a color picture tube, the metal sheet has a first acid-resistant stencil on one major surface thereof and a second acid-resistant stencil on the other major surface thereof. At least one of the stencils has openings therein at locations of intended apertures. The improvement comprises the steps of magnetically holding the metal sheet with a flat magnetic assembly, and moving the magnetic assembly magnetically holding the metal sheet thereon through an etching chamber. The magnetic assembly includes a magnetic layer that is supported on an acid-resistant board.Type: GrantFiled: July 10, 2001Date of Patent: May 13, 2003Assignees: BMC Industries, Inc., Thomson Consumer ElectronicsInventors: Craig Clay Eshleman, Charles Michael Wetzel, Randall Eugene McCoy, Leo B. Kriksunov, Lance Benjamin, Derek Harris, Thomas R. Sage
-
Patent number: 6562248Abstract: A system for monitoring and controlling aperture etching in a complimentary phase shift mask is provided. The system includes one or more light sources, each light source directing light to one or more apertures etched on a mask. Light reflected from the apertures is collected by a measuring system, which processes the collected light. Light passing through the apertures may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the depth and/or width of the openings on the mask. The measuring system provides depth and/or width related data to a processor that determines the acceptability of the aperture depth and/or width. The system also includes a plurality of etching devices associated with etching apertures in the mask. The processor selectively controls the etching devices so as to regulate aperture etching.Type: GrantFiled: March 26, 2001Date of Patent: May 13, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Ramkumar Subramanian, Bhanwar Singh, Michael K. Templeton
-
Publication number: 20030086829Abstract: A high throughput oligonucleotide synthesizer is described that includes masks for selectively deblocking of oligonucleotide synthesis sites and the simultaneous addition of reagents to all wells of the plate. The synthesizer includes a multi-well plate, each well of which contains a substrate for oligonucleotide synthesis. The use of masks expedites oligonucleotide synthesis by allowing for rapid delivery of reagents to all wells simultaneously.Type: ApplicationFiled: October 24, 2001Publication date: May 8, 2003Inventors: Eric A. Livesay, Joel P. Irick, Ying-Horng Liu, Kevin J. Luebke, Stephen A. Johnston, Yuri Belosludstev
-
Publication number: 20030071018Abstract: A method for correcting characteristics of an attenuated phase-shift mask having an attenuated layer including (a) storing a data in a memory, which shows a correlation between characteristics and process conditions, (b) measuring the characteristics of the attenuated phase-shift mask, (c) calculating a appropriate process condition from the result of the step (b) and the data stored in the memory; and (d) soaking the attenuated phase-shift mask into a liquid solution for a certain time-that is calculated in the step (c) to change thickness and composition of the attenuated layer.Type: ApplicationFiled: November 21, 2002Publication date: April 17, 2003Inventor: Katsuhiro Takushima
-
Patent number: 6508949Abstract: A method for correcting characteristics of an attenuated phase-shift mask having an attenuated layer including (a) storing a data in a memory, which shows a correlation between characteristics and process conditions, (b) measuring the characteristics of the attenuated phase-shift mask, (c) calculating a appropriate process condition from the result of the step (b) and the data stored in the memory; and (d) soaking the attenuated phase-shift mask into a liquid solution for a certain time that is calculated in the step (c) to change thickness and composition of the attenuated layer.Type: GrantFiled: July 18, 2000Date of Patent: January 21, 2003Assignee: Oki Electric Industry Co., Ltd.Inventor: Katsuhiro Takushima
-
Patent number: 6508945Abstract: A lightweight cathode ray tube is formed by reducing a cross-sectional area on the apeture grill tapes in the aperture grill. One exemplary embodiment of the reduced cross-sectional area aperture grill tape includes a central longitudinal channel in a side of the aperture grill tape that faces away from the screen. The reduction in cross-sectional area reduces a linear density of the tape thereby decreasing the tension required by the frame. As each of the aperture grill tapes includes this central longitudinal channel, the weight of the overall aperture grill is significantly reduced and the aperture grill frame weight is reduced due to the lower aperture grill tension. A method for producing the reduced cross-sectional area aperture grill tape is possible without significantly increasing the cost of manufacturing the aperture grill tape.Type: GrantFiled: February 24, 2000Date of Patent: January 21, 2003Assignees: Sony Corporation, Sony Electronics Inc.Inventor: Paul A. Hollinger
-
Patent number: 6506525Abstract: A three-step method is used to repair an opaque defect in a photomask having a transparent substrate, and a light transmission portion disposed on the substrate and defining an opening the image of which is to be transferred to a layer on a semiconductor substrate. First, the thickness of the opaque defect is reduced by etching away only some of the defect. Second, a correction film is selectively formed over the entire surface of the substrate of the photomask in the opening defined by the light transmission portion with the exception of the region occupied by the pre-etched defect. Next, the correction film and the pre-etched defect are simultaneously etched away.Type: GrantFiled: March 26, 2001Date of Patent: January 14, 2003Assignee: Samsung Electronics Co., Ltd.Inventors: Yo-han Choi, Jin-min Kim
-
Publication number: 20030006212Abstract: The present invention relates to a method of producing an optical fiber-processing phase mask having minimized connection errors that may degrade the spectral line shape and group delay characteristics of an optical fiber diffraction grating fabricated by using the phase mask. The present invention provides a method of producing an optical fiber-processing phase mask having a repeating pattern of grating-shaped grooves and strips provided on one surface of a transparent substrate, so that diffracted light produced by the repeating pattern is applied to an optical fiber to fabricate a diffraction grating in the optical fiber by interference fringes of diffracted light of different orders.Type: ApplicationFiled: October 25, 2001Publication date: January 9, 2003Inventors: Toshikazu Segawa, Masaaki Kurihara, Tetsuro Komukai, Masataka Nakazawa
-
Publication number: 20020192572Abstract: Printing, marking or etching a surface is achieved using a mask or masks in combination with electromagnetic radiation (such as a laser or the like) or otherwise exposing one or more selected areas of a surface for treatment, utilising transmissive, non-transmissive or modified transmissivity portions of one or more layers of material of the mask. In one embodiment a surface of a first radiation transmissive layer of the mask is partially covered by a second layer of material which is substantially non-transmissive to radiation. An uncovered portion of the transmissive layer is in the shape of an element (such as a character, symbol or shape) to be printed, marked, etched or the like on the surface.Type: ApplicationFiled: May 17, 2002Publication date: December 19, 2002Inventor: Simon Lau
-
Patent number: 6491831Abstract: A shadow mask for a cathode ray tube includes through-holes defined by first and second recessed formed at first and second surfaces of the shadow mask, respectively. Each through-hole has a first wall farther away from a center of the shadow mask than a second wall thereof. The second recess has a smaller size than that of the first recess. The first wall is formed of a first wall portion defined by an inner surface of the first recess and a second wall portion defined by an inner surface of the second recess. The second wall portion of through-holes located at a peripheral region of the first region has a configuration such that electron beams reflected therefrom are directed to an inner surface of the first recess to thereby reduce electron beams reflected therefrom in directions different from a direction in which the electron beams are originally directed before the electron beams enter the shadow mask.Type: GrantFiled: July 17, 2000Date of Patent: December 10, 2002Assignee: NEC CorporationInventor: Nobumitsu Aibara
-
Patent number: 6475399Abstract: Disclosed is a method for fabricating a stencil mask for use in electron beam lithography which improves resolution by effectively reducing beam blur resulting from coulomb repulsion effects in the electron beam. The disclosed method includes fabricating a first mask and a second mask that are then aligned and joined to form the final stencil mask. The structure of the second mask limits the number and controls the initial pattern of the electrons that pass through the stencil mask to limit beam blur, narrow the incident energy distribution, and improve the resolution of the final image.Type: GrantFiled: June 28, 2001Date of Patent: November 5, 2002Assignee: Hynix Semiconductor Inc.Inventor: Jae Seung Choi
-
Publication number: 20020135287Abstract: A shadow mask is applicable to forming a minute film on a substrate by evaporation or the like. The shadow mask comprises a support film, a stopper film, a polyimide film and a thin plate.Type: ApplicationFiled: May 9, 2002Publication date: September 26, 2002Inventors: Shinichi Fukuzawa, Shigeyoshi Ootsuki
-
Patent number: 6451451Abstract: There are provided methods of making hardmask assemblies or other layered structures, and other masks, including providing an annular seal member between a first surface of layered structure, preferably a hardmask assembly, and a firs clamp element, the hardmask assembly comprising at least a hardmask layer; and applying a force between the first clamp element and a second clamp element to hold the hardmask assembly between the annular seal member and the second clamp element In addition, there are provided methods further comprising etching the first surface of the hardmask assembly within the bounds of an interior space defined by the annular seal member. Furthermore, there are provided methods further comprising etching the substrate layer through the hardmask layer and/or removing the hardmask layer after etching the substrate layer.Type: GrantFiled: March 27, 2001Date of Patent: September 17, 2002Assignee: Micron Technology, Inc.Inventor: J. Brett Rolfson
-
Patent number: 6447688Abstract: Disclosed is a novel method for fabricating a stencil mask comprising the formation of an absorber pattern, including an alignment key or target, on the topside of an SOI wafer having a transparent buried insulating layer. The formation of the absorber pattern is followed by the formation of an alignment window from the backside of the SOI wafer using the insulating layer as a lens. The alignment window allows the alignment between the absorber pattern and the frame pattern to be verified, using light passing through the window lens and illuminating the alignment key, before initiating the frame etch, thereby improving the quality and/or throughput of the stencil mask manufacturing process.Type: GrantFiled: April 2, 2001Date of Patent: September 10, 2002Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Cheol Kyun Kim
-
Patent number: 6418941Abstract: There is disclosed a method of the plasma cleaning of a chip-mounted board, in which the destruction of a chip due to the charge build-up in a land during the plasma cleaning is prevented. There is provided a mask member for covering a board placed on a plasma-generating electrode. This mask member has openings through which the chip, mounted on the land on the board, and electrodes on the board are exposed, respectively, and an exposed portion of the land, extending outwardly of the chip, and a conducting portion on the board are covered with the mask member. A high-frequency voltage is applied to the plasma-generating electrode, thereby producing plasm within a vacuum chamber, so that ions Ar+ impinge on pads on the chip to clean and charge up these pads. The land is covered with the mask member, and therefore will not be charged up with the ions Ar+ and electrons e−.Type: GrantFiled: October 2, 1998Date of Patent: July 16, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Arita, Tanemasa Asano
-
Publication number: 20020074310Abstract: A method of manufacturing an array of microstructures, such as a micromirror array assembly (10, 20) for use in optical modules (5, 17) in a wireless network system, is disclosed. The micromirror array assembly (10, 20) includes a plurality of mirrors (29) monolithically formed from a silicon wafer (70) with a frame (43), attached by way of hinges (55) and gimbal portions (45). The wafer is temporarily bonded to a support wafer (60) while permanent magnets (53) are attached to each of the gimbal portions (45) associated with the mirrors (29), through holes etched through the mounting wafer (60). The resulting frame (43) is then mounted to a coil driver assembly (50) so that coil drivers (34) can control the rotation of each mirror (29), under separate control from control circuitry (14, 24). The micromirror array assembly (10, 20) is able to support higher signal energy at larger spot sizes, and also enables multiplexed transmission and receipt, as well as sampling of the received beam for quality sensing.Type: ApplicationFiled: August 29, 2001Publication date: June 20, 2002Inventor: Andrew S. Dewa
-
Publication number: 20020070196Abstract: In an improved method of etching apertures in a thin metal sheet to form a shadow mask for a color picture tube, the metal sheet has a first acid-resistant stencil on one major surface thereof and a second acid-resistant stencil on the other major surface thereof. At least one of the stencils has openings therein at locations of intended apertures. The improvement comprises the steps of magnetically holding the metal sheet with a flat magnetic assembly, and moving the magnetic assembly magnetically holding the metal sheet thereon through an etching chamber. The magnetic assembly includes a magnetic layer that is supported on an acid-resistant board.Type: ApplicationFiled: July 10, 2001Publication date: June 13, 2002Applicant: BMC Industries, Inc. and Thomson Consumer Electronics, Inc.Inventors: Craig Clay Eshleman, Charles Michael Wetzel, Randall Eugene McCoy, Leo B. Kriksunov, Lance Benjamin, Derek Harris, Thomas R. Sage
-
Publication number: 20020059903Abstract: A deposition mask capable of relaxing nonuniformity of the thickness of a deposit formed on a substrate and reducing the width of a non-opening part of a mask layer by reducing the thickness of the mask layer is obtained. This deposition mask comprises a mask layer formed by a single silicon thin film and a mask pattern, formed on the mask layer, including a mask opening having an opening width increased toward a deposition source. The mask layer formed by a silicon thin film can be reduced in thickness due to small deflection caused by its own weight. Thus, the width of the non-opening part of the mask layer can be reduced, whereby the width of a part formed with no deposit can be reduced.Type: ApplicationFiled: September 18, 2001Publication date: May 23, 2002Applicant: SANYO ELECTRIC CO., LTD.Inventors: Isao Hasegawa, Yoshio Miyai, Naoya Sotani
-
Patent number: 6391791Abstract: A dry-etching method comprises the step of dry-etching a metal thin film as a chromium-containing film, wherein the method is characterized by using, as an etching gas, a mixed gas including (a) a reactive ion etching gas, which contains an oxygen-containing gas and a halogen-containing gas, and (b) a reducing gas added to the gas component (a), in the process for dry-etching the metal thin film. The dry-etching method permits the production of a photomask by forming patterns to be transferred to a wafer on a photomask blank. The photomask can in turn be used for manufacturing semiconductor circuits. The method permits the decrease of the dimensional difference due to the coexistence of coarse and dense patterns in a plane and the production of a high precision pattern-etched product.Type: GrantFiled: July 27, 1999Date of Patent: May 21, 2002Assignees: Ulvac Coating Corporation, Mitsubishi Denki Kabushiki KaishaInventors: Takaei Sasaki, Noriyuki Harashima, Satoshi Aoyama, Shouichi Sakamoto
-
Patent number: 6387602Abstract: A reticle cleaning apparatus that utilizes an ultraviolet light source in an oxygen-containing environment to cleanse organic contaminants from a reticle. The reticle cleaning apparatus of the present invention enables the storage of multiple reticles for use in a lithography tool in an environment which contains organic contaminants. A stored reticle is translated to a reticle cleaning station within the lithography tool in order to cleanse the reticle of organic contaminants. This cleaning can be performed while the projection optics of the tool exposes a wafer using another reticle previously cleaned by the reticle cleaning apparatus. Upon completion of the reticle cleaning process, the reticle is immediately translated to the exposure path of the lithography tool. The reticle cleaning process is performed during normal operation of the lithography tool at room temperature, atmospheric pressure and in an oxygen-containing environment.Type: GrantFiled: February 15, 2000Date of Patent: May 14, 2002Assignee: Silicon Valley Group, Inc.Inventors: Cindy J. Hayden, David H. Peterson
-
Patent number: 6368516Abstract: A method is provided for determining a measure of corner rounding produced in a mask structure. The method includes providing an un-patterned mask structure having a transparent substrate, an opaque layer on the substrate and a photoresist on the opaque layer. A corner rounding test pattern is etched into the photoresist. The pattern exposes underlying portions of the opaque layer. The pattern is in the shape of a pair of intersecting perpendicular lines of the photoresist. The exposed portions of the opaque layer are brought into contact with a etch to remove the exposed portions of the opaque layer and to thereby expose underlying portions of the substrate. In one embodiment, the etch is a wet etch and undercuts the photoresist to remove unexposed portions of the opaque layer disposed adjacent to the exposed portions of the opaque layer. The photoresist is removed to produce mask structure.Type: GrantFiled: June 24, 1999Date of Patent: April 9, 2002Assignee: Infineon Technologies North America Corp.Inventors: Enio L. Carpi, Steffen F. Schulze
-
Publication number: 20020039693Abstract: In the production or a shadow mask, the through-holes for passing an electron beam are formed by etching of the Fe—Ni alloy. The variation in diameter of apertures is prevented by dispersing 2000 or more of precipitates and inclusions from 0.01 &mgr;m to 5 &mgr;m in diameter on the surface of said material per mm2. The Fe—Ni alloy of from 34 to 38% of Ni, not more than 0.5% of Mn, and if necessary, from 5 to 40 ppm of B, and from 5 to 40 ppm of N, the balance being Fe and unavoidable and incidental impurities with the proviso of 0.10% or less of C, 0.30% or less of Si, 0.30% or less of Al, 0.005% or less of S, and 0.005% or less of P.Type: ApplicationFiled: July 17, 2001Publication date: April 4, 2002Inventor: Ikuya Kurosaki
-
Publication number: 20020030034Abstract: A phase shifting mask repair process is described. The process uses an etching gas or a hydrofluoric acid solution to etch the quartz substrate and the characteristics of the phase shifter layer being only slightly etched when clean with a NH3/H2O2/H2O2 solution to calculate and adjust the respective processing time accordingly. As a result, the phase difference between the quartz substrate and the MoSiON phase shifter layer stays relatively the same before and after the repair process.Type: ApplicationFiled: November 30, 2000Publication date: March 14, 2002Inventor: Ching-Yu Chang
-
Publication number: 20020028394Abstract: The present invention provides a method for manufacturing a mask using a substrate comprising a first, second and third layers, the method comprising : forming one or more openings through the first layer to an extent that a portion of a first surface of the second layer facing the first layer is exposed; wet-etching at least a first portion of the third layer to an extent that a second surface of the second layer facing the third layer is not exposed, the first portion of the third layer corresponding to the openings of the first layer; dry-etching at least a second portion of the third layer to an extent that a portion of the second surface of the second layer facing the third layer is exposed, the second portion of the third layer corresponding to the openings of the first layer; and removing the exposed portion of the second layer such that the openings of the first layer extend through the second layer.Type: ApplicationFiled: September 4, 2001Publication date: March 7, 2002Applicant: ADVANTEST CORPORATIONInventors: Hitoshi Watanabe, Hiroshi Yano
-
Publication number: 20020027125Abstract: A coated film product comprises a support base, a stencil-forming layer and an intermediate release layer. The stencil-forming layer is a blend of two grades of polyvinyl alcohol having different degrees of hydrolysis. The stencil-forming layer is imaged by dropwise application (for example using an ink-jet printer or plotter) of a cross-linking agent which hardens the stencil-forming layer to resist washing out with water. The hardened areas remaining after washing out are however sufficiently tacky for the washed-out film to adhere to the screen mesh by application of pressure and, after removal of the support base, form the stencil layer of a screen-printing screen.Type: ApplicationFiled: August 14, 2001Publication date: March 7, 2002Applicant: Autotype International LimitedInventors: John W. Jones, David Joseph Foster
-
Patent number: 6352647Abstract: Methods of making hardmask assemblies or other layered structures, and other masks, include providing an annular seal member between a first surface of layered structure, preferably a hardmask assembly, and a first clamp element, the hardmask assembly comprising at least a hardmask layer; and applying a force between the first clamp element and a second clamp element to hold the hardmask assembly between the annular seal member and the second clamp element. In addition, there are provided methods further comprising etching the first surface of the hardmask assembly within the bounds of an interior space defined by the annular seal member. Methods further comprise etching the substrate layer through the hardmask layer and/or removing the hardmask layer after etching the substrate layer.Type: GrantFiled: May 5, 1999Date of Patent: March 5, 2002Assignee: Micron Technology, Inc.Inventor: J. Brett Rolfson
-
Publication number: 20020020946Abstract: Molded products may be made by a process comprising preparing a structure comprising a block copolymer or a graft copolymer having two or more phases, wherein each phase is comprised of polymer chains, decomposing the polymer chains of at least one phase of the structure, and cleaning the structure with a supercritical fluid or a sub-critical fluid, thereby removing the decomposed polymer chains from the structure. Molded products made by this method have very low levels of residual solvents, can be manufactured at a relatively low temperature in a short period of time without using large amounts of organic solvents, and without discharging large amounts of liquid waste.Type: ApplicationFiled: August 13, 2001Publication date: February 21, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiro Hiraoka, Koji Asakawa, Yasuyuki Hotta
-
Patent number: 6338921Abstract: A mask (50′) with linewidth compensation and a method of making same. The mask provides for optimized imaging of isolated patterns (64) and nested patterns (70) present on the same mask. The compensated mask is formed from an uncompensated mask (50) and comprises an upper surface (56) upon which the isolated and nested patterns are formed. The isolated pattern comprises a first segment (76) having first sidewalls (76S). The nested pattern comprises second segments (72) proximate each other and having second sidewalls (72S). A partial conformal layer (86) covers the first segment and has feet (90) outwardly extending a distance d from the first sidewalls along the upper surface. The feet are preferably of a thickness that partially transmits exposure light.Type: GrantFiled: January 7, 2000Date of Patent: January 15, 2002Assignee: International Business Machines CorporationInventors: James A. Bruce, David V. Horak, Randy W. Mann, Jed H. Rankin, Andrew J. Watts
-
Patent number: 6319639Abstract: A photomask for manufacturing a semiconductor device. The photomask is manufactured by a providing a photomask substrate and alternately depositing a plurality of layers of a light-absorbing material and of an etch-stop material on the photomask substrate. The light-absorbing material is selected as having a well-defined etching selectivity from that of the etch-stop material. The layers are successively patterned by removing by a selective etching process at least a portion of at least one of said layers, the portion removed from a lower, in relation to the substrate, layer a subset of the portion removed from a higher layer. Together, the patterned layers are used as a photomask to photolithographically imprint a pattern of a photoresist on a semiconductor wafer under manufacture. The photoresist is used in the etching process of the semiconductor wafer.Type: GrantFiled: August 7, 2000Date of Patent: November 20, 2001Assignee: Micron Technology, Inc.Inventor: Alan R. Reinberg
-
Publication number: 20010013501Abstract: There are provided methods of making hardmask assemblies or other layered structures, and other masks, including providing an annular seal member between a first surface of layered structure, preferably a hardmask assembly, and a first clamp element, the hardmask assembly comprising at least a hardmask layer; and applying a force between the first clamp element and a second clamp element to hold the hardmask assembly between the annular seal member and the second clamp element In addition, there are provided methods further comprising etching the first surface of the hardmask assembly within the bounds of an interior space defined by the annular seal member. Furthermore, there are provided methods further comprising etching the substrate layer through the hardmask layer and/or removing the hardmask layer after etching the substrate layer.Type: ApplicationFiled: March 27, 2001Publication date: August 16, 2001Inventor: J. Brett Rolfson
-
Patent number: 6242107Abstract: A method for etching selected portions of an aluminum-containing layer of a layer stack that is disposed on a substrate. The aluminum-containing layer is disposed below a photoresist mask having a pattern thereon. The method includes providing a plasma processing chamber and positioning the substrate having thereon the layer stack, including the aluminum containing layer and the photoresist mask, within the plasma processing chamber. The method further includes flowing an etchant source gas that comprises HCl, a chlorine-containing source gas, and an oxygen-containing source gas into the plasma processing chamber. The oxygen-containing source gas is preferably CO2. The flow rate of the oxygen-containing source gas is less than about 20 percent of a total flow rate of the etchant source gas. There is also included striking a plasma out of the etchant source gas, wherein the plasma is employed to etch at least partially through the aluminum-containing layer.Type: GrantFiled: June 24, 1999Date of Patent: June 5, 2001Assignee: Lam Research CorporationInventor: Robert J. O'Donnell
-
Patent number: 6193897Abstract: A shadow mask manufacturing method comprising the cleaning step performs rapid cleaning by spraying a cleaning solution, which is inert with respect to the band-like thin metal plate, upon upper and lower surfaces of the band-like thin metal plate and thereby generating cavitation near the surfaces of the band-like thin metal plate by using cavitation jet means, while regulating a position of the band-like thin metal plate and preventing the cleaning solution from leaking in a direction opposite to the conveyance direction of the band-like thin metal plate by using a first leakage-preventing seal unit provided upstream the cavitation jet means.Type: GrantFiled: July 2, 1997Date of Patent: February 27, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Masaru Nikaido, Sachiko Hirahara, Yukio Okudo, Daizi Hirosawa, Hiroharu Takezawa
-
Patent number: 6187690Abstract: In one aspect, the invention includes a method for manufacturing a semiconductive wafer comprising: a) providing a semiconductive material wafer having a front surface and a back surface; b) contacting the front surface with a first fluid; c) contacting the back surface with a second fluid different than the first fluid, at least one of the first and second fluids being configured to etch the semiconductive material of the wafer; at least one of the first and second fluids having a measurable component at a first concentration which is different than any concentration of said measurable component in the other of the first and second fluids; d) etching the semiconductive wafer with the at least one of the first and second fluids configured to etch the semiconductive material; and e) monitoring the measurable component concentration in at least one of the first fluid or the second fluid to ascertain if the etching has formed an opening extending completely through the substrate.Type: GrantFiled: January 13, 2000Date of Patent: February 13, 2001Assignee: Micron Technology, Inc.Inventor: J. Brett Rolfson
-
Patent number: 6180292Abstract: A precise thickness bulk etchable wafer material, that is responsive to protection with an oxide that inhibits insertion of an etch responsiveness altering material, is assembled with a membrane material that is susceptible to deposition processes. A bulk etch then removes most of the wafer. The arrangement permits the strength and rigidity of the bulk spacer to serve to permit the finely controllable deposition processes for ultra thin and wider ranges of membrane materials, the selective protection for spacer shaping and finally, the removal by the low stress process of etching, of the unused bulk spacer material. An oxide layer is patterned on a bulk spacer material wafer that has a thickness of the gap between an X-ray mask and the to be patterned oxide. The oxide on the bulk spacer material prevents conversion, through the exposed surface of the bulk spacer material wafer, of a portion of the wafer that is to serve as the spacer to a different etch responsiveness from that of the bulk spacer material.Type: GrantFiled: June 18, 1999Date of Patent: January 30, 2001Assignee: International Business Machines CorporationInventors: Raul Edmundo Acosta, Marie Angelopoulos, Steven Allen Cordes
-
Patent number: 6159642Abstract: An exposure mask includes a transparent substrate having a light shielding pattern and an aperture pattern thereon for transmitting an exposure light and arranged in that any two adjacent apertures of the same pattern size in the aperture pattern are different from each other in the etched depth, wherein a difference between the aperture pattern size and its adjacent light shielding pattern size, and the trench depth in the aperture pattern are determined by a sum of the aperture pattern size and its adjacent light shielding pattern size.Type: GrantFiled: March 7, 1997Date of Patent: December 12, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Kawano, Shinichi Ito, Satoshi Tanaka, Soichi Inoue, Hideki Kanai, Ikuo Yoneda
-
Patent number: 6156217Abstract: A method for the purpose of producing a stencil mask, which comprises a sheet having structures in the form of orifices, wherein the method comprises the following sequence of steps:a) selecting a planar, two-dimensional substrate consisting of a specific material comprising a thickness greater than 50 .mu.m,b) producing a thin layer, the so-called intermediate layer on the upper side of the substrate,c) structuring this intermediate layer by means of a lithographic process with the structures for the mask which is to be produced,d) etching the lower side of the substrate at least in the region of the structures provided for the mask orifices, until the substrate comprises in this region a predetermined membrane thickness less than 50 .mu.m,e) etching the upper side of the membrane using the structured intermediate layer as a masking layer, in order to form in this membrane the orifices of the mask which orifices correspond to the structures of the intermediate layer, andf) removing the intermediate layer.Type: GrantFiled: April 30, 1999Date of Patent: December 5, 2000Assignee: IMS-Ionen Mikrofabrikations Systeme GmbHInventors: Ernst Hammel, Hans Loschner, Ivaylo W. Rangelow
-
Patent number: 6150280Abstract: The present invention provides an electron-beam cell projection aperture formation method comprising: a step of applying a converged ion beam to a top surface of a substrate so as to be etched to a depth enabling to obtain a sufficient film thickness for absorbing or scattering an electron-beam thereby to form an opening of a desired pattern on the top surface; and a step of uniformly applying the converged ion beam to a back surface of the substrate, excluding a hem portion thereof, so as to be etched to a depth reaching the opening.Type: GrantFiled: February 24, 1999Date of Patent: November 21, 2000Assignee: NEC CorporationInventor: Hiroshi Yamashita
-
Patent number: 6143652Abstract: A method for forming a high-quality aluminum-copper alloy pattern over a semiconductor substrate. The method first forms an aluminum-copper alloy layer over a semiconductor substrate, and then performs a rapid thermal processing operation to remelt copper extracts into the alloy bulk. Subsequently, a photoresist layer is formed over the alloy layer. Finally, the alloy layer is etched to transfer the pattern from the photoresist layer to the metallic alloy layer. Unlike a conventional method that can lead to abnormal conduction due to the presence of extracts that are difficult to etch, this invention uses a thermal operation to remove the extracts before etching is conducted. Hence, the masking effect due to etching is mostly prevented.Type: GrantFiled: April 21, 1998Date of Patent: November 7, 2000Assignee: United Semiconductor CorporationInventor: Chia-Chieh Yu
-
Patent number: 6136480Abstract: A method for fabricating photomasks including forming a resist layer located over a substrate, and heating the substrate at a temperature greater than the glass transition temperature of the resist, such that the resist layer flows. In this manner, defects such as pinholes within the resist layer are reduced.Type: GrantFiled: April 27, 1999Date of Patent: October 24, 2000Assignee: Micron Technology, Inc.Inventor: Christophe Pierrat