Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
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Patent number: 11261346Abstract: The present invention provides a polishing composition for use in polishing a material having a Vickers hardness of 1500 Hv or higher. The polishing composition comprises an alumina abrasive and water. The alumina abrasive has an isoelectric point that is below 8.0 and is lower than the pH of the polishing composition.Type: GrantFiled: March 22, 2017Date of Patent: March 1, 2022Assignee: FUJIMI INCORPORATEDInventor: Tomoaki Ishibashi
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Patent number: 11262347Abstract: A chip for blood plasma separation includes: (i) a body part, in which a sealed space through which blood can flow is integrally formed and the channel part and a ridge are alternately and continuously formed; (ii) an inflow part, which is disposed at an upper region of the body part into which the blood inflows; (iii) an outlet for discharging blood cells located at one side surface of the body part; and (iv) an outlet for discharging blood plasma located at the other side surface of the body part, in which the ridge is formed discretely, a chip array for blood plasma separation including the chip for blood plasma separation, a device for blood plasma separation including the chip for blood plasma separation and/or the chip array for blood plasma separation, and a method for blood plasma separation using the device.Type: GrantFiled: May 3, 2018Date of Patent: March 1, 2022Assignee: CURIOSIS CO., LTD.Inventors: Ho Young Yun, Sung Young Choi
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Patent number: 11211258Abstract: A method for DRIE matched release and/or the mitigation of photo resist pooling, comprising: depositing a first mask layer over a first surface of a silicon substrate; exposing a first portion and second portion of the first mask layer to a first etch process, wherein the exposing forms a first exposed layer; depositing a second mask layer over the first mask layer; exposing a third portion of the second mask layer to a second etch process, wherein the exposing forms a second exposed mask layer, and wherein the third portion overlaps the first portion of the first mask layer; developing the second mask layer and etching the third portion of the second mask layer and developing the first portion of the first mask layer; etching the first portion of the first mask layer to a first depth; and developing the first mask layer to reveal exposed portions of the first mask layer and etching the second portion of the silicon substrate to a second depth.Type: GrantFiled: April 8, 2020Date of Patent: December 28, 2021Assignee: INVENSENSE, INC.Inventor: Ian Flader
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Patent number: 11189496Abstract: Disclosed are a plasma reactor for ultra-high aspect ratio etching and an etching method therefor, wherein the plasma reactor comprises: a reaction chamber inside which a reaction space is formed; a base disposed at the bottom of the reaction space and configured for supporting a to-be-processed substrate; a gas showerhead disposed at the top inside the reaction chamber; wherein a first radio frequency power supply outputs a radio frequency power with a first frequency to the base or the gas showerhead so as to form and maintain plasma in the reaction chamber; and a second radio frequency power supply which outputs a radio frequency power with a second frequency to the base so as to control the ion energy incident to the base; wherein the first frequency is not less than 4 MHz, and the second frequency is not less than 10 KHz but not more than 300 KHz.Type: GrantFiled: January 15, 2020Date of Patent: November 30, 2021Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT INC. CHINAInventors: Gerald Zheyao Yin, Yichuan Zhang, Jie Liang, Xingcai Su, Tuqiang Ni
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Patent number: 11169327Abstract: The method for manufacturing the heterojunction circuit according to one embodiment of the present disclosure comprises depositing a first electrode on at least a part of a waveguide, moving a semiconductor comprising a second electrode at a lower end thereof onto the first electrode, and depositing a third electrode on an upper end of the semiconductor, wherein the waveguide and the semiconductor comprise different materials. Additionally, the moving step further comprises generating microbubbles by supplying heat to at least a part of the semiconductor, moving the semiconductor on the first electrode by moving the generated microbubbles, and removing the microbubbles by positioning the semiconductor on the first electrode.Type: GrantFiled: August 4, 2020Date of Patent: November 9, 2021Assignee: Korea Advanced Institute of Science and TechnologyInventors: Kyoungsik Yu, Youngho Jung
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Patent number: 11161734Abstract: Disclosed a MEMS assembly and a manufacturing method thereof. The manufacturing method comprises: forming a groove on a sensor chip; forming a bonding pad on a circuit chip; bonding the sensor chip and the circuit chip together to form a bonding assembly; performing a first dicing process at a first position of the sensor chip to penetrate through the sensor chip to the groove; performing a second dicing process at a second position of the sensor chip to penetrate through the sensor chip and the circuit chip, for obtaining an individual MEMS assembly by singulating the bonding assembly, wherein location of the groove corresponds to a position of the bonding pad, and an opening is formed in the sensor chip to expose the bonding pad when the second dicing process is performed. The method uses two dicing process respectively achieving different depths to expose the bonding pad of the sensor chip and singulate the MEMS assembly, respectively, to improve yield and reliability.Type: GrantFiled: December 18, 2018Date of Patent: November 2, 2021Assignees: HANGZHOU SILAN INTEGRATED CIRCUITS CO., LTD., HANGZHOU SILAN MICROELECTRONICS CO., LTD.Inventors: Yongxiang Wen, Chen Liu, Feng Ji, XiaoLi Zhang
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Patent number: 11155285Abstract: An optical system (100) for a light emitting diode (LED) signal includes a plurality of light emitting diodes (LEDs) (12, 14), a plurality of optical lenses (20, 40, 60, 80) for diverging and collimating light generated by the plurality of LEDs (12, 14), wherein the plurality of LEDs (12, 14) and the plurality of optical lenses (20, 40, 60, 80) are sequentially arranged in an axial direction, and wherein the plurality of optical lenses (20, 40, 60, 80) are configured such that by altering an axial position of one of the optical lenses (20, 40, 60, 80) from a first defined axial position to a second defined axial position, a final angular light distribution of the optical system (100) is variable.Type: GrantFiled: June 28, 2016Date of Patent: October 26, 2021Assignee: Siemens Mobility, Inc.Inventors: Axel Beier, Volker Türck
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Patent number: 11149200Abstract: A composition for etching and a method of manufacturing a semiconductor device, the method including an etching process of using the composition for etching, are provided. The composition for etching includes a first inorganic acid; any one first additive selected from the group consisting of phosphorous acid, an organic phosphite, a hypophosphite, and mixtures thereof; and a solvent. The composition for etching is a high-selectivity composition for etching that can selectively remove a nitride film while minimizing the etch rate for an oxide film and does not have a problem such as particle generation, which adversely affects device characteristics.Type: GrantFiled: October 28, 2016Date of Patent: October 19, 2021Inventors: Jung Hun Lim, Jin Uk Lee, Jae Wan Park
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Patent number: 11126021Abstract: A method for manufacturing a semiconductor optical device includes the steps of forming a first semiconductor layer on a substrate; forming a mask on the first semiconductor layer; forming a first mesa from the first semiconductor layer using the mask; forming an embedding layer on a portion of the first semiconductor layer that is exposed from the mask such that the first mesa is embedded in the embedding layer; and forming a second mesa from the first mesa.Type: GrantFiled: August 4, 2020Date of Patent: September 21, 2021Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Tomokazu Katsuyama
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Patent number: 11053116Abstract: The present invention discloses a Micro-Electro-Mechanical System (MEMS) acoustic pressure sensor device and a method for making same. The MEMS device includes: a substrate; a fixed electrode provided on the substrate; and a multilayer structure, which includes multiple metal layers and multiple metal plugs, wherein the multiple metal layers are connected by the multiple metal plugs. A cavity is formed between the multilayer structure and the fixed electrode. Each metal layer in the multilayer structure includes multiple metal sections. The multiple metal sections of one metal layer and those of at least another metal layer are staggered to form a substantially blanket surface as viewed from a moving direction of an acoustic wave.Type: GrantFiled: August 10, 2018Date of Patent: July 6, 2021Assignee: PIXART IMAGING INCORPORATIONInventor: Chuan-Wei Wang
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Patent number: 11047875Abstract: An inertial sensor includes a substrate and a structure disposed on the substrate. The structure includes a detection movable body which overlaps the substrate in a direction along a Z-axis and includes a movable detection electrode, a detection spring that supports the detection movable body, a drive portion that drives the detection movable body in a direction along an X-axis with respect to the substrate, a fixed detection electrode fixed to the substrate and facing the movable detection electrode, a first compensation electrode for applying an electrostatic attraction force having a first direction component different from the direction along the X-axis to the detection movable body, and a second compensation electrode for applying an electrostatic attraction force having a second direction component opposite to the first direction component to the detection movable body.Type: GrantFiled: January 15, 2020Date of Patent: June 29, 2021Assignee: Seiko Epson CorporationInventor: Teruo Takizawa
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Patent number: 11033862Abstract: Disclosed is a method of manufacturing a partially freestanding two-dimensional crystal film (16, 16?), the method comprising providing a substrate (10) carrying a catalyst layer (14) for forming the two-dimensional crystal layer on a first surface; forming the two-dimensional crystal film on the catalyst layer; covering at least the two-dimensional crystal film with a protective layer (18); etching a cavity (24) in a second surface of the substrate, the second surface being opposite to the first surface, said cavity terminating on the catalyst layer; etching the exposed part of the catalyst layer from the cavity; and removing the protective layer, thereby obtaining a two-dimensional crystal film that is freestanding over said cavity. A device manufactured in this manner is also disclosed.Type: GrantFiled: April 21, 2014Date of Patent: June 15, 2021Assignee: Koninklijke Philips N.V.Inventors: Kamal Asadi, Johan Hendrik Klootwijk
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Patent number: 11027969Abstract: A micro-device including at least one first element comprising at least: a portion of material corresponding to a compound of at least one semi-conductor and at least one metal, first and second protective layers each covering one of two opposite faces of said portion of material, such that the first and second protective layers are in direct contact with said portion of material, that the first protective layer comprises at least one first material able to withstand an HF etching, that the second protective layer comprises at least one second material able to withstand the HF etching, and that at least one of the first and second materials able to withstand the HF etching includes the semi-conductor.Type: GrantFiled: September 21, 2018Date of Patent: June 8, 2021Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventor: Stephanus Louwers
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Patent number: 11020345Abstract: Microdevices containing a chamber bound on one side by a nanoporous membrane are provided. The nanoporous membrane may contain hollow nanotubes that extend through the nanoporous membrane, from one surface to the other, and extend beyond the surface of the nanoporous membrane opposite the surface interfacing with the chamber. The nanotubes may provide a fluidic conduit between an environment external to the microdevice and the chamber, which is otherwise substantially fluid-tight. Also provided are methods of making a microdevice and methods of using the microdevices.Type: GrantFiled: March 14, 2017Date of Patent: June 1, 2021Assignee: The Regents of the University of California The Board of Trustees of the Leland Stanford Junior University StanfordInventors: Cade B. Fox, Hariharasudhan Chirra Dinakar, Nicholas A. Melosh, Tejal A. Desai
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Patent number: 11011548Abstract: An electronic device includes a plurality of layers formed on a silicon-on-insulator (SOI) substrate. The SOI substrate includes a support substrate, a buried insulating layer formed on the support substrate, and a silicon layer formed on the buried insulating layer. A membrane structure of the electronic device includes the plurality of layers, the buried insulating later and the silicon layer but does not include the support substrate. A passivation film covers an upper surface and a side surface of the membrane structure.Type: GrantFiled: April 30, 2019Date of Patent: May 18, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Junko Izumitani
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Patent number: 10994540Abstract: A substrate having an obliquely running through hole is manufactured by arranging first and second masks each having an opening pattern on first and second surfaces, respectively, of the substrate, then forming cavities each facing an opening of the opening patterns from the respective surfaces by anisotropic dry etching, and making the cavities formed from the first surface and the cavities formed from the second surface communicate with each other to produce the through hole. The opening pattern of the first mask and the opening pattern of the second mask are arranged adjacently to or partially overlapping with each other as viewed from the direction orthogonal to the substrate. The opening area of at least one of the openings of the first and second masks are increased along the direction from the mask including the at least one opening toward the oppositely disposed mask.Type: GrantFiled: October 30, 2019Date of Patent: May 4, 2021Assignee: CANON KABUSHIKI KAISHAInventor: Atsunori Terasaki
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Patent number: 10957819Abstract: A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.Type: GrantFiled: September 11, 2019Date of Patent: March 23, 2021Assignee: UNM RAINFOREST INNOVATIONSInventors: Steven R. J. Brueck, Seung-Chang Lee, Christian Wetzel, Mark Durniak
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Patent number: 10955722Abstract: An object of the present invention is to provide a single drive type optical modulator having good high-frequency characteristics and reduced wavelength chirp of the modulated light.Type: GrantFiled: February 5, 2020Date of Patent: March 23, 2021Assignee: TDK CORPORATIONInventors: Shinji Iwatsuka, Kenji Sasaki
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Patent number: 10948366Abstract: A flexible sensor includes a first electrode, a second electrode, and a piezoresistive element incorporating piezoresistive composite material arranged between the first electrode and the second electrode. Piezoresistive composite materials include a thermoplastic elastomer (TPE) and a conductive filler material (e.g., carbon), may have an elastic modulus value of preferably less than about 1×10?3 GPa, and exhibit a change in electrical resistance responsive to a change in pressure applied thereto. Exemplary flexible sensors may have a thickness and a feel similar to human skin, may be amenable to simple fabrication techniques (e.g., fused filament fabrication (FFF) three-dimensional (3D) printing or molding), and can be manufactured into user-specific geometries.Type: GrantFiled: October 4, 2017Date of Patent: March 16, 2021Assignee: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITYInventors: Jeffrey LaBelle, Steven Lathers
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Patent number: 10943931Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.Type: GrantFiled: November 26, 2019Date of Patent: March 9, 2021Assignee: X Display Company Technology LimitedInventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr
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Patent number: 10911023Abstract: Acoustic resonator devices and methods are disclosed. An acoustic resonator device includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces. An aluminum oxide etch-stop layer is sandwiched between the surface of the substrate and the back surface of the piezoelectric plate, a portion of the piezoelectric plate and the etch-stop layer forming a diaphragm spanning a cavity in the substrate. An interdigital transducer (IDT) is formed on the front surface of the single-crystal piezoelectric plate with interleaved fingers of the IDT disposed on the diaphragm. The aluminum oxide etch-stop layer is impervious to an etch process used to form the cavity.Type: GrantFiled: July 20, 2020Date of Patent: February 2, 2021Assignee: Resonant Inc.Inventor: Patrick Turner
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Patent number: 10894712Abstract: An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.Type: GrantFiled: May 9, 2018Date of Patent: January 19, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Simon Joshua Jacobs
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Patent number: 10884188Abstract: A method for creating a random anti-reflective surface structure on an optical fiber including a holder configured to hold the optical fiber comprising a groove and a fiber connector, an adhesive material to hold the optical fiber in the holder and fill any gap between the optical fiber and the holder, a glass to cover the adhesive material and the optical fiber, and a reactive ion etch device. The reactive ion etch device comprises a plasma and is configured to expose an end face of the optical fiber to the plasma. The plasma is configured to etch a random anti-reflective surface structure on the end face of the optical fiber.Type: GrantFiled: May 14, 2020Date of Patent: January 5, 2021Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Jesse A. Frantz, Lynda E. Busse, Jason D. Myers, L. Brandon Shaw, Jasbinder S. Sanghera, Ishwar D. Aggarwal, Catalin M. Florea
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Patent number: 10866203Abstract: A stress sensor comprises: a diaphragm; an intermediate layer disposed on a surface of the diaphragm; a sensitive membrane disposed on the intermediate layer; and a piezoresistive element disposed in a region of the diaphragm in contact with an outer edge of the intermediate layer.Type: GrantFiled: March 29, 2017Date of Patent: December 15, 2020Assignee: KYOCERA CorporationInventors: Kyohei Kobayashi, Ryo Ueno, Shinichi Abe, Hisashi Sakai, Masaru Nagata, Takanori Yasuda
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Patent number: 10864270Abstract: Methods, systems, and devices are disclosed for fabricating and implementing nanoscale and microscale structured carriers to provide guided, targeted, and on-demand delivery of molecules and biochemical substances for a variety of applications including diagnosis and/or treatment (theranostics) of diseases in humans and animals. In some aspects, a nanostructure carrier can be synthesized in the form of a nanobowl, which may include an actuatable capping particle that can be opened (and in some implementations, closed) on demand. In some aspects, a nanostructure carrier can be synthesized in the form of a hollow porous nanoparticle with a functionalized interior and/or exterior to attach payload substances and substances for magnetically guided delivery and controlled release of substance payloads.Type: GrantFiled: August 23, 2018Date of Patent: December 15, 2020Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Ratneshwar Lal, Preston B. Landon, Alexander Mo
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Patent number: 10864358Abstract: A medical delivery device includes a first compartment configured to hold a first substance. The first compartment includes a first wall that includes a first ferrous material, and the first wall is configured to disintegrate and release the first substance into a patient in response to first electromagnetic radiation received by the first ferrous material. The medical delivery device also includes a second compartment attached to the first compartment and configured to hold a second substance. The second compartment includes a second wall that includes a second ferrous material, and the second wall is configured to disintegrate and release the second substance into the patient in response to second electromagnetic radiation received by the second ferrous material.Type: GrantFiled: July 18, 2019Date of Patent: December 15, 2020Inventor: Bernard Fryshman
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Patent number: 10838366Abstract: A micro-electromechanical systems (MEMS) driving arrangement for an electronic device, the micro-electromechanical systems (MEMS) driving arrangement including a driven wheel; a driving actuation assembly for causing rotation of the driven wheel; an indicator assembly including an indicator; and a force absorbing assembly coupled intermediate the indicator assembly and the driven wheel; whereby a force acting upon the indicator assembly is absorbed by the force absorbing assembly so as to inhibit rotation of the driven wheel relative to the driving actuation assembly.Type: GrantFiled: September 14, 2017Date of Patent: November 17, 2020Assignee: Timex Group USA, Inc.Inventors: Wolfgang Burkhardt, Michail Subarew, Heiko Hellriegel, Helmut Zachmann
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Patent number: 10802185Abstract: A transmissive optical element may include a substrate. The transmissive optical element may include a first anti-reflectance structure for a particular wavelength range formed on the substrate. The transmissive optical element may include a second anti-reflectance structure for the particular wavelength range formed on the first anti-reflectance structure. The transmissive optical element may include a third anti-reflectance structure for the particular wavelength range formed on the second anti-reflectance structure. The transmissive optical element may include at least one layer disposed between the first anti-reflectance structure and the second anti-reflectance structure or between the second anti-reflectance structure and the third anti-reflectance structure.Type: GrantFiled: July 24, 2018Date of Patent: October 13, 2020Assignee: Lumentum Operations LLCInventors: John Michael Miller, Gonzalo Wills
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Patent number: 10802045Abstract: A large radius probe for a surface analysis instrument such as an atomic force microscope (AFM). The probe is microfabricated to have a tip with a hemispherical distal end or apex. The radius of the apex is the range of about a micron making the probes particularly useful for nanoindentation analyses. The processes of the preferred embodiments allow such large radius probes to be batch fabricated to facilitate cost and robustness.Type: GrantFiled: March 26, 2018Date of Patent: October 13, 2020Assignee: Bruker Nano, Inc.Inventor: Jeffrey Wong
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Patent number: 10801945Abstract: An inline particle sensor includes a sensor head configured to mount within a fitting, the sensor head including a laser source sealed and isolated from a sensing volume and configured to emit a laser beam through the sensing volume and a detector arranged to detect particles in the sensing volume that pass through the laser beam. The vacuum particle sensor further includes electronics coupled to the sensor head and configured to receive a signal indicative of the particles from the detector and provide a particle output based on the signal.Type: GrantFiled: April 10, 2019Date of Patent: October 13, 2020Assignee: CyberOptics CorporationInventors: Felix J. Schuda, Ferris J. Chen
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Patent number: 10796919Abstract: Methods for fabricating semiconductor devices include forming a fin-type pattern protruding on a substrate, forming a gate electrode intersecting the fin-type pattern, forming a first recess adjacent to the gate electrode and within the fin-type pattern by using dry etching, forming a second recess by treating a surface of the first recess with a surface treatment process including a deposit process and an etch process, and forming an epitaxial pattern in the second recess.Type: GrantFiled: October 6, 2016Date of Patent: October 6, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-Hyuk Kim, Gi-Gwan Park, Tae-Young Kim, Dong-Suk Shin
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Patent number: 10773950Abstract: An MEMS microphone device and an electronics apparatus are provided. The MEMS microphone device comprises: a substrate; a MEMS microphone element placed on the substrate; a cover encapsulating the MEMS microphone element together with the substrate; and an acoustic port for the MEMS microphone element, wherein a compliant membrane is provided to seal the acoustic port, and the membrane has a mechanical stiffness lower than that of the diaphragm of the MEMS microphone element.Type: GrantFiled: October 8, 2016Date of Patent: September 15, 2020Assignee: WEIFANG GOERTEK MICROELECTRONICS CO., LTD.Inventor: Quanbo Zou
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Patent number: 10768202Abstract: The presently disclosed subject matter provides systems and methods for generating nanostructures from tribological films. A probe tip can be immersed in a liquid mixture comprising a plurality of ink particles suspended in a medium. A substrate on which the tribological film is to be generated can also be immersed in the liquid mixture. A processor controlling movement of the probe tip can be configured to cause the probe tip to slide along the substrate in a shape of a desired pattern of the nanostructure with a contact force to cause one or more ink particles of the plurality of ink particles compressed underneath the probe tip to be transformed into a tribological film onto the substrate in the shape of the desired pattern of the nanostructure.Type: GrantFiled: August 29, 2016Date of Patent: September 8, 2020Assignee: THE TRUSTEES OF THE UNIVERSITY OF PENNSYLVANIAInventors: Robert W. Carpick, Harmandeep S. Khare, Nitya Nand Gosvami, Imene Lahouij
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Patent number: 10745273Abstract: MEMS switches and methods of manufacturing MEMS switches is provided. The MEMS switch having at least two cantilevered electrodes having ends which overlap and which are structured and operable to contact one another upon an application of a voltage by at least one fixed electrode.Type: GrantFiled: June 20, 2017Date of Patent: August 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen E. Luce, Anthony K. Stamper
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Patent number: 10737936Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer; wherein the plurality of scribe lines protrudes from a third surface of the second wafer, and the third surface is between the first surface and the second surface.Type: GrantFiled: May 31, 2016Date of Patent: August 11, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Wei-Cheng Shen, Yi-Hsien Chang, Yi-Heng Tsai, Chun-Ren Cheng
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Patent number: 10743109Abstract: An acoustic liquid transfer system that includes a processor; a source holding component configured to hold a source microplate; a destination holding component configured to hold a destination microplate; an acoustic transducer configured to cause liquid to transfer between the source and destination microplates; and a controller configured to direct movements, according to an ordered picklist, of one or more of the: source holding component, destination holding component, and acoustic transducer.Type: GrantFiled: March 10, 2020Date of Patent: August 11, 2020Assignee: Recursion Pharmaceuticals, Inc.Inventors: Nicholas Campbell, Charles Baker
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Patent number: 10741398Abstract: A method for forming reliefs on a face of a substrate is provided, successively including forming a protective screen for protecting at least a first zone of the face; an implanting to introduce at least one species comprising carbon into the substrate from the face of the substrate, the forming of the protective screen and the implanting being configured to form, in the substrate, at least one carbon modified layer having a concentration of implanted carbon greater than or equal to an etching threshold only from a second zone of the face of the substrate not protected by the protective screen; removing the protective screen; and etching the substrate from the first zone selectively with respect to the second zone.Type: GrantFiled: February 2, 2018Date of Patent: August 11, 2020Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Lamia Nouri, Stefan Landis, Nicolas Posseme
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Patent number: 10679846Abstract: The present disclosure involves forming a porous low-k dielectric structure. A plurality of conductive elements is formed over the substrate. The conductive elements are separated from one another by a plurality of openings. A barrier layer is formed over the conductive elements. The barrier layer is formed to cover sidewalls of the openings. A treatment process is performed to the barrier layer. The barrier layer becomes hydrophilic after the treatment process is performed. A dielectric material is formed over the barrier layer after the treatment process has been performed. The dielectric material fills the openings and contains a plurality of porogens.Type: GrantFiled: June 25, 2018Date of Patent: June 9, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Bo-Jiun Lin, Hai-Ching Chen, Tien-I Bao
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Patent number: 10668436Abstract: Provided are monolithic structures comprising one or more suspended, nanoporous membranes that are in contact with one or more fluidic cavities, methods of making same, and exemplary uses of same. The monolithic structures can be formed using a transmembrane etch. The monolithic structures can be used, as examples, as filters and filtration modules in microfluidic devices, dialysis devices, and concentration devices in laboratory, industrial, and medical processes.Type: GrantFiled: October 31, 2016Date of Patent: June 2, 2020Assignee: SiMPore Inc.Inventors: Christopher C. Striemer, Joshua J. Miller, Jon-Paul S. Desormeaux, James A. Roussie
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Patent number: 10649338Abstract: The present invention has an object of providing a stepped wafer that can prevent a resist from remaining after development, and a method for manufacturing the stepped wafer. The stepped wafer according to the present invention is a stepped wafer having a step and whose main surface is thinner in a center portion and is thicker in an outer periphery. The step includes a curved surface with a radius of curvature ranging from 300 ?m to 1800 ?m.Type: GrantFiled: July 8, 2015Date of Patent: May 12, 2020Assignee: Mitsubishi Electric CorporationInventor: Naoyuki Takeda
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Patent number: 10625445Abstract: Disclosed is a method for manufacturing a substrate-integrated gasket using screen printing. The method includes: a step for forming, on a surface of a substrate by means of screen printing, a coating layer of a paste for forming a gasket; and a step for hardening the coating layer by pressing, at a predetermined height, a coating layer correction member to the coating layer. The cross-sectional shape of the coating layer formed on the surface of the substrate is corrected by means of the coating layer correction member, and in such state, the coating layer hardens to be a gasket, thereby forming a gasket having a highly accurate cross-sectional shape.Type: GrantFiled: June 2, 2016Date of Patent: April 21, 2020Assignee: NOK CORPORATIONInventors: Hajime Yui, Tetsuya Urakawa, Kenichi Oba
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Patent number: 10622247Abstract: A cost effective process flow for manufacturing semiconductor on insulator structures is parallel is provided. Each of the multiple semiconductor-on-insulator composite structures prepared in parallel includes a charge trapping layer (CTL).Type: GrantFiled: February 14, 2017Date of Patent: April 14, 2020Assignee: GlobalWafers Co., Ltd.Inventors: Igor Peidous, Andrew M Jones, Srikanth Kommu, Horacio Josue Mendez
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Patent number: 10611631Abstract: In described examples, a cavity is formed between a substrate and a cap. One or more access holes are formed through the cap for removing portions of a sacrificial layer from within the cavity. A cover is supported by the cap, where the cover is for occulting the one or more access holes along a perspective. An encapsulant seals the cavity, where the encapsulant encapsulates the cover and the one or more access holes.Type: GrantFiled: December 18, 2017Date of Patent: April 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Jose Antonio Martinez
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Patent number: 10589988Abstract: A mechanical component has: a mounting; a movable part which, with the aid of at least one first spring and one second spring, is connected to the mounting in such a way that the movable part is movable about a rotational axis extending through a first anchoring area of the first spring on the mounting and a second anchoring area of the second spring on the mounting; a first sensor device with at least one first resistor which is situated on and/or in the first spring; and a second sensor device with at least one second resistor situated on and/or in the second spring. The first sensor device includes a first Wheatstone half bridge and the second sensor device includes a second Wheatstone half bridge. The first and second Wheatstone half bridges are connected to form a Wheatstone full bridge.Type: GrantFiled: October 23, 2013Date of Patent: March 17, 2020Assignee: Robert Bosch GmbHInventors: Wolfgang Heinzelmann, Mohamad Iyad Al Dibs, Rainer Straub, Stefan Pinter, Frederic Njikam Njimonzie, Joerg Muchow, Helmut Grutzeck, Simon Armbruster, Sebastian Reiss
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Patent number: 10589992Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.Type: GrantFiled: March 16, 2018Date of Patent: March 17, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
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Patent number: 10582617Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.Type: GrantFiled: July 21, 2017Date of Patent: March 3, 2020Assignee: Intersil Americas LLCInventors: Jian Yin, Nikhil Kelkar, Loyde M. Carpenter, Jr., Nattorn Pongratananukul, Patrick J. Selby, Steven R. Rivet, Michael W. Althar
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Patent number: 10570011Abstract: A method for fabricating a microelectromechanical system device. Submerging a microelectromechanical system device in water. The microelectromechanical system devices include a sacrificial layer deposited on the surface of a substrate between the portion of a structural layer to be freed for movement and a base. Anodically etching the sacrificial layer from the microelectromechanical device to free the portion of the structural layer for movement. A system comprising a solution of water, a microelectromechanical system device including a sacrificial layer of chromium deposited on the surface of a substrate between a portion of a structural layer and a base. The microelectromechanical system device is submerged in the solution of water. An electrode is submerged in the water. The electrode provides a negative bias. A voltage source provides a positive bias to the sacrificial layer of chromium, anodically etching the sacrificial layer of chromium and freeing the portion of the structural layer.Type: GrantFiled: August 30, 2018Date of Patent: February 25, 2020Assignee: United States of America as represented by Secretary of the NavyInventors: Paul D. Swanson, Andrew Wang
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Patent number: 10563307Abstract: A method for manufacturing a substrate with less warpage includes a step of forming SiC film 121 on a surface of Si substrate 11, a step of removing bottom surface RG2 which is at least a part of the Si substrate 11 contacting with the SiC film 121, and a step of forming another SiC film on a surface of SiC film 121 after the step of removing the bottom surface RG2.Type: GrantFiled: June 9, 2017Date of Patent: February 18, 2020Assignee: AIR WATER INC.Inventors: Hidehiko Oku, Ichiro Hide
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Patent number: 10558169Abstract: A method for manufacturing a micromechanical timepiece part starting from a silicon-based substrate, including, forming pores on the surface of at least one part of a surface of said silicon-based substrate of a determined depth, entirely filling the pores with a material chosen from diamond, diamond-like carbon, silicon oxide, silicon nitride, ceramics, polymers and mixtures thereof, in order to form, in the pores, a layer of the material of a thickness at least equal to the depth of the pores. A micromechanical timepiece part including a silicon-based substrate which has, on the surface of at least one part of a surface of the silicon-based substrate, pores of a determined depth, the pores being filled entirely with a layer of a material chosen from diamond, diamond-like carbon, silicon oxide, silicon nitride, ceramics, polymers and mixtures thereof, of a thickness at least equal to the depth of the pores.Type: GrantFiled: August 9, 2016Date of Patent: February 11, 2020Assignee: Nivarox-FAR S.A.Inventor: Philippe Dubois
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Patent number: 10553499Abstract: A method can be used for fabricating first and second semiconductor regions separated by isolating trenches. A semiconductor substrate is covered with silicon nitride. The silicon nitride situated above the first region is doped by ion implantation. Trenches are etched through the silicon nitride and the doped silicon nitride is partially etching in an isotropic manner. The trenches are filled with an insulator to a level situated above that of the first region. The silicon nitride is removed resulting in the edges of the first region only being covered with an insulator annulus.Type: GrantFiled: May 31, 2018Date of Patent: February 4, 2020Assignee: STMICROELECTRONICS (ROUSSET) SASInventors: Franck Julien, Frédéric Chairat, Noémie Blanc, Emmanuel Blot, Philippe Roux, Gerald Theret