Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
  • Publication number: 20140209562
    Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by the following operations: (a) exposing the substrate surface to a first reactant in vapor phase under conditions allowing the first reactant to adsorb onto the substrate surface; (b) exposing the substrate surface to a second reactant in vapor phase while the first reactant is adsorbed on the substrate surface; and (c) exposing the substrate surface to plasma to drive a reaction between the first and second reactants adsorbed on the substrate surface to form the film.
    Type: Application
    Filed: March 31, 2014
    Publication date: July 31, 2014
    Applicant: Novellus Systems, Inc.
    Inventors: Adrien LaVoie, Shankar Swaminathan, Hu Kang, Ramesh Chandrasekharan, Tom Dorsh, Dennis M. Hausmann, Jon Henri, Thomas Jewell, Ming Li, Bryan Schlief, Antonio Xavier, Thomas W. Mountsier, Bart J. van Schravendijk, Easwar Srinivasan, Mandyam Sriram
  • Patent number: 8791021
    Abstract: Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF6/O2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from ?80 degrees Celsius to ?140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: July 29, 2014
    Assignee: King Abdullah University of Science and Technology
    Inventors: Mohamed Serry, Andrew Rubin, Mohamed Refaat, Sherif Sedky, Mohammad Abdo
  • Publication number: 20140199015
    Abstract: Embodiments of the present disclosure describe techniques and configurations for decreasing optical loss in a wave-guide of a modulator device. In one embodiment, an apparatus includes a substrate, and a waveguide of a modulator device formed on the substrate, the waveguide having a first portion that is configured to receive light for propagation along the waveguide, a second portion that includes two slots formed in the waveguide that merge into a single slot, the second portion being coupled with the first portion, a third portion that includes the single slot formed in the waveguide, the third portion being coupled with the second portion, a fourth portion that includes another two slots formed in the waveguide, the another two slots branching from the single slot, the fourth portion being coupled with the third portion, and a fifth portion that is configured to output the propagated light, the fifth portion being coupled with the fourth portion. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 22, 2011
    Publication date: July 17, 2014
    Inventors: Peter L. Chang, Jia-Hung Tseng
  • Publication number: 20140197129
    Abstract: Scan step (S3) for moving a nozzle with etching liquid discharged therefrom is carried out such that etching liquid application position toward the rotating substrate moves from the edge portion toward the center portion of the principal face of the substrate. Thereafter, center discharging step (S4) for continuing the supply of the etching liquid toward the principal face of the substrate under the condition that the application position is positioned at the center portion of the principal face of the substrate W is conducted. Moving velocity of the liquid application position in the scan step (S3) is determined in accordance with supply condition of the etching liquid toward the substrate under the condition that the liquid application position is positioned at the center portion of the principal face of the substrate.
    Type: Application
    Filed: January 2, 2014
    Publication date: July 17, 2014
    Applicant: DAINIPPON SCREEN MFG. CO., LTD.
    Inventors: Tatsuya FUJII, Toru ENDO
  • Patent number: 8778200
    Abstract: A method for manufacturing a liquid discharge head including a substrate on which supply ports for supplying a liquid are provided, includes forming a first supply port among the supply ports by performing crystal anisotropic etching on the substrate from one surface of the substrate, and forming a plurality of second supply ports among the supply ports by performing dry etching on the substrate using a crystal anisotropic etching method from a surface exposed toward the one surface of the substrate to a rear surface so that the independent second supply ports are respectively opened on the rear surface.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: July 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiko Kubota, Akihiko Okano
  • Patent number: 8778194
    Abstract: A method is described for manufacturing a component having a through-connection. The method includes providing a substrate; forming a trench structure in the substrate, a substrate area which is completely surrounded by the trench structure being produced; forming a closing layer for closing off the trench structure, a cavity girded by the closing layer being formed in the area of the trench structure; removing substrate material from the substrate area surrounded by the closed-off trench structure; and at least partially filling the substrate area surrounded by the closed-off trench structure with a metallic material. A component having a through-connection is also described.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: July 15, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Jochen Reinmuth, Yvonne Bergmann
  • Patent number: 8778208
    Abstract: A method of making an article 2 comprising an ultra-thin sheet 26 of material secured at lateral regions to a support member, the method comprises laying the ultra-thin sheet on a substrate 20, forming the support member on the lateral regions of the ultra-thin sheet such that the lateral regions of the ultra-thin sheet are sandwiched between the support member and the substrate and adhered to the support member, and removing the substrate by vaporisation or by a dissolution step using a solvent, to leave the article. The ultra-thin sheet is supported around its periphery and has a central region in which the ultra-thin sheet is free from contact with any other material.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: July 15, 2014
    Assignee: Graphene Industries Limited
    Inventors: Peter Blake, Timothy John Booth
  • Patent number: 8771525
    Abstract: In one embodiment, a rotary device includes a multiwall nanotube that extends substantially perpendicularly from a substrate. A rotor may be coupled to an outer wall of the multiwall nanotube, be spaced apart from the substrate, and be free to rotate around an elongate axis of the multiwall nanotube.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: July 8, 2014
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: David J. Carter, Marc S. Weinberg, Eugene Cook, Peter Miraglia
  • Patent number: 8771528
    Abstract: A through-hole forming method includes steps of forming a first impurity region (102a) around a region where a through-hole is to be formed in the first surface of a silicon substrate (101), the first impurity region (102) being higher in impurity concentration than the silicon substrate (101), forming a second impurity region (102b) at a position adjacent to the first impurity region (102a) in the depth direction of the silicon substrate (101), the second impurity region (102b) being higher in impurity concentration than the first impurity region (102a), forming an etch stop layer (103) on the first surface, forming an etch mask layer (104) having an opening on the second surface of the silicon substrate (101) opposite to the first surface, and etching the silicon substrate (101) until at least the etch stop layer (103) is exposed via the opening.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: July 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keiichi Sasaki, Yukihiro Hayakawa
  • Patent number: 8771530
    Abstract: A method for producing a polarizing element includes: forming particulate materials of a metal halide on a glass substrate; forming a protective film that covers the particulate materials in a non-plasma environment; stretching the particulate materials by heating and stretching the glass substrate; and forming acicular metal particles by reducing the metal halide constituting the stretched particulate materials.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: July 8, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Yoshitomo Kumai
  • Patent number: 8764993
    Abstract: A method of making a porous SiOC membrane is provided. The method comprises disposing a SiOC layer on a porous substrate, and etching the SiOC layer to form through pores in the SiOC layer. A porous SiOC membrane having a network of pores extending through a thickness of the membrane is provided.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: July 1, 2014
    Assignee: General Electric Company
    Inventors: Atanu Saha, Salil Mohan Joshi, An-Ping Zhang
  • Patent number: 8759229
    Abstract: A method for manufacturing an epitaxial wafer that can reduce occurrence of a surface defect or a slip formed on an epitaxial layer is provided. The manufacturing method is characterized by comprising: a smoothing step of controlling application of an etchant to a wafer surface in accordance with a surface shape of a silicon wafer to smooth the wafer surface; and an epitaxial layer forming step of forming an epitaxial layer formed of a silicon single crystal on the surface of the wafer based on epitaxial growth.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: June 24, 2014
    Assignee: Sumco Corporation
    Inventors: Sakae Koyata, Kazushige Takaishi, Tomohiro Hashii, Katsuhiko Murayama, Takeo Katoh
  • Patent number: 8758633
    Abstract: Disclosed is a method for fabricating nanofluidic channels having a height of from about 1 nm to about 10 nm. Generally, the method includes formation of doped silicon parallel strips in a silicon substrate, formation of a native oxide layer on the substrate, and etching of the native oxide layer at one of the strips to form a channel of a depth of between about 1 nm and about 10 nm. The method also includes bonding a second wafer to the surface, the second wafer including through etched windows to provide probe contacts to two of the parallel strips during use. These parallel strips provide high-frequency transmission lines in the device that can provide broadband dielectric spectroscopy measurement within the nanochannels.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: June 24, 2014
    Assignee: Clemson University
    Inventors: Pingshan Wang, Chunrong Song
  • Patent number: 8748318
    Abstract: The invention includes methods of forming reticles configured for imprint lithography, methods of forming capacitor container openings, and methods in which capacitor container openings are incorporated into DRAM arrays. An exemplary method of forming a reticle includes formation of a radiation-imageable layer over a material. A lattice pattern is then formed within the radiation-imageable layer, with the lattice pattern defining a plurality of islands of the radiation-imageable layer. The lattice-patterned radiation-imageable layer is utilized as a mask while subjecting the material under the lattice-patterned layer to an etch which transfers the lattice pattern into the material. The etch forms a plurality of pillars which extend only partially into the material, with the pillars being spaced from one another by gaps. The gaps are subsequently narrowed with a second material which only partially fills the gaps.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 10, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej S. Sandhu
  • Publication number: 20140134711
    Abstract: A microstructured measurement chip (1) for optical measurement of properties of artificial or biological membranes (40), having a lower, translucent support layer (10) and at least one non-translucent main layer (20) disposed on top of the former, which layer has depressions (30) configured as measurement chambers, having an upper opening (25) and one or multiple inner side walls (26). In order to improve the measurement chip (1) in such a manner that biological systems can be measured with greater measurement accuracy and higher throughput, it is proposed that the side wall or the side walls (26) of the measurement chambers (30) have depressions (27) and/or elevations (28). The invention furthermore relates to a holder (200) for the measurement chips (1) as well as to a method for the production of the measurement chips (1) from a silicon wafer (300).
    Type: Application
    Filed: March 10, 2011
    Publication date: May 15, 2014
    Applicant: NANOSPOT GMBH
    Inventor: Guido Boese
  • Patent number: 8715514
    Abstract: Provided are a micro-electromechanical systems (MEMS) microphone and a method of manufacturing the same. A manufacturing process is simplified compared to a conventional art using both upper and lower substrate processes. Since defects which may occur during manufacturing are reduced due to the simplified manufacturing process, the manufacturing throughput is improved, and since durability of the MEMS microphone is improved, system stability against the external environment is improved.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: May 6, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Woo Lee, Kang Ho Park, Jong Dae Kim
  • Patent number: 8709264
    Abstract: A method of forming a Micro-Electro-Mechanical System (MEMS) includes forming a lower electrode on a first insulator layer within a cavity of the MEMS. The method further includes forming an upper electrode over another insulator material on top of the lower electrode which is at least partially in contact with the lower electrode. The forming of the lower electrode and the upper electrode includes adjusting a metal volume of the lower electrode and the upper electrode to modify beam bending.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: April 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Christopher V. Jahnes, Anthony K. Stamper
  • Patent number: 8702997
    Abstract: A method of balancing a microelectromechanical system comprises determining if a microelectromechanical system is balanced in a plurality of orthogonal dimensions, and if the microelectromechanical system is not balanced, selectively depositing a first volume of jettable material on a portion of the microelectromechanical system to balance the microelectromechanical system in the plurality of orthogonal dimensions. A jettable material for balancing a microelectromechanical system comprises a vehicle, and a dispersion of nano-particles within the vehicle, in which the total mass of jettable material deposited on the microelectromechanical system is equal to the weight percentage of nano-particles dispersed within the vehicle multiplied by the mass of jettable material deposited on the microelectromechanical system.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: April 22, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Pavel Kornilovich, Vladek Kasperchik, James William Stasiak
  • Publication number: 20140104687
    Abstract: A method for manufacturing a light transmissive optical component, includes a first etching process of forming a depressed portion by applying etching to a silicon region of a plate-shaped member, a thermal oxidation process of forming a silicon oxide film by thermally oxidizing an inner side surface of the depressed portion, and a nitride film formation process of forming a silicon nitride film that covers the silicon oxide film. Accordingly, it is possible to realize a manufacturing method for an optical component which is capable of uniformly forming a silicon oxide film on a semi-transmissive reflecting surface which is largely inclined (or nearly vertical) with respect to a substrate surface, and an optical component produced by this method.
    Type: Application
    Filed: April 4, 2012
    Publication date: April 17, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshihisa Warashina, Tomofumi Suzuki, Kohei Kasamori
  • Patent number: 8696919
    Abstract: A method for manufacturing a nozzle and an associated funnel in a single plate comprises providing the single plate, the plate being etchable; providing an etch resistant mask on the plate, the mask having a pattern, wherein the pattern comprises a first pattern part for etching the nozzle and a second pattern part for etching the funnel; covering one of the first pattern part and the second pattern part using a first cover; etching one of the nozzle and funnel corresponding to the pattern part not covered in step (c); removing the first cover; etching the other one of the nozzle and funnel; and removing the etch resistant mask.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 15, 2014
    Assignee: Oce-Technologies B.V.
    Inventors: René J. Van Der Meer, Hubertus M. J. M. Boesten, Maarten J. Bakker, David D. L. Wijngaards
  • Patent number: 8691099
    Abstract: A process for fabricating a MEMS device with movable comb teeth and stationary comb teeth. A single mask is used to define, during a series of processing steps, the location and width of both movable comb teeth and stationary comb teeth so as to assure self alignment of the comb teeth. MEMS devices are fabricated from a single multi-layer semi-conductor structure of semiconductor material and insulator material. In a preferred embodiment the process is employed to provide a MEMS mirror device having a movable structure, a movable frame, a first set of two torsional members, a first set of at least four comb drives, an outer fixed frame structure, a second set of two torsional members, and a second set of at least four comb drives.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: April 8, 2014
    Inventors: John Gritters, Ezekiel John Joseph Kruglick, Mathew Last
  • Patent number: 8679887
    Abstract: A method for manufacturing a micro-electro-mechanical device, which has supporting parts and operative parts, includes providing a first semiconductor wafer, having a first layer of semiconductor material and a second layer of semiconductor material arranged on top of the first layer, forming first supporting parts and first operative parts of the device in the second layer, forming temporary anchors in the first layer, and bonding the first wafer to a second wafer, with the second layer facing the second wafer. After bonding the first wafer and the second wafer together, second supporting parts and second operative parts of said device are formed in the first layer. The temporary anchors are removed from the first layer to free the operative parts formed therein.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: March 25, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Simone Sassolini, Mauro Marchi, Marco Del Sarto, Lorenzo Baldo
  • Patent number: 8679354
    Abstract: A controlled method of releasing a microstructure comprising a silicon oxide layer located between a substrate layer and a layer to be released from the silicon oxide layer is described. The method comprises the step of exposing the silicon oxide layer to a hydrogen fluoride vapor in a process chamber having controlled temperature and pressure conditions. A by-product of this reaction is water which also acts as a catalyst for the etching process. It is controlled employment of this inherent water source that results in a condensed fluid layer forming, and hence etching taking place, only on the exposed surfaces of the oxide layer. The described method therefore reduces the risk of the effects of capillary induced stiction within the etched microstructure and/or corrosion within the microstructure and the process chamber itself.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: March 25, 2014
    Assignee: Memsstar Limited
    Inventor: Anthony O'Hara
  • Patent number: 8679355
    Abstract: A method of manufacturing an electronic device that comprises a microelectromechanical (MEMS) element, the method comprising the steps of: providing a material layer (34) on a first side of a substrate (32); providing a trench (40) in the material later (34); etching material from the trench (40) such as to also etch the substrate (32) from the first side of the substrate (32); grinding the substrate (32) from a second side of the substrate to expose the trench (40); and using the exposed trench (40) as an etch hole. The exposed trench (40) is used as an etch hole for releasing a portion of the material layer (34), for example a beam resonator (12), from the substrate (32). An input electrode (6), an output electrode (8), and a top electrode (10) are provided.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: March 25, 2014
    Assignee: NXP, B.V.
    Inventors: Hauke Pohlmann, Ronald Dekker, Joerg Mueller, Martin Duemling
  • Patent number: 8668833
    Abstract: A method of forming a discrete nanostructured element at one or more predetermined locations on a substrate is presented. The method includes forming a mask member over the substrate. A window is formed in the mask member at each of one or more locations at which it is required to form the nanostructured element thereby to expose a portion of a surface of the substrate. A portion of the substrate exposed by the window at the one or more locations is removed to form one or more recesses in the substrate. The method further includes forming a layer of a nanostructure medium over a surface of the recess and annealing the structure thereby to form the nanostructured element in each of the one or more recesses. The nanostructured element includes a portion of the nanostructure medium and has an external dimension along at least two substantially orthogonal directions of less than substantially 100 nm.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: March 11, 2014
    Assignees: GLOBALFOUNDRIES Singapore Pte. Ltd., National University of Singapore
    Inventors: Han Guan Chew, Fei Zheng, Wee Kiong Choi, Tze Haw Liew
  • Patent number: 8664022
    Abstract: A submount for a light emitting diode and a method for fabricating the same are provided. The method includes the following steps: (a) providing a silicon substrate; (b) forming a mask layer on the silicon substrate to expose a part of the silicon substrate; (c) forming a first silicon oxide layer in the part of the silicon substrate which is exposed; and (d) removing the mask layer and the first silicon oxide layer, so as to form a recess in the silicon substrate.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: March 4, 2014
    Assignee: Episil Technologies Inc.
    Inventors: Le-Sheng Yeh, Cheng-I Chien
  • Patent number: 8663487
    Abstract: The invention is directed to the provision of a method for manufacturing a crystal oscillator manufacturing method that can achieve a highly precise fine adjustment without applying unnecessary external force to a crystal oscillator, and that can adjust a plurality of crystal oscillators in a collective manner. More specifically, the invention provides a method for manufacturing a crystal oscillator includes a first etching step for forming a prescribed external shape, an electrode forming step for forming an electrode at least in a portion of a surface of the external shape, a leakage amount measuring step for measuring leakage amount associated with leakage vibration of the external shape, and a second etching step for etching the external shape by an amount that is determined based on a measurement result of the leakage amount measuring step so as to adjust balance.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: March 4, 2014
    Assignee: Citizen Holdings Co., Ltd.
    Inventors: Akiko Katoh, Tohru Yanagisawa
  • Patent number: 8656936
    Abstract: Apparatuses, and related methods, for processing a workpiece that include a particular barrier structure that can overlie and cover a workpiece. Apparatuses, and related methods, for processing a workpiece that include a particular movable member that can be positioned over and moved relative to a workpiece. Apparatuses, and related methods, for processing a workpiece that include a particular ceiling structure that can overlie a processing chamber. Nozzle devices, and related methods, that include a particular annular body. Nozzle devices, and related methods, that include a particular first, second, and third nozzle structure.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: February 25, 2014
    Assignee: Tel FSI, Inc.
    Inventors: Jimmy D. Collins, Samuel A. Cooper, James M. Eppes, Alan D. Rose, Kader Mekias
  • Patent number: 8643128
    Abstract: The present invention discloses an MEMS sensor and a method for making the MEMS sensor. The MEMS sensor according to the present invention includes: a substrate including an opening; a suspended structure located above the opening; and an upper structure, a portion of which is at least partially separated from a portion of the suspended structure; wherein the suspended structure and the upper structure are separated from each other by a step including metal etch.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: February 4, 2014
    Assignee: Pixart Imaging Incorporation
    Inventor: Chuan Wei Wang
  • Patent number: 8641912
    Abstract: A patterning method for the creation of two-dimensional nanowire structures. Nanowire patterning methods are used with lithographical patterning approaches to form patterns in a layer of epoxy and resist material. These patterns are then transferred to an underlying thin film to produce a two-dimensional structure with desired characteristics.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: February 4, 2014
    Assignee: California Institute of Technology
    Inventors: James R. Heath, Dunwei Wang, Yuri Bunimovich, Akram Boukai
  • Patent number: 8636912
    Abstract: A method of forming a device is provided. A substrate having a component is provided and a sacrificial layer is formed over the component. The sacrificial layer includes a cavity portion disposed about the component and a tunnel portion adjacent to the cavity portion. In addition, an encapsulation layer having a cover portion and a perimeter portion is formed over the sacrificial layer. The cover portion encapsulates the cavity portion such that the cavity portion forms a cavity within the cover portion. The perimeter portion is disposed over the tunnel portion. Moreover, an access hole is formed in the perimeter portion of the encapsulation layer.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: January 28, 2014
    Assignee: RF Micro Devices, Inc.
    Inventors: Sangchae Kim, Steven Crist
  • Patent number: 8636911
    Abstract: Two methods of fabricating a MEMS scanning mirror having a tunable resonance frequency are described. The resonance frequency of the mirror is set to a particular value by mass removal from the backside of the mirror during fabrication.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: January 28, 2014
    Assignees: MagIC Technologies, Inc., Advanced Numicro Systems, Inc.
    Inventors: Jun Chen, Guomin Mao, Tom Zhong, Wei Cao, Yee-Chung Fu, Chyu-Jiuh Torng
  • Publication number: 20140021160
    Abstract: A method for manufacturing an optical semiconductor device includes the steps of preparing a substrate product including a semiconductor layer, a mesa structure, and a protective layer; forming a buried layer composed of a resin on the substrate product; forming a first opening in the buried layer on the mesa structure; forming a second opening in the buried layer on the semiconductor layer; exposing the mesa structure and the semiconductor layer by etching the protective layer; forming a first electrode in the first opening; and forming a second electrode in the second opening. The step of forming the second opening includes a first etching step including etching the buried layer using a first resist mask for forming a recess and a second etching step including etching the buried layer using a second resist mask having an opening pattern which has an opening width not smaller than that of the recess.
    Type: Application
    Filed: July 5, 2013
    Publication date: January 23, 2014
    Inventors: Takamitsu KITAMURA, Hideki YAGI
  • Patent number: 8623769
    Abstract: A through hole forming method includes forming a plurality of small holes in a first substrate surface of a substrate including the first substrate surface and a second substrate surface as a back surface of the first substrate surface, forming a thermally oxidized film by thermally oxidizing partition walls between the adjacent small holes and bottoms of the small holes, and removing the thermally oxidized film.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: January 7, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Miho Shiraki, Junichi Takeuchi
  • Patent number: 8623222
    Abstract: The present invention relates to a design and microfabrication method for microgrippers that are capable of grasping micro and nano objects of a large range of sizes and two-axis force sensing capabilities. Gripping motion is produced by one or more electrothermal actuators. Integrated force sensors along x and y directions enable the measurement of gripping forces as well as the forces applied at the end of microgripper arms along the normal direction, both with a resolution down to nanoNewton. The microfabrication method enables monolithic integration of the actuators and the force sensors.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: January 7, 2014
    Inventors: Yu Sun, Keekyoung Kim
  • Patent number: 8617406
    Abstract: The invention relates to a device for the actively-controlled deposition of microdrops of biological solutions. The inventive device includes at least one flat silicon lever comprising a central body and an end area which forms a point, a slit or groove being disposed in said point. The invention is characterized in that it also comprises at least one metallic track which is disposed on one face of the central body and which runs alongside said slit or groove at least partially. The invention also relates to a method of producing the inventive device and a method for the active-controlled deposition and sampling of microdrops of biological solutions using said device.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: December 31, 2013
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Christian Bergaud, Matthieu Guirardel, Pascal Belaubre, Benoit Belier, Jean-Bernard Pourciel
  • Patent number: 8613862
    Abstract: A manufacturing method, for a liquid discharge head substrate that includes a silicon substrate in which a liquid supply port is formed, includes the steps of: preparing the silicon substrate, on one face of which a mask layer, in which an opening has been formed, is deposited; forming a first recessed portion in the silicon substrate, so that the recessed portion is extended through the opening from the one face of the silicon substrate to the other, reverse face of the silicon substrate; forming a second recessed portion by performing wet etching for the substrate, via the first recessed portion, using the mask layer; and performing dry etching for the silicon substrate in a direction from the second recessed portion to the other face.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: December 24, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Asai, Hirokazu Komuro, Satoshi Ibe, Takuya Hatsui, Shimpei Otaka, Hiroto Komiyama, Keisuke Kishimoto
  • Patent number: 8609221
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: December 17, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
  • Patent number: 8605920
    Abstract: A condenser microphone having a flexure hinge diaphragm and a method of manufacturing the same are provided. The method includes the steps of: forming a lower silicon layer and a first insulating layer; forming an upper silicon layer on the first insulating layer; forming sound holes by patterning the upper silicon layer; forming a second insulating layer and a conductive layer on the upper silicon layer; forming a passivation layer on the conductive layer; forming a sacrificial layer on the passivation layer; depositing a diaphragm on the sacrificial layer, and forming air holes passing through the diaphragm; forming electrode pads on the passivation layer and a region of the diaphragm; and etching the layers to form an air gap between the diaphragm and the upper silicon layer. Consequently, a manufacturing process may improve the sensitivity and reduce the size of the condenser microphone.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: December 10, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hye Jin Kim, Sung Q Lee, Kang Ho Park, Jong Dae Kim
  • Patent number: 8597529
    Abstract: A method for processing a substrate includes preparing a substrate having a first layer on a first surface side thereof, the first layer having a material capable of suppressing transmission of laser light, processing the substrate with laser light from a second surface that is opposite the first surface of the substrate toward the first surface of the substrate, and allowing the laser light to reach the first layer to form a hole in the substrate, and performing etching of the substrate from the second surface through the hole.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: December 3, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keisuke Kishimoto, Satoshi Ibe, Takuya Hatsui, Shimpei Otaka, Hiroto Komiyama, Hiroyuki Morimoto, Masahiko Kubota, Toshiyasu Sakai
  • Patent number: 8591756
    Abstract: A method of manufacturing a metallized ceramic substrate includes forming a metal layer on a ceramic substrate, and forming on the metal layer a resist having a first patterned resist opening and a second patterned resist opening for the metal layer to be exposed therefrom. A first width of the first patterned resist opening is greater than the thickness of the metal layer, and a second width of the second patterned resist opening is less than the thickness of the metal layer. A wet-etching process is conducted, to form in the first patterned resist opening a patterned metal layer opening and form in the second patterned resist opening a patterned metal layer dent. Therefore, an internal stress between the metal layer and the ceramic substrate is reduced, and the yield rate and reliability of the metallized ceramic substrate is increased.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: November 26, 2013
    Assignee: Viking Tech Corporation
    Inventors: Shih-Long Wei, Shen-Li Hsiao, Chien-Hung Ho
  • Publication number: 20130306590
    Abstract: The stable cavity-induced two-phase heat transfer in silicon microchannels mitigates the flow of instabilities associated with two-phase (liquid/vapor) flow in microchannels. This is accomplished by etching microscopic cavities in the base of each microchannel using photolithography techniques. Each cavity is used to promote controlled nucleation activity. The microchannels with cavities are able to be used in heat sinks to cool a variety of electronic components.
    Type: Application
    Filed: July 25, 2013
    Publication date: November 21, 2013
    Applicant: Auburn University
    Inventors: Sushil H. Bhavnani, Daniel T. Pate, Rory J. Jones
  • Patent number: 8585916
    Abstract: Disclosed herein are methods of making micropores of a desired height and/or width between two isotropic wet etched features in a substrate which comprises single-level isotropic wet etching the two features using an etchant and a mask distance that is less than 2× a set etch depth. Also disclosed herein are methods using the micropores and microfluidic devices comprising the micropores.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: November 19, 2013
    Assignee: Sandia Corporation
    Inventors: Thomas D. Perroud, Kamlesh D. Patel, Robert J. Meagher
  • Patent number: 8585910
    Abstract: A process for producing a micromachined tube (microtube) suitable for microfluidic devices. The process entails isotropically etching a surface of a first substrate to define therein a channel having an arcuate cross-sectional profile, and forming a substrate structure by bonding the first substrate to a second substrate so that the second substrate overlies and encloses the channel to define a passage having a cross-sectional profile of which at least half is arcuate. The substrate structure can optionally then be thinned to define a microtube and walls thereof that surround the passage.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: November 19, 2013
    Assignee: Integrated Sensing Systems Inc.
    Inventors: Douglas Ray Sparks, Nader Najafi
  • Publication number: 20130299448
    Abstract: A technique is provided for a structure. A substrate has a nanopillar vertically positioned on the substrate. A bottom layer is formed beneath the substrate. A top layer is formed on top of the substrate and on top of the nanopillar, and a cover layer covers the top layer and the nanopillar. A window is formed through the bottom layer and formed through the substrate, and the window ends at the top layer. A nanopore is formed through the top layer by removing the cover layer and the nanopillar.
    Type: Application
    Filed: June 7, 2012
    Publication date: November 14, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gustavo A. Stolovitzky, Deqiang Wang
  • Patent number: 8580127
    Abstract: An RFID based thermal bubble type accelerometer includes a flexible substrate, an embedded system on chip (SOC) unit, an RFID antenna formed on the substrate and coupled to a modulation/demodulation module in the SOC unit, a cavity formed on the flexible substrate, and a plurality of sensing assemblies, including a heater and two temperature-sensing elements, disposed along the x-axis direction and suspended over the cavity. The two temperature-sensing elements, serially connected, are separately disposed at two opposite sides and at substantially equal distances from the heater. Two sets of sensing assemblies can be connected in differential Wheatstone bridge. The series-connecting points of the sensing assemblies are coupled to the SOC unit such that an x-axis acceleration can be obtained by a voltage difference between the connecting points. The x-axis acceleration can be sent by the RFID antenna to a reader after it is is modulated and encoded by the modulation/demodulation module.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: November 12, 2013
    Assignee: Chung Hua University
    Inventor: Jium Ming Lin
  • Patent number: 8580126
    Abstract: An exemplary method for a producing a piezoelectric vibrating piece having at least one mesa step includes forming a metal film on a main surface of a piezoelectric wafer. A through-groove is formed through the thickness of the wafer to form a plan profile of a desired piezoelectric substrate. A film of photoresist is formed on the surface of the metal film. A resist is applied, exposed, and formed into a resist pattern that defines a first mesa step along at least a portion of the plan profile. In regions not protected by the metal film, the piezoelectric substrate is etched to a defined depth to form a mesa step. The denuded edge surface of the metal film is edge-etched. A second mesa step, inboard of the first mesa step, can be formed by repeating the edge-etching and substrate-etching steps using the metal film as an etch protective film.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: November 12, 2013
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Hiroyuki Sasaki, Kenji Shimao, Manabu Ishikawa
  • Patent number: 8568598
    Abstract: A manufacturing method of a tip type probe includes the steps of: forming on a substrate an etching mask of a shape similar to a shape of a top surface of a truncated pyramid; forming the truncated pyramid by subjecting the substrate to isotropic etching using the etching mask as a mask member; stopping the isotropic etching when an area of the top surface reaches an area capable of generating near-field light; and forming a metal film on at least some of the side surfaces of the truncated pyramid by allowing film forming particles to enter into a space between the etching mask and the side surfaces and adhere onto the truncated pyramid. The directivity of the film forming particles is controlled so that the metal film has a thickness that is reduced gradually from a bottom of the truncated pyramid toward the top surface.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: October 29, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Majung Park, Manabu Oumi
  • Patent number: RE44945
    Abstract: A manufacturing method for a substrate for an ink jet head, including formation of an ink supply port in a silicon substrate, the method includes a step of forming, on one side of the substrate, an etching mask layer having an opening at a position corresponding ink supply port; a step of forming unpenetrated holes through the opening of the etching mask layer in at least two rows in a longitudinal direction of the opening; and a step of forming the ink supply port by crystal anisotropic etching of the substrate in the opening.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: June 17, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiyasu Sakai, Shuji Koyama, Kenji Ono, Jun Yamamuro
  • Patent number: RE44995
    Abstract: A method for producing a semiconductor component includes forming an n-doped layer in a p-doped layer of the semiconductor component, wherein the n-doped layer comprises at least one of: a sieve-like layer or a network-like layer. The method also includes porously etching the p-doped layer between the material of the n-doped layer to form a top electrode, and forming a cavity below the n-doped layer.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: July 8, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Hubert Benzel, Heribert Weber, Hans Artmann, Frank Schaefer