Abstract: A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. A first general feature of the process is to define suspended structures with a DRIE process, such that the dimensions desired for the suspended structures are obtained. A second general feature is the proper location of specialized features, such as stiction bumps, vulnerable to erosion caused by the DRIE process. Yet another general feature is to control the environment surrounding suspended structures delineated by DRIE in order to obtain their desired dimensions. A significant problem identified and solved by the invention is the propensity for the DRIE process to etch certain suspended features at different rates.

Abstract: A method of fabricating microstructural components, microparts assemblies and microparts is disclosed. The method includes fabricating a unidirectional metal matrix composite made of materials selected to allow precise etching of different structural elements of the given composite without damage to each other. Cutting a composite to form slices or sections. Etching a matrix entirely out will produce wide assortment of microparts. Partial removal of matrix will form an array of microprotrusions protruding from a substrate. Etching out the microprotrusions cores will form hollow microprotrusions. The method of invention is suitable for fabricating of variety of microcomponents. For example: microneedles—a medical microdevice component having micron features, arrays of high strength micropins and micropunches, and precisely controlled unique microstructural surfaces.

Abstract: A dry-etching method comprises the step of dry-etching a metal thin film as a chromium-containing half-tone phase-shift film, wherein the method is characterized by using, as an etching gas, a mixed gas including (a) a reactive ion etching gas, which contains an oxygen-containing gas and a halogen-containing gas, and (b) a reducing gas added to the gas component (a), in the process for dry-etching the metal thin film. The dry-etching method permits the production of a half-tone phase-shift photomask by forming patterns to be transferred to a wafer on a photomask blank for a chromium-containing half-tone phase-shift mask. The photomask can in turn be used for manufacturing semiconductor circuits. The method permits the decrease of the dimensional difference due to the coexistence of coarse and dense patterns in a plane and the production of a high precision pattern-etched product.

Abstract: An emitter array produced using etch mask and a method for making such an etch mask. The emitter comprising a substrate, forming a conducting layer on the substrate, forming an emitting layer on the conducting layer, forming an etch mask having a controlled distribution of a plurality of mask sizes over the emitting layer, and forming at least one emitter by removing portions of the emitting layer using the etch mask. The method for making the etch mask comprising forming an etch mask layer over an emitting layer, forming a patterning layer having a controlled distribution of mask sizes over the etch mask layer, and forming the etch mask by removing portions of the etch mask layer using the controlled distribution of mask sizes in the patterning layer.

Abstract: Micro-components having at least one individual layer are produced according to the method, which have functional layers 3 on the walls of inner structures, for example of flow channels. The micro-components are intended to be suitable for a large number of different applications in chemical reaction technology, for heat exchanging, for mixing substances or for evaporating liquids. In particular, the micro-components are intended to have no problems in respect of leaks in the flow channels. The method has the following method steps: A. producing the at least one individual layer by: a. producing a first metal layer or a metal foil 1; b. forming the inner structures in and/or on the first metal layer or metal foil 1 by suitable etching methods and/or metal deposition methods; and c. forming the functional layers 3 solely on the walls of the inner structures and thereafter B.

Abstract: A micromachined vertical vibrating gyroscope consists of three single crystal silicon assemblies: an outer single crystal silicon assembly, an intermediate single crystal silicon assembly, and an inner single crystal silicon assembly. The outer assembly includes a plurality of arc-shaped anchors arranged in a circle and extending from a single crystal silicon substrate coated with an insulating annulus thereon. The intermediate assembly is a suspended wheel concentric with the arc-shaped anchors. The inner assembly is a suspended hub concentric with the circle formed by the anchors and having no axle at its center. The three assemblies are connected to each other through several flexures. The intermediate suspended wheel is driven into rotational vibration by lateral comb capacitors. Input angular rates are measured by two vertical capacitors.

Abstract: A method of handling a wafer for through-wafer plasma etching includes lateral support provided between a handle wafer and a product wafer without wafer bonding or an adhesive film using mating mechanical structures. The product wafer is easily separated from the handle wafer following etching without stripping or cleaning. Because the connection between the wafers is mechanical, not from an adhesive layer/bonded layer, a wafer can be etched, inspected, and subsequently continue to be etched without the hindrance of repeated bonding, separation, and cleaning. A non-bonded support for released devices following a through-etch process is also provided.

Abstract: A frequency standard has a cell formed in a cavity of a substrate. The cell contains a metal alkali vapor. The substrate has an optical path that intersects the cell. A light source is supported by the substrate and supplies light through the first optical path to the cell, and a light detector is supported by the substrate and receives light through the second optical path from the cell. The sealed vapor-filled cell is surrounded by a vacuum cavity enclosure. Bridges between the cell and the substrate may be used to thermally isolate the cell in the cavity and allow closed loop temperature control of the cell.

Abstract: Methods and systems for forming compound slots in a substrate are described. In one exemplary implementation, a method forms a plurality of slots in a substrate. The method also etches a trench in the substrate contiguous with the plurality of slots to form a compound slot.

Abstract: A method for controlling CD of etch process defines difference between designed dimension and etched dimension as dimensional displacement and defines target value of the dimensional displacement. A plurality of samples are prepared in each group having different exposure ratios. The plurality of samples of each group are etched until etch end point is detected and then over-etched for uniform time interval after detecting the etch end point. Using etch end point and over-etch time, correlation function of the over-etch time to the etch end point time is determined and the over-etch time to the etch end point is determined using the correlation function.

Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.

Abstract: The invention relates to a process permitting defects or stresses in a structure to be revealed, comprising the following steps:

Abstract: A method for controlling a photoresist etch step in a plasma processing chamber is disclosed. The photoresist etch step being configured to etch back a photoresist layer deposited on a substrate surface to a thinner photoresist layer having predefined photoresist thickness. The method includes etching the photoresist layer using a plasma etch process and detecting interference patterns coming from the photoresist layer. The method further includes terminating the photoresist etch step when an analysis of the interference patterns indicates that the predefined photoresist thickness is achieved, whereby the predefined photoresist thickness is greater than zero.

Abstract: A hybrid interconnect substrate and method of manufacture thereof are disclosed. The hybrid interconnect substrate is formed by bonding a carrier substrate to a multi-level interconnect structure formed on a handle substrate. The multi-level interconnect structure is formed by deposition, photolithography and etching processes used in integrated circuit processes or in TFT-LCD technology.

Abstract: A method of producing structured wafers guarantees that the edge of the wafer will be protected from attack by an aggressive etchant medium without applying a photoresist to the edge and without using additional mechanical measures. In a type of negative process, a passivation layer is applied to the areas that are not to be structured, including the edge area of the wafer.

Abstract: A plasma etching device is described in which gas is introduced into a reaction chamber through holes in a gas distribution plate. An electrode ignites the source gas into a plasma by capacitive coupling, and sustains the plasma by inductive coupling. A localized shield structure is provided which suppresses the electric field in locations in or near the holes of the gas distribution plate. Thus, plasma ignition in or near these holes is prevented, and hole lightup effects are avoided. By virtue of eliminating hole lightup, improved flexibility in gas distribution plate design and alignment is provided.

Abstract: A method of forming a sensor for detecting motion is disclosed. The method includes a first step (110) of providing a silicon-on-insulator (SOI) substrate (200) containing a device layer (210), an insulator layer (220), and a handle layer (230). The device layer may be patterned to form a device structure (310). A support substrate (410) is also provided and patterned, and an electrically conductive layer (510) is formed over the support substrate. The SOI substrate and the support substrate are bonded together, and the handle layer and the insulator layer are removed from the SOI substrate, thus releasing the device structure.

Abstract: A microelectromechanical structure is formed by depositing sacrificial and structural material over a substrate to form a structural layer on a component electrically attached with the substrate. The galvanic potential of the structural layer is greater than the galvanic potential of the component. At least a portion of the structural material is covered with a protective material that has a galvanic potential less than or equal to the galvanic potential of the component. The sacrificial material is removed with a release solution. At least one of the protective material and release solution is surfactanated, the surfactant functionalizing a surface of the component.

Abstract: A process for fabricating piezoelectric elements each having a wrap-around electrode to be used in a differential actuator design where electrical connection is made to the bottom electrode of the element from the top surface of the element. The wrap-around electrode is formed during the creation of the elements instead of on an element by element basis.

Abstract: A method for forming a microstructure from a substrate is provided. The method includes providing a monocrystalline substrate having a (100) orientation and subjecting a first portion of the substrate to ion bombardment to effect ion implantation to a desired penetration depth. A second portion of the substrate is etched to a depth at least as great as the desired penetration depth. The substrate then is thermally treated to form a microstructure at a surface of the substrate and to effect at least partial separation between the microstructure and the substrate.

Abstract: A method of treating a silicon film on a substrate. A silicon film is provided. The silicon film is thinned using a gas cluster ion beam (GCIB) process. The silicon film surface then is smoothed out using an etching process or an annealing process. Optionally, an encapsulation film is formed on the silicon film after the GCIB process and the etching process or the annealing process.

Abstract: A method of treating a silicon film on a substrate. A silicon film is provided. The silicon film is thinned using a gas cluster ion beam (GCIB) process. The silicon film surface then is smoothed out using an etching process or an annealing process. Optionally, an encapsulation film is formed on the silicon film after the GCIB process and the etching process or the annealing process.

Abstract: A MEMS fabrication process eliminates through-wafer etching, minimizes the thickness of silicon device layers and the required etch times, provides exceptionally precise layer to layer alignment, does not require a wet etch to release the moveable device structure, employs a supporting substrate having no device features on one side, and utilizes low-temperature metal-metal bonding which is relatively insensitive to environmental particulates. This process provided almost 100% yield of scanning micromirror devices exhibiting scanning over a 12° optical range and a mechanical angle of ±3° at a high resonant frequency of 2.5 kHz with an operating voltage of only 20 VDC.

Abstract: A method of etching a trench in a substrate using a dry plasma etch technique that allows precise control of lateral undercut. The method includes optionally forming at least one on-chip device or micro-machined structure in a surface of a silicon substrate, and covering the surface with a masking layer. A trench pattern is then imaged in or transferred to the masking layer for subsequent etching of the substrate. Upper portions of the trench are anisotropically etched in the substrate. The trench is then semi-anisotropically etched and isotropically etched in the substrate. By modifying isotropic etching time, a controlled lateral undercut can be achieved as the trench is etched vertically in the substrate.

Abstract: The subject invention relates to a method and materials for the control of the energy barrier to agglomeration with respect to particles. Controlling the energy barrier to agglomeration can, for example, cause the particles to enter suspension and/or depart from suspension, as desired. By fine-tuning the energy barrier, a variety of processes can be enhanced. The subject invention also pertains to the control of the energy barrier between particles and a surface. In a specific embodiment, the subject invention can be utilized for chemical-mechanical polishing (CMP) processes.

Abstract: An ink jet recording head is capable of: preventing any of stagnation in ink flow, formation of vapor bubbles, cavitation, or like problems from occurring in the ink flow; realizing an excellent ink ejection operation, and thereby realizing a high quality gradation expression in recording; and, lessening a degree of a required accuracy both in dimension and in alignment of its components being stacked together. In a method for manufacturing the ink jet recording head provided with a pressure generating chamber, this chamber is constructed of a through-hole of a chamber plate and a pair of plates, between which plates the chamber plate is sandwiched.

Abstract: A method of preventing notching during a cyclical etching and deposition of a substrate with an inductively coupled plasma source is provided by the present invention. In accordance with the method, the inductively coupled plasma source is pulsed to prevent charge build up on the substrate. The off state of the inductively coupled plasma source is selected to be long enough that charge bleed off can occur, but not so long that reduced etch rates result due to a low duty cycle. The pulsing may be controlled such that it only occurs when the substrate is etched such that an insulating layer is exposed. A bias voltage may also be provided to the insulating layer and the bias voltage may be pulsed in phase or out of phase with the pulsing of the inductively coupled plasma source.

Abstract: A method for preparing a decorative glass using a glass etching composition, wherein a frosting of elaborate patterns and designs is applied on the surface of the glass having an arbitrary shape, such a plane, a curved plane or a tube, by utilizing the silk-screen process or the like, using a glass etching composition characterized as comprising 1 to 20 w/v % (preferably, 2 to 5 w/v %) of a fluoride, 20 to 80 v/v % (preferably, 20 to 50 v/v %) of water and 20 to 80 v/v % (preferably, 50 to 80 v/v %) of an organic solvent miscible with water or another glass etching composition comprising the former composition and an additive. The glass etching composition is free from the problems of the danger to a human body and environmental pollution.

Abstract: Provided is an etching method of accurately forming a fine structure in a plastic substrate. A surface reformed layer insoluble by an etchant, for example, limonene is formed on a surface of a substrate soluble by the etchant by ion implantation treatment; an opening is formed in the surface reformed layer by dry etching treatment; and the substrate is subjected to wet etching treatment by dipping the substrate in the etchant. A peripheral portion, around the opening, of the surface reformed layer functions as a mask to allow the wet etching to anisotropically proceed, and a portion, on the side opposed to the opening, of the surface reformed layer functions as an end point of the wet etching. As a result, a recess having a uniform inner diameter in the depth direction can be formed in the substrate.

Abstract: The present disclosure describes a Parylene micro check valve including a micromachined silicon valve seat with a roughened top surface to which a membrane cap is anchored by twist-up tethers. The micro check valve is found to exhibit low cracking pressure, high reverse pressure, low reverse flow leakage, and negligible membrane-induced flow resistance when used as a valve over a micro orifice through which flow liquid and gas fluids.

Abstract: A pattern forming material contains a block copolymer or graft copolymer and forms a structure having micro polymer phases, in which, with respect to at least two polymer chains among polymer chains constituting the block copolymer or graft copolymer, the ratio between N/(Nc−No) values of monomer units constituting respective polymer chains is 1.4 or more, where N represents total number of atoms in the monomer unit, Nc represents the number of carbon atoms in the monomer unit, No represents the number of oxygen atoms in the monomer unit.

Abstract: A method for creating a layout of at least a portion of a microelectromechanical system is disclosed. In one embodiment, a plurality of die are formed on a wafer. Each die includes a plurality of rows of a plurality of mirror assemblies, a plurality of off-chip electrical contacts, and an electrical trace bus that is disposed between adjacent pairs of rows. This electrical trace bus is electrically interconnected with mirror assemblies in at least one of the rows. A plurality of these die are formed on a wafer. A chip is separated from the wafer such that a chip width is an integer multiple of the die width and such that a chip height is an integer number of the rows of mirror assemblies without requiring the chip height to be an integer multiple of the die height.

Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.

Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.

Abstract: In a state where a process gas including SF.sub.6 and O.sub.2 is supplied in a chamber, a laser light irradiator provided outside the chamber irradiates a laser light onto a substrate. At the portion of the substrate onto which the laser light is irradiated, the material that makes up the substrate is excited and converted into a gaseous substance by reacting with the process gas. The temperature of the substrate placed on a stage is kept at a predetermined temperature since a temperature adjuster supplies a chiller to a coolant flow passage provided inside the stage.

Abstract: Methods of sampling specimens for microanalysis, particularly microanalysis by atom probe microscopy, include steps of forming a study specimen in a first study object (as by use of focused ion beam milling); removing the study specimen from the study object; situating the study specimen on a second study object; and microanalyzing the study specimen. Where the first study object is of particular interest for study, the study specimen may be taken from a functional portion of the first study object so that microanalysis will provide information regarding this functional portion. Where the second study object is of particular interest for study, the second study object may be subjected to manufacturing processes (e.g., deposition of layers of materials) after the study specimen is situated thereon so that the study specimen will provide information regarding the results of the manufacturing process.

Abstract: A micromachined fluid handling device having improved properties. The valve is made of reinforced parylene. A heater heats a fluid to expand the fluid. The heater is formed on unsupported silicon nitride to reduce the power. The device can be used to form a valve or a pump. Another embodiment forms a composite silicone/parylene membrane. Another feature uses a valve seat that has concentric grooves for better sealing operation.

Abstract: A method for making a spatial light modulator is disclosed, that comprises forming an array of micromirrors each having a hinge and a micromirror plate held via the hinge on a substrate, the micromirror plate being disposed in a plane separate from the hinge and having a hinge made of a transition metal nitride, followed by releasing the micromirrors in a spontaneous gas phase chemical etchant. Also disclosed is a projection system that comprises such a spatial light modulator, as well as a light source, condensing optics, wherein light from the light source is focused onto the array of micromirrors, projection optics for projecting light selectively reflected from the array of micromirrors onto a target, and a controller for selectively actuating the micromirrors in the array.

Abstract: A method of making an etched structure in the fabrication of a MEMS device involves depositing a bulk layer, typically of polysilicon, prone to surface roughness. At least one layer of photo-insensitive spin-on planarizing material, such as silicate-based spin-on glass, is formed on the bulk layer to reduce surface roughness. This is patterned with a photoresist layer. A deep etch is then performed through the photoresist layer into the bulk layer. This technique results in much more precise etch structures.

Abstract: A method of producing well-defined polycrystalline silicon regions is described, in particular for producing electrically conducting regions, having the steps:

Abstract: Disclosed is a micromechanical system fabrication method using (111) single crystalline silicon as a silicon substrate and employing a reactive ion etching process in order to pattern a microstructure that will be separated from the silicon substrate and a selective release-etching process utilizing an aqueous alkaline solution in order to separate the microstructure from the silicon substrate. According to the micromechanical system fabrication method of the present invention, the side surfaces of microstructures can be formed to be vertical by employing the RIE technique. Furthermore, the microstructures can be readily separated from the silicon substrate by employing the selective release-etching technique using slow etching {111} planes as the etch stop in an aqueous alkaline solution. In addition, etched depths can be adjusted during the RIE step, thereby adjusting the thickness of the microstructure and the spacing between the microstructure and the silicon substrate.

Abstract: Diffractive optical elements and methods of making the same are described. In one aspect, a diffractive optical element is made by forming a multilayer structure comprising multiple amorphous silicon phase shift layers having respective thicknesses selected so that the diffractive optical element is operable to phase shift infrared light within an operative wavelength range. The amorphous silicon phase shift layers are separated by respective silicon dioxide etch stop layers having respective thicknesses of about 5 nm or less. Layers of the multilayer structure are serially masked and etched to form a multi-step optical structure. In another aspect, a diffractive optical element is made by forming a multilayer structure comprising multiple etch layers separated by respective etch stop layers selectively etchable with respect to the etch layers. One or more of the etch and etch stop layers are substantially opaque to light within an operative wavelength range.

Abstract: A method of producing an optical grating component including only a single continuous grating field formed in a longitudinal waveguide rib, the method including the steps of defining a grating in an optic chip including a portion thereof through which the longitudinal waveguide rib is to extend, and then defining the lateral edges of the longitudinal rib in the optic chip, whereby any portion of the grating extending laterally beyond the lateral width of the rib is removed in the step of defining the lateral edges of the rib leaving a single continuous grating field that has straight lateral grating boundaries that are laterally aligned with the straight lateral edges of the rib.

Abstract: A method for producing a semiconductor wafer (1) with one or more micro-mirrors (5) formed in a membrane layer (2) which is supported on a handle layer (3) with a buried oxide layer (6) between the membrane and handle layers (2,3) which avoids rupturing of tethers (7) which support the micro-mirrors (5) in the membrane layer (2) and also avoids bowing of the micro-mirrors (5). After trenches (14) are formed in the membrane layer (2) for defining the micro-mirrors (5) and the tethers (7), and prior to forming of through bores (9) through the handle layer (3) to the micro-mirrors (5), a support layer (20) of oxide is deposited on the exposed surface (12) of the membrane layer (2) over the micro-mirrors (5) and the tethers (7) and is back filled into the trenches (14) for supporting bridging portions (16) of the buried oxide layer (6).

Abstract: In a method of fabricating a metallization structure during formation of a microelectronic device, the improvement of reducing metal shorts in blanket metal deposition layers later subjected to reactive ion etching, comprising:

Abstract: A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. A first general feature of the process is to define suspended structures with a DRIE process, such that the dimensions desired for the suspended structures are obtained. A second general feature is the proper location of specialized features, such as stiction bumps, vulnerable to erosion caused by the DRIE process. Yet another general feature is to control the environment surrounding suspended structures delineated by DRIE in order to obtain their desired dimensions. A significant problem identified and solved by the invention is the propensity for the DRIE process to etch certain suspended features at different rates.

Abstract: The present invention provides a matrix comprising an array of nanostructures that exhibit a variation (gradient) in physical properties (such as size or pitch) in at least one direction of the plane containing said array. A method for forming an array having a gradient property is also provided. In addition, a separation method is provided comprising the steps of: providing a matrix comprising an array of nanostructures arranged so that the array has the property of a gradient; and conducting at least one biomolecule separation process to separate biomolecules in a composition containing a plurality of biomolecules using the matrix.

Abstract: A wafer having heterostructure therein is formed using a substrate with recesses formed within a dielectric layer. A magnetized magnetic layer or a polarized electret material is formed at the bottom of each recess. The magnetized magnetic layer or a polarized electret material provides a predetermined magnetic or electrical field pattern. A plurality of heterostructures is formed from on an epitaxial wafer wherein each heterostructure has formed thereon a non-magnetized magnetic layer that is attracted to the magnetized magnetic layer formed at the bottom of each recess or dielectric layer that is attracted to the polarized electret material formed at the bottom of each recess. The plurality of heterostructures is etched from the epitaxial wafer to form a plurality of heterostructure pills.

Abstract: A method of forming three-dimensional structures on a substrate by a single reactive ion each run whereby a mask is formed on said substrate before a series of iterations are carried out, each iteration including a mask etch and a substrate etch, so that successive iterations give life to reduction in the mask area and exposure of further areas of substrate.

Abstract: A process for manufacturing a wafer having a multiplicity of MEMS devices such as mirrors with gimbals formed thereon is disclosed. A silicon wafer having a thickness less than about 300 &mgr;m is attached to a carrier or support wafer by a layer of bonding agent such as a layer or coating of photo-resist. The MEMS devices such as a gimbal mirror are formed on the silicon wafer by providing a mask and etching through the wafer with a DRIE process. Undesired lateral etching at the bottom of the wafer caused by the formation of an electrical charge at the bonding layer is eliminated or substantially reduced by patterning the layer of photo-resist used as the bonding agent such that areas of the support wafer not covered by the bonding layer are aligned with selected etch lines which etch completely through the silicon wafer to form devices.