Mechanically Shaping, Deforming, Or Abrading Of Substrate Patents (Class 216/52)
  • Patent number: 7010939
    Abstract: In a first polishing step, or in a first half of a super precision polishing, a surface of a glass substrate is polished with a first suspension. The first suspension contains particles and a dispersion agent in which the particles are dispersed. The main ingredient of the particles is silicon dioxide (SiO2), and the average size (D50) of the particles is equal to or less than 100 nm. The dispersion medium comprises an acid solution the pH of which is equal to or less than 4. In a second polishing step, or in a latter half of the super precision polishing, the surface of the glass substrate is continuously polished with a second suspension. The second suspension contains particles and a dispersion agent in which the particles are dispersed. The main ingredient of the particles is silicon dioxide (SiO2), and the average size (D50) of the particles is equal to or less than 100 nm. The dispersion medium comprises an alkaline solution the pH of which is equal to or more than 8.5.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: March 14, 2006
    Assignee: Hoya Corporation
    Inventors: Takamasa Yoshikawa, Koichi Suzuki
  • Patent number: 6982042
    Abstract: A method for reducing noise in a lapping guide. Selected portions of a Giant magnetoresistive device wafer are masked, thereby defining masked and unmasked regions of the wafer in which the unmasked regions include lapping guides. The wafer is bombarded with ions such that a Giant magnetoresistive effect of the unmasked regions is reduced.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: January 3, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Mark A. Church, Wipul Pemsiri Jayasekara, Howard Gordon Zolla
  • Patent number: 6979713
    Abstract: A curable composition comprises: blocked polyisocyanate, curative, and a crosslinked copolymer of monomers comprising at least one free-radically polymerizable carboxylic acid and at least one of an alkyl or alkaryl(meth)acrylate. Methods of making the curable compositions and their use in the manufacture of abrasive articles are also disclosed.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: December 27, 2005
    Assignee: 3M Innovative Properties Company
    Inventor: Loren L. Barber, Jr.
  • Patent number: 6972844
    Abstract: An illustrative object of the present invention is to provide a microprocessing apparatus by which an original and a substrate to be processed can be aligned with each other with a higher precision. Disclosed in this connection is an apparatus for transferring a pattern of an original onto a substrate while maintaining the original and the substrate in contact with each other or in close proximity to each other, wherein the apparatus includes an original holding device for holding the original, a substrate holding device for holding the substrate, a reference mark, and a position measuring system for measuring a relative positional relationship between the reference mark and a mark formed on at least one of the original and the substrate.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: December 6, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshinobu Tokita
  • Patent number: 6969668
    Abstract: A method of fabricating substrates, e.g., bulk wafers, silicon on insulator wafers, silicon on saphire, optoelectronic substrates. The method includes providing a substrate (e.g., silicon, gallium arsenide, gallium nitride, quartz). The substrate has a film characterized by a non-uniform surface, which includes a plurality of defects. At least some of the defects are of a size ranging from about 100 Angstroms and greater. The method also includes applying a combination of a deposition species for deposition of a deposition material and an etching species for etching etchable material. The combination of the deposition species and the etching species contact the non-uniform surface in a thermal setting to reduce a level of non-uniformity of the non-uniform surface by filling a portion of the defects to smooth the film of material. The smoothed film of material is substantially free from the defects and is characterized by a surface roughness of a predetermined value.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: November 29, 2005
    Assignee: Silicon Genesis Corporation
    Inventors: Sien G. Kang, Igor J. Malik
  • Patent number: 6960307
    Abstract: The present invention discloses a method and apparatus for the directed formation of a re-entrant micro-jet formed upon the collapse of a cavitation bubble formed proximate to a work surface placed in a fluid. A mask containing an orifice, placed between the work surface and the cavitation bubble, is utilized to direct the re-entrant micro-jet to the work surface. The cavitation bubble may be formed in the desired location by focusing an energy flow proximate to the mask. The energy flow may be obtained by radiation from laser, x-ray, or electrical discharge sources.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: November 1, 2005
    Inventor: Mark L. LeClair
  • Patent number: 6958795
    Abstract: A composite liquid crystal panel includes a plurality of liquid crystal panels and a picture display surface. It cuts the border of each liquid crystal panel to a width of only one pixel, then bonding the panels together, installing the picture display surface on the liquid crystal panel, and distributing a portion of light from the normal pixels adjoining the border to the pixels corresponding to the border to resolve the gap problem. Light distribution is accomplished by using a pair of mirrors and a pair of reflecting surfaces to reflect the light of the pixels, so that light may be reflected above the pixels on the border and generate light. Then the pixels on the border and the pixels adjoining the border are redefined to form an image dot. Finally, through redistributing the light, the seams on the border may be completely eliminated.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: October 25, 2005
    Assignee: Delta Electronics, Inc.
    Inventors: He-Chiang Liu, Hsiao-Yi Li, Hung-Lung Cheng
  • Patent number: 6955767
    Abstract: The lithographic process described herein involves aligning a patterned mold with respect to an alignment mark that is disposed on a substrate based upon interaction of a scanning probe with the alignment mark. By this method, the patterned mold may be aligned to an atomic accuracy (e.g., on the order of 10 nm or less), enabling nanometer-scale devices to be fabricated. A device formed by this lithographic method and a system for implementing this lithographic method with alignment also are described.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 18, 2005
    Assignee: Hewlett-Packard Development Company, LP.
    Inventor: Yong Chen
  • Patent number: 6949199
    Abstract: A method of performing thermal imprint lithography of a surface of a thermoplastic layer-coated workpiece for forming a pattern therein comprises pre-heating the workpiece to a pre-selected high temperature prior to inserting the workpiece in a stamping/imprinting tool maintained at a predetermined lower temperature, whereby the interval for thermal cycling of the stamping/imprinting tool between higher and lower temperatures is eliminated or at least reduced. Applications of the method include forming servo patterns in disk-shaped substrates for hard disk recording media.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: September 27, 2005
    Assignee: Seagate Technology LLC
    Inventors: Gennady Gauzner, Koichi Wago, David Shiao-Min Kuo
  • Patent number: 6939474
    Abstract: A method for fabricating microelectronic spring structures is disclosed. In an initial step of the method, a layer of sacrificial material is formed over a substrate. Then, a contoured surface is developed in the sacrificial material, such as by molding the sacrificial material using a mold or stamp. The contoured surface provides a mold for at least one spring form, and preferably for an array of spring forms. If necessary, the sacrificial layer is then cured or hardened. A layer of spring material is deposited over the contoured surface of the sacrificial material, in a pattern to define at least one spring form, and preferably an array of spring forms. The sacrificial material is then at least partially removed from beneath the spring form to reveal at least one free-standing spring structure. A separate conducting tip is optionally attached to each resulting spring structure, and each structure is optionally plated or covered with an additional layer or layers of material, as desired.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: September 6, 2005
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Stuart W. Wenzel
  • Patent number: 6932914
    Abstract: The present invention discloses a method and apparatus for the directed formation of a re-entrant micro-jet formed upon the collapse of a working cavitation bubble formed proximate to a work surface. A target bubble, formed between the work surface and the working cavitation bubble, is utilized to direct the re-entrant micro-jet to the work surface.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: August 23, 2005
    Inventor: Mark L. LeClair
  • Patent number: 6932934
    Abstract: The present invention is directed to methods for patterning a substrate by imprint lithography. An imprint lithography method includes placing a curable liquid on a substrate. A template may be contacted with the curable liquid. Surface forces at the interface of the curable liquid and the template cause the curable liquid to gather in an area defined by a lower surface of the template. Alternately, the curable liquid may fill one or more relatively shallow recesses in the template and the area under the template lower surface. Activating light is applied to the curable liquid to form a patterned layer on the substrate.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: August 23, 2005
    Assignee: Molecular Imprints, Inc.
    Inventors: Byung Jin Choi, Mario J. Meissl, Sidlagata V. Sreenivasan, Michael P. C. Watts
  • Patent number: 6913704
    Abstract: A magnetic head including a dual layer induction coil. Following the deposition of a first magnetic pole (P1) a first induction coil is fabricated. Following a chemical mechanical polishing (CMP) step a layer of etchable insulation material is deposited followed by the fabrication of a second induction coil etching mask. A reactive ion etch process is then conducted to etch the second induction coil trenches into the second etchable insulation material layer. The etching depth is controlled by the width of the trenches in an aspect ratio dependent etching process step. The second induction coil is next fabricated into the second induction coil trenches, preferably utilizing electrodeposition techniques. Thereafter, an insulation layer is deposited upon the second induction coil, followed by the fabrication of a second magnetic pole (P2) upon the insulation layer.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: July 5, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Richard Hsiao, Yiping Hsiao
  • Patent number: 6913702
    Abstract: There are provided a method of processing an amorphous material which is capable of forming surface projections of uniform height in desired positions on the amorphous material, and a magnetic disk substrate using the amorphous material. A predetermined pressure is applied to parts of a surface of an amorphous material to form high-density compressed layers, and a surface layer of the amorphous material is removed using a treatment agent that has a different removal capacity in the compressed layers and a remaining uncompressed layer, thus making the compressed layers project out. For example, the treatment agent may be an etching solution having a different etching rate in the compressed layers and the uncompressed layer.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: July 5, 2005
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Junji Kurachi, Kazuishi Mitani, Yasuhiro Saito, Hiroyuki Inomata
  • Patent number: 6909998
    Abstract: The present invention provides a method for in-situ real-time monitoring of mold deformation by using a database to store temporary information during the following steps: (a) providing a mark on the mold body that is easy to observe in order to monitor the mold deformation, (b) installing a signal source and a monitor device for monitoring the deformation quantity on the mold, (c) transforming the above deformation quantity into computer signals for storing in the database and (d) issuing controlling or warning signals to the imprinting machine based on the processing results of the stored information in the database.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: June 21, 2005
    Inventors: Hong Hocheng, Chin Chung Nien
  • Patent number: 6908663
    Abstract: A method and composition for providing a colored high performance wear surface for floor coverings is disclosed. Specifically, the floor covering includes a substrate and a high performance layer comprising a radiation cured pigmented composition. The exposed surface of the floor covering has a stain resistance of less than about 150 Delta E units. A pigmented high performance wear layer can be added in register with a printed design on the substrate or in register with an embossed texture of the substrate. Additionally, a high performance topcoat wear layer may be added. The pigmented high performance layer may include a nacreous pigment.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: June 21, 2005
    Assignee: AWI Licensing Company
    Inventors: Ralph W. Wright, Jr., Gary A. Sigel, Jennifer W. Sager, William J. Kauffman
  • Patent number: 6905622
    Abstract: Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: June 14, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Joseph Yahalom, Sivakami Ramanathan, Chris R. McGuirk, Srinivas Gandikota, Girish Dixit
  • Patent number: 6899816
    Abstract: Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: May 31, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Deenesh Padhi, Joseph Yahalom, Sivakami Ramanathan, Chris R. McGuirk, Srinivas Gandikota, Girish Dixit
  • Patent number: 6890445
    Abstract: In the method, a cap wafer surface is lithographically etched at time of fabrication, so that a raised ridge onto which bonding material is placed is formed near a perimeter of a desired cavity region. This is done in order to reduce the bonding area between the cap wafer and electronic device wafers, so as to provide a better defined standoff. In another aspect of the method, the cap wager surface is lithographically etched to form recesses or trenches near the perimeter of a cavity region, each recess being filled with a sealing material, and polished if necessary to be flush with the cap wafer surface. Thereafter, the cap wafer surface is etched so that the filled recesses become the raised ridges which are used to bond a cap wafer to an electronic device wafer.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: May 10, 2005
    Assignee: Agere Systems, Inc.
    Inventors: Bradley Paul Barber, LaRue Norman Dunkleberger, Jason Paul Goodelle, Thomas Herbert Shilling
  • Patent number: 6888611
    Abstract: In a liquid-crystal display element each individual liquid-crystal injection area is surrounded by a seal, and the overall liquid-crystal injection area is surrounded by an array substrate and an opposing substrate surrounded by an outer peripheral seal having an aperture and are adhered together, the aperture of the outer peripheral seal being sealed by a hole sealant, and the surface of at least one of the array substrate and the opposing substrate being polished with a polishing material, which is then removed, after which cutting along the aperture is done to separate the individual liquid-crystal injection areas, thereby facilitating the achievement of a thin liquid-crystal display element, while improving the quality and yield thereof.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: May 3, 2005
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Hirofumi Kamosawa, Takeya Shimizu
  • Patent number: 6884362
    Abstract: A method of preparing a TEM sample. A focused ion beam is used to deposit a mask on the material to be sampled. Reactive ion etching removes material not protected by the mask, leaving a wall thin enough to be imaged by TEM.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: April 26, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Lancy Tsung, Adolfo Anciso
  • Patent number: 6869350
    Abstract: This invention describes improved polishing pads useful in the manufacture of semiconductor devices or the like. The pads of the present invention have an advantageous hydrophilic polishing material and have an innovative surface topography and texture which generally improves predictability and polishing performance.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: March 22, 2005
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: John H. V. Roberts, David B. James, Lee Melbourne Cook
  • Patent number: 6850296
    Abstract: A composite liquid crystal panel includes a plurality of liquid crystal panels and a picture display surface. It cuts the border of each liquid crystal panel to a width of only one pixel, then bonding the panels together, installing the picture display surface on the liquid crystal panel, and distributing a portion of light from the normal pixels adjoining the border to the pixels corresponding to the border to resolve the gap problem. Light distribution is accomplished by using a pair of mirrors and a pair of reflecting surfaces to reflect the light of the pixels, so that light may be reflected above the pixels on the border and generate light. Then the pixels on the border and the pixels adjoining the border are redefined to form an image dot. Finally, through redistributing the light, the seams on the border may be completely eliminated.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: February 1, 2005
    Assignee: Delta Electronics, Inc.
    Inventors: He-Chiang Liu, Hsiao-Yi Li, Hung-Lung Cheng
  • Patent number: 6843712
    Abstract: This invention describes improved polishing pads useful in the manufacture of semiconductor devices or the like. The pads of the present invention have an advantageous hydrophilic polishing material and have an innovative surface topography and texture which generally improves predictability and polishing performance.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: January 18, 2005
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: John H. V. Roberts, David B. James, Lee Melbourne Cook
  • Publication number: 20040267205
    Abstract: A micro-needle according to the invention protrudes from a support member. The needle comprises a needle body portion, a closed pointed tip portion, and an inner lumen extending through said support member and into said protruding needle. The needle body portion has at least one side opening communicating with said inner lumen. The method of making the needle comprises providing a mask on the front side of an etchable wafer such that the vertical projection of said mask at least partially covers the extension of a hole made in the back side. Said mask is isotropically underetched to remove wafer material. An anisotropic etch forms a protruding structure. Optionally a second isotropic etch on said protruding structure exposes the blind hole. Optionally a final anisotropic etch extends the needle without forming side openings.
    Type: Application
    Filed: August 11, 2004
    Publication date: December 30, 2004
    Inventors: Goran Stemme, Patrick Griss
  • Patent number: 6835589
    Abstract: A vertically integrated structure includes a micro-electromechanical system (MEMS) and a chip for delivering signals to the MEMS. The MEMS has an anchor portion having a conductor therethrough, by which it is connected to a substrate. The chip is attached to the MEMS substrate in a direction normal to the substrate surface, so as to make a conductive path from the chip to the MEMS. The chip may be attached by bonding the conductor to C4 metal pads formed on the chip, or by bonding the conductor to metal studs on the chip. The MEMS substrate may be thinned before attachment to the chip, or may be removed from the underside of the MEMS. A temporary carrier plate is used to facilitate handling of the MEMS and alignment to the chip.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: December 28, 2004
    Assignee: International Business Machines Corporation
    Inventors: H. Bernhard Pogge, Michel Despont, Ute Drechsler, Chandrika Prasad, Peter Vettiger, Roy Yu
  • Patent number: 6835318
    Abstract: A method for forming a recognition mark on the back surface of a substrate for a KGD that can be easily produced at a low manufacturing cost and permits repeated use of a substrate is provided. In the method, wiring patterns are formed on a surface of one side of an insulating substrate. The method includes a step of forming a conductive pattern as a recognition mark on one surface where the wiring patterns are formed, and a step of forming a through hole from a surface where the wiring pattern is not formed toward the conductive pattern. In the substrate, bumps connected with the KGD are formed on the surface on which the wiring patterns are not formed. Also, the conductive pattern may have a shape as the recognition mark or the through hole may have the shape as the recognition mark.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: December 28, 2004
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Takeyuki Suzuki, Noriyuki Matsuoka
  • Publication number: 20040238487
    Abstract: Methods of surface finishing a component useful for a plasma processing apparatus are provided. The component includes at least one plasma-exposed quartz glass surface. The method includes mechanically polishing, chemically etching and cleaning the plasma-exposed surface to achieve a desired surface morphology. Quartz glass sealing surfaces of the component also can be finished by the methods. Plasma-exposed surface and sealing surfaces of the same component can be finished to different surface morphologies from each other.
    Type: Application
    Filed: May 30, 2003
    Publication date: December 2, 2004
    Inventors: Mark W. Kiehlbauch, John E. Daugherty
  • Patent number: 6818139
    Abstract: In a method for forming a micro-pattern on a substrate (200), polymer material having a solvent is coated on the substrate, thereby forming a polymer film on the substrate. Then, a mold (204) having a predetermined shape is compressed into the polymer film (202) on the substrate by employing a predetermined compression technique to entail a plastic deformation of the polymer film, thereby patterning the polymer film. This compression procedure is performed at a room temperature, e.g., of about 10 to about 30° C. In the present invention, before the mold (204) is pressed into the polymer film (202), a free volume in the polymer film is previously increased so that a pressure applied on the polymer material needed to plastically deform the polymer film is reduced. Thereafter, etching is performed on the substrate through the use of the patterned polymer film as an etching mask, thereby forming a micro-pattern on the substrate.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: November 16, 2004
    Assignee: Minuta Technology Co., Ltd.
    Inventors: Hong Hie Lee, Dahl Young Khang
  • Patent number: 6813077
    Abstract: A method for fabricating an integrated optical isolator includes depositing a wire grid material on a magneto-optical substrate and depositing a resist film on the wire grid material. The method further includes bringing a mold with a wire grid pattern on contact with the resist film and compressing the mold and resist film together so as to emboss the wire grid pattern in the resist film. The method further includes transferring the wire grid pattern in the resist film to the wire grid material on the magneto-optical substrate by etching.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: November 2, 2004
    Assignee: Corning Incorporated
    Inventors: Nicholas F. Borrelli, David G. Grossman, Kenjro Hasui, Tamio Kosaka, Nick J. Visovsky
  • Patent number: 6805807
    Abstract: A method of processing the surface of a workpiece using an adaptive gas cluster ion beam is disclosed. The invention provides a method of reducing the surface roughness and/or improving the surface smoothing of a workpiece by etching at various etch rates. The workpiece is initially processed with a gas cluster ion beam having an initial etch rate and then the beam is adjusted so that the workpiece is processed with one or more lower etch rates. The advantages are minimum required processing time, minimum remaining roughness of the final surface, and minimum material removal in order to attain a desired level of smoothness.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: October 19, 2004
    Assignee: Epion Corporation
    Inventor: David B. Fenner
  • Patent number: 6804878
    Abstract: A method is provided of smoothing the perturbations on a surface, in particular the surface of a magnetic head slider, the method comprising several steps. At least one air-bearing surface to be smoothed is exposed to an ion species generated from a defined source to form a beam of incident radiation. The beam has a linear axis emanating from the source and thus forms an angle of incident radiation with respect to the surface to be smoothed. The at least one surface is smoothed by exposing the surface(s) to be smoothed to the beam of incident radiation, where the angle of incident radiation is less than 90° relative to a vertical axis drawn perpendicular to the surface to be smoothed. To make a corrosion resistant magnetic head slider, the method further comprises coating the smoothed surface with a layer of amorphous carbon.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: October 19, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard Thomas Campbell, Richard Hsiao, Yiping Hsiao, Son Van Nguyen, Thao John Pham
  • Patent number: 6805808
    Abstract: A method for separating chips from a diamond wafer comprising a substrate, a chemically vapor-deposited diamond layer, and microelectronic elements, with the microelectronic elements protected from thermal damage and degradation caused by the thermally decomposed cuttings produced during the processing steps. (1) Front-side grooves 6 are formed on the chemically vapor-deposited diamond layer 2 by laser processing using a laser such as a YAG, CO2, or excimer laser each having a large output so that the grooves 6 can have a depth 1/100 to 1.5 times the thickness of the diamond layer. (2) The thermally decomposed cuttings produced during the laser processing are removed by using a plasma. (3) Back-side grooves 9 are formed on the substrate 1 by dicing such that the back-side grooves 9 are in alignment with the front-side grooves 6. (4) The diamond wafer 4 is divided into individual chips 10 by applying mechanical stresses.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: October 19, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Satoshi Fujii, Noboru Gotou, Tomoki Uemura, Toshiaki Saka, Katsuhiro Itakura
  • Patent number: 6793778
    Abstract: A method for fabricating a transducer with landing pads without edge fences is described. Preferably an adhesion layer and then the pad layer are deposited in voids in a photoresist. The thickness of the masking layer on the surface of the pad layer should be sufficient to protect pad layer during the subsequent ashing step, but the thickness of the masking material at the sidewalls on the pad layer fences should be thin enough so that the fences are not protected during ashing. After stripping the photoresist material, the structure is ashed preferably by an oxygen-containing plasma. The ashing process, with assistance from mechanical abrasion, removes the fence structures on the pad layer, since the thinner masking layer at the sidewalls provides less protection to the fence structures than is provided to the bulk of the pad layer where the masking layer is thicker.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: September 21, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands N.V.
    Inventors: Detlef Gador, Cherngye Hwang, Eun Kyoung Row, Ning Shi
  • Patent number: 6793831
    Abstract: A method for fabricating devices in a pre-assembled state comprising forming plural laminae, registering the laminae, and bonding the laminae one to another is described. The plural laminae contain the substructures and structures of the device. The substructures are coupled to structures and other substructures by fixture bridges in the pre-assembled state. The substructures of the device are dissociated by eliminating the fixture bridges. The plural laminae are registered and bonded to form the device either before or after the fixture bridges are eliminated. The fixture bridges can be eliminated in a variety of ways, including vaporization by electrical current, chemical dissolution, or thermochemical dissociation. One method to selectively bond the laminae together is by microprojection welding. Microprojection welding comprises forming laminae with projections that extend from at least one planar surface of the lamina.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: September 21, 2004
    Assignee: State of Oregon acting by and through the State Board of Higher Education on behalf of Oregon State University
    Inventors: Brian Kevin Paul, Richard Budd Peterson, Tyson Jedd Terhaar
  • Patent number: 6790373
    Abstract: A method for forming many microlenses comparatively easily and effectively is provided. On one end of an optical substrate is formed a plurality of lens planes at regular intervals. Lens areas containing the lens planes are partially covered by an etching mask and etching processing is performed on areas being exposed outside the etching mask to remove the areas to a specified depth. While the lens planes formed on one surface of the optical substrate are being held by a support substrate, polishing processing is performed on another end face of the optical substrate and each microlens formed in the lens areas is separated from the support substrate.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: September 14, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yoshinori Maeno, Takeshi Takamori, Hironori Sasaki, Masahiro Uekawa
  • Patent number: 6783599
    Abstract: Contaminants are removed from a surface of a substrate by applying a fluid to the surface; lowering the temperature of the fluid to form a solid layer of the fluid and entrap contaminants therein; and applying energy to the layer and/or substrate to cause the layer containing the contaminants to separate from the surface.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventors: Glenn W. Gale, Frederick W. Kern, Jr., William Alfred Syverson
  • Patent number: 6776852
    Abstract: A process of removing excess holefill material from a surface of an electronic substrate in which the holefill residue is contacted with a swelling agent followed by planarizing of the surface in the presence of an agent no stronger than a liquid having a pH of about 6 to about 8.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Christina M. Boyko, Brian E. Curcio, Donald S. Farquhar, Michael Wozniak
  • Patent number: 6770213
    Abstract: A method is disclosed for evaluating an anisotropic etch in a microstructure. First a film is formed on a substrate. Next a series of holes of progressively different area and having specific geometric shapes are formed through the film. An anisotropic etch is carried out in the microstructure through the holes by relying on different etch rates in different crystal planes under known and reproducible conditions. Finally, the microstructure is inspected through the holes after the anisotropic etch to compare results from holes of different area. The method is useful in the determination of etch depth.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: August 3, 2004
    Assignee: Dalsa Semiconductor Inc.
    Inventors: Robert Antaki, Riopel Yan
  • Patent number: 6755984
    Abstract: A micro-casted silicon carbide nano-imprinting stamp and method of making a micro-casted silicon carbide nano-imprinting stamp are disclosed. A micro-casting technique is used to form a foundation layer and a plurality of nano-sized features connected with the foundation layer. The foundation layer and the nano-sized features are unitary whole that is made entirely from a material comprising silicon carbide (SiC) which is harder than silicon (Si) alone. As a result, the micro-casted silicon carbide nano-imprinting stamp has a longer service lifetime because it can endure several imprinting cycles without wearing out or breaking. The longer service lifetime makes the micro-casted silicon carbide nano-imprinting stamp economically feasible to manufacture as the manufacturing cost can be recouped over the service lifetime.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: June 29, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Heon Lee, Gun-Young Jung
  • Publication number: 20040089543
    Abstract: The invention includes PVD targets having non-sputtered regions (such as, for example, sidewalls), and particle-trapping features formed along the non-sputtered regions. In particular aspects, the particle-trapping features can comprise a pattern of bent projections forming receptacles, and can comprise microstructures on the bent projections. The targets can be part of target/backing plate constructions, or can be monolithic. The invention also includes methods of forming particle-trapping features along sidewalls of a sputtering target or along sidewalls of a target/backing plate construction. The features can be formed by initially forming a pattern of projections along a sidewall. The projections can be bent and subsequently exposed to particles to form microstructures on the bent projections.
    Type: Application
    Filed: July 9, 2003
    Publication date: May 13, 2004
    Inventor: Jaeyeon Kim
  • Patent number: 6733682
    Abstract: The present invention relates to a method for the manufacture of a matrix and to a matrix (1) thus manufactured, at least one surface section (2) displaying a microstructure, which matrix (3) is suitable for inclusion as a mould insert in a mould cavity or in a cavity, in a unit producing plastic components, in order to assign said plastic components an opposing micostructure in a corresponding surface section. An original (3) with a surface section (4) displaying a microstructure less than 500 &mgr;m is used in order to apply on this original layer upon layer of a material (11, 12, 13, 14) and/or mixtures of material producing a matrix, and thereafter the matrix (1) is removed from said original (3) or the material in the original is removed.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: May 11, 2004
    Assignee: AMIC AB
    Inventors: Henrik Björkman, Klas Hjort, Joakim Andersson, Patrik Hollman
  • Patent number: 6722018
    Abstract: A method of making a magnetic write head includes forming a strip of negative photoresist on a wafer at an ABS site with a width that defines a track width of the write head and which has a height above a desired height of a second pole tip. An alumina layer is formed on the wafer and on the strip with a thickness above the wafer that is equal to or greater than a desired height of the second pole tip. The alumina layer is then mechanically polished until the negative photoresist strip is exposed. The negative photoresist strip is then removed leaving an opening in the alumina layer after which the second pole tip is formed in the opening. In a first embodiment of the invention the second pole tip and the second pole piece yoke are one piece and are planar and in a second embodiment of the invention a P2 yoke is stitched to the second pole tip. In both embodiments the first pole piece of the write head can be notched without damaging the second pole tip.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: April 20, 2004
    Assignee: International Business Machines Corporation
    Inventor: Hugo Alberto Emilio Santini
  • Patent number: 6719915
    Abstract: A method of forming a relief image in a structure comprising a substrate and a transfer layer formed thereon comprises covering the transfer layer with a polymerizable fluid composition, and then contacting the polymerizable fluid composition with a mold having a relief structure formed therein such that the polymerizable fluid composition fills the relief structure in the mold. The polymerizable fluid composition is subjected to conditions to polymerize polymerizable fluid composition and form a solidified polymeric material therefrom on the transfer layer. The mold is then separated from the solid polymeric material such that a replica of the relief structure in the mold is formed in the solidified polymeric material; and the transfer layer and the solidified polymeric material are subjected to an environment to selectively etch the transfer layer relative to the solidified polymeric material such that a relief image is formed in the transfer layer.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: April 13, 2004
    Assignee: Board of Regents, The University of Texas System
    Inventors: Carlton Grant Willson, Matthew Earl Colburn
  • Patent number: 6712985
    Abstract: A method and apparatus for the manufacture of thin film magnetic transducers using a compliant pad or mat or surface in a lapping process is disclosed. The lapping process is applied to heads to eliminate both ductile element connections between the MR and shields and poletip and shield protrusion. A lapping media is dispensed onto an interface surface of a compliant pad. Then, the interface surface is engaged to the surface of a head outside a region comprising transducers defining a head gap. The pad is then moved over the head in a direction parallel to the head gap while using a head rail to guide the pad. The soft, compliant pad conforms to the head rail to ensure parallel movement. The pad is typically not stopped at the elements, but rather moves from one end of the head to the other to prevent bridging and damage that might occur during start/stop on the delicate elements.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: March 30, 2004
    Assignee: Hitachi Global Storage Technologies
    Inventor: Robert Glenn Biskeborn
  • Publication number: 20040055998
    Abstract: A method for providing a smooth wafer surface. The technique includes formulating an abrasive mixture by mixing diamond particles and silica particles in a solution based on a predetermined diamond/silica volume ratio mixing diamond particles, and polishing a surface of the wafer with the abrasive mixture to obtain a desired smoothness.
    Type: Application
    Filed: July 18, 2003
    Publication date: March 25, 2004
    Inventors: Fabrice Letertre, Claire Richtarch
  • Patent number: 6706619
    Abstract: A method for creating a layout of at least a portion of a microelectromechanical system is disclosed. In one embodiment, a plurality of die are formed on a wafer. Each die includes a plurality of rows of a plurality of mirror assemblies, a plurality of off-chip electrical contacts, and an electrical trace bus that is disposed between adjacent pairs of rows. This electrical trace bus is electrically interconnected with mirror assemblies in at least one of the rows. A plurality of these die are formed on a wafer. A chip is separated from the wafer such that a chip width is an integer multiple of the die width and such that a chip height is an integer number of the rows of mirror assemblies without requiring the chip height to be an integer multiple of the die height.
    Type: Grant
    Filed: March 16, 2002
    Date of Patent: March 16, 2004
    Assignee: MEMX, Inc.
    Inventors: Samuel Lee Miller, Murray Steven Rodgers
  • Patent number: 6706205
    Abstract: A semiconductor processing article is characterized by extended useful life. The article is used in a semiconductor furnace system, particularly in a low pressure chemical vapor deposition furnace for prolonged periods without requiring cleaning to remove build-up film. The semiconductor processing article is a quartz body characterized by a surface roughness having a first component with an average deviation from a first mean surface of about 2.5 to 50 microns, and a second component with an average deviation from a second mean surface of about 0.25 to 5 microns.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: March 16, 2004
    Assignee: General Electric Company
    Inventors: Thomas Bert Gorczyca, Udo Heinz Retzlaff, Stephan Popp
  • Patent number: 6701613
    Abstract: In a method of manufacturing a multilayer circuit board, cable patterns in a plurality of cable layers can be precisely formed, and the cable layer are formed with higher density, with higher reliability. The multilayer circuit board comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between the electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer. Height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: March 9, 2004
    Assignee: Fujitsu Limited
    Inventor: Kenji Iida
  • Patent number: 6700716
    Abstract: An optical element (10, 10′, 10″) for deflecting light beams (18, 19), which enter and re-emerge from the latter, in such a way that their angle of emergence (&ggr;) is limited, in particular for use as a luminaire-cover, having a plate-like core (11, 11′, 11″) of transparent material which on one side is occupied by microprisms (12, 13) that taper—starting from their root (15)—forming furrows (22), wherein all of the top surfaces (14) of the microprisms form the light-entry face and the other side (21) of the core forms the light-emergence face, and wherein the top surfaces (14) of the microprisms are formed convexly or concavely in a continuous or non-continuous manner, and also a method for producing the optical element (10, 10′, 10″).
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: March 2, 2004
    Assignee: Zumiobel Staff GmbH
    Inventor: Günther Sejkora