Irradiating, Ion Implanting, Alloying, Diffusing, Or Chemically Reacting The Substrate Prior To Etching To Change Properties Of Substrate Toward The Etchant Patents (Class 216/62)
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Patent number: 11827988Abstract: An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.Type: GrantFiled: August 18, 2022Date of Patent: November 28, 2023Assignee: Institute of Microelectronics, Chinese Academy of SciencesInventors: Huilong Zhu, Xiaogen Yin, Chen Li, Anyan Du, Yongkui Zhang
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Patent number: 11756793Abstract: A semiconductor device manufacturing method includes the steps of etching a semiconductor material by using plasma, forming a damage layer on the semiconductor material, and removing the damage layer such that a relatively low temperature process can form a fine pattern with a vertical cross section using a compound semiconductor material or the like.Type: GrantFiled: June 19, 2020Date of Patent: September 12, 2023Assignee: HITACHI HIGH-TECH CORPORATIONInventors: Yohei Ishii, Kathryn Maier, Medhat Khalil
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Patent number: 11340268Abstract: A method may include pressing a sensor module onto a control board such that the sensor module is at an initial position where an air gap is present between a module body of the sensor module and the control board such that compliant pins of the sensor module are partially inserted into the control board. The method may include mounting the control board on a power module to cause pins of the power module to be at least partially inserted into the control board and the sensor module to be at least partially inserted in the power module such that a protrusion is through an opening in a busbar. The method may include pressing the control board onto the power module to cause the pins of the power module to be further inserted into the control board, the sensor module to be further inserted in the power module, and the sensor module to be at a final position.Type: GrantFiled: September 21, 2020Date of Patent: May 24, 2022Assignee: Infineon Technologies AGInventors: Gerald Wriessnegger, Leo Aichriedler, Tomas Manuel Reiter, Christoph Koch, Andreas Schenk, Johannes Hackl, Volker Thorsten Schmidt
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Patent number: 10998162Abstract: A charged-particle beam apparatus is provided with a cathode to emit charged particle beams, an anode to propagate the charged particle beams emitted from the cathode in a sample surface direction, an aperture to propagate a charged particle beam passing through an opening at a predetermined position and of a predetermined shape, among the charged particle beams passing through the anode, in the sample surface direction, and a first electrode that is disposed between the anode and the aperture, and is set at a first electric potential of a polarity repelling a polarity of an ion generated due to collision of a charged particle beam.Type: GrantFiled: September 10, 2018Date of Patent: May 4, 2021Assignee: NUFLARE TECHNOLOGY, INC.Inventors: Nobuo Miyamoto, Munehiro Ogasawara
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Patent number: 10381227Abstract: The invention includes a method of promoting atomic layer etching (ALE) of a surface. In certain embodiments, the method comprises sequential reactions with a metal precursor and a halogen-containing gas. The invention provides a solid substrate obtained according to any of the methods of the invention. The invention further provides a porous substrate obtained according to any of the methods of the invention. The invention further provides a patterned solid substrate obtained according to any of the methods of the invention.Type: GrantFiled: December 18, 2015Date of Patent: August 13, 2019Assignee: The Regents of the University of Colorado, a body corporateInventors: Steven M. George, Younghee Lee
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Patent number: 10381238Abstract: A method and apparatus for selectively etching an organic material on a substrate is described. The method and apparatus includes forming a first plasma-excited process gas containing hydrogen (H) and optionally a noble gas element, exposing the substrate to the first plasma-excited process gas, forming a second plasma-excited process gas containing a noble gas element, exposing the substrate to the second plasma-excited process gas, and cyclically repeating the forming and exposing the first and second plasma-excited process gases at least two cycles to etch the first material selectively relative to the second material.Type: GrantFiled: March 1, 2018Date of Patent: August 13, 2019Assignee: TOKYO ELECTRON LIMITEDInventors: Hiroto Ohtake, Takahito Mukawa
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Patent number: 10062575Abstract: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon from the semiconductor substrate.Type: GrantFiled: September 9, 2016Date of Patent: August 28, 2018Assignee: Applied Materials, Inc.Inventors: Tom Choi, Jungmin Ko, Sean Kang
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Patent number: 9985198Abstract: High-yield fabrication methods are provided for making quartz resonators having thicknesses ranging from one micrometer to several hundred micrometers and thus covering the frequency range from HF to UHF. Plasma dry etching is used to form arbitrary resonator geometries. The quartz resonator structure and the through-quartz vias are formed concurrently. The method includes bonding a quartz device wafer to a quartz handle wafer with a temporary adhesive. Mesa structures formed by plasma dry etching enable the resonators to achieve high-Q operation with energy trapping/mode confinement. A thermo-compression bond integrates the quartz resonators to a host wafer (e.g., an oscillator ASIC) to form oscillators. Silicon cap wafers are bonded over the resonators to the ASIC to provide wafer scale hermetic encapsulation of the quartz oscillators.Type: GrantFiled: May 23, 2014Date of Patent: May 29, 2018Assignee: HRL Laboratories, LLCInventors: David T. Chang, Frederic P. Stratton, Hung Nguyen, Randall L. Kubena
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Patent number: 9947507Abstract: The disclosure provides a method for preparing a cross-section of a sample by milling with a focused ion beam. The cross-section is to be prepared at a pre-defined position. The method includes excavating a trench by milling in a first milling direction. The first milling direction leads away from the position of the cross-section to be prepared. The method also includes excavating the cross-section by enlarging the trench by milling in the reversed milling direction. The second milling direction leads towards the position of the cross-section to be prepared, whereupon the milling is completed at the position where the cross-section is to be cut. The desired largest milling depth is achieved at the completion of this milling step.Type: GrantFiled: July 9, 2015Date of Patent: April 17, 2018Assignee: Carl Zeiss Microscopy GmbHInventor: Lorenz Lechner
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Patent number: 9831341Abstract: The present disclosure provides many different embodiments of an IC device. The IC device includes a gate stack disposed over a surface of a substrate and a spacer disposed along a sidewall of the gate stack. The spacer has a tapered edge that faces the surface of the substrate while tapering toward the gate stack. Therefore the tapered edge has an angle with respect to the surface of the substrate.Type: GrantFiled: June 16, 2014Date of Patent: November 28, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shin-Jiun Kuang, Tsung-Hsing Yu, Yi-Ming Sheu
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Patent number: 9613813Abstract: Methods of processing a workpiece are disclosed. Variability of the critical dimension of semiconductor structures may be affected by the critical dimension of the patterned mask. Ions may be implanted into the patterned mask to change the critical dimension. The ions may be implanted in accordance with an ion implant map, which determines an appropriate dose, energy and type based on the measured critical dimension of the patterned mask at a plurality of locations.Type: GrantFiled: October 28, 2015Date of Patent: April 4, 2017Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Steven Robert Sherman, Todd Henry
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Patent number: 9607847Abstract: A cavity is formed in a semiconductor substrate wherein the width of the cavity is greater than the depth of the cavity and wherein the depth of the cavity is non uniform across the width of the cavity. The cavity may be formed under an electronic device in the semiconductor substrate. The cavity is formed in the substrate by performing a first cavity etch followed by repeated cycles of polymer deposition, cavity etch, and polymer removal.Type: GrantFiled: December 18, 2015Date of Patent: March 28, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Brian E. Goodlin, Karen H. R. Kirmse, Iqbal R. Saraf
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Patent number: 9515294Abstract: A laser beam irradiation apparatus includes a laser light source, a controller for controlling energy of light generated by the laser source, a first optical system for adjusting a shape of light that has passed through the controller, a scanner for adjusting the direction of light that has passed through the first optical system, and an F-theta lens for reducing a beam that has passed through the scanner.Type: GrantFiled: October 9, 2014Date of Patent: December 6, 2016Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Gyoo-Wan Han, Ku-Hyun Kang, Hae-Sook Lee, Jin-Hong Jeun, Kyoung-Seok Cho
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Patent number: 9369788Abstract: An MEMS microphone package includes a substrate, an MEMS microphone, an IC chip and an electrically conductive cover. The substrate includes a first hole, an upper surface, a bottom surface, a side surface, a first electrically conductive layer and a second electrically conductive layer. The side surface has two sides connected to the upper surface and the bottom surface, respectively. The first electrically conductive layer is disposed on the upper surface. The second electrically conductive layer is disposed on the bottom surface. The MEMS microphone is electrically coupled to the substrate. The IC chip is electrically coupled to the substrate. The electrically conductive cover includes a second hole. The electrically conductive cover is bonded to the substrate to form a chamber for accommodating the MEMS microphone and the IC chip. The first hole and the second hole together form an acoustic hole.Type: GrantFiled: December 30, 2014Date of Patent: June 14, 2016Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Tzong-Che Ho, Yu-Wen Fan, Hong-Ren Chen, Chao-Ta Huang
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Patent number: 9346052Abstract: A device for passing a biopolymer molecule includes a nanochannel formed between a surface relief structure, a patterned layer forming sidewalls of the nanochannel and a sealing layer formed over the patterned layer to encapsulate the nanochannel. The surface relief structure includes a three-dimensionally rounded surface that reduces a channel dimension of the nanochannel at a portion of nanochannel and gradually increases the dimension along the nanochannel toward an opening position, which is configured to receive a biopolymer.Type: GrantFiled: August 20, 2013Date of Patent: May 24, 2016Assignee: International Business Machine CorporationInventors: Qinghuang Lin, Gustavo A. Stolovitzky, Chao Wang, Deqiang Wang
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Patent number: 9349570Abstract: An improved method and apparatus for extracting and handling samples for S/TEM analysis. Preferred embodiments of the present invention make use of a micromanipulator and a hollow microprobe probe using vacuum pressure to adhere the microprobe tip to the sample. By applying a small vacuum pressure to the lamella through the microprobe tip, the lamella can be held more securely and its placement controlled more accurately than by using electrostatic force alone. By using a probe having a beveled tip and which can also be rotated around its long axis, the extracted sample can be placed down flat on a sample holder. This allows sample placement and orientation to be precisely controlled, thus greatly increasing predictability of analysis and throughput.Type: GrantFiled: March 31, 2015Date of Patent: May 24, 2016Assignee: FEI CompanyInventors: Enrique Agorio, James Edgar Hudson, Gerhard Daniel, Michael Tanguay, Jason Arjavac
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Patent number: 9336985Abstract: An improved method and apparatus for S/TEM sample preparation and analysis. Preferred embodiments of the present invention provide improved methods for TEM sample creation, especially for small geometry (<100 nm thick) TEM lamellae. A novel sample structure and a novel use of a milling pattern allow the creation of S/TEM samples as thin as 50 nm without significant bowing or warping. Preferred embodiments of the present invention provide methods to partially or fully automate TEM sample creation, to make the process of creating and analyzing TEM samples less labor intensive, and to increase throughput and reproducibility of TEM analysis.Type: GrantFiled: April 13, 2015Date of Patent: May 10, 2016Assignee: FEI CompanyInventors: Jeffrey Blackwood, Stacey Stone
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Patent number: 9260782Abstract: A sample preparation method includes processing a sample by an ion beam to form a thin film portion having a thickness that allows an electron beam to transmit therethrough; supplying deposition gas to the thin film portion; and irradiating the thin film portion with an electron beam to simultaneously form a deposition film on a front surface of the thin film portion and a deposition film on a rear surface of the thin film portion opposed to the front surface. The electron beam transmits through the thin film portion, generating secondary electrons from both the front and rear surfaces that decompose the deposition gas to form the deposition films.Type: GrantFiled: March 15, 2013Date of Patent: February 16, 2016Assignee: HITACHI HIGH-TECH SCIENCE CORPORATIONInventors: Xin Man, Ikuko Nakatani
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Patent number: 9099481Abstract: In one embodiment, methods for making semiconductor devices are disclosed.Type: GrantFiled: March 7, 2014Date of Patent: August 4, 2015Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jan {hacek over (S)}ik, Petr Kostelník, Luká{hacek over (s)} Válek, Michal Lorenc, Milo{hacek over (s)} Pospí{hacek over (s)}il, David Lysá{hacek over (c)}ek, John Michael Parsey, Jr.
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Publication number: 20150144594Abstract: A plasma processing apparatus includes a processing chamber which plasma-processes a sample, a first high-frequency power supply which supplies first high-frequency power for plasma generation to the processing chamber, a second high-frequency power supply which supplies second high-frequency power to a sample stage on which the sample is placed and a pulse generation device which generate first pulses for time-modulating the first high-frequency power and second pulses for time-modulating the second high-frequency power. The pulse generation device includes a control device which controls the first and second pulses so that frequency of the first pulses is higher than frequency of the second pulses and the on-period of the second pulse is contained in the on-period of the first pulse.Type: ApplicationFiled: January 30, 2015Publication date: May 28, 2015Inventors: Shunsuke Kanazawa, Naoki Yasui, Michikazu Morimoto, Yasuo Ohgoshi
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Patent number: 8984741Abstract: A method for manufacturing a magnetic read sensor allows for the construction of a very narrow trackwidth sensor while avoiding problems related to mask liftoff and shadowing related process variations across a wafer. The process involves depositing a plurality of sensor layers and forming a first mask structure. The first mask structure has a relatively large opening that encompasses a sensor area and an area adjacent to the sensor area where a hard bias structure can be deposited. A second mask structure is formed over the first mask structure and includes a first portion that is configured to define a sensor dimension and a second portion that is over the first mask structure in the field area.Type: GrantFiled: April 27, 2012Date of Patent: March 24, 2015Assignee: HGST Netherlands B.V.Inventors: Yi Zheng, Guomin Mao, Hicham M. Sougrati, Xiaozhong Dang
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Patent number: 8974683Abstract: A method of reducing roughness in an opening in a surface of a resist material disposed on a substrate, comprises generating a plasma having a plasma sheath and ions therein. The method also includes modifying a shape of a boundary defined between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the boundary facing the resist material is not parallel to a plane defined by the surface of the substrate. The method also includes providing a first exposure of ions while the substrate is in a first position, the first exposure comprising ions accelerated across the boundary having the modified shape toward the resist material over an angular range with respect to the surface of the substrate.Type: GrantFiled: September 9, 2011Date of Patent: March 10, 2015Inventors: Ludovic Godet, Patrick M. Martin, Joseph C. Olson, Andrew J. Hornak
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Patent number: 8963337Abstract: A semiconductor wafer assembly formed by bonding a support wafer to a thin wafer using a double-sided bonding release tape. The support wafer provides support for the thin target wafer such that existing handling tools can accommodate transporting and processing the assembly without compromising the profile of the thin target wafer.Type: GrantFiled: September 29, 2010Date of Patent: February 24, 2015Assignee: Varian Semiconductor Equipment AssociatesInventor: Arthur Paul Riaf
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Patent number: 8945416Abstract: A laser processing method of converging laser light into an object to be processed made of silicon so as to form a modified region and etching the object along the modified region so as to form the object with a through hole comprises an etch resist film producing step of producing an etch resist film resistant to etching on an outer surface of the object; a laser light converging step of converging the laser light at the object after the etch resist film producing step so as to form the modified region along a part corresponding to the through hole in the object and converging the laser light at the etch resist film so as to form a defect region along a part corresponding to the through hole in the etch resist film; and an etching step of etching the object after the laser light converging step so as to advance the etching selectively along the modified region and form the through hole.Type: GrantFiled: July 19, 2011Date of Patent: February 3, 2015Assignee: Hamamatsu Photonics K.K.Inventors: Hideki Shimoi, Keisuke Araki
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Patent number: 8914955Abstract: A method for manufacturing a piezoelectric element includes a process for forming a first conductive layer, a process for forming a piezoelectric layer having a region serving as an active region, a process for forming a second conductive layer, which overlaps with the region, a process for forming a third conductive layer, which overlaps with the region, on the second conductive layer, a process for forming an opening portion that divides the third conductive layer into a first portion and a second portion, a process for forming a resist layer that covers the opening portion and a peripheral portion at the side of the opening portion of the first portion and the second portion; a process for etching the third conductive layer to form a first conductive portion and a second conductive portion, and a process for etching the second conductive layer to form a third conductive portion.Type: GrantFiled: July 7, 2011Date of Patent: December 23, 2014Assignee: Seiko Epson CorporationInventors: Eiju Hirai, Hiroshi Ito, Toshihiro Shimizu, Jiro Kato
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Publication number: 20140360978Abstract: Provided is a method of manufacturing a liquid ejection head including: a substrate having energy generating elements disposed thereon; and an ejection orifice forming member having ejection orifices, the substrate and the ejection orifice forming member forming a flow path therebetween, the method including: forming, on the substrate, a mold having a recessed portion at a position corresponding to a region in which each of the ejection orifices is formed and in a vicinity of the position; forming a coating layer by chemical vapor deposition so as to cover the mold; and forming the ejection orifices through the coating layer to obtain the ejection orifice forming member.Type: ApplicationFiled: May 27, 2014Publication date: December 11, 2014Applicant: CANON KABUSHIKI KAISHAInventor: Masaya Uyama
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Publication number: 20140346142Abstract: A method for making a chemical contrast pattern uses directed self-assembly of block copolymers (BCPs) and sequential infiltration synthesis (SIS) of an inorganic material. For an example with poly(styrene-block-methyl methacrylate) (PS-b-PMMA) as the BCP and alumina as the inorganic material, the PS and PMMA self-assemble on a suitable substrate. The PMMA is removed and the PS is oxidized. A surface modification polymer (SMP) is deposited on the oxidized PS and the exposed substrate and the SMP not bound to the substrate is removed. The structure is placed in an atomic layer deposition chamber. Alumina precursors reactive with the oxidized PS are introduced and infuse by SIS into the oxidized PS, thereby forming on the substrate a chemical contrast pattern of SMP and alumina. The resulting chemical contrast pattern can be used for lithographic masks, for example to etch the underlying substrate to make an imprint template.Type: ApplicationFiled: May 25, 2013Publication date: November 27, 2014Inventors: Yves-Andre Chapuis, Ricardo Ruiz, Lei Wan
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Patent number: 8893376Abstract: A method of forming a magnetic recording head is provided. The method comprises the steps of forming a damascene trench comprising a lower region having a substantially trapezoidal cross-section and an upper region having a substantially rectangular cross-section, and providing a magnetic material within the damascene trench.Type: GrantFiled: August 7, 2012Date of Patent: November 25, 2014Assignee: Western Digital(Fremont), LLCInventors: Changqing Shi, Ming Jiang
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Patent number: 8894868Abstract: A method of forming an aperture (e.g., a through via, a blind via, a trench, an alignment feature, etc.) within a substrate includes irradiating a substrate with a laser beam to form a laser-machined feature having a sidewall. The laser-machined feature is then processed to change at least one characteristic (e.g., the sidewall surface roughness, diameter, taper, aspect ratio, cross-sectional profile, etc.) of the laser-machined feature. The laser-machined feature can be processed to form the aperture by performing an isotropic wet-etch process employing an etchant solution containing HNO3, HF and, optionally acetic acid.Type: GrantFiled: October 6, 2011Date of Patent: November 25, 2014Assignee: Electro Scientific Industries, Inc.Inventors: Andy Hooper, Daragh Finn, Tim Webb, Lynn Sheehan, Kenneth Pettigrew, Yu Chong Tai
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Patent number: 8889562Abstract: Disclosed is an improved double patterning method for forming openings (e.g., vias or trenches) or mesas on a substrate. This method avoids the wafer topography effects seen in prior art double patterning techniques by ensuring that the substrate itself is only subjected to a single etch process. Specifically, in the method, a first mask layer is formed on the substrate and processed such that it has a doped region and multiple undoped regions within the doped region. Then, either the undoped regions or the doped region can be selectively removed in order to form a mask pattern above the substrate. Once the mask pattern is formed, an etch process can be performed to transfer the mask pattern into the substrate. Depending upon whether the undoped regions are removed or the doped region is removed, the mask pattern will form openings (e.g., vias or trenches) or mesas, respectively, on the substrate.Type: GrantFiled: July 23, 2012Date of Patent: November 18, 2014Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Ying Zhang
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Patent number: 8889022Abstract: One illustrative method disclosed herein includes forming a structure above a semiconductor substrate, performing a conformal deposition process to form a layer of undoped spacer material above the structure, performing an angled ion implant process to form a region of doped spacer material in the layer of undoped spacer material while leaving other portions of the layer of undoped spacer material undoped, and, after performing the angled ion implant process, performing at least one etching process that removes the undoped portions of the layer of undoped spacer material and thereby results in a sidewall spacer comprised of the doped spacer material positioned adjacent at least one side, but not all sides, of the structure.Type: GrantFiled: March 1, 2013Date of Patent: November 18, 2014Assignee: GLOBALFOUNDRIES Inc.Inventors: Hans-Peter Moll, Joachim Patzer
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Patent number: 8881378Abstract: A method is described to improve performance of a magneto-resistive (MR) sensor under conditions of high areal density. The free layer is partially etched away, the removed material being replaced by a magnetic flux guide structure that reduces the free layer's demagnetization field. This in turn reduces the stripe height of the sensor so that the resolution and the read-back signal are enhanced without increasing noise and instability.Type: GrantFiled: August 22, 2011Date of Patent: November 11, 2014Assignee: Headway Technologies, Inc.Inventors: Yuchen Zhou, Joe Smyth, Min Li, Glen Garfunkel
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Patent number: 8883026Abstract: A substrate processing method includes a water removing step of removing water from a substrate, a silylating step of supplying a silylating agent to the substrate after the water removing step, and an etching step of supplying an etching agent to the substrate after the silylating step. The substrate may have a surface on which a nitride film and an oxide film are exposed and in this case, the etching step may be a selective etching step of selectively etching the nitride film by the etching agent. The etching agent may be supplied in a form of a vapor having an etching component.Type: GrantFiled: November 28, 2012Date of Patent: November 11, 2014Assignee: SCREEN Holdings Co., Ltd.Inventors: Takashi Ota, Yuya Akanishi, Akio Hashizume
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Patent number: 8845913Abstract: An ion radiation damage prediction method includes a parameter computation step of computing the incidence energy and incidence angle of an incident ion hitting a fabricated object, and a step of searching for data in databases created in advance on the basis of the computed incidence energy and angle, the databases storing distributions of quantities of crystalline defects having an effect on the fabricated object, ion reflection probabilities and ion penetration depths. The method also includes finding the penetration depth and location of the incident ion based on the data found in the searching step and based on the computed incidence energy and angle, and computing a quantity of defects in the fabricated object from the penetration depth and location. A distribution of defects may be computed by performing the aforementioned steps for many incident ions.Type: GrantFiled: August 28, 2013Date of Patent: September 30, 2014Assignee: Sony CorporationInventors: Nobuyuki Kuboi, Shoji Kobayashi
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Publication number: 20140263180Abstract: Embodiments of the invention provide methods for processing a substrate within a processing chamber. In one embodiment, the method comprises providing a precursor gas mixture into the processing chamber, the precursor gas mixture comprising a deposition precursor gas and an etch precursor gas, subjecting the precursor gas mixture to a thermal energy from a heat source to deposit a material layer on a surface of the substrate, wherein the thermal energy is below the minimum required for pyrolysis of the etch precursor gas, and after the material layer is formed on the surface of the substrate, subjecting the precursor gas mixture to a photon energy from a radiation source, the photon energy having a wavelength and a power level selected to promote photolytic dissociation of the etch precursor gas over the deposition precursor gas and etch a portion of the material layer from the surface of the substrate.Type: ApplicationFiled: February 21, 2014Publication date: September 18, 2014Applicant: Applied Materials, Inc.Inventor: STEPHEN MOFFATT
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Patent number: 8819903Abstract: A manufacturing method of a piezoelectric element includes: forming a first conductive layer upon a substrate; forming a piezoelectric layer upon the first conductive layer; forming a second conductive layer upon the piezoelectric layer; forming a third conductive layer upon the second conductive layer; forming a first portion, a second portion, and an opening portion provided between the first portion and the second portion by patterning the third conductive layer; forming a resist layer that covers the opening portion and covers the edges of the first portion and the second portion that face the opening portion side; and forming a first conductive portion and a second conductive portion configured from the first portion and the second portion, and forming a third conductive portion configured from the second conductive layer, by dry-etching the second conductive layer using the first portion, the second portion, and the resist layer as a mask.Type: GrantFiled: August 3, 2011Date of Patent: September 2, 2014Assignee: Seiko Epson CorporationInventors: Toshihiro Shimizu, Jiro Kato, Eiju Hirai, Hiroshi Ito
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Patent number: 8808560Abstract: The utilization of single crystal diamond in a nano- or micro-machine (N/MEMS) device is difficult, and there has been no report on such utilization. The reason for this resides in that it is difficult to grow single crystal diamond on an oxide which is a sacrifice layer. In a conventional technique, a cantilever or the like is produced by forming polycrystalline diamond or nanodiamond on an oxide as a sacrifice layer, but the mechanical performance, vibration characteristics, stability, and reproducibility of the produced cantilever or the like are unsatisfactory. In the present invention, utilizing the fact that the high concentration ion-implanted region in a diamond substrate 101 is modified into graphite, the layer 104 modified into graphite as a sacrifice layer is removed by electrochemical etching to obtain the diamond layer remaining on the resultant substrate as a movable structure. The produced cantilever 106 exhibited high frequency resonance.Type: GrantFiled: February 18, 2011Date of Patent: August 19, 2014Assignee: National Institute for Materials ScienceInventors: Meiyong Liao, Yasuo Koide, Shunichi Hishida
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Patent number: 8771528Abstract: A through-hole forming method includes steps of forming a first impurity region (102a) around a region where a through-hole is to be formed in the first surface of a silicon substrate (101), the first impurity region (102) being higher in impurity concentration than the silicon substrate (101), forming a second impurity region (102b) at a position adjacent to the first impurity region (102a) in the depth direction of the silicon substrate (101), the second impurity region (102b) being higher in impurity concentration than the first impurity region (102a), forming an etch stop layer (103) on the first surface, forming an etch mask layer (104) having an opening on the second surface of the silicon substrate (101) opposite to the first surface, and etching the silicon substrate (101) until at least the etch stop layer (103) is exposed via the opening.Type: GrantFiled: February 28, 2013Date of Patent: July 8, 2014Assignee: Canon Kabushiki KaishaInventors: Keiichi Sasaki, Yukihiro Hayakawa
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Patent number: 8760807Abstract: A method fabricates a magnetic transducer having a nonmagnetic layer and an ABS location corresponding to an ABS. Etch stop and nonmagnetic etchable layers are provided. A side shield layer is provided between the ABS location and the etch stop and etchable layers. A pole trench is formed in the side shield and etchable layers. The pole trench has a pole tip region in the side shield layer and a yoke region in the etchable layer. A nonmagnetic side gap layer, at least part of which is in the pole trench, is provided. A remaining portion of the pole trench has a location and profile for a pole and in which at least part of the pole is formed. A write gap and trailing shield are provided. At least part of the write gap is on the pole. At least part of the trailing shield is on the write gap.Type: GrantFiled: September 28, 2012Date of Patent: June 24, 2014Assignee: Western Digital (Fremont), LLCInventors: Jinqiu Zhang, Ying Hong, Feng Liu, Zhigang Bai
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Patent number: 8758637Abstract: An apparatus of removing coatings of a line-shaped body of the invention includes a non-equilibrium atmospheric pressure plasma source with radicals controlled, having a plasma generating gas, a microwave, a micro gap; a line-shaped body holding portion for holding the line-shaped body within a range of 2 to 3 mm from an electrode to generate a plasma jet; and a moving stage for relatively moving the line-shaped body in the longitudinal direction thereof.Type: GrantFiled: September 30, 2008Date of Patent: June 24, 2014Assignees: The Furukawa Electric Co., Ltd.Inventors: Takeshi Hirayama, Imei Shu, Sadayuki Toda, Hisashi Koaizawa, Masaru Hori
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Patent number: 8722547Abstract: Wafers having a high K dielectric layer and an oxide or nitride containing layer are etched in an inductively coupled plasma processing chamber by applying a source power to generate an inductively coupled plasma, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 100° C. and 350° C., and etching the wafer with a selectivity of high K dielectric to oxide or nitride greater than 10:1. Wafers having an oxide layer and a nitride layer are etched in a reactive ion etch processing chamber by applying a bias power to the wafer, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 20° C. and 200° C., and etching the wafer with an oxide to nitride selectivity greater than 10:1.Type: GrantFiled: April 17, 2007Date of Patent: May 13, 2014Assignee: Applied Materials, Inc.Inventors: Radhika Mani, Nicolas Gani, Wei Liu, Meihua Shen, Shashank C. Deshmukh
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Patent number: 8709269Abstract: A method and a system for obtaining an image of a cross section of a specimen, the method includes: milling the specimen so as to expose a cross section of the specimen, in which the cross section comprises at least one first portion made of a first material and at least one second portion made of a second material; smoothing the cross section; performing gas assisted etching of the cross section so as generate a topography difference between the at least one first portion and the at least one second portion of the cross section; coating the cross section with a thin layer of conductive material; and obtaining an image of the cross section; wherein the milling, smoothing, performing, coating and obtaining are performed while the specimen is placed in a vacuum chamber.Type: GrantFiled: April 15, 2008Date of Patent: April 29, 2014Assignee: Applied Materials Israel, Ltd.Inventor: Dror Shemesh
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Patent number: 8703000Abstract: A slimming method includes transferring an object to be processed on which a patterned carbon-containing thin film is formed into a process chamber in an oxidation apparatus; and oxidizing and removing the surface of the carbon-containing thin film by an oxidizing gas while supplying moisture into the process chamber, to reduce widths of the protruded portions on the pattern of the carbon-containing thin film.Type: GrantFiled: December 19, 2011Date of Patent: April 22, 2014Assignee: Tokyo Electron LimitedInventors: Jun Sato, Masayuki Hasegawa
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Patent number: 8685261Abstract: Provided are methods of manufacturing a surface light source device, the methods include forming a first structure that includes a first substrate and a plurality of glass beads each partially embedded in the first substrate. A second structure is formed that includes a second substrate and an adhesive material layer formed on the second substrate. The first structure and the second structure are adhered to each other in such a way that the glass beads are each partially embedded into the adhesive material layer.Type: GrantFiled: October 27, 2010Date of Patent: April 1, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Yoon-sun Choi, Hong-seok Lee, Myoung-seong Kim
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Patent number: 8679356Abstract: A method of patterning a substrate, comprises patterning a photoresist layer disposed on the substrate using imprint lithography and etching exposed portions of a hard mask layer disposed between the patterned photoresist layer and the substrate. The method may also comprise implanting ions into a magnetic layer in the substrate while the etched hard mask layer is disposed thereon.Type: GrantFiled: May 19, 2011Date of Patent: March 25, 2014Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Alexander C. Kontos, Frank Sinclair, Anthony Renau
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Patent number: 8658051Abstract: A method of improving lithography resolution on a semiconductor, including the steps of providing a substrate on which a protecting layer, a first etching layer and a photoresist layer are sequentially formed; patterning the photoresist layer to form an opening so as to partially reveal the first etching layer; implanting a first ion into the revealed first etching layer to form a first doped area; and implanting a second ion into the revealed first etching layer to form a second doped area, wherein the first doped area is independent from the second doped area is provided.Type: GrantFiled: May 12, 2008Date of Patent: February 25, 2014Assignee: Nanya Technology Corp.Inventors: Kuo-Yao Cho, Wen-Bin Wu, Ya-Chih Wang, Chiang-Lin Shih, Chao-Wen Lay, Chih-Huang Wu
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Patent number: 8648316Abstract: The invention relates to a cooling apparatus (101) for a sample in an ion beam etching process, including, a sample stage (102) for arranging the sample, a coolant receptacle (120) containing a coolant, at least one thermal conduction element (106a, 106b) that connects the sample stage (102) to the coolant, a cooling finger (105) connected to the thermal conduction element (106a, 106b), the cooling finger (105) comprising a conduit (130, 131) through which coolant can flow and which is connectable to the coolant receptacle (120). The invention further relates to a method of adjusting the temperature of a sample in an ion beam etching process, including mounting a sample on a coolable sample stage (102), aligning the sample on the sample stage (102), and cooling the sample by coolant directed through a conduit (130, 131) of a cooling finger.Type: GrantFiled: December 21, 2011Date of Patent: February 11, 2014Assignee: Leica Mikrosysteme GmbHInventors: Thomas Pfeifer, Rainer Wogritsch
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Patent number: 8632687Abstract: The invention relates to a method for electron beam induced etching of a layer contaminated with gallium, with the method steps of providing at least one first halogenated compound as an etching gas at the position at which an electron beam impacts on the layer, and providing at least one second halogenated compound as a precursor gas for removing of the gallium from this position.Type: GrantFiled: August 11, 2009Date of Patent: January 21, 2014Assignee: Carl Zeiss SMS GmbHInventors: Nicole Auth, Petra Spies, Rainer Becker, Thorsten Hofmann, Klaus Edinger
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Patent number: 8621744Abstract: A method of manufacturing an inductor for a microelectronic device comprises providing a substrate (610), forming a first plurality of inductor windings (111, 211, 411, 620, 2030) over the substrate, forming a magnetic inductor core (112, 212, 412, 810) over the first plurality of inductor windings, and forming a second plurality of inductor windings (113, 213, 413, 1010) over the magnetic inductor core. In another embodiment, the method comprises forming the inductor on a sacrificial substrate (1610) such that the inductor can subsequently be mounted onto a carrier tape (1810). In yet another embodiment, a method of manufacturing a substrate for a microelectronic device comprises forming an inductor within a build-up layer (101, 102, 103, 104) of a substrate.Type: GrantFiled: August 23, 2011Date of Patent: January 7, 2014Assignee: Intel CorporationInventors: Aleksandar Aleksov, Gloria Alejandra Camacho-Bragado
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Patent number: RE45057Abstract: A method of manufacturing an ink jet recording head. The method includes providing a laminated structure in which a first electrode layer is located on a diaphragm, a piezoelectric layer is located on the first electrode layer, and a second electrode layer is located on the piezoelectric layer and etching the first electrode layer, the second electrode layer and the piezoelectric layer so that a portion of the diaphragm is exposed. In this method, at least the second electrode layer and the piezoelectric layer are etched simultaneously.Type: GrantFiled: November 9, 2012Date of Patent: August 5, 2014Assignee: Seiko Epson CorporationInventors: Tsutomu Hashizume, Tetsushi Takahashi