Specific Configuration Of Electrodes To Generate The Plasma Patents (Class 216/71)
  • Patent number: 11062882
    Abstract: A plasma processing apparatus according to an exemplary embodiment includes a chamber, a substrate support, an upper electrode, a radio frequency power source, and a direct-current power source device. The substrate support includes a lower electrode. The lower electrode is provided in the chamber. The upper electrode is provided above the substrate support. The radio frequency power source generates a plasma in the chamber. The direct-current power source device is electrically connected to the upper electrode. The direct-current power source device is configured to periodically generate a pulsed negative direct-current voltage. An output voltage of the direct-current power source device is alternately switched between a negative direct-current voltage and zero volts.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: July 13, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Aoki, Shinya Morikita, Toshikatsu Tobana, Fumiya Takata
  • Patent number: 10975466
    Abstract: There is provision of a method of cleaning an exhaust pipe of a film forming apparatus for removing a component adhering to the exhaust pipe which is generated from a source gas for forming film supplied from a gas supply part to a processing chamber of the film forming apparatus. The method includes a step of supplying a cleaning gas directly, from a cleaning gas supply part disposed near a joint between the processing chamber and the exhaust pipe, to the exhaust pipe without passing through the processing chamber, in order to remove the component by causing the component to vaporize upon reacting with the cleaning gas. The cleaning gas to be supplied is capable of causing the component adhering to the exhaust pipe to change into an evaporable substance by chemical reaction in an atmosphere inside the exhaust pipe.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 13, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Takahito Umehara, Masato Koakutsu, Tsubasa Watanabe
  • Patent number: 10903051
    Abstract: A method of performing impedance matching between a power supply section of a plasma processing apparatus and a chamber in the plasma processing apparatus is provided. The plasma processing apparatus includes multiple matchers, each configured to perform impedance matching between the power supply section and the chamber, and the power supply section is configured to output superimposed voltage in which radio frequency voltage is superimposed on pulsating DC voltage. According to the method, the superimposed voltage from the power supply section is applied to the chamber, through one of the provided matchers, and the matcher through which the superimposed voltage is applied to the chamber is then switched in accordance with a state of the pulsating DC voltage.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: January 26, 2021
    Assignee: Tokyo Electron Limited
    Inventor: Masato Kon
  • Patent number: 10818503
    Abstract: A method of etching at a low temperature includes cooling a pedestal on which a wafer is disposed, etching the wafer by generating plasma from a gas supplied through a gas distribution unit, and injecting a heated inert gas into the chamber through the gas distribution unit.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cheonkyu Lee, Moonseok Kim, Iksu Byun, Changwoo Song, Seongha Jeong, Dongseok Han
  • Patent number: 10790168
    Abstract: Provided are a plasma treatment apparatus and a method of fabricating semiconductor device using the same. The plasma treatment apparatus includes a chamber which provides a plasma treatment space, a bottom electrode disposed in the chamber and supports a wafer, a top electrode disposed in the chamber facing the bottom electrode, a source power source which supplies a source power output of a first frequency to the bottom electrode, a bias power source which supplies a bias power output of a second frequency different from the first frequency to the bottom electrode, and a pulse power source which applies a pulse voltage to the bottom electrode, wherein the bias power output is a bias voltage which is pulse-modulated to a first voltage level in a first time section and pulse-modulated to a second voltage level in a second time section and is applied to the bottom electrode.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: September 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Bo Shim, Hyuk Kim, Sun Taek Lim, Jae Myung Choe, Jeon Il Lee, Sung-Il Cho
  • Patent number: 10760158
    Abstract: Forming a protective coating ex situ in an atomic layer deposition process to coat one or more chamber components subsequently installed in a reaction chamber provides a number of benefits over more conventional coating methods such as in situ deposition of an undercoat. In certain cases the protective coating may have a particular composition such as aluminum oxide, aluminum fluoride, aluminum nitride, yttrium oxide, and/or yttrium fluoride. The protective coating may help reduce contamination on wafers processed using the coated chamber component. Further, the protective coating may act to stabilize the processing conditions within the reaction chamber, thereby achieving very stable/uniform processing results over the course of processing many batches of wafers, and minimizing radical loss. Also described are a number of techniques that may be used to restore the protective coating after the coated chamber component is used to process semiconductor wafers.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: September 1, 2020
    Assignee: Lam Research Corporation
    Inventors: Damodar Shanbhag, Guangbi Yuan, Thadeous Bamford, Curtis Warren Bailey, Tony Kaushal, Krishna Birru, William Schlosser, Bo Gong, Fengyuan Lai, Leonard Wai Fung Kho, Anand Chandrashekar, Andrew H. Breninger, Chen-Hua Hsu, Geoffrey Hohn, Gang Liu, Rohit Khare, Huatan Qiu
  • Patent number: 10727088
    Abstract: The present invention provides a plasma processing apparatus having a radio frequency power supply supplying time-modulated radio frequency power which is controllable widely with high precision, and a plasma processing method using the plasma processing apparatus. The plasma processing apparatus includes: a vacuum chamber; a first radio frequency power supply for generating plasma in the vacuum chamber; a sample holder disposed in the vacuum chamber, on which a sample is placed; and a second radio frequency power supply supplying radio frequency power to the sample holder, wherein at least one of the first radio frequency power supply and the second radio frequency power supply supplies time-modulated radio frequency power, one of parameters of controlling the time-modulation has two or more different control ranges, and one of the control ranges is a control range for a high-precision control.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: July 28, 2020
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Michikazu Morimoto, Yasuo Ohgoshi, Yuuzou Oohirabaru, Tetsuo Ono
  • Patent number: 10636674
    Abstract: The present invention relates to a control method of a dry etching apparatus which can be applied regardless of materials. The control method of a dry etching apparatus may include: a work piece positioning step of positioning a work piece close to a surface of a cathode unit, facing an anode unit; a bidirectional voltage source applying step of applying a voltage to the cathode unit, the voltage having a polarity alternating between a positive voltage and a negative voltage with time; and an etching step of etching the surface of the work piece using plasma generated by the bidirectional voltage source applied to the cathode unit.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 28, 2020
    Assignee: VAULT CREATION CO., LTD.
    Inventors: Sang Jun Choi, Ji Sung Kang
  • Patent number: 10448495
    Abstract: Embodiments of this disclosure describe an electrode biasing scheme that enables maintaining a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate that consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: October 15, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Leonid Dorf, Olivier Luere, Rajinder Dhindsa, James Rogers, Sunil Srinivasan, Anurag Kumar Mishra
  • Patent number: 10309015
    Abstract: Disclosed are a substrate treating apparatus and a substrate treating method. The substrate treating apparatus includes a process chamber, a substrate support unit configured to support a substrate in the process chamber, a gas supply unit configured to supply a process gas into the process chamber, and an exhaust adjusting unit configured to adjust a discharge amount of the process gas and residual gases in the process chamber, wherein the exhaust adjusting unit includes a ring-shaped first exhaust ring provided on a side of the substrate support unit and having a plurality of exhaust holes, a ring-shaped second exhaust ring provided below the first exhaust ring and having a plurality of exhaust holes, and an adjustment part configured to adjust relative locations of the plurality of exhaust holes provided in the second exhaust ring with respect to the plurality of exhaust holes provided in the first exhaust ring.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: June 4, 2019
    Assignee: PSK INC.
    Inventor: Sung Gu Ji
  • Patent number: 10090162
    Abstract: Controllability of ion bombardment on a substrate is further improved to achieve uniformity of the etched substrate across the substrate surface. A plasma processing apparatus performs plasma generation and control of energy of ion bombardment on the substrate independently, generates plasma by continuous discharge or pulse discharge, and switches at least two bias powers having different frequencies, and alternately and repeatedly applies the at least two bias powers having different frequencies to a sample stage while the plasma is being generated.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: October 2, 2018
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Junya Tanaka, Tetsuo Ono
  • Patent number: 9928995
    Abstract: A method for configuring a plasma processing chamber for preventing a plasma un-confinement event during processing of a substrate from occurring outside of a confined plasma sustaining region is provided. The confined plasma sustaining region is defined by a set of confinement rings surrounding a bottom portion of an electrode is provided. The method includes determining a worst-case Debye length for a plasma generated in the plasma processing chamber during the processing. The method also includes performing at least one of adjusting gaps between any pair of adjacent confinement rings and adding at least one additional confinement ring to ensure that a gap between the any pair of adjacent confinement rings is less than the worst-case Debye length.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: March 27, 2018
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Rajinder Dhindsa
  • Patent number: 9899232
    Abstract: Disclosed is a method for etching an etching target layer which contains silicon and is provided with a metal-containing mask thereon. The method includes: generating plasma of a first processing gas containing a fluorocarbon gas in a processing container that accommodates the etching target layer and the mask to form a fluorocarbon-containing deposit on the mask and the etching target layer; and generating plasma of a second processing gas containing an inert gas in the processing container to etch the etching target layer by radicals of the fluorocarbon contained in the deposit. A plurality of sequences, each including the generating the plasma of the first processing gas and the generating the plasma of the second processing gas, are performed.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 20, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Takayuki Katsunuma
  • Patent number: 9721757
    Abstract: A modular plasma source assembly for use with a processing chamber is described. The assembly includes an RF hot electrode with an end dielectric and a sliding ground connection positioned adjacent the sides of the electrode. A seal foil connects the sliding ground connection to the housing to provide a grounded sliding ground connection separated from the hot electrode by the end dielectric. A coaxial feed line passes through a conduit into the RF hot electrode isolated from the processing environment so that the coaxial RF feed line is at atmospheric pressure while the plasma processing region is at reduced pressure.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: August 1, 2017
    Assignee: Applied Materials, Inc.
    Inventors: John C. Forster, Joseph Yudovsky, Garry K. Kwong, Tai T. Ngo, Kevin Griffin, Kenneth S. Collins, Ren Liu
  • Patent number: 9644271
    Abstract: Systems and methods are disclosed for plasma enabled film deposition on a wafer in which a plasma is generated using radiofrequency signals of multiple frequencies and in which a phase angle relationship is controlled between the radiofrequency signals of multiple frequencies. In the system, a pedestal is provided to support the wafer. A plasma generation region is formed above the pedestal. An electrode is disposed in proximity to the plasma generation region to provide for transmission of radiofrequency signals into the plasma generation region. A radiofrequency power supply provides multiple radiofrequency signals of different frequencies to the electrode. A lowest of the different frequencies is a base frequency, and each of the different frequencies that is greater than the base frequency is an even harmonic of the base frequency. The radiofrequency power supply provides for variable control of the phase angle relationship between each of the multiple radiofrequency signals.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: May 9, 2017
    Assignee: Lam Research Corporation
    Inventors: Douglas Keil, Ishtak Karim, Yaswanth Rangineni, Adrien LaVoie, Yukinori Sakiyama, Edward Augustyniak, Karl Leeser, Chunhai Ji
  • Patent number: 9362090
    Abstract: A plasma processing apparatus that enables polymer to be removed from an electrically insulated electrode. A susceptor of the plasma processing apparatus is disposed in a substrate processing chamber having a processing space therein. A radio frequency power source is connected to the susceptor. An upper electrode plate is electrically insulated from a wall of the substrate processing chamber and from the susceptor. A DC power source is connected to the upper electrode plate. A controller of the plasma processing apparatus determines a value of a negative DC voltage to be applied to the upper electrode plate in accordance with processing conditions for RIE processing to be carried out.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: June 7, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masanobu Honda, Yutaka Matsui, Manabu Sato
  • Patent number: 9355819
    Abstract: A modular plasma source assembly for use with a processing chamber is described. The assembly includes an RF hot electrode with an end dielectric and a sliding ground connection positioned adjacent the sides of the electrode. A seal foil connects the sliding ground connection to the housing to provide a grounded sliding ground connection separated from the hot electrode by the end dielectric. A coaxial feed line passes through a conduit into the RF hot electrode isolated from the processing environment so that the coaxial RF feed line is at atmospheric pressure while the plasma processing region is at reduced pressure.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: May 31, 2016
    Assignee: Applied Materials, Inc.
    Inventors: John C. Forster, Joseph Yudovsky, Garry K. Kwong, Tai T. Ngo, Kevin Griffin, Kenneth S. Collins, Ren Liu
  • Patent number: 9337003
    Abstract: A constituent part is included in a plasma processing apparatus for performing a plasma process on a substrate mounted on a susceptor by using a plasma generated in a processing chamber. The constituent part has at least one recessed corner formed by intersection of two surfaces. The recessed corner is exposed to the plasma when the plasma is generated in the processing chamber. An intersection angle of the two surfaces seen from a plasma side is 115 degrees to 180 degrees.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: May 10, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takahiro Murakami, Toshikatsu Wakaki
  • Patent number: 9299540
    Abstract: Provided is a parallel flat-panel type plasma processing apparatus which includes a recipe storing unit storing a processing recipe for performing a plasma processing, a compensation setting unit setting an accumulation time of the plasma processing or the number of processed substrates after starting using a new second electrode and the compensation value of the set temperature of the second electrode in an input screen, and a storage unit storing the compensated set value. The plasma processing apparatus is further equipped with a program for controlling a temperature adjusting mechanism based on a set temperature after compensation by adding a set temperature of an upper electrode written in the processing recipe to the compensation value stored within the storage unit. As a result, the non-uniformity in the plasma processing between the substrates caused by the change of processing atmosphere is suppressed.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: March 29, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tatsuya Ogi, Wataru Ozawa, Kimihiro Fukasawa, Kazuhiro Kanaya
  • Patent number: 9112050
    Abstract: Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves introducing a substrate supported by a substrate carrier into a plasma etch chamber. The substrate has a patterned mask thereon covering integrated circuits and exposing streets of the substrate. The substrate carrier has a backside. The method also involves supporting at least a portion of the backside of the substrate carrier on a chuck of the plasma etch chamber. The method also involves cooling substantially all of the backside of the substrate carrier, the cooling involving cooling at least a first portion of the backside of the substrate carrier by the chuck. The method also involves plasma etching the substrate through the streets to singulate the integrated circuits while performing the cooling substantially all of the backside of the substrate carrier.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: August 18, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Prabhat Kumar, Brad Eaton, Ajay Kumar
  • Patent number: 9039912
    Abstract: A plasma processing apparatus comprises a processing chamber in which a plurality of substrates are stacked and accommodated; a pair of electrodes extending in the stacking direction of the plurality of substrates, which are disposed at one side of the plurality of substrates in said processing chamber, and to which high frequency electricity is applied; and a gas supply member which supplies processing gas into a space between the pair of electrodes.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: May 26, 2015
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Kazuyuki Toyoda, Yasuhiro Inokuchi, Motonari Takebayashi, Tadashi Kontani, Nobuo Ishimaru
  • Patent number: 9039911
    Abstract: Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 26, 2015
    Assignee: Lam Research Corporation
    Inventors: Eric A. Hudson, Andrew D. Bailey, III, Rajinder Dhindsa
  • Patent number: 8992792
    Abstract: Methods of fabricating ultra low-k dielectric self-aligned vias are described. In an example, a method of forming a self-aligned via (SAV) in a low-k dielectric film includes forming a trench pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. A via pattern is formed in a masking layer formed above the metal nitride hardmask layer. The via pattern is etched at least partially into the low-k dielectric film, the etching comprising using a plasma etch using a chemistry based on CF4, H2, and a diluent inert gas composition.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 31, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Chih-Yang Chang, Sean S. Kang, Chia-Ling Kao, Nikolaos Bekiaris
  • Publication number: 20150048052
    Abstract: The present invention relates to an apparatus (10) for plasma processing an article (12), the apparatus comprising: a chamber (14) for receiving an article to be processed; electrode means (16) for generating an electric field in said chamber for establishing a plasma in said chamber so that said article can be processed; generation means (24) for generating alternating electrical energy for transmission to said electrode means (18); connection means for connecting said generation means to said electrode means (20); and control means for varying the location of nodes and anti-nodes of standing waves generated in said chamber during processing, so that a plurality of standing waves are generated over time which are not coincident with one another.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 19, 2015
    Inventors: Stephen Richard Coulson, Fred Hopper, Charles Edmund King
  • Patent number: 8945413
    Abstract: Etching is performed through the following process. A substrate is loaded into a processing chamber and mounted on a mounting table therein. Then, in the state where a ring member at least a surface of which is made of a same material as a main component of an etching target film is provided to surround the substrate, a processing gas is injected in a shower-like manner from a gas supply unit oppositely facing the substrate and the etching target film is etched by using a plasma of the processing gas; and evacuating the inside of the processing chamber through an exhaust path. Through this process, unbalanced distribution of plasma active species in the vicinity of a circumferential edge portion of the substrate can be suppressed.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: February 3, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Ayuta Suzuki, Songyun Kang, Tsuyoshi Moriya, Nobutoshi Terasawa, Yoshiaki Okabe
  • Publication number: 20150001181
    Abstract: Provided is a parallel flat-panel type plasma processing apparatus which includes a recipe storing unit storing a processing recipe for performing a plasma processing, a compensation setting unit setting an accumulation time of the plasma processing or the number of processed substrates after starting using a new second electrode and the compensation value of the set temperature of the second electrode in an input screen, and a storage unit storing the compensated set value. The plasma processing apparatus is further equipped with a program for controlling a temperature adjusting mechanism based on a set temperature after compensation by adding a set temperature of an upper electrode written in the processing recipe to the compensation value stored within the storage unit. As a result, the non-uniformity in the plasma processing between the substrates caused by the change of processing atmosphere is suppressed.
    Type: Application
    Filed: September 16, 2014
    Publication date: January 1, 2015
    Inventors: Tatsuya OGI, Wataru OZAWA, Kimihiro FUKASAWA, Kazuhiro KANAYA
  • Patent number: 8911588
    Abstract: Methods and apparatus for modifying RF current path lengths are disclosed. Apparatus includes a plasma processing system having an RF power supply and a lower electrode having a conductive portion. There is included an insulative component disposed in an RF current path between the RF power supply and the conductive portion. There are included a plurality of RF path modifiers disposed within the insulative component, the plurality of RF path modifiers being disposed at different angular positions relative to a reference angle drawn from a center of the insulative component, whereby at least a first one of the plurality of RF path modifiers is electrically connected to the conductive portion and at least a second one of the plurality of the plurality of RF path modifiers is not electrically connected to the conductive portion.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: December 16, 2014
    Assignee: Lam Research Corporation
    Inventors: Sang Ki Nam, Rajinder Dhindsa, Alexei Marakhtanov
  • Patent number: 8877301
    Abstract: An asymmetrically grounded susceptor used in a plasma processing chamber for chemical vapor deposition onto large rectangular panels supported on and grounded by the susceptor. A plurality of grounding straps are connected between the periphery of the susceptor to the grounded vacuum chamber to shorten the grounding paths for RF electrons. Flexible straps allow the susceptor to vertically move. The straps provide a conductance to ground which is asymmetric around the periphery. The straps may be evenly spaced but have different thicknesses or different shapes or be removed from available grounding point and hence provide different RF conductances. The asymmetry is selected to improve the deposition uniformity and other qualities of the PECVD deposited film.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: November 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Gaku Furuta, Soo Young Choi, Young-Jin Choi
  • Patent number: 8871102
    Abstract: A method for fabricating a structure in magnetic recording head is described. First and second hard mask layers are provided on the layer(s) for the structure. A BARC layer and photoresist mask having a pattern are provided on the second hard mask layer. The pattern includes a line corresponding to the structure. The pattern is transferred to the BARC layer and the second hard mask layer in a single etch using an etch chemistry. At least the second hard mask layer is trimmed using substantially the same first etch chemistry. A mask including a hard mask line corresponding to the line and less than thirty nanometers wide is thus formed. The pattern of the second hard mask is transferred to the first hard mask layer. The pattern of the first hard mask layer is transferred to the layer(s) such that the structure has substantially the width.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: October 28, 2014
    Assignee: Western Digital (Fremont), LLC
    Inventor: Wei Gao
  • Publication number: 20140305905
    Abstract: At a time point T0 when starting a process, a duty ratio of a high frequency power RF1 to which power modulation is performed is set to be an initial value (about 90%) which allows plasma to be ignited securely under any power modulating conditions. At the substantially same time of starting the process, the duty ratio of the high frequency power RF1 is gradually reduced from the initial value (about 90%) in a regular negative gradient or in a ramp waveform. At a time point t2 after a lapse of a preset time Td, the duty ratio has an originally set value Ds for an etching process. After the time point t2, the duty ratio is fixed or maintained at the set value Ds until the end (time point T4) of the process.
    Type: Application
    Filed: December 3, 2012
    Publication date: October 16, 2014
    Inventors: Norikazu Yamada, Toshifumi Tachikawa, Koichi Nagami
  • Publication number: 20140263182
    Abstract: A method of selectively activating a chemical process using a DC pulse etcher. A processing chamber includes a substrate therein for chemical processing. The method includes coupling energy into a process gas within the processing chamber so as to produce a plasma containing positive ions. A pulsed DC bias is applied to the substrate, which is positioned on a substrate support within the processing chamber. Periodically, the substrate is biased between first and second bias levels, wherein the first bias level is more negative than the second bias level. When the substrate is biased to the first bias level, mono-energetic positive ions are attracted from plasma toward the substrate, the mono-energetic positive ions being selective so as to enhance a selected chemical etch process.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Lee Chen, Radha Sundararajan
  • Patent number: 8834732
    Abstract: A technique for processing a workpiece is disclosed. In accordance with one exemplary embodiment, the technique is realized as a method for processing a substrate, where the method comprises: providing the workpiece in the chamber; providing a plurality of electrodes between a wall of the chamber and the workpiece; generating a plasma containing ions between the plurality of electrodes and the workpiece, ion density in an inner portion of the plasma being greater than the ion density in an outer portion of the plasma portion, the outer portion being between the inner portion and the wall of the chamber; and providing a bias voltage to the plurality of electrodes and dispersing at least a portion of the ions in the inner portion until the ion density in the inner portion is substantially equal to the ion density in the periphery plasma portion.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: September 16, 2014
    Inventor: Bon-Woong Koo
  • Publication number: 20140251956
    Abstract: An apparatus for an etching process includes a chamber, a plasma generator disposed in the chamber, a stacked structure disposed in the chamber to support a substrate thereon and including an electrode plate and an insulation coating layer on the electrode plate, electrode rods inserted into through holes of the stacked structure to penetrate through the stacked structure, directly contacting the substrate and spaced apart from sidewalls of the through holes of the stacked structure, at least one DC pulse generator generating a DC pulse to the electrode plate and the electrode rods, first connection lines connecting the DC pulse generator to the electrode rods, and at least one second connection line connecting the DC pulse generator to a lower portion of the electrode plate.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Yub JEON, Jeong-Yun LEE, Kyung-Sun KIM, Tae-Gon KIM
  • Patent number: 8828883
    Abstract: Apparatuses and methods for processing substrates are disclosed. A processing apparatus includes a chamber for generating a plasma therein, an electrode associated with the chamber, and a signal generator coupled to the electrode. The signal generator applies a DC pulse to the electrode with sufficient amplitude and sufficient duty cycle of an on-time and an off-time to cause events within the chamber. A plasma is generated from a gas in the chamber responsive to the amplitude of the DC pulse. Energetic ions are generated by accelerating ions of the plasma toward a substrate in the chamber in response to the amplitude of the DC pulse during the on-time. Some of the energetic ions are neutralized to energetic neutrals in response to the DC pulse during the off-time. Some of the energetic neutrals impact the substrate with sufficient energy to cause a chemical reaction on the substrate.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: September 9, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Neal R. Rueger
  • Patent number: 8821744
    Abstract: A substrate processing method using a substrate processing apparatus includes a first step and a second step. The first step is to apply a negative voltage pulse from a pulsed power supply to be included in the apparatus. The second step is to apply floating potential for an interval of time between the negative voltage pulse and a positive voltage pulse from the pulsed power supply subsequent to the negative voltage pulse. In addition, the apparatus includes a chamber, a first electrode, a second electrode, an RF power supply, and the pulsed power supply. The second electrode is provided so that the second electrode faces the first electrode to hold a substrate. The RF power supply applies an RF voltage having a frequency of 50 MHz or higher to the second electrode. The pulsed power supply repeatedly applies a voltage waveform with the RF voltage to the second electrode.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akio Ui, Hisataka Hayashi
  • Patent number: 8759227
    Abstract: A method for processing a target object includes arranging a first electrode and a second electrode for supporting the target object in parallel to each other in a processing chamber and processing the target object supported by the second electrode by using a plasma of a processing gas supplied into the processing chamber, the plasma being generated between the first electrode and the second electrode by applying a high frequency power between the first electrode and the second electrode. The target object includes an organic film and a photoresist layer formed on the organic film. The processing gas contains H2 gas, and the organic film is etched by a plasma containing H2 by using the photoresist layer as a mask while applying a negative DC voltage to the first electrode.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: June 24, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Kazuki Narishige, Kazuo Shigeta
  • Patent number: 8753527
    Abstract: A plasma etching method uses a plasma etching apparatus including a process chamber, a susceptor, a microwave supplying portion, a gas supplying portion, an evacuation apparatus, a bias electric power supplying portion that supplies alternating bias electric power to the susceptor, and a bias electric power control portion that controls the alternating bias electric power, wherein the bias electric power control portion controls the alternating bias electric power so that supplying and disconnecting the alternating bias electric power to the susceptor are alternately repeated to allow a ratio of a time period of supplying the alternating bias electric power with respect to a total time period of supplying the alternating bias electric power and disconnecting the alternating bias electric power to be 0.1 or more and 0.5 or less.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: June 17, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Tetsuya Nishizuka, Masahiko Takahashi, Toshihisa Ozu
  • Patent number: 8747631
    Abstract: The present disclosure relates to an apparatus and method utilizing double glow discharge for sputter cleaning of a selected surface. The surface may include the inner surface of a hollow substrate such as a tube which inner surface may then be coated via magnetron sputter deposition.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: June 10, 2014
    Assignee: Southwest Research Institute
    Inventors: Ronghua Wei, Edward Langa, Sabrina L. Lee
  • Patent number: 8734664
    Abstract: A method of controlling distribution of a plasma parameter in a plasma reactor having an RF-driven electrode and two (or more) counter electrodes opposite the RF driven electrode and facing different portions of the process zones. The method includes providing two (or more) variable reactances connected between respective ones of the counter electrodes and ground, and governing the variable reactances to change distribution of a plasma parameter such as plasma ion density or ion energy.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: May 27, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Yang Yang, Kartik Ramaswamy, Kenneth S. Collins, Steven Lane, Douglas A. Buchberger, Jr., Lawrence Wong, Nipun Misra
  • Patent number: 8721833
    Abstract: A replaceable chamber element for use in a plasma processing system, such as a plasma etching system, is described. The replaceable chamber element includes a chamber component configured to be exposed to plasma in a plasma processing system, wherein the chamber component is fabricated of a ferroelectric material.
    Type: Grant
    Filed: February 5, 2012
    Date of Patent: May 13, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Zhiying Chen, Jianping Zhao, Lee Chen, Merritt Funk, Radha Sundararajan
  • Patent number: 8715515
    Abstract: A sequence of process steps having balanced process times are implemented in sequence of etch chambers coupled linearly and isolated one from the other, resulting in the optimization of island to trench ratio for a patterned media. A biased chemical etching using active etching gas is used to descum and trim the resist patterns. An inert gas sputter etch is performed on the magnetic layers, resulting in the patterned magnetic layer on the disk. A final step of stripping is then performed to remove the residual capping resist and carbon hard mask on top of un-etched magnetic islands. The effective magnetic material remaining on the disk surface can be optimized by adjusting the conditions of chemical etch and sputter etch conditions. Relevant process conditions that may be adjusted include: pressure, bias, time, and the type of gas in each step.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: May 6, 2014
    Assignee: Intevac, Inc.
    Inventors: Houng T. Nguyen, Ren Xu, Michael S. Barnes
  • Patent number: 8715472
    Abstract: A substrate processing method may include forming a plasma; extracting ions from the plasma and accelerating the ions to have uniform or substantially uniform directivity using a grid system; irradiating the ions at a reflector, wherein the reflector includes a plurality of reflecting plates each having a metal plate and an insulating layer on the metal plate, wherein the reflecting plates are parallel or substantially parallel such that the insulating layers are exposed to the ions; reflecting the ions incident on the reflecting plates away from the insulating layers of the reflecting plates; colliding the ions reflected away from the insulating layers with the metal plates to convert the ions into neutral beams; and irradiating the neutral beams onto a substrate to process the substrate.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: May 6, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Wook Hwang, Chul-Ho Shin
  • Patent number: 8715519
    Abstract: Plasma reactors with adjustable plasma electrodes and associated methods of operation are disclosed herein. The plasma reactors can include a chamber, a workpiece support for holding a microfeature workpiece, and a plasma electrode in the chamber and spaced apart from the workpiece support. The plasma electrode has a first portion and a second portion configured to move relative to the first portion. The first and second portions are configured to electrically generate a plasma between the workpiece support and the plasma electrode.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: May 6, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Daniel Harrington
  • Patent number: 8709270
    Abstract: A chamber for combinatorially processing a substrate is provided. The chamber includes a first mask and a second mask that share a common central axis. The first mask and the second mask are independently rotatable around the common central axis. The first mask has a first plurality of radial apertures and the second mask has a second plurality of radial apertures. An axis of the first plurality of radial apertures is offset from an axis of the second plurality of radial apertures. A substrate support that is operable to support a substrate below the first and second masks is included. The substrate support shares the common central axis.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: April 29, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Peter Satitpunwaycha
  • Patent number: 8702902
    Abstract: Device for generating a plasma discharge for patterning the surface of a substrate, comprising a first electrode having a first discharge portion and a second electrode having a second discharge portion, a high voltage source for generating a high voltage difference between the first and the second electrode, and positioning means for positioning the first electrode with respect to the substrate, wherein the positioning means are arranged for selectively positioning the first electrode with respect to the second electrode in a first position in which a distance between the first discharge portion and the second discharge portion is sufficiently small to support the plasma discharge at the high voltage difference, and in a second position in which the distance between the first discharge portion and the second discharge portion is sufficiently large to prevent plasma discharge at the high voltage difference.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: April 22, 2014
    Assignee: Vision Dynamics Holding B.V.
    Inventors: Paulus Petrus Maria Blom, Philip Rosing, Alquin Alphons Elisabeth Stevens, Laurentia Johanna Huijbregts, Eddy Bos
  • Patent number: 8696921
    Abstract: In a method of manufacturing a semiconductor device, a substrate is loaded to a process chamber having, unit process sections in which unit processes are performed, respectively. The unit processes are performed on the substrate independently from one another at the unit process sections under a respective process pressure. The substrate sequentially undergoes the unit processes at the respective unit process section of the process chamber. Cleaning processes are individually performed to the unit process sections, respectively, when the substrate is transferred from each of the unit process sections and no substrate is positioned at the unit process sections. Accordingly, the process defects of the process units may be sufficiently prevented and the operation period of the manufacturing apparatus is sufficiently elongated.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Park, Gil-Heyun Choi, Byung-Lyul Park, Jong-Myeong Lee, Zung-Sun Choi, Hye-Kyung Jung
  • Patent number: 8685267
    Abstract: There is provided a substrate processing method capable of preventing the decrease in etching efficiency by positive ions and increasing the overall etching efficiency by using negative ions. The substrate processing method includes applying a plasma RF and a bias RF in the pattern of a pulse wave, respectively. The substrate processing method repeatedly performs the steps of: (3b) etching a substrate by positive ions in plasma by applying both the plasma RF and the bias RF; (3c) generating negative ions in a processing chamber by stopping the application of both the plasma RF and the bias RF; and (3a) attracting the negative ions to the substrate by applying the bias RF and stopping the application of the plasma RF. A duty ratio of the bias RF is set to be greater than a duty ratio of the plasma RF.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: April 1, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Koichi Yatsuda, Hiromasa Mochiki
  • Patent number: 8652342
    Abstract: A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: February 18, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Kyung-Woo Lee, Jin-Sung Kim, Joo-Byoung Yoon, Yeong-Cheol Lee, Sang-Jun Park, Hee-Kyeong Jeon
  • Publication number: 20140034612
    Abstract: A method of controlling distribution of a plasma parameter in a plasma reactor having an RF-driven electrode and two (or more) counter electrodes opposite the RF driven electrode and facing different portions of the process zones. The method includes providing two (or more) variable reactances connected between respective ones of the counter electrodes and ground, and governing the variable reactances to change distribution of a plasma parameter such as plasma ion density or ion energy.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 6, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Yang Yang, Kartik Ramaswamy, Kenneth S. Collins, Steven Lane, Douglas A. Buchberger, JR., Lawrence Wong, Nipun Misra
  • Patent number: 8642481
    Abstract: A method of etching exposed silicon-and-nitrogen-containing material on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and an oxygen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon-and-nitrogen-containing material. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon-and-nitrogen-containing material from the exposed silicon-and-nitrogen-containing material regions while very slowly removing other exposed materials. The silicon-and-nitrogen-containing material selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element reduces or substantially eliminates the number of ionically-charged species that reach the substrate.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: February 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Yunyu Wang, Anchuan Wang, Jingchun Zhang, Nitin K. Ingle, Young S. Lee