Specific Configuration Of Electrodes To Generate The Plasma Patents (Class 216/71)
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Patent number: 6010636Abstract: An improved anode design, incorporating domes, for plasma reactors enhances plasma density at the anode. The domes give rise to a high-divergence, three-dimensional electric field distribution that accelerates electrons to a focused central region in the dome, thereby increasing ionization and dissociation. The enhanced plasma density increases the reaction rate at a substrate opposite the anode.Type: GrantFiled: December 29, 1995Date of Patent: January 4, 2000Assignee: Lam Research CorporationInventors: John F. Donohue, Al Sampson
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Patent number: 6009830Abstract: A plasma etch reactor having independent gas feeds above the wafer and either at the sides or below the wafer. Preferably, a carrier gas such as argon is supplied from a showerhead electrode above the wafer while an etching gas is supplied from below. In the case of selectively etching an oxide over a non-oxide layer, the etchant gas should include one or more fluorocarbons.Type: GrantFiled: November 21, 1997Date of Patent: January 4, 2000Assignee: Applied Materials Inc.Inventors: Haojiang Li, Robert W. Wu
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Patent number: 6007879Abstract: A method of thin film plasma processing which includes multiple power environments and circuitry is described so as to encompass a variety of configurations. The environments may establish an energy quantum which may be interactively adjusted such as for conditioning or processing when new targets or materials are inserted. The energy quantum can be increased from the traditionally low energy storage of a switch-mode power supply to a higher energy to allow more intense arc occurrences and, thus, the more rapid conditioning of a target. Switching between environments can be achieved manually or automatically through timing or through arc or plasma electrical characteristics sensing. Energy quantum may be adjusted through the inclusion of energy storage elements, hardwired elements, or through software configurations such as are possible with the utilization of a programmable processor. Applications for DC switch-mode thin film processing systems are specifically shown.Type: GrantFiled: December 12, 1996Date of Patent: December 28, 1999Assignee: Advanced Energy Industries, Inc.Inventor: Richard A. Scholl
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Patent number: 6004631Abstract: An apparatus for removing unnecessary matter formed on an edge portion of a substrate without damaging a middle area of a top face of the substrate is provided. The substrate is supported on a stage which is in contact only with a bottom face of the substrate. An activated gas supply device is located opposed to the stage and includes a ring-shaped electrode and a cover electrode surrounding the ring-shaped electrode. The cover electrode includes a gas outlet formed therethrough. Activated species and excited molecules formed from an atmospheric plasma are blown against the edge portion of the substrate through the gas outlet. The activated species and excited molecules and unnecessary matter removed form the edge portion of the substrate through reaction with the activated species and excited molecules, is exhausted along a side face of the edge portion of the substrate and away from the middle area through an exhausting device.Type: GrantFiled: February 7, 1996Date of Patent: December 21, 1999Assignee: Seiko Epson CorporationInventor: Kozo Mori
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Patent number: 5997962Abstract: A wafer is subjected to a plasma process, using plasma generated while a process gas is fed into a process room, and a plus DC voltage is applied to an electrostatic chuck in order to attract and hold the wafer on the electrostatic chuck by an electrostatic force. A minus DC voltage is applied to the electrostatic chuck while nitrogen gas is fed into the process room in order to cause DC discharge after the processed wafer is separated from the electrostatic chuck and before a next wafer is attracted and held on the electrostatic chuck. By doing so, plus electric charge in the gas is attracted to the electrostatic chuck, so that the surface of the electrostatic chuck is charged with plus electric charge, thereby preventing its attracting function from being deteriorated.Type: GrantFiled: June 28, 1996Date of Patent: December 7, 1999Assignee: Tokyo Electron LimitedInventors: Masahiro Ogasawara, Ryo Nonaka, Yoshiyuki Kobayashi
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Patent number: 5990016Abstract: A dry etching method and apparatus improves the uniformity of etching a wafer in the manufacture of a semiconductor device. The dry etching apparatus has a susceptor supporting the wafer, a cooling system installed in the susceptor, an upper RF (radio frequency) electrode which may incorporate a gas diffuser for spraying reactive gas toward the wafer, and an RF power source for producing an electric field used to react the gas and generate plasma. The gap between the upper RF electrode and the susceptor is configured to accommodate for distortions in the wafer or other processing requirements. In addition, the nozzles of the gas diffuser can be configured to spray different amounts of gas to also enhance the etching uniformity. Finally, one of the electrodes may be divided into concentric sections. In this case, the RF power source can generate electric fields of different intensities at the sections.Type: GrantFiled: December 23, 1997Date of Patent: November 23, 1999Assignee: Samsung Electronics Co., Ltd.Inventors: Byong-dong Kim, Jung-kyu Lee, Sung-il Kim
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Patent number: 5985378Abstract: The remote-plasma-CVD process for coating or treating large-surface substrates includes exciting an excitation gas located remotely from a substrate surface to be coated or treated in modular plasma source devices arranged either in a linear arrangement or in a planar, grid-like arrangement over the substrate surface and feeding a reactant gas with the excitation gas from the plasma source devices to the substrate surface to excite the reactant gas with the excitation gas and thus form a coating on the substrate surface or treat the substrate surface.Type: GrantFiled: October 17, 1997Date of Patent: November 16, 1999Assignee: Schott GlaswerkeInventor: Volker Paquet
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Patent number: 5980769Abstract: A plasma etching method and apparatus are provided in which a distance between an ejection opening (20a) in a plasma generator (2) for ejecting an active species gas and a surface of an object to be etched can be changed to thereby shorten the time required for a surface flattening operation and reduce the cost of equipment as well. To this end, the ejection opening (20a) of a predetermined diameter is disposed in confrontation with a desired convex of the object to be etched in the form of a wafer (110). The active species gas in the form of an F gas (G) is ejected from the ejection opening (20a) to the convex to thereby flatten it through etching. A distance between the ejection opening and the convex is changed by means of a Z drive mechanism (4) to provide an etching area corresponding to an area of the convex, thus performing effective flattening of the wafer (110).Type: GrantFiled: November 6, 1997Date of Patent: November 9, 1999Assignee: Speedfam Co., Ltd.Inventors: Michihiko Yanagisawa, Shinya Iida
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Patent number: 5961850Abstract: A plasma processing apparatus and method controls the temperature of those portions in the processing chamber to which reaction products or gaseous reaction products generated during plasma processing adhere, thereby minimizing the generation of foreign matter and ensuring high yields. A plasma processing gas is supplied to the plasma generation chamber 10 whose pressure is maintained at a predetermined value. Provided in the plasma generation chamber are a specimen mount 11 on which to mount an object to be processed and an evacuation mechanism 16 that evacuates the plasma generation chamber.Type: GrantFiled: March 14, 1996Date of Patent: October 5, 1999Assignee: Hitachi, Ltd.Inventors: Yoshiaki Satou, Tadamitsu Kanekiyo, katsuyoshi Kudo
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Patent number: 5948283Abstract: The invention provides method and apparatus that control the thermal environment of the first substrate or substrate of series of substrates treated by a uniform direct-plasma, in order to reduce first-wafer effect. By providing supplemental heat to the substrate in treatment or, equivalently, reducing the rate of heat extraction from the substrate in treatment, early in the series, the invention creates steady-state process conditions that reduce substrate-to-substrate variability in process outcome.Type: GrantFiled: June 28, 1996Date of Patent: September 7, 1999Assignee: Lam Research CorporationInventor: Paul F. Grosshart
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Patent number: 5945008Abstract: The present invention provides a method for plasma control, in which an electric field is generated in the direction perpendicular to the surface of an object to be processed in plasma atmosphere generated in a processing chamber and another electric field is generated in the direction parallel to the surface, and the direction of ion or electron in plasma atmosphere is controlled by controlling the composite electric field composed of both the electric fields. The invention provides also an apparatus for plasma control provided with a perpendicular electric field generating means for generating an electric field in the direction perpendicular to the surface of the object, and a parallel electric field generating means for generating an electric field in the direction parallel to the surface of the object.Type: GrantFiled: September 26, 1995Date of Patent: August 31, 1999Assignee: Sony CorporationInventors: Toshiro Kisakibaru, Akira Kojima, Yasushi Kato, Isao Honbori, Satoshi Bannai, Tomohiro Chiba, Toshitaka Kawashima
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Patent number: 5936352Abstract: A plasma processing apparatus includes a plasma chamber and an antenna formed by a first set of parallel antenna elements and a second set of parallel antenna elements, the antenna elements of the first set being interdigitally arranged with those of the second set. An energy source supplies oscillation energy of first phase to the first set of antenna elements and oscillation energy of second, opposite phase to the second set of antenna elements to produce oppositely moving energy fields in the chamber at such a frequency that electrons are confined in a plasma produced in the chamber.Type: GrantFiled: November 20, 1996Date of Patent: August 10, 1999Assignees: NEC Corporation, Nihon Koshua Co., Ltd., Anelva CorporationInventors: Seiji Samukawa, Tsutomu Tsukada, Yukito Nakagawa, Kibatsu Shinohara, Hirofumi Matsumoto, Hiroyuki Ueyama
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Patent number: 5935455Abstract: A method for excitation of a plasma, characterized in that it comprises the step of subjecting a gas to an electric field generated by an electrode system comprising n electrodes, n being an integer greater than or equal to 3, preferably between 3 and 30, each of the n electrodes being connected to one of the following AC voltages: ##EQU1## where: f is a frequency in the range of 10 to 10000 Hz, preferably 30 to 200 Hz, more preferably 50 to 60 Hz, U.sub.0 is a voltage in the range of 50 to 10000 V,at least one electrode being connected to U.sub.r, at least one electrode being connected to Us and at least one electrode being connected to U.sub.t. The invention also concerns an electrode system for carrying out the method.Type: GrantFiled: May 1, 1996Date of Patent: August 10, 1999Assignee: NKT Research Center A/SInventor: Kristian Glejb.o slashed.l
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Patent number: 5891350Abstract: A method of adjusting the cathode DC bias in a plasma chamber for fabricating semiconductor devices. A dielectric shield is positioned between the plasma and a selected portion of the electrically grounded components of the chamber, such as the electrically grounded chamber wall. The cathode DC bias is adjusted by controlling one or more of the following parameters: (1) the surface area of the chamber wall or other grounded components which is blocked by the dielectric shield; (2) the thickness of the dielectric; (3) the gap between the shield and the chamber wall; and (4) the dielectric constant of the dielectric material. In an apparatus aspect, the invention is a plasma chamber for fabricating semiconductor devices having an exhaust baffle with a number of sinuous passages. Each passage is sufficiently long and sinuous that no portion of the plasma within the chamber can extend beyond the outlet of the passage.Type: GrantFiled: June 20, 1996Date of Patent: April 6, 1999Assignee: Applied Materials, Inc.Inventors: Hong Ching Shan, Evans Yip Lee, Michael D Welch, Robert W Wu, Bryan Pu, Paul Ernest Luscher, James David Carducci, Richard Blume
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Patent number: 5891349Abstract: A plasma enhanced CVD apparatus includes a processing chamber, a pumping system for evacuating the processing chamber, a gas inlet system for introducing a source gas, and a plasma generating electrode provided in the processing chamber for depositing a film on a substrate in the processing chamber by plasma generated by electrical power supplied to the plasma generating electrode; the plasma generating electrode has two terminals, one of the terminals is connected to a radio frequency power source and other of the terminals is grounded through an electrode potential controlling system; and the processing chamber is grounded through an inner wall potential controlling system. The present invention is further directed to a plasma enhanced CVD process, a dry etching apparatus, and a dry etch process.Type: GrantFiled: October 3, 1996Date of Patent: April 6, 1999Assignee: Anelva CorporationInventors: Ryoki Tobe, Masao Sasaki, Atsushi Sekiguchi, Ken-ichi Takagi
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Patent number: 5888414Abstract: A plasma reactor chamber uses an antenna driven by RF energy (LF, MF, or VHF) which is inductively coupled inside the reactor dome. The antenna generates a high density, low energy plasma inside the chamber for etching oxygen-containing layers overlying non-oxygen-containing layers with high selectivity. Auxiliary RF bias energy applied to the wafer support cathode controls the cathode sheath voltage and controls the ion energy independent of density. Various magnetic and voltage processing enhancement techniques are disclosed, along with other etch processes, deposition processes and combined etch/deposition processes. The disclosed invention provides processing of sensitive devices without damage and without microloading, thus providing increased yields. Etching of an oxygen-containing layer overlying a non-oxygen-containing layer can be achieved with high selectivity.Type: GrantFiled: September 24, 1997Date of Patent: March 30, 1999Assignee: Applied Materials, Inc.Inventors: Kenneth S. Collins, Chan-Lon Yang, Jerry Yuen-Kui Wong, Jeffrey Marks, Peter R. Keswick, David W. Groechel
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Patent number: 5882538Abstract: A method of low-damage, anisotropic etching of substrates including mounting the substrate upon the anode in a DC plasma reactor and subjecting the substrate to a plasma of low-energy electrons and a species reactive with the substrate. An apparatus for conducting low-damage, anisotropic etching including a DC plasma reactor, a permeable wall hollow cold cathode, an anode, and means for mounting the substrate upon the anode.Type: GrantFiled: August 28, 1996Date of Patent: March 16, 1999Assignee: Georgia Tech Research CorporationInventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
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Patent number: 5879573Abstract: An optimal gap is determined between a lower electrode and an upper electrode in a plasma processing device. A gap is set between the lower electrode and the upper electrode, and a substrate is processed in the plasma processing chamber. The processing results are obtained, and the processing rate and uniformity are determined from the processing results. The processing rate and uniformity are plotted with the gap setting. The steps of setting, processing, obtaining, determining, and plotting are repeated for additional substrates, the gap setting being different for each substrate. The optimal gap setting is selected as the gap setting corresponding to an optimal processing rate and an optimal uniformity.Type: GrantFiled: August 12, 1997Date of Patent: March 9, 1999Assignee: VLSI Technology, Inc.Inventor: Christopher T. Robinett
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Patent number: 5874014Abstract: A method and apparatus for treating a work surface, wherein there is provided a chamber having a longitudinal axis and longitudinally extending electrically conductive sidewalls, at least one sidewall having at least one longitudinally extending gap that interrupts a current path through the sidewalls transverse to the longitudinal axis, and wherein the chamber is sealed to allow pressure inside the chamber to be controlled.Type: GrantFiled: June 7, 1995Date of Patent: February 23, 1999Assignees: Berkeley Scholars, Inc., Research Triangle Institute, Minnesota Mining and Manufacturing CompanyInventors: Anthony E. Robson, Ronald A. Rudder, Robert C. Hendry, Moses M. David, James V. Burt
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Patent number: 5872062Abstract: A method is provided wherein a process suitable for subtractive etching of titanium nitride layers useful in the fabrication of semiconductor integrated circuit devices can be efficiently employed on commercially-available plasma reactor system equipment normally suitable only for subtractive etching of passivation layer materials and the like, resulting in increased efficiency and reduced cost in the manufacturing of such devices.Type: GrantFiled: May 20, 1996Date of Patent: February 16, 1999Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Iman Hsu
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Patent number: 5869402Abstract: A reactive gas is introduced into a vacuum chamber by a gas controller so that a plasma is generated in a plasma generation region. Subsequently, high-frequency power from a high-frequency power source is applied to a sample stage in the vacuum chamber so that ions in the plasma are made incident upon the sample stage, thereby performing dry etching with respect to a sample on the sample stage. In main etching, a value of (pressure of reactive gas)/(frequency of high-frequency power) is reduced so as to reduce a scattering probability, which is the probability of ions being scattered in collision with neutral particles in a sheath region, thereby increasing the energy of ion fluxes and making the incidence directions of the ion fluxes perpendicular to a surface of the sample stage.Type: GrantFiled: May 10, 1995Date of Patent: February 9, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Harafuji, Masafumi Kubota
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Patent number: 5854136Abstract: This invention describes a three-step process for etching a layer of silicon nitride over a thin layer of silicon dioxide on a semiconductor substrate for producing silicon nitride pattern with nearly vertical sidewalls, very small critical dimension bias and no trenching in the silicon dioxide, comprising a first step of a highly anisotropic etch process with a high etch rate, achieved by adding CHF.sub.3 to the gaseous mixture of SF.sub.6 and He, carried out at a relatively high power and low pressure, used to etch the bulk of the silicon nitride layer, a second step of lower etch anisotropy and etch rate, achieved by replacing CHF.sub.3 with HBr, carried out at higher pressure and lower power, used to etch out the remainder of the nitride layer with a small over-etch beyond the end point, a third step of high Si.sub.3 N.sub.4 /SiO.sub.2 etch selectivity, achieved by adding an oxidant to the reactive gas mixture, used to remove any remaining silicon nitride residues.Type: GrantFiled: March 25, 1996Date of Patent: December 29, 1998Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih Chang Huang, Yuh Da Fan, Yung-Jung Chang
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Patent number: 5849372Abstract: A plasma reactor includes a pair of parallel plate electrodes (1,2) one of which is grounded and the other driven, mounted within a chamber (8) which is connected via a port (8a) to a control device (16) for controlling the pressure of the gas within the chamber (8). The driven electrode (1) is connected to a voltage supply which has a driving frequency of 13.56 MHz, via an amplifier (9) and a superposed higher resonance frequency via a variable frequency power generator (11). With the plasma reactor sheath resonance in the glow discharge between the electrodes (1,2) can be generated to have a standing wave and thereby ensuring a greater coupling of the power in the system.Type: GrantFiled: March 18, 1996Date of Patent: December 15, 1998Assignee: Isis Innovation LimitedInventors: Beatrice Maria Annaratone, John Edward Allen
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Patent number: 5846885Abstract: In a plasma equipment and a plasma treatment method of a semiconductor device capable of reducing electron shading effect and also suppressing charge damage without affecting various characteristics in plasma process, a distance between a substrate bias electrode and A counter electrode is set less than two times as long as a mean free path of electron. High frequency electric power of 100 kHz to 1 MHz is supplied to the substrate bias electrode, while high frequency electric power of 1 MHz to 100 MHz is supplied to the counter electrode.Type: GrantFiled: August 23, 1996Date of Patent: December 8, 1998Assignee: Fujitsu LimitedInventors: Takeshi Kamata, Hiroshi Arimoto, Makoto Kosugi, Koichi Hashimoto
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Patent number: 5837615Abstract: A trench etching process is disclosed in which a substrate is etched under conditions that promote forward sputtering of mask material in a plasma reactor having at least three electrodes. The forward sputtering impedes etching of trench sidewalls by depositing a protective layer of mask material on the sidewalls of a trench being formed. By controlling the amount of forward sputtering, one can control the trench profile and aspect ratio (depth to width). By employing forward sputter etching in a three or more electrode reactor, trenches of less than one micron in width and having aspect ratios of at least 2.5:1 are formed. Such trenches are used in trench capacitors of high density DRAMs. A disclosed plasma reactor includes a grounded first electrode which forms part of the reactor's enclosure, a coiled second electrode disposed above and separated from the reactor enclosure by a dielectric shield, and a planar third electrode located below the substrate to be etched.Type: GrantFiled: August 14, 1997Date of Patent: November 17, 1998Assignee: LSI Logic CorporationInventor: Michael D. Rostoker
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Patent number: 5827435Abstract: A plasma processing method is provided which suppresses the charge accumulation on a processing object such as a semiconductor substrate. An alternating excitation signal in the form of pulses for exciting the plasma is supplied to a reaction gas contained in a plasma chamber, each pulse having an on-period t.sub.on for supplying the excitation signal and an off-period t.sub.off for stopping the excitation signal. The off period ranges from 10 to 100 .mu.sec. The on-period may be determined as needed. An alternating bias signal for biasing the processing object is also applied to the object in the chamber. The bias signal has a frequency of at most 600 kHz. As a result, an increased number of positive and negative ions impinge the object thus increasing the processing rate and reducing the charge accumulation compared to prior art processes.Type: GrantFiled: October 26, 1995Date of Patent: October 27, 1998Assignee: NEC CorporationInventor: Seiji Samukawa
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Patent number: 5817534Abstract: The invention is carried out in a plasma reactor for processing a semiconductor wafer, the plasma reactor having a chamber for containing a processing gas and having a conductor connected to an RF power source for coupling RF power into the reactor chamber to generate from the processing gas a plasma inside the chamber, the chamber containing at least one surface exposed toward the plasma and susceptible to contamination by particles produced during processing of the wafer, the invention being carried out by promoting, during processing of the wafer, bombarding of particles from the plasma onto the one surface to remove therefrom contaminants deposited during processing of the wafer. Such promoting of bombarding is carried out by providing an RF power supply and coupling, during processing of the wafer, RF power from the supply to the one surface. The coupling may be performed by a capacitive cleaning electrode adjacent the one surface, the capacitive cleaning electrode connected to the RF power supply.Type: GrantFiled: December 4, 1995Date of Patent: October 6, 1998Assignee: Applied Materials, Inc.Inventors: Yan Ye, Hiroji Hanawa, Diana Xiaobing Ma, Gerald Zheyao Yin, Peter Loewenhardt, Donald Olgado, James Papanu, Steven S.Y. Mak
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Patent number: 5804089Abstract: A plasma processing apparatus includes a vacuum container accommodating a to-be-processed substrate. A vacuum discharge device discharges gas from the container, and a gas feed device feeds a gas in the container. A pair of electrodes includes one which has a concave surface for holding the substrate thereon. A high frequency power supply device supplies a high frequency power to the electrodes, a gas feed device for filling between the substrate and the electrodes with an inert gas to cool the substrate, and a holding device for pressing a side end face of the substrate in a direction along a surface of the substrate to shape the substrate into a concave while holding the substrate on the concave surface of the electrode.Type: GrantFiled: October 30, 1995Date of Patent: September 8, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masaki Suzuki, Shigeyuki Yamamoto
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Patent number: 5795399Abstract: A plasma etching apparatus has a first load-lock chamber, a process chamber connected to the first load-lock chamber through a gate valve, and a second load-lock chamber connected to the process chamber through another gate valve. A first processing section is provided to the process chamber to etch a wafer. A second processing section is provided to the second load-lock chamber to remove a reaction product generated during etching from the wafer. In the second processing section, an ultrasonic wave is applied to the wafer, thereby removing the reaction product from the wafer.Type: GrantFiled: June 29, 1995Date of Patent: August 18, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Makoto Hasegawa, Atsuo Sanda, Haruhiko Nomura
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Patent number: 5792376Abstract: A plasma processing apparatus includes a first electrode which is substantially flat and has a substrate mounting region mounted with a substrate to be treated, a chamber for containing the first electrode, gas introducing means for introducing a predetermined gas into the chamber, gas exhausting means for exhausting the gas from the chamber, a second electrode constituted of one of a metal portion of the chamber and a metal plate provided inside the chamber, power supply means for supplying high-frequency power between the first electrode and the second electrode, and an insulative cover for covering a surface of the first electrode other than the substrate mounting region. The substrate mounting region is formed as a convex portion on the first electrode, and an outside shape thereof is smaller than that of the substrate. The substrate is mounted on the substrate mounting region so as to completely cover the substrate mounting region.Type: GrantFiled: December 29, 1995Date of Patent: August 11, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Hideki Kanai, Ikuo Yoneda, Masamitsu Itoh
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Patent number: 5779807Abstract: An electrostatic technique for removing particulate matter from a semiconductor wafer in a plasma processing chamber, such as a plasma-enhanced chemical vapor deposition (PECVD) chamber. During a particulate removal phase of operation, a normally grounded electrode that supports the wafer is temporarily isolated from ground and a bias voltage generator is simultaneously connected to the electrode, supplying sufficient bias voltage to electrostatically launch particulates from the surface of the wafer. A plasma formed above the normally grounded electrode is maintained during the particulate removal phase, and particulates launched from the wafer become suspended in a sheath region surrounding the plasma, from where they can be later removed by a purging flow of gas. Preferably, the bias voltage generator provides a bias voltage that alternates in polarity, to ensure removal of both positively-charged and negatively charged particles from the wafer surface.Type: GrantFiled: October 29, 1996Date of Patent: July 14, 1998Assignee: Applied Materials, Inc.Inventors: Charles Dornfest, Anand Gupta, Gerald Girard
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Patent number: 5766498Abstract: A parallel-plate plasma etching apparatus includes a susceptor electrode and a shower electrode which are arranged in a process chamber. A semiconductor wafer is placed on the susceptor electrode. A shower region defined by a plurality of process gas supply holes is formed in the shower electrode. The shower electrode is cooled by a cooling block and causes an effective electrode portion of the shower electrode to have a temperature gradient such that a temperature at the central portion of the effective electrode portion is lower than a temperature at the peripheral portion of the effective electrode portion. The diameter of the shower region is selected to be smaller than the diameter of the wafer by 5 to 25% such that degradation of planar uniformity of a degree of etching anisotropy on the wafer caused by the temperature gradient of the effective electrode portion is compensated for.Type: GrantFiled: March 29, 1996Date of Patent: June 16, 1998Assignees: Hitachi, Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi LimitedInventors: Masayuki Kojima, Yoshikazu Ito, Kazushi Tomita, Shigeki Tozawa, Shunichi Iimuro, Masashi Arasawa, Eiichi Nishimura
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Patent number: 5766494Abstract: According to the present invention, there is provided an etching method comprising the steps of forming a first thin film on a surface of a substrate to be processed, supporting the substrate to be processed, forming a second thin film serving to deactivate an active gas used for etching the first thin film, on a surface of a mask plate piece used as the first thin film mask, fixing the mask plate piece so that the first thin film and the second thin film oppose to each other with a predetermined distance therebetween, and etching the first thin film by supplying the active gas to the first thin film via the mask plate piece.Type: GrantFiled: August 28, 1995Date of Patent: June 16, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Haruki Mori, Yukimasa Yoshida, Koji Shimomura
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Patent number: 5753132Abstract: A process for fabricating an electrostatic chuck (20) comprising the steps of (c) forming a base (80) having an upper surface with cooling grooves (85) therein, the grooves sized and distributed for holding a coolant therein for cooling the base; and (d) pressure conforming an electrical insulator layer (45) to the grooves on the base by the steps of (i) placing the base into a pressure forming apparatus (25) and applying an electrical insulator layer over the grooves in the base; and (ii) applying a sufficiently high pressure onto the insulator layer to pressure conform the insulator layer to the grooves to form a substantially continuous layer of electrical insulator conformal to the grooves on the base.Type: GrantFiled: October 4, 1996Date of Patent: May 19, 1998Assignee: Applied Materials, Inc.Inventors: Shamouil Shamouilian, Sasson Somekh, Hyman J. Levinstein, Manoocher Birang, Semyon Sherstinsky, John F. Cameron
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Patent number: 5746928Abstract: A method of cleaning an electrostatic chuck of a plasma etching apparatus wherein a dummy wafer is placed on the chuck, the chamber evacuated, and an RF voltage applied that is greater than the normal RF voltage used to etch.Type: GrantFiled: June 3, 1996Date of Patent: May 5, 1998Assignee: Taiwan Semiconductor Manufacturing Company LtdInventors: Shih Kuei Yen, Po-Tao Chu, Kuang-Hui Chang
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Patent number: 5718795Abstract: The present invention is embodied in a plasma reactor for processing a workpiece such as a semiconductor wafer having an axis of symmetry, the reactor including a reactor chamber with a ceiling having an upwardly extending annular pocket bounded by a pair of circumferential side walls, a pedestal for supporting the workpiece within the chamber under the ceiling, a processing gas supply inlet into the chamber, an RF plasma power source coupled to the pedestal, and a magnetic field source near the ceiling providing a radially symmetrical magnetic field having a magnetic pole of one type facing said inner circumferential wall and a magnetic pole of the opposite type facing said outer circumferential wall so as to apply a magnetic field generally straight across said annular pocket.Type: GrantFiled: August 21, 1995Date of Patent: February 17, 1998Assignee: Applied Materials, Inc.Inventors: Richard W. Plavidal, Shaoher X. Pan
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Patent number: 5716485Abstract: Electrode designs for reducing the problem of non-uniform etch in large diameter substrates are presented. The electrode opposite the substrate being etched in a plasma reactor can be tailored as to its shape so as to control the uniformity of the etching across the substrate. This is achieved with a number of generally dome-shaped electrode structures including generally cone-shaped electrodes, generally pyramidally-shaped electrodes and generally hemispherically-shaped electrodes. It is believed that non-uniformity of etching is due, at least in part, to excess ion density at the center of the reactor. The dome-shaped electrodes serve to disperse the high concentration of ions from the center of the reactor out toward the periphery of the substrate and thereby even out the ion density distribution across the substrate being etched. The electrodes are useable in diode plasma reactors, triode plasma reactors and ICP plasma reactors.Type: GrantFiled: June 7, 1995Date of Patent: February 10, 1998Assignee: Varian Associates, Inc.Inventors: Siamak Salimian, Carol M. Heller, Lumin Li
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Patent number: 5707692Abstract: A plasma processing apparatus for processing a base substance installed within a processing chamber into which predetermined gases are flowed and which is maintained at a predetermined pressure by producing a plasma within said processing chamber is characterized by comprising plasma producing means for producing the plasma within said processing chamber including at least two ground electrodes provided on external peripheries of said processing chamber, and an rf electrode provided on external periphery of said processing chamber between said two ground electrodes, and magnetic field producing means for producing a magnetic field orthogonal to an electric field formed by said plasma producing means.Type: GrantFiled: October 11, 1994Date of Patent: January 13, 1998Assignee: Canon Kabushiki KaishaInventor: Nobumasa Suzuki
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Patent number: 5705081Abstract: An etching apparatus comprises a pair of electrodes provided to face each other in a processing vessel, a permanent magnet for forming a magnetic field substantially parallel to a surface of a to-be-processed object which is placed between the paired electrodes, a gas introduction section for introducing etching gas into the processing vessel, a high-frequency generator for applying high-frequency voltage to the paired electrodes for generating plasma, and a high-frequency control section for preventing plasma from being unevenly distributed by starting and stopping the application of high-frequency voltage by the high-frequency generator at fixed intervals.Type: GrantFiled: September 21, 1995Date of Patent: January 6, 1998Assignee: Tokyo Electron LimitedInventors: Koichiro Inazawa, Shin Okamoto, Yoshifumi Tahara
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Patent number: 5693179Abstract: A plasma etch chamber includes a modified focus ring which is used in conjunction with chamber pressure throttling to eject contaminants in the focus ring away from the substrate just before the etching cycle is completed. Additionally, process gas is directed against the inner wall of the chamber to create a swirling flow of plasma within the chamber and thus disturb any contaminant-generating field adjacent the chamber wall. A process gas, or a non-reactive purge gas, may also be supplied from a diffuser atop the cathode, to direct a gas layer along the top and sides of the chamber to reduce contaminant build-up on the chamber surfaces.Type: GrantFiled: June 2, 1995Date of Patent: December 2, 1997Assignee: Applied Materials, Inc.Inventors: Greg Blackburn, Joseph Kava, Richard McGovern, Yan Rozenzon
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Patent number: 5681419Abstract: A reactive ion etching apparatus comprises a reactive chamber, an upper anode plate, a lower cathode plate, a gas introducing system and a pumping system. The cathode plate is formed as a variable potential electrode. The variable potential electrode is a combination of a conductive material and a nonconductive material.Type: GrantFiled: December 27, 1995Date of Patent: October 28, 1997Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Hak-Soon Yoon
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Patent number: 5662770Abstract: This invention is a hardware modification which permits greater uniformity of etching to be achieved in a high-density-source plasma reactor (i.e., one which uses a remote source to generate a plasma, and which also uses high-frequency bias power on the wafer chuck). The invention addresses the uniformity problem which arises as the result of nonuniform power coupling between the wafer and the walls of the etch chamber. The solution to greatly mitigate the nonuniformity problem is to increase the impedance between the wafer and the chamber walls. This may be accomplished by placing a cylindrical dielectric wall around the wafer. Quartz is a dielectric material that is ideal for the cylindrical wall if silicon is to be etched selectively with respect to silicon dioxide, as quartz it is virtually inert under such conditions.Type: GrantFiled: April 16, 1993Date of Patent: September 2, 1997Assignee: Micron Technology, Inc.Inventor: Kevin G. Donohoe
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Patent number: 5660671Abstract: A magnetron plasma processing apparatus includes, a vacuum chamber storing an etching object, a first electrode which is provided in the vacuum chamber and holds the etching object, a second electrode which is disposed in opposition from the first electrode and parallel with the first electrode. A gas-supply unit feeding etching gas to the vacuum chamber while, a magnetic-field generating means is disposed on the part opposite from the first electrode in opposition from the second electrode, and a power-supply unit feeds power to either the first or second electrodes and generates discharge between the electrodes. The magnetic-field generating means is provided with a magnetic block whose both-end surfaces are provided with magnetic poles having polarity inverse from each other, and in addition, a plane recess opposite from the second electrode is provided between both-end surfaces of the magnetic block.Type: GrantFiled: June 28, 1994Date of Patent: August 26, 1997Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Hiromi Harada, Sinji Kubota, Hiromi Kumagai, Junichi Arami, Keiji Horioka, Isahiro Hasegawa, Haruo Okano, Katsuya Okumura, Yukimasa Yoshida
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Patent number: 5643639Abstract: A method and apparatus for generating plasmas adapted for chemical vapor deposition, etching and other operations, and in particular to the deposition of large-area diamond films, wherein a chamber defined by sidewalls surrounding a longitudinal axis is encircled by an axially-extending array of current-carrying conductors that are substantially transverse to the longitudinal axis of the chamber, and a gaseous material is provided in the chamber. A high-frequency current is produced in the conductors to magnetically induce ionization of the gaseous material in the chamber and form a plasma sheath that surrounds and extends along the longitudinal axis and conforms to the sidewalls of the chamber. A work surface extending in the direction of the longitudinal axis of the chamber is positioned adjacent a sidewall, exposed to the plasma sheath and treated by the plasma.Type: GrantFiled: December 22, 1994Date of Patent: July 1, 1997Assignee: Research Triangle InstituteInventors: Ronald Alan Rudder, Robert Carlisle Hendry, George Carlton Hudson
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Patent number: 5639519Abstract: An apparatus for producing a plasma suitable for semiconductor processing at pressures in the low millitorr range. The apparatus includes a vacuum chamber with a dielectric window, a generally planar coil disposed adjacent the window outside the chamber and coupled to an appropriate power source, and a plasma initiator disposed within the chamber. Once the plasma is initiated, the planar coil sustains the plasma by inductive power coupling. In one embodiment the plasma initiator is a secondary electrode disposed within the chamber and coupled to a second RF power source. In an alternative embodiment both the secondary electrode and a target pedestal are coupled to the secondary RF power source through a power splitter. In an alternative embodiment, the plasma initiator is used to ionize a portion of the process gas and provide a plasma that may then inductively couple with the planar coil.Type: GrantFiled: November 20, 1995Date of Patent: June 17, 1997Assignee: LSI Logic CorporationInventors: Roger Patrick, Philippe Schoenborn, Mark Franklin, Frank Bose
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Patent number: 5628869Abstract: A semiconductor integrated circuit is made by a process including the formation on a surface of a semiconductor integrated circuit processing wafer of a layer of material applied to the wafer by plasma enhanced chemical vapor deposition (PECVD). The layer of material may include plural sub-layers, the thicknesses of which are additive to result in the thickness of the layer of material itself. The sub-layers of material may have non-uniform thicknesses across a dimension of the processing wafer because of compromises in the process which are necessary to control various parameters of the material layer other than its thickness. These non-uniformities of thickness of the sub-layers may be controlled to offset one another so that the resulting layer of material has a substantially uniform thickness across the dimension of the processing wafer.Type: GrantFiled: May 9, 1994Date of Patent: May 13, 1997Assignee: LSI Logic CorporationInventor: Thomas G. Mallon
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Patent number: 5627435Abstract: An array of hollow cathodes can be made by mounting a housing connected to a source of plasma precursor gas and to a source of power in a vacuum chamber, said housing having a plurality of uniformly spaced openings in a wall thereof into which a plasma can be generated. A substrate to be treated is mounted parallel to and spaced a preselected distance from said openings. In operation, a plurality of plasma torches is created extending from the openings which can plasma etch and remove coatings on said substrate.Type: GrantFiled: February 15, 1996Date of Patent: May 6, 1997Assignee: The BOC Group, Inc.Inventors: Frank Jansen, Steven K. Krommenhoek, Abraham I. Belkind, Zoltan Orban, Jr.
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Patent number: 5618382Abstract: A plasma process apparatus capacitor operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.Type: GrantFiled: June 25, 1993Date of Patent: April 8, 1997Assignee: Applied Materials, Inc.Inventors: Donald M. Mintz, Hiroji Hanawa, Sasson Somekh, Dan Maydan, Kenneth S. Collins
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Patent number: 5614055Abstract: In one aspect, the invention is embodied in an RF inductively coupled plasma reactor including a vacuum chamber for processing a wafer, one or more gas sources for introducing into the chamber reactant gases, and an antenna capable of radiating RF energy into the chamber to generate a plasma therein by inductive coupling, the antenna lying in a two-dimensionally curved surface. In another aspect, invention is embodied in a plasma reactor including apparatus for spraying a reactant gas at a supersonic velocity toward the portion of the chamber overlying the wafer. In a still further aspect, the invention is embodied in a plasma reactor including a planar spray showerhead for spraying a reactant gas into the portion of the chamber overlying the wafer with plural spray nozzle openings facing the wafer, and plural magnets in an interior portion of the planar spray nozzle between adjacent ones of the plural nozzle openings, the plural magnets being oriented so as to repel ions from the spray nozzle openings.Type: GrantFiled: August 27, 1993Date of Patent: March 25, 1997Assignee: Applied Materials, Inc.Inventors: Kevin Fairbairn, Romuald Nowak
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Patent number: 5607718Abstract: This invention provides a polishing method including the steps of forming a film to be polished on a substrate having a recessed portion in its surface so as to fill at least the recessed portion, and selectively leaving the film to be polished behind in the recessed portion by polishing the film by using a polishing agent containing polishing particles and a solvent, and having a pH of 7.5 or more. The invention also provides a polishing apparatus including a polishing agent storage vessel for storing a polishing agent, a turntable for polishing an object to be polished, a polishing agent supply pipe for supplying the polishing agent from the polishing agent storage vessel onto the turntable, a polishing object holding jig for holding the object to be polished such that the surface to be polished of the object opposes the turntable, and a polishing agent supply pipe temperature adjusting unit, connected to the polishing agent supply pipe, for adjusting the temperature of the polishing agent.Type: GrantFiled: September 2, 1994Date of Patent: March 4, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Yasutaka Sasaki, Mie Matsuo, Rempei Nakata, Junichi Wada, Nobuo Hayasaka, Hiroyuki Yano, Haruo Okano