Abstract: A method for manufacturing a device comprising a structure with nanowires based on a semiconducting material such as Si and another structure with nanowires based on another semiconducting material such as SiGe, and is notably applied to the manufacturing of transistors.

Abstract: A method and system for performing gas cluster ion beam (GCIB) etch processing of Si-containing material and/or Ge-containing material is described. In particular, the GCIB etch processing includes forming a GCIB that contains a halogen element.

Abstract: A method and system for performing gas cluster ion beam (GCIB) etch processing of various materials is described. In particular, the GCIB etch processing includes setting one or more GCIB properties of a GCIB process condition for the GCIB to achieve one or more target etch process metrics.

Abstract: A method for selectively etching a substrate is described. The method includes preparing a substrate comprising a silicon nitride layer overlying a silicon-containing contact region, and patterning the silicon nitride layer to expose the silicon-containing contact region using a plasma etching process in a plasma etching system. The plasma etching process uses a process composition having as incipient ingredients a process gas containing C, H and F, and a non-oxygen-containing additive gas, wherein the non-oxygen-containing additive gas includes H, or C, or both H and C, and excludes a halogen atom.

Abstract: Methods for etching high-k material at high temperatures are provided. In one embodiment, a method etching high-k material on a substrate may include providing a substrate having a high-k material layer disposed thereon into an etch chamber, forming a plasma from an etching gas mixture including at least a halogen containing gas into the etch chamber, maintaining a temperature of an interior surface of the etch chamber in excess of about 100 degree Celsius while etching the high-k material layer in the presence of the plasma, and maintaining a substrate temperature between about 100 degree Celsius and about 250 degrees Celsius while etching the high-k material layer in the presence of the plasma.

Abstract: Embodiments of the invention may include first providing a stack of layers including a semiconductor substrate, a buried oxide layer on the semiconductor substrate, a semiconductor-on-insulator layer on the buried-oxide layer, a nitride layer on the semiconductor-on-insulator layer, and a silicon oxide layer on the nitride layer. A first opening and second opening with a smaller cross-sectional area than the first opening are then formed in the silicon oxide layer, the nitride layer, the semiconductor-on-insulator layer, and the buried-oxide layer. The first opening and the second opening are then etched with a first etching gas. The first opening and the second opening are then etched with a second etching gas, which includes the first etching gas and a halogenated silicon compound, for example, silicon tetrafluoride or silicon tetrachloride. In one embodiment, the first etching gas includes hydrogen bromide, nitrogen trifluoride, and oxygen.

Abstract: A method for forming a magnetic tunnel junction cell includes forming a pinning layer, a pinned layer, a dielectric layer and a free layer over a first electrode, forming a second electrode on the free layer, etching the free layer and the dielectric layer using the second electrode as an etch barrier to form a first pattern, forming a prevention layer on a sidewall of the first pattern, and etching the pinned layer and the pinning layer using the second electrode and the prevention layer as an etch barrier to form a second pattern.

Abstract: A pattern forming method including: (a) forming a porous layer above an etching target layer; (b) forming an organic material with a transferred pattern on the porous layer; (c) forming, by use of the transferred pattern, a processed pattern in a transfer oxide film that is more resistant to etching than the porous layer; and (d) transferring the processed pattern to the etching target layer by use of the transfer oxide film as a mask.

Abstract: A micromechanical method for manufacturing a cavity in a substrate, and a micromechanical component manufactured with this method. In this method, in a first step a first layer is produced on or in a substrate. At least one second layer is then applied onto the first layer. An access hole is produced in this second layer. Material of the first layer and of the substrate can be dissolved out through this hole, so that a cavity is produced in the substrate beneath at least a portion of the second layer. This second layer above the cavity can subsequently be used as a membrane. In addition, the possibility also exists of depositing further layers onto the second layer, only the totality of which layers constitutes the membrane. The material of the first layer is selected so that dissolving out the material of the first layer produces a transition edge in the first layer, which edge at is at a predefinable angle between the substrate and the second layer.

Abstract: The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containers over a semiconductor substrate, with such containers having upwardly-extending openings with lateral widths of less than or equal to about 4000 angstroms; and the silicon nitride can be in the form of a layer extending between the containers. The selective etching can comprise exposure of at least some of the silicon nitride and the containers to Cl2 to remove the exposed silicon nitride, while not removing at least the majority of the metal nitride from the containers. In subsequent processing, the containers can be incorporated into capacitors.

Abstract: In one non-limiting exemplary embodiment, a method includes: providing a structure having at least one lithographic layer on a substrate, where the at least one lithographic layer includes a planarization layer (PL); forming a sacrificial mandrel by patterning at least a portion of the at least one lithographic layer using a photolithographic process, where the sacrificial mandrel includes at least a portion of the PL; and producing at least one microstructure by using the sacrificial mandrel in a sidewall image transfer process.

Abstract: Methods of processing substrates having metal layers are provided herein. In some embodiments, a method of processing a substrate comprising a metal layer having a patterned mask layer disposed above the metal layer, the method may include etching the metal layer through the patterned mask layer; and removing the patterned mask layer using a first plasma formed from a first process gas comprising oxygen (O2) and a carbohydrate. In some embodiments, a two step method with an additional second process gas comprising chlorine (Cl2) or a sulfur (S) containing gas, may provide an efficient way to remove patterned mask residue.

Abstract: A method for controlling critical dimension (CD) of etch features in an etch layer disposed below a functionalized organic mask layer disposed below an intermediate mask layer, disposed below a patterned photoresist mask, which forms a stack is provided. The intermediate mask layer is opened by selectively etching the intermediate mask layer with respect to the patterned photoresist mask. The functionalized organic mask layer is opened. The functionalized organic mask layer opening comprises flowing an open gas comprising COS, forming a plasma, and stopping the flowing of the open gas. The etch layer is etched.

Abstract: Methods of patterning a material are disclosed. A first resist pattern is formed on a field. A protective layer is formed over the first resist pattern and at least a portion of the field. A second resist pattern is formed over a portion of the protective layer. A portion of a material to be patterned deposited adjacent to the first and second resist patterns is removed.

Abstract: A mold is for obtaining, on a substrate, an array of carbon nanotubes with a high control of their positioning. The mold includes a first layer of a first preset material having a surface having in relief at least one first plurality of projections having a free end portion with a substantially pointed profile.

Abstract: An imprint method for imprinting a pattern of a mold onto a resin material on a substrate. The imprint method includes a step of forming a processed area in which an imprint pattern corresponding to the pattern of the mold is formed, and an outside area formed of a periphery of the processed area, by bringing the mold into contact with the resin material formed on the substrate, so that a portion of the resin material is extruded from the processed area into the outside area, a step of forming a protection layer for protecting the processed area, and a step of removing a layer of the resin material in the outside area, while the imprint pattern formed on a layer of the resin material in the processed area, is protected by the protection layer, so as not to be removed.

Abstract: A method of forming a near field transducer (NFT) for energy assisted magnetic recording is disclosed. A structure comprising an NFT metal layer and a first hardmask layer over the NFT metal layer is provided A first patterned hardmask is formed from the first hardmask layer, the first patterned hardmask disposed over a disk section and a pin section of the NFT to be formed. An etch process is performed on the NFT metal layer via the first patterned hardmask, the etch process forming the NFT having the disk section and the pin section.

Abstract: Methods for patterning integrated circuit (IC) device arrays employing an additional mask process for improving center-to-edge CD uniformity are disclosed. In one embodiment, a repeating pattern of features is formed in a masking layer over a first region of a substrate. Then, a blocking mask is applied over the features in the masking layer. The blocking mask is configured to differentiate array regions of the first region from peripheral regions of the first region. Subsequently, the pattern of features in the array regions is transferred into the substrate. In the embodiment, an etchant can be uniformly introduced to the masking layer because there is no distinction of center/edge in the masking layer. Thus, CD uniformity can be achieved in arrays which are later defined.

Abstract: Disclosed is a means for stabilizing quality of a semiconductor device by preventing projections from being formed in the bottom of a through hole. A method of manufacturing a semiconductor device includes a process of forming a through hole reaching a metal nitride layer through an interlayer insulating layer on a semiconductor wafer on which the wiring layer, the metal nitride layer formed on the wiring layer, and the interlayer insulating layer covering the wiring layer and the metal nitride layer are formed. The through hole forming process includes: a first etching step of etching the interlayer insulating layer by an anisotropic etching method with the semiconductor wafer set to a first temperature; and a second etching step of etching an upper surface of metal nitride layer by an anisotropic etching method with the semiconductor wafer set to a second temperature higher than the first temperature.

Abstract: A method of fabricating a magnetic device is described. A mask removing layer is formed on a layered sensing stack and a hard mask layer is formed on the mask removing layer. A first reactive ion etch is performed with a non-oxygen-based chemistry to define the hard mask layer using an imaged layer formed on the hard mask layer as a mask. A second reactive ion etch is performed with an oxygen-based chemistry to define the mask removing stop layer using the defined hard mask layer as a mask. A third reactive ion etch is performed to define the layered sensing stack using the hard mask layer as a mask. The third reactive ion etch includes an etching chemistry that performs at a lower etching rate on the hard mask layer than on the layered sensing stack.

Abstract: A first etching stop layer and an active layer are formed on an inner surface of a first glass substrate, and a second etching stop layer and a cover layer are formed on an inner surface of a second glass substrate. A display media is formed between the first glass substrate and the second glass substrate. A first passivation layer is formed on an outer surface of the second glass substrate. A first etching process is performed to expose the first etching stop layer. A first flexible substrate is formed on the exposed first etching stop layer, and a second passivation layer is formed on the first flexible substrate. The first passivation layer is removed. A second etching process is performed to expose the second etching stop layer. A second flexible substrate is formed on the exposed second etching stop layer, and the second passivation layer is removed.

Abstract: A method for controlling an ADI-AEI CD difference ratio of openings having different sizes is described. The openings are formed through a silicon-containing material layer, an etching resistive layer and a target material layer in turn. Before the opening etching steps, at least one of the opening patterns in the photoresist mask is altered in size through photoresist trimming or deposition of a substantially conformal polymer layer. A first etching step forming thicker polymer on the sidewall of the wider opening pattern is performed to form a patterned Si-containing material layer. A second etching step is performed to remove exposed portions of the etching resistive layer and the target material layer. At least one parameter among the parameters of the photoresist trimming or polymer layer deposition step and the etching parameters of the first etching step is controlled to obtain a predetermined ADI-AEI CD difference ratio.

Abstract: Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a protective coating that is partly consumed during etching of the alpha tantalum portion of said bottom electrode. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”.

Abstract: A method for forming a plurality of variable linewidth spacers adjoining a plurality of uniformly spaced topographic features uses a conformal resist layer upon a spacer material layer located over the plurality of uniformly spaced topographic features. The conformal resist layer is differentially exposed and developed to provide a differential thickness resist layer that is used as a sacrificial mask when forming the variable linewidth spacers. A method for forming uniform linewidth spacers adjoining narrowly spaced topographic features and widely spaced topographic features over the same substrate uses a masked isotropic etching of a variable thickness spacer material layer to provide a more uniform partially etched spacer material layer, followed by an unmasked anisotropic etching of the partially etched spacer material layer. A related method for forming the uniform linewidth spacers uses a two-step anisotropic etch method that includes at least one masking process step.

Abstract: A method for manufacturing a magnetoresistive read sensor that allows the sensor to be constructed with clean well defined side junctions, even at very narrow track widths. The method involves using first and second etch mask layers, that are constructed of materials such that the second mask (formed over the first mask) can act as a mask during the patterning of the first mask (bottom mask). The first mask has a well defined thickness that is defined by deposition and which is not affected by the etching processes used to define the mask. This allows the total ion milling etch mask thickness to be well controlled before the ion milling process used to define the sensor side walls.

Abstract: The invention provides a method for forming a via. A first dielectric layer is formed on a substrate. A conductive structure is formed in the first dielectric layer. A second dielectric layer is formed on the first dielectric layer and conductive structure. A first etching step is performed by using a first etching mixture to form a first via in the second dielectric layer. A second etching step is performed by using a second etching mixture to form a second via under the first via. The second via exposes at least a top surface of the conductive structure. An etching rate of the second etching step is slower than the first etching step.

Abstract: A substrate processing method capable of preventing a reduction in productivity of the fabrication of a semiconductor device from a substrate. An HF gas is supplied toward a wafer having a thermally-oxidized film, a BPSG film, and a deposit film, to thereby selectively etch the BPSG film and the deposit film using fluorinated acid. A residual matter of H2SiF6 produced at the time of etching is decomposed into HF and SiF4 by being heated.

Abstract: A method for etching a layer that is to be removed on a substrate, in which a Si1-xGex layer is the layer to be removed, this layer being removed, at least in areas, in gas phase etching with the aid of an etching gas, in particular ClF3. The etching behavior of the Si1-xGex layer can be controlled via the Ge portion in the Si1-xGex layer. The etching method is particularly well-suited for manufacturing self-supporting structures in a micromechanical sensor and for manufacturing such self-supporting structures in a closed hollow space, because the Si1-xGex layer, as a sacrificial layer or filling layer, is etched highly selectively relative to silicon.

Abstract: A method for flattening a sample surface by irradiating the sample surface with a gas cluster ion beam, generates clusters of source gas in a cluster generating chamber, ionizes the generated clusters in an ionization chamber, accelerates the ionized cluster beam in an electric field of an accelerating electrode, selects a cluster size using a magnetic field of a sorting mechanism, and irradiates the surface of a sample. An irradiation angle between the sample surface and the gas cluster ion beam is less than 30° and an average cluster size of the gas cluster ion beam is 50 or above.

Abstract: A method of forming a stent includes the steps of forming a composite member into a stent pattern, forming openings through an outer member of the composite member, processing the composite member to remove a portion of the composite member without adversely affecting the outer member, and swaging the outer member to create a plurality of lumens. The composite member may be formed of an outer member with an hourglass-shaped inner member, wherein the processing step removes the inner member and the swaging step forms two lumens from the hourglass shaped cavity. The composite member may be formed of an outer member, an inner member, and an intermediate member, wherein the processing step removes the intermediate member and the swaging step presses portions of the outer member into contact with the inner member to form two lumens separated by the inner member.

Abstract: In a plasma etching method, a substrate including an underlying film, an insulating film and a resist mask is plasma etched to thereby form a number of holes in the insulating film including a dense region and a sparse region by using a parallel plate plasma etching apparatus for applying a plasma-generating high frequency electric power to a space between an upper and a lower electrode and a biasing high frequency electric power to the lower electrode. The plasma etching method includes mounting the substrate on a mounting table; supplying a first process gas containing carbon and fluorine to form the holes in the insulating film to a depth close to the underlying film; and supplying a second process gas including an inert gas and another gas contain carbon and fluorine to have the holes reach the underlying film while applying a negative DC voltage to the upper electrode.

Abstract: This dry cleaning method for a plasma processing apparatus is a dry cleaning method for a plasma processing apparatus that includes: a vacuum container provided with a dielectric member; a planar electrode and a high-frequency antenna that are provided outside the dielectric member; and a high-frequency power source that supplies high-frequency power to both the high-frequency antenna and the planar electrode, to thereby introduce high-frequency power into the vacuum container via the dielectric member and produce an inductively-coupled plasma, the method comprising the steps of: introducing a gas including fluorine into the vacuum container and also introducing high-frequency power into the vacuum container from the high-frequency power source, to thereby produce an inductively-coupled plasma in the gas including fluorine; and by use of the inductively-coupled plasma, removing a product including at least one of a precious metal and a ferroelectric that is adhered to the dielectric member.

Abstract: A method for controlling ADI-AEI CD difference ratios of openings having different sizes is provided. First, a first etching step using a patterned photoresist layer as a mask is performed to form a patterned Si-containing material layer and a polymer layer on sidewalls thereof. Next, a second etching step is performed with the patterned photoresist layer, the patterned Si-containing material layer and the polymer layer as masks to at least remove an exposed portion of a etching resistive layer to form a patterned etching resistive layer. A portion of a target material layer is removed by using the patterned etching resistive layer as an etching mask to form a first and a second openings in the target material layer. The method is characterized by controlling etching parameters of the first and second etching steps to obtain predetermined ADI-AEI CD difference ratios.

Abstract: A semiconductor device and related method for fabricating the same include providing a stacked structure including an insulating base layer and lower and upper barrier layers with a conductive layer in between, etching the stacked structure to provide a plurality of conductive columns that each extend from the lower barrier layer, each of the conductive columns having an overlying upper barrier layer cap formed from the etched upper barrier layer, wherein the lower barrier layer is partially etched to provide a land region between each of the conductive lines, forming a liner layer over the etched stacked structure exposing the land region, and etching the liner layer and removing the exposed land region to form a plurality of conductive lines.

Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.

Abstract: Techniques for making nanowires with a desired diameter are provided. The nanowires can be grown from catalytic nanoparticles, wherein the nanowires can have substantially same diameter as the catalytic nanoparticles. Since the size or the diameter of the catalytic nanoparticles can be controlled in production of the nanoparticles, the diameter of the nanowires can be subsequently controlled as well. The catalytic nanoparticles are melted and provided with a gaseous precursor of the nanowires. When supersaturation of the catalytic nanoparticles with the gaseous precursor is reached, the gaseous precursor starts to solidify and form nanowires. The nanowires are separate from each other and not bind with each other to form a plurality of nanowires having the substantially uniform diameter.

Abstract: The optical device includes a plurality of waveguides and an optical grating. A first portion of the waveguides act as input waveguide configured to carry a light beam that includes multiple light signals to the optical grating. The optical grating is configured to demultiplex the light signals. A second portion of the waveguides act as output waveguides configured to carry the demultiplexed light signals away from the optical grating. A method of forming the optical device includes sequentially forming the waveguides and the optical grating while a single mask defines the location of the waveguides and the optical grating.

Abstract: Imprint lithography substrates may include alignment marks formed of high contrast material. Exemplary methods for forming alignment marks having high contrast material are described.

Abstract: A method of generating a mask for printing a pattern including a plurality of features. The method includes the steps of depositing a layer of transmissive material having a predefined percentage transmission on a substrate; depositing a layer of opaque material on the transmissive material; etching a portion of the substrate, the substrate being etched to a depth based on an etching selectivity between the transmissive layer and the substrate; exposing a portion of the transmissive layer by etching the opaque material; etching the exposed portion of the transmissive layer so as to expose an upper surface of the substrate; where the exposed portions of the substrate and the etched portions of the substrate exhibit a predefined phase shift relative to one another with respect to an illumination signal.

Abstract: A substrate processing method which is capable of easily removing residue caused by hydrofluoric acid. By the substrate processing method, a substrate is processed which has a thermal oxide film formed by a thermal oxidation process and a BPSG film containing impurities. In an HF gas feeding step, an HF gas is fed toward the substrate, and in a cleaning gas feeding step, a cleaning gas containing at least NH3 gas is fed toward the substrate fed with the HF gas.

Abstract: A method for fabricating a device includes forming a first insulation layer to cover a removable mask and a device structure that has been defined by the mask. The device structure is below the mask. The mask is lifted off to expose a top portion of the device structure. A conductive island structure is formed over the first insulation layer and the exposed top portion of the device structure. The first insulation layer and the conductive island structure are covered with a second insulation layer. A contact is formed through the second insulation layer to the conductive island structure.

Abstract: A torsional MEMS device is disclosed. The torsional MEMS device includes a support structure, a platform, and at least two hinges, which connects the platform to the support structure. The platform has an active area and a non-active area. A plurality of sacrificial elements is disposed in the non-active area. If the resonant frequency of the torsional MEMS device is less than a predetermined standard resonant frequency of the torsional MEMS device, at least one sacrificial element is removed to reduce the total mass of the torsional MEMS device, and so as to increase the resonant frequency of the torsional MEMS device.

Abstract: In a method of forming micro patterns of a semiconductor device, first etch mask patterns are formed over a semiconductor substrate. An auxiliary film is formed over the semiconductor substrate including a surface of the first etch mask patterns. Second etch mask patterns are formed between the auxiliary films formed on sidewalls of the first etch mask patterns. The first etch mask patterns and the second etch mask patterns are formed using the same material. The auxiliary films between the first and second etch mask patterns are removed. Accordingly, more micro patterns can be formed than allowed by the resolution limit of an exposure apparatus while preventing misalignment.

Abstract: In a method for forming micro lenses, a lens material layer made of an inorganic material is formed on a substrate, and an intermediate layer made of an organic material is formed on the lens material layer. Then, a mask layer made of an organic material is formed on the intermediate layer, and lens shapes are formed in the mask layer. The lens shapes of the mask layer are transcribed to the intermediate layer by etching the mask layer and the intermediate layer. Thereafter, the lens shapes of the intermediate layer are transcribed to the lens material layer to form micro lenses by etching the intermediate layer and the lens material layer using a processing gas containing SF6 gas and CHF3 gas.

Abstract: The invention includes methods of etching features into substrates. A plurality of hard mask layers is formed over material of a substrate to be etched. A feature pattern is formed in such layers. A feature is etched only partially into the substrate material using the hard mask layers with the feature pattern therein as a mask. After the partial etching, at least one of the hard mask layers is etched selectively relative to the substrate material and remaining of the hard mask layers. After etching at least one of the hard mask layers, the feature is further etched into the substrate material using at least an innermost of the hard mask layers as a mask. After the further etching, the innermost hard mask layer and any hard mask layers remaining thereover are removed from the substrate, and at least a portion of the feature is incorporated into an integrated circuit.

Abstract: A plasma etching method includes the step of etching a lower organic material film by using an upper organic material film and an intermediate layer as a mask in a processing chamber of a plasma etching apparatus, while using an etching gas made up of a gaseous mixture including an O2 gas and a carbon-containing compound gas which has a carbon atom in a molecule, to thereby transfer a pattern of the intermediate layer to the lower organic material film. A ratio of a flow rate of the carbon-containing compound gas to a total flow rate of the etching gas ranges from about 40 to 99%.

Abstract: Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a layer of ruthenium near the silicon nitride surface. The ruthenium is a good electrical conductor and it responds differently from Ta and TaN to certain etchants. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”. Thus, said included layer of ruthenium may be used as an etch stop layer during the etching of Ta and/or TaN while the latter materials may be used to form a hard mask for etching the ruthenium without significant corrosion of the silicon nitride surface.

Abstract: A method for manufacturing a magnetic layer with a magnetic anisotropy. The method includes an endpoint detection process for determining an end point to carefully control the final thickness of the magnetic layer. The method includes depositing a magnetic layer and then depositing a sacrificial layer over the magnetic layer. A low power angled ion milling is then performed until the magnetic layer has been reached. The angled ion milling can be performed at an angle relative to normal and without rotation in order to form an anisotropic surface texture that induces a magnetic anisotropy in the magnetic layer. An indicator layer may be included between the magnetic layer and the sacrificial layer in order to further improve endpoint detection.

Abstract: A suspension microstructure and its fabrication method, in which the method comprises the steps of: forming at least one insulation layer with inner micro-electro-mechanical structures on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one microstructure and a plurality of metal circuits that are independent from each other, the micro-electro-mechanical structures have an exposed portion on the surface of the insulation layer, and the exposed portion is provided with through holes or stacked metal-via layers correspondingly to the predetermined etching spaces of the micro-electro-mechanical structures, the above predetermined etching spaces and the stacked metal-via layers only penetrate the insulation layer; forming a photoresist with an opening on the upper surface of the exposed portion, and the opening of the photoresist is located outside all the through holes or the stacked metal-via layers; subsequently, conducting etching to realize the suspension of t

Abstract: In some implementations, a method is provided in a plasma reactor for etching a trench in an organic planarization layer of a resist structure comprising a photoresist mask structure over a hardmask masking the organic planarization layer. This may include introducing into the plasma reactor an etchant gas chemistry including N2, H2, and O2 and etching a masked organic planarization layer using a plasma formed from the etchant gas chemistry. This may include etching through the planarization layer to form a trench with a single etch step.