With Particular Semiconductor Material Patents (Class 257/103)
  • Patent number: 10784010
    Abstract: A power battery using the energy from a radioactive material. The arrangement uses ZnO as a semiconductor, with energy generated a metal-semiconductor junction. The ZnO is arranged in thin layers. This allows for good durability and relatively high power production.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: September 22, 2020
    Assignee: KINETIC ENERGY AUSTRALIA PTY. LTD.
    Inventor: Steven Whitehead
  • Patent number: 10784404
    Abstract: A light-emitting device, includes a substrate structure, including a base portion having a surface and a plurality of protrusions formed on the base portion; a buffer layer covering the plurality of protrusions and the surface; and III-V compound semiconductor layers formed on the buffer layer; wherein one of the plurality of protrusions has a height not greater than 1.5 ?m; wherein the light-emitting device has a full width at half maximum (FWHM) of smaller than 250 arcsec in accordance with a (102) XRD rocking curve.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: September 22, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Peng Ren Chen, Yu-Shan Chiu, Wen-Hsiang Lin, Shih-Wei Wang, Chen Ou
  • Patent number: 10777972
    Abstract: A thermal radiation light source includes a laminated body including m quantum layers laminated where m is an integer of 2 or more, including an n-layer and a p-layer sandwiching the quantum layers from both sides in the laminating direction, the n-layer made of an n-type semiconductor and the p-layer made of a p-type semiconductor; a voltage applying unit for the m quantum layers is directly or indirectly connected to the n-layer and p-layer sandwiching each layer applying a voltage for moving to the n-layers or p-layers a charge; a voltage switching unit switches ON/OFF of application of the voltage to the m quantum layers; and a photonic crystal portion disposed in the laminated body or adjacent to the laminated body, so that lights of m wavelengths resonate, the lights of the m wavelengths generated in the m quantum layers corresponding to transition energy between subbands in the quantum layer.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: September 15, 2020
    Assignee: KYOTO UNIVERSITY
    Inventors: Susumu Noda, Takuya Inoue, Anqi Ji, Takashi Asano
  • Patent number: 10777604
    Abstract: A light emitting device including first, second, and third LED sub-units, and electrode pads disposed on the first LED sub-unit, electrically connected to the LED sub-units, and including a common electrode pad electrically connected to each of the LED sub-units, and first, second, and third electrode pads connected to a respective one of the LED sub-units, in which the common electrode pad, the second electrode pad, and the third electrode pad are electrically connected to the second LED sub-unit and the third LED sub-unit through holes that pass through the first LED sub-unit, the first, second, and third LED sub-units are configured to be independently driven, light generated in the first LED sub-unit emitted to the outside through the second and third LED sub-units, and light generated in the second LED sub-unit is emitted to the outside through the third LED sub-unit.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: September 15, 2020
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jong Hyeon Chae, Seong Gyu Jang, Ho Joon Lee, Chang Yeon Kim, Chung Hoon Lee
  • Patent number: 10777703
    Abstract: A method of manufacturing a patterned substrate includes: providing an exposure mask that includes: a plurality of inner light-shielding portions arranged in a lattice, a light-transmissive portion integrally connecting regions surrounding the plurality of inner light-shielding portions, and an outer light-shielding portion surrounding the light-transmissive portion; performing a plurality of exposures of a photoresist layer disposed on a substrate in a step-and-repeat-manner using the exposure mask, so as to form a plurality of inner projected parts corresponding to the inner light-shielding portions, the inner projected parts being aligned in a lattice as a whole; developing the photoresist layer on which the plurality of exposures have been performed; and etching the substrate using the developed photoresist layer as a mask.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: September 15, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Yuki Kanagawa, Kei Murakami
  • Patent number: 10763299
    Abstract: A method includes forming a wide band gap (WBG) epitaxial layer on an engineered substrate. The WBG epitaxial layer includes a plurality of groups of epitaxial layers. The engineered substrate includes engineered layers formed on a bulk material having a coefficient of thermal expansion (CTE) matching a CTE of the WBG epitaxial layer. The method also includes forming a plurality of WBG devices based on the plurality of groups of epitaxial layers by: for each respective WBG device, forming internal interconnects and electrodes within a respective group of epitaxial layers. The method further includes forming external interconnects between the electrodes of different WBG devices of the plurality of WBG devices to form an integrated circuit.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: September 1, 2020
    Assignee: QROMIS, INC.
    Inventors: Vladimir Odnoblyudov, Cem Basceri
  • Patent number: 10749129
    Abstract: According to an embodiment of the present disclosure, an organic light emitting diode includes: a first electrode; a second electrode overlapping the first electrode; an emission layer positioned between the first electrode and the second electrode; an electron injection layer positioned between the emission layer and the second electrode; and an electron injection delay layer positioned between the emission layer and the electron injection layer, wherein the electron injection layer includes a first material made of a metal and a second material made of a metal halide, and the electron injection delay layer has a thickness of about 20 ? to about 140 ?.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: August 18, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong Chan Kim, Won Jong Kim, Dong Kyu Seo, Ji Hye Lee, Sang Hoon Yim, Won Suk Han
  • Patent number: 10724962
    Abstract: The present invention is related to the in-line determination of thickness, optical properties and quality of thin films and multilayer structures of organic (conductors, semiconductors and insulators), hybrid (organic/inorganic) and inorganic (e.g. metals, oxides) materials in real-time by the use of Spectroscopic Ellipsometry—SE, during their printing and/or treating by roll-to-roll and sheet-to-sheet processes. SE unit is located on a stage with the possibility of movement in the lateral direction in relation to the movement of e.g. the roll, taking measurements in the spectral range of Vis-fUV from 1.5-6.5 eV.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: July 28, 2020
    Assignees: Aristotle University of Thessaloniki— Research Committee, Stergios Logothetidis
    Inventor: Stergios Logothetidis
  • Patent number: 10717095
    Abstract: An end effector for a robot having a threaded shaft; a motor coupled to the shaft and configured to rotate the shaft about its axis; a nut threaded onto the shaft; a feature for preventing the nut from rotating about the axis of the shaft; and an elongate member fixed at one end to the nut and extending from the nut in a direction parallel to the axis of the shaft. The end effector may further include a container for containing a fluid having an elongate body portion having an opening at one end; and a reciprocable plunger extending into an opposite end of the body portion. A second end of the elongate member may be coupled to the plunger.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: July 21, 2020
    Assignees: BAE Systems plc, The University of Sheffield
    Inventors: Martin Knott, Ryan Wesley Diver
  • Patent number: 10714657
    Abstract: A light-emitting device includes a substrate having a top surface, wherein the top surface includes a first portion and a second portion; a first semiconductor stack including a first upper surface and a first side wall, wherein the first semiconductor stack is on the first portion; a second semiconductor stack including a second upper surface and a second side wall, wherein the second semiconductor stack is on the first upper surface, and wherein the second side wall is devoid of connecting the first side wall; a plurality of first concavo-convex structures on the first portion; and a plurality of second concavo-convex structures on the second portion; wherein the first side wall and the second portion of the top surface form an acute angle ? between thereof; and wherein the second concavo-convex structures have smaller size than that of the first concavo-convex structures.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: July 14, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Yen-Tai Chao, Sen-Jung Hsu, Tao-Chi Chang, Wei-Chih Wen, Ou Chen, Yu-Shou Wang, Chun-Hsiang Tu, Jing-Feng Huang
  • Patent number: 10714656
    Abstract: The present disclosure provides a method for making a light-emitting device. The method includes steps of providing a first substrate; forming a first semiconductor layer on the first substrate; providing a second substrate; forming an intermediate layer on the second substrate, wherein a refractive index of the intermediate layer is between a refractive index of the second substrate and a refractive index of the first semiconductor layer; and bonding the first semiconductor layer and the intermediate layer.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: July 14, 2020
    Assignee: EPISTAR CORPORATION
    Inventor: Chia-Liang Hsu
  • Patent number: 10707375
    Abstract: An embodiment provides a light emitting element comprising: a first conductive semiconductor layer including a first layer and a second layer; an active layer on the first conductive semiconductor layer; a second conductive semiconductor layer on the active layer; and a first electrode and a second electrode arranged on the first conductive semiconductor layer and the second conductive semiconductor layer, respectively, wherein the first layer includes a plurality of first grooves, and a growth prevention layer is arranged on the bottom surface and side surfaces of each of the first grooves.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: July 7, 2020
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Youn Joon Sung
  • Patent number: 10707357
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, and a second semiconductor layer. The second electrode is separated from the first electrode in a first direction. The first semiconductor layer includes n-type SiC, is provided between the first electrode and the second electrode, and is electrically connected to the first electrode. The second semiconductor layer contacts the first semiconductor layer and the second electrode, is provided between the first semiconductor layer and the second electrode, and includes n-type AlxGa1-xN (0.5?x?1). A thickness of the second semiconductor layer is not less than 10 nm and not more than 1 ?m.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: July 7, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeya Kimura, Hisashi Yoshida
  • Patent number: 10697056
    Abstract: Disclosed is a method for producing rotary sputtering target assemblies that are bonded to a suitable backing support. The bonding between the sputtering target body and the backing support is achieved by controlled heating under a suitable temperature, preferably with the help of conductive layer between the induction heater and internal target body that is inductively heated in a manner that enhances axial and radial gradient heating. A non-adhesive protective wrap can also be placed at the target body such as between the conductive wrap and target body.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: June 30, 2020
    Assignee: Vital Thin Film Materials (Guangdong) Co., Ltd.
    Inventors: Jong-Won Shin, Nikolaus Margadant
  • Patent number: 10700236
    Abstract: Quantum dot layers and display devices including quantum dot layers are described. In an embodiment the quantum dot layer includes quantum dots with coatings to adjust the spacing between adjacent quantum dots. In an embodiment, the coatings are metal oxide coatings and may create a charge transporting matrix. In an embodiment, the coatings are core-material coatings. The QD layers may be QD-LED compatible.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: June 30, 2020
    Assignee: Apple Inc.
    Inventors: Jonathan S. Steckel, Hitoshi Yamamoto, Paul S. Drzaic
  • Patent number: 10686100
    Abstract: A light-emitting diode (LED) device (e.g., AlGaInP LED) includes a transparent substrate, an epitaxial structure defining an isolation trench and an epitaxial structure, an insulating passivation layer, a P electrode and an N electrode. The epitaxial structure is disposed above the transparent substrate. The isolation trench divides the epitaxial structure into a first portion and a second portion. The at least one through hole extends through the first portion. At least a portion of the insulating passivation layer is disposed in the isolation trench. The P electrode is disposed above the first portion of the epitaxial structure and in the at least one through hole. The N electrode is disposed above the second portion of the epitaxial structure. A top surface of the P electrode is horizontally aligned with a top surface of the N electrode.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: June 16, 2020
    Assignee: Yangzhou Changelight Co., Ltd.
    Inventors: Zhou Xu, Bo Li, Kaixuan Chen, Yuren Peng, Guoqing Zhang
  • Patent number: 10686098
    Abstract: A nitride semiconductor light emitting element includes: an n-side layer; a p-side layer; an active layer disposed between the n-side layer and the p-side layer, the active layer comprising: a well layer containing Al, Ga, and N, and a barrier layer containing Al, Ga, and N, wherein an Al content of the barrier layer is higher than an Al content of the well layer; and an electron blocking structure layer between the active layer and the p-side layer, the electron blocking structure comprising: a first electron blocking layer disposed between the p-side layer and the active layer, a second electron blocking layer disposed between the p-side layer and the first electron blocking layer, and an intermediate layer disposed between the first electron blocking layer and the second electron blocking layer.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: June 16, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Koji Asada, Tokutaro Okabe
  • Patent number: 10678293
    Abstract: The present disclosure is directed to various mechanical logic gates. In one example a mechanical logic NOT gate system is formed which has a first pair of bi-stable buckling structures each being operatively connected at a first connection point thereof to one another, and also to a first rigid structure at second connection points, the first rigid structure being held stationary. A second pair of bi-stable buckling flexures is each operatively connected at first connection points thereof to each other and at second connection points thereof to a second rigid structure being held stationary. An output element is coupled a first one of each of the first and second pairs of bi-stable buckling structures. An input element is coupled to a second one of each of the first and second pairs of bi-stable buckling structures. The output element moves from a logic 1 position to a logic 0 position in response to movement of the input element from a logic 0 position to a logic 1 positions, respectively.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: June 9, 2020
    Assignees: Lawrence Livermore National Security, LLC, The Regents of the University of California
    Inventors: Andrew Pascall, Julie Mancini, Robert Matthew Panas, Yuanping Song, Jonathan Hopkins
  • Patent number: 10673007
    Abstract: The present disclosure provides an organic light emitting diode (OLED) device and a method for manufacturing the same, an OLED display substrate and an OLED display device. The OLED device of the present disclosure comprises a substrate, and a first electrode, a light emitting layer and a second electrode arranged on the substrate, wherein the light emitting layer comprises fibers of p-phenylene based polymer as a host material, and the fibers of p-phenylene based polymer are arranged in a first orientation; and wherein the light emitted by the fibers of p-phenylene based polymer arranged in the first orientation is linearly polarized light in a first direction. The OLED device of the present disclosure can simultaneously ensure a good contrast, brightness and light transmittance.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: June 2, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Xiaojin Zhang, Lei Chen, Dini Xie, Dan Wang
  • Patent number: 10672949
    Abstract: A device comprising a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is disclosed. The device comprises a porous region. The device comprises a first layer disposed between the light emitting layer and the porous region. The device comprises a mask layer disposed between the porous region and the first layer. The device comprises a plurality of openings formed in the mask layer.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: June 2, 2020
    Assignee: Lumileds LLC
    Inventors: Jonathan J. Wierer, John E. Epler
  • Patent number: 10672991
    Abstract: An organic light emitting device including a first electrode; a self-assembled monolayer on the first electrode; a hole control layer on the self-assembled monolayer; a light emitting layer on the hole control layer; an electron control layer on the light emitting layer; and a second electrode on the electron control layer, wherein the self-assembled monolayer includes a plurality of organic molecules, each of the plurality of organic molecules having a head bonded to the first electrode, a terminal end adjacent to the hole control layer, and a tail connecting the head with the terminal end.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 2, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyunshik Lee, Heeseong Jeong
  • Patent number: 10649244
    Abstract: The optical device includes a waveguide positioned on a base and a modulator positioned on the base. The modulator includes a ridge that includes Si1-xGex where x is greater than or equal to 0.4 and less than or equal to 0.8. The modulator is configured to guide a light signal through the modulator such that the light signal contacts the Si1-xGex. A local heater is configured to heat the modulator.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: May 12, 2020
    Assignee: MELLANOX TECHNOLOGIES SILICON PHOTONICS INC.
    Inventors: Elad Mentovich, Dimitrios Kalavrouziotis, Mehdi Asghari, Joan Fong, Wei Liu, Wei Qian, Dazeng Feng
  • Patent number: 10648102
    Abstract: Gallium-containing nitride crystals are disclosed, comprising: a top surface having a crystallographic orientation within about 5 degrees of a plane selected from a (0001) +c-plane and a (000-1) ?c-plane; a substantially wurtzite structure; n-type electronic properties; an impurity concentration of hydrogen greater than about 5×1017 cm?3; an impurity concentration of oxygen between about 2×1017 cm?3 and about 1×1020 cm?3; an [H]/[O] ratio of at least 0.3; an impurity concentration of at least one of Li, Na, K, Rb, Cs, Ca, F, and CI greater than about 1×1016 cm?3; a compensation ratio between about 1.0 and about 4.0; an absorbance per unit thickness of at least 0.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: May 12, 2020
    Assignee: SLT TECHNOLOGIES, INC.
    Inventors: Wenkan Jiang, Dirk Ehrentraut, Mark P. D'Evelyn
  • Patent number: 10644203
    Abstract: A light emitting element includes a semiconductor structure including a first layer including a first and a second regions, and a second layer above the second region, the first region including extending portions each extending into the second region from an outer peripheral region; a first insulating layer including first through-holes respectively located on the extending portions, and a second through-hole located above the second region; a second insulating layer including a third and a fourth through-holes; a first external electrode connected with the first layer via the first through-holes; and a second external electrode connected with the second layer via the second through-hole. The extending portions are each located in an area, on a top surface of the first layer, other than an area overlapping any of corner portions of the first external electrode and other than an area overlapping any of corner portions of the second external electrode.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: May 5, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Akihiro Nakamura, Keiji Emura
  • Patent number: 10640055
    Abstract: An illuminatable vehicle assembly includes, among other things, a substrate, and a multi-layered film atop the substrate. The multi-layered film has a dielectric layer that emits light. The dielectric layer is disposed between an anode layer and a cathode layer. The assembly further includes an overmold layer atop at least a portion of the multi-layered film.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: May 5, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Paul Kenneth Dellock, David Brian Glickman, Stuart C. Salter, Linda VanFleteren, Harry Lobo
  • Patent number: 10644212
    Abstract: An LED module is disclosed. The LED module includes: a mount substrate including electrodes; an LED chip including a semiconductor stacked structure, a passivation layer covering the outer surface of the semiconductor stacked structure, and electrode pads connected to the outer surface of the semiconductor stacked structure through openings formed in the passivation layer; and solder bumps connecting the electrode pads to the corresponding electrodes and formed using a solder material represented by Sn-M (where M is a metal).
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: May 5, 2020
    Assignee: LUMENS CO., LTD.
    Inventors: Daewon Kim, Yelim Won
  • Patent number: 10636977
    Abstract: A light emitting material is represented by the following formula (1), the organic EL device employing the material as delayed fluorescence emitting dopant or fluorescence emitting dopant can display good performance like as lower driving voltage and power consumption, especially doping with the host (H1 to H4) and the second host (SH1 to SH4) can increasing efficiency and half-life time. wherein G represents the following formula (2): L, m, n, p, R1 to R4, Ar and X are the same definition as described in the present invention.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: April 28, 2020
    Inventors: Feng-Wen Yen, Cheng-Hao Chang
  • Patent number: 10636850
    Abstract: The present disclosure provides an electroluminescent device, a method for manufacturing the same, and a display device. The electroluminescent device of the present disclosure includes: a first substrate and a second substrate disposed opposite to each other; a first electrode disposed on a side of the first substrate proximal to the second substrate; a main spacer disposed between the first substrate and the second substrate and configured to support the first substrate and the second substrate; a first spacer spaced apart from the main spacer disposed on the side of the second substrate proximal to the first substrate; and an auxiliary electrode layer disposed on at least part of an surface of the first spacer proximal to the first substrate, wherein at least part of the auxiliary electrode layer is in contact with the first electrode for electrical connection.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: April 28, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Li, Xing Zhang, Dini Xie
  • Patent number: 10636781
    Abstract: Connection patterns of plural diodes include a first series connection pattern and a second series connection pattern. The first series connection pattern extends from an input terminal in the X direction. The second series connection pattern has a portion through which a current flows to approach the input terminal. The first series connection pattern includes a first diode, which is the first diode counted from the input terminal. The second series connection pattern includes a second diode, which is the last diode counted from the input terminal. The second diode is disposed separately from the first diode with some distance therebetween in the Y direction. An N-type region of the first diode and a P-type region of the second diode directly oppose each other as viewed in a planar direction.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: April 28, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Uno, Hiroshi Kawaguchi
  • Patent number: 10636882
    Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes: providing a monocrystalline substrate having an upper surface covered with a masking layer comprising at least one opening exposing the upper surface; filling the opening by epitaxially growing therein a first layer comprising a first Group III-nitride compound; and growing the first layer further above the opening and on the masking layer by epitaxial lateral overgrowth, wherein the at least one opening has a top surface defined by three or more straight edges forming a polygon parallel to the upper surface and oriented in such a way with respect to the crystal lattice of the monocrystalline substrate so as to permit the epitaxial lateral overgrowth of the first layer in a direction perpendicular to at least one of the edges, thereby forming the semiconductor structure as an elongated structure.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: April 28, 2020
    Assignee: Imec vzw
    Inventors: Hu Liang, Xiuju Zhou, Geert Eneman
  • Patent number: 10629717
    Abstract: A high power device including with a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer, and a third nitride semiconductor layer containing an Al element formed on the second nitride semiconductor layer. The second nitride semiconductor layer is a multiple quantum well layer in which a nitride semiconductor layer containing an In element and a nitride semiconductor layer not containing an In element are alternately stacked.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: April 21, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Infrastructure Systems & Solutions Corporation
    Inventor: Kenichi Sugita
  • Patent number: 10622338
    Abstract: An embodiment relates to a light emitting element package and display device.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: April 14, 2020
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Chang Man Lim, Sang Hoon Lee, Hwan Hee Jeong
  • Patent number: 10622507
    Abstract: A nitride underlayer includes: a pattern substrate with lattice planes of different growth rates; a nitride nucleating layer over the pattern substrate; a first nitride layer with three-dimensional growth over the nitride nucleating layer, and forming a nanopillar structure at a top of the substrate; a second nitride layer with two-dimensional growth over the first nitride layer, and folding into an uncracked plane over the nanopillar structure.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 14, 2020
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Da-qian Ye, Dongyan Zhang, Chaoyu Wu, Duxiang Wang
  • Patent number: 10613273
    Abstract: An optical component assembly is provided including a substrate. The assembly includes an optical transmitter configured to transmit an optical signal, an optical receiver configured to receive the optical signal, and an optical waveguide extending between the optical transmitter and the optical receiver. The assembly further includes a frangible region defining a first portion of the substrate and a second portion of the substrate, wherein the frangible region is configured to allow the first portion to be separated from the second portion. The assembly may be configured to be modified from a testing configuration, in which the first portion is integrally connected to the second portion via the frangible region, to an operational configuration, in which the first portion is separated from the second portion such that communication of optical signals between the optical transmitter and the optical receiver is precluded.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: April 7, 2020
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Elad Mentovich, Yaakov Gridish, Oded Wertheim, Sylvie Rockman, Benny Koren
  • Patent number: 10615094
    Abstract: Described herein are semiconductor devices and structures with improved power handling and heat dissipation. Embodiments are suitable for implementation in gallium nitride. Devices may be provided as individual square or diamond-shaped dies having electrode terminals at the die corners, tapered electrode bases, and interdigitated electrode fingers. Device matrix structures include a plurality of device dies arranged on a substrate in a matrix configuration with interdigitated conductors. Device lattice structures are based on a unit cell comprising a plurality of individual devices, the unit cells disposed on a chip with geometric periodicity. Also described herein are methods for implementing the semiconductor devices and structures.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: April 7, 2020
    Inventors: Zhanming Li, Yue Fu, Wai Tung Ng, Yan-Fei Liu
  • Patent number: 10600901
    Abstract: A compound semiconductor device includes: a carrier transit layer; a carrier supply layer that is formed over the carrier transit layer and is made of InAlN; and a spacer layer that is formed between the carrier transit layer and the carrier supply layer and is made of at least one of AlGaN and InAlGaN.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: March 24, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Junji Kotani, Norikazu Nakamura, Tetsuro Ishiguro
  • Patent number: 10588197
    Abstract: A light emitting module including a working piece and a light emitting film is provided. The light emitting film is disposed on a surface of the working piece and emits lights according to a voltage difference. The light emitting film includes a bottom layer, a pattern layer and a colour layer. The bottom layer is disposed on the surface of the working piece. The pattern layer is disposed on the bottom layer for providing a pattern. The colour layer is disposed on the bottom layer for providing a colour. The pattern layer and the colour layer are overlapped with each other over the bottom layer, so that the light emitting film forms a light emitting pattern with the pattern and the colour on the working piece.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: March 10, 2020
    Assignee: PEGATRON CORPORATION
    Inventors: Yu-Hao Chiu, Tzu-Ming Yang
  • Patent number: 10578278
    Abstract: Optical lens and light emitting device designs achieve uniform light distribution without producing a light “hot spot”, with a benefit of reducing the number of light sources needed and overall cost for direct-lit backlight device. The optical lens includes coating portions or structures on the bottom surface thereof, and a backlight device, or other light emitting device, incorporating said lens, to produce a uniform distribution of light at a target surface. The disclosed lens and light emitting device are particularly useful when an extremely wide transfer function of backlight is needed.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: March 3, 2020
    Assignee: Lumileds Holding B.V.
    Inventor: Chunxia Feng
  • Patent number: 10566318
    Abstract: A light emitting device package includes a first wavelength conversion portion and a second wavelength conversion portion to provide a wavelength of incident light to provide light having a converted wavelength, a light-transmissive partition structure extending along side surfaces of the first and second wavelength conversion portions along a thickness direction to separate the first and second wavelength conversion portions part from each other along a direction crossing the thickness direction, and a cell array including a first light emitting device, a second light emitting device and a third light emitting device, overlapping the first wavelength conversion portion, the second wavelength conversion portion and the light-transmissive partition structure, respectively, along the thickness direction.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: February 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong Gun Lee, Yong Il Kim, Hye Seok Noh, Han Kyu Seong, Sung Hyun Sim, Ha Nul Yoo
  • Patent number: 10566381
    Abstract: A light-emitting diode (LED) chip and a display device having the same are provided. A green LED is regrown on a blue LED to produce blue and green light, and a red phosphor is disposed on the blue or green LED to produce red light. Red light, green light, and blue light are to be produced using a single LED chip. The single LED chip forms three subpixels therein so as to facilitate a transfer process of the LED chip to a display panel. The LED chip is configured based on the blue, green, and blue LEDs so as to facilitate the fabrication and driving of the LED chip.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: February 18, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: YongSeok Kwak, Kiyong Yang, JinSu Moon, MyungWon Seo
  • Patent number: 10566501
    Abstract: A method for producing an optoelectronic semiconductor device and an optoelectronic semiconductor device are disclosed. In an embodiment the method includes providing a semiconductor layer sequence including a light-emitting and/or light-absorbing active zone and a top face downstream of the active zone in a stack direction extending perpendicular to a main plane of extension of the semiconductor layer sequence, applying a layer stack onto the top face, wherein the layer stack includes an oxide layer containing indium, and an intermediate face downstream of the top face in the stack direction and applying a contact layer onto the intermediate face, wherein the contact layer includes indium tin oxide, and wherein the layer stack is, within the bounds of manufacturing tolerances, free of tin.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 18, 2020
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Simeon Katz, Kai Gehrke, Massimo Drago, Joachim Hertkorn
  • Patent number: 10559718
    Abstract: A light-emitting device has a first conductive semiconductor layer; an active layer arranged on the first conductive semiconductor layer, and including a plurality of first recesses; an EBL arranged on the active layer, and including a plurality of second recesses arranged on the first recesses; and a second conductive semiconductor layer arranged on the EBL. The ratio of a first area doping concentration and a second recess doping concentration is from 1:0.8 to 1:1. The active layer emits first light and second light, the first light has a peak in a wavelength of 450 nm to 499 nm, and the second light has a peak in a wavelength of 500 nm to 550 nm.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: February 11, 2020
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Chong Cook Kim
  • Patent number: 10553801
    Abstract: The present disclosure relates to a substrate, a method for fabricating the same and an organic light emitting diode display device. The substrate includes a metal foil. A metal material used for the metal foil is capable of being anodized and a plurality of concave light trapping microstructures is formed on a surface of the metal foil.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: February 4, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jun Wang, Guangyao Li, Dongfang Wang, Jun Liu, Guangcai Yuan, Leilei Cheng
  • Patent number: 10546975
    Abstract: A semiconductor optical device has a multilayer structure 30 including a first compound semiconductor layer 31, an active layer 33, and a second compound semiconductor layer 32. A second electrode 42 is formed on the second compound semiconductor layer 32 through a contact layer 34. The contact layer 34 has a thickness of four or less atomic layers. When an interface between the contact layer 34 and the second compound semiconductor layer 32 is an xy-plane, a lattice constant along an x-axis of crystals constituting an interface layer 32A which is a part of the second compound semiconductor layer in contact with the contact layer 34 is x2, a lattice constant along a z-axis is z2, a length along an x-axis in one unit of crystals constituting the contact layer 34 is xc?, and a length along the z-axis is zc?, (zc?/xc?)>(z2/x2) is satisfied.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: January 28, 2020
    Assignee: Sony Corporation
    Inventors: Takashi Tange, Tatsushi Hamaguchi, Masaru Kuramoto
  • Patent number: 10546928
    Abstract: A semiconductor structure that includes: a substrate, a twin vertical punch-through stopper layer structure connected to the substrate, and a plurality of nanosheets connected to and supported by the twin vertical punch-through stopper structure and isolated from the substrate by an insulating dielectric.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Pouya Hashemi, Karthik Balakrishnan, Alexander Reznicek, Mahmoud Khojasteh
  • Patent number: 10541514
    Abstract: A vertical external-cavity surface-emitting laser (VECSEL) whose blueshift is reduced also in a high intensity range of emitted laser light is realized. A surface-emitting device for VECSEL includes a base substrate made of GaN and c-axis oriented, and an emitter structure formed of a group 13 nitride semiconductor and provided on the base substrate. The emitter structure is formed of unit deposition parts, each of which is provided on the base substrate and includes a DBR layer having a distributed Bragg reflection structure and an active layer that has a multiple quantum well structure and generates excitation emission in response to irradiation with external laser light. A c-axis orientation of each of the unit deposition parts conforms to the c-axis orientation of the base substrate located directly below the unit deposition parts. Grooves are formed between the unit deposition parts.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: January 21, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Yoshitaka Kuraoka, Kentaro Nonaka, Tomohiko Sugiyama, Takashi Yoshino
  • Patent number: 10535801
    Abstract: A method of growing an AlGaN semiconductor material utilizes an excess of Ga above the stoichiometric amount typically used. The excess Ga results in the formation of band structure potential fluctuations that improve the efficiency of radiative recombination and increase light generation of optoelectronic devices, in particular ultraviolet light emitting diodes, made using the method. Several improvements in UV LED design and performance are also provided for use together with the excess Ga growth method. Devices made with the method can be used for water purification, surface sterilization, communications, and data storage and retrieval.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: January 14, 2020
    Assignee: Trustees of Boston University
    Inventors: Yitao Liao, Theodore D. Moustakas
  • Patent number: 10529872
    Abstract: A semiconductor system includes a silicon substrate and a porous silicon region disposed on the silicon substrate. The porous silicon region is configured to passivate the surface of the silicon substrate via a field effect and to reduce reflection loss on the silicon substrate via an appropriate refractive index. The porous silicon region is manufactured by a stain etching process, which retrofits existing tools for junction isolation and Phosphorus Silicon Glass (PSG) etch in solar cell manufacturing. The retrofitted tools for junction isolation and PSG etch achieves multiple purposes in a single step, including etch-back, PSG etch, antireflection coating, and passivation of the front surface of the solar cell.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: January 7, 2020
    Assignee: SPECMAT, Inc.
    Inventors: Horia M. Faur, Maria Faur
  • Patent number: 10526535
    Abstract: The present disclosure provides a liquid quantum dots composite that includes: a fluorescent semiconductor core/shell nanoparticle (preferably, nanocrystal or quantum dots); a first polyamine ligand and a second polythiol ligand attached to the core/shell nanoparticle outer surface. At least one of the polythiol and polyamine ligands are silicone ligands.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: January 7, 2020
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Zai-Ming Qiu, Joseph M. Pieper
  • Patent number: 10522524
    Abstract: Disclosed herein are a display device with a reduced bezel area and a method for fabricating the same. A wiring electrode disposed on a substrate is electrically connected to a connection electrode disposed on an inclined surface of a circuit board in contact with the substrate, and the connection electrode is electrically connected to a circuit wiring disposed on the circuit board. Therefore, an inactive area such as a pad portion for connecting the substrate with the circuit board is not required, such that the bezel area can be reduced.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: December 31, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Seungchul Lee, Changho Lee, Hanseok Kim, Mira Yun