With Particular Semiconductor Material Patents (Class 257/103)
  • Patent number: 10381510
    Abstract: A red light emitting device, a method of fabricating a light emitting device, a light emitting device package, and a lighting system are provided. The red light emitting device may include a first semiconductor layer having a first conductivity, an active layer provided on the first semiconductor layer and including a quantum well and a quantum barrier, a second semiconductor layer having a second conductivity and provided on the active layer, a third semiconductor layer having the second conductivity on the second semiconductor layer, a fourth semiconductor layer having the second conductivity on the third semiconductor layer, and a fifth semiconductor layer having the second conductivity on the fourth semiconductor layer. The third semiconductor layer and the fourth semiconductor layer may include an AlGaInP-based semiconductor layer, and an Al composition of the fourth semiconductor layer may be lower than an Al composition of the third semiconductor layer.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: August 13, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Eun Bin Ko, Yong Jun Kim, Ki Yong Hong, Byung Hak Jeong
  • Patent number: 10381517
    Abstract: The present invention relates to a light emitting diode and a method for manufacturing same, and more specifically relates to growing a GaN layer of high quality on an upper part of an AlGaInP-based light emitting diode to improve the light extraction efficiency of the light emitting diode, wherein the GaN layer has a larger band gap and a smaller refractive index than AlGaInP-based material. The AlGaInP-based light emitting diode of the present invention is characterized by forming the GaN layer on the upper surface, and the GaN layer preferably has a surface of a fine uneven pattern. The GaN layer can be grown in the same system after forming the AlGaInP-based light emitting diode without an additional process.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: August 13, 2019
    Assignee: AUK CORP.
    Inventors: Hyung Joo Lee, Young Jin Kim, In Kyu Jang
  • Patent number: 10355168
    Abstract: A lighting device according to embodiments of the invention includes a substrate with a plurality of holes that extend from a surface of the substrate. A non-III-nitride material is disposed within the plurality of holes. The surface of the substrate is free of the non-III-nitride material. A semiconductor structure is grown on the surface of the substrate. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: July 16, 2019
    Assignee: LUMILEDS LLC
    Inventor: Toni Lopez
  • Patent number: 10355163
    Abstract: The present disclosure provides a flexible light emitting diode (LED) device and a method for manufacturing the same. The method includes providing a p-type silicon wafer as a base, and then performing an exposure and development process to form a patterned layer including a plurality of p-type silicon microcolumns on the base; filling a plurality of gaps among the p-type silicon microcolumns with a soft polymer resin to form a compound layer; sequentially forming an n-type doped metal oxide layer and a first metal electrode layer on the compound layer; and removing the base, forming a second metal electrode layer, and then entirely shifting a whole body including these layers onto a flexible substrate.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: July 16, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Bao Zha, Yi Zeng
  • Patent number: 10347609
    Abstract: Solid state transducer (“SST”) assemblies with remote converter material and improved light extraction efficiency and associated systems and methods are disclosed herein. In one embodiment, an SST assembly has a front side from which emissions exit the SST assembly and a back side opposite the front side. The SST assembly can include a support substrate having a forward-facing surface directed generally toward the front side of the SST assembly and an SST structure carried by the support substrate. The SST structure can be configured to generate SST emissions. The SST assembly can further include a converter material spaced apart from the SST structure. The forward-facing surface and the converter material can be configured such that at least a portion of the SST emissions that exit the SST assembly at the front side do not pass completely through the converter material.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: July 9, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Patent number: 10340252
    Abstract: A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LUT) to high-voltage environments. The HVT structure includes a drain node, a source node, a control gate, and a field electrode. The drain node and the source node define a conductive channel, in which mobilized charges are regulated by the control gate. While being isolated from the control gate, the field electrode is configured to spread the mobilized charges in response to a field voltage. The field electrode is structured and routed to prevent charge sharing with any one of the drain node, source node, or control gate. Advantageously, the isolated field electrode minimizes the capacitance of the control gate as well as the drain and source nodes, such that the HVT can switch with less power loss and a more robust performance in a high-voltage environment.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: July 2, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Sandeep R. Bahl, Michael D. Seeman
  • Patent number: 10340308
    Abstract: A light emitting device that includes: a plurality of light emitting elements arranged at different locations in a common plane, each light emitting element including: at least one layer of a semiconductor material; a first electrical terminal located at a first location; a second electrical terminal located at a second location; and a third electrical terminal located at a third location; a first electrode layer including one or more electrodes; a second electrode layer including one or more electrodes; a third electrode layer including one or more electrodes; a first electrically insulating layer disposed between the plurality of light emitting elements and also disposed between the first and second electrode layers; and a second electrically insulating layer disposed between the plurality of light emitting elements and also disposed between the second and third electrode layers.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: July 2, 2019
    Assignee: X Development LLC
    Inventors: Martin Friedrich Schubert, Michael Jason Grundmann
  • Patent number: 10325903
    Abstract: Connection patterns of plural diodes include a first series connection pattern and a second series connection pattern. The first series connection pattern extends from an input terminal in the X direction. The second series connection pattern has a portion through which a current flows to approach the input terminal. The first series connection pattern includes a first diode, which is the first diode counted from the input terminal. The second series connection pattern includes a second diode, which is the last diode counted from the input terminal. The second diode is disposed separately from the first diode with some distance therebetween in the Y direction. An N-type region of the first diode and a P-type region of the second diode directly oppose each other as viewed in a planar direction.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: June 18, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Uno, Hiroshi Kawaguchi
  • Patent number: 10326065
    Abstract: The present application discloses a light-emitting array, comprising a first light-emitting chip; a second light-emitting chip; and a conductive line electrically connected to the first light-emitting chip and the second light-emitting chip, wherein the conductive line includes a first segment and a second segment having a radius curvature different from that of the first segment.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: June 18, 2019
    Assignee: Epistar Corporation
    Inventors: Min-Hsun Hsieh, Guan-Ru He, Chao-Hsing Chen, Jui-Hung Yeh, Chia-Liang Hsu
  • Patent number: 10325812
    Abstract: A FinFET device includes a fin formed in a semiconductor substrate, a gate structure positioned above a portion of the fin, and source and drain regions positioned on opposite sides of the gate structure, wherein the semiconductor substrate includes a first semiconductor material. A silicon-carbide (SiC) semiconductor material is positioned above the fin in the source region and the drain region, wherein the silicon-carbide (SiC) semiconductor material is different from the first semiconductor material. A graphene contact is positioned on and in direct physical contact with the silicon-carbide (SiC) semiconductor material in each of the source region and the drain region, and first and second contact structures are conductively coupled to the graphene contacts in the source region and the drain region, respectively.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: June 18, 2019
    Assignee: GLOBALFOUNDRIES Inc.
    Inventor: Ajey Poovannummoottil Jacob
  • Patent number: 10326061
    Abstract: A method of fabricating a light emitting device package includes forming a plurality of semiconductor light emitting parts, each having a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on a growth substrate, forming a partition structure having a plurality of light emitting windows on the growth substrate, filling each of the plurality of light emitting windows with a resin having a phosphor, and forming a plurality of wavelength conversion parts by planarizing a surface of the resin.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: June 18, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wan Tae Lim, Sung Hyun Sim, Hanul Yoo, Yong Il Kim, Hye Seok Noh, Ji Hye Yeon
  • Patent number: 10319879
    Abstract: A semiconductor structure includes a first-type semiconductor layer, a second-type semiconductor layer, a light emitting layer and a hole supply layer. The light emitting layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The hole supply layer is disposed between the light emitting layer and the second-type semiconductor layer, and the hole supply layer includes a first hole supply layer and a second hole supply layer. The first hole supply layer is disposed between the light emitting layer and the second hole supply layer, and a chemical formula of the first hole supply layer is Alx1Iny1Ga1-x1-y1N, wherein 0?x1<0.4, and 0?y1<0.4. The second hole supply layer is disposed between the first hole supply layer and the second-type semiconductor layer, a chemical formula of the second hole supply layer is Alx2Iny2Ga1-x2-y2N, wherein 0?x2<0.4, 0?y2<0.4, and x1>x2.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: June 11, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Cheng-Hung Lin, Jeng-Jie Huang, Chi-Feng Huang
  • Patent number: 10319880
    Abstract: A display device is provided. The display device includes a substrate, a first transistor, and a light emitting diode. The first transistor is disposed on the substrate, wherein the first transistor comprises a first semiconductor layer comprising silicon having a first lattice constant. The light emitting diode is disposed on the substrate and electrically connected to the first transistor, wherein the light emitting diode comprises a semiconductor layer comprising gallium nitride having a second lattice constant and a third lattice constant, and the third lattice constant is greater than the second lattice constant. A ratio of the second lattice constant to the first lattice constant is greater than or equal to 0.56 and is less than or equal to 0.68.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: June 11, 2019
    Assignee: Innolux Corporation
    Inventors: Kuan-Feng Lee, Yu-Hsien Wu
  • Patent number: 10319888
    Abstract: A method of manufacturing a light emitting device including providing a light emitting element mounted on a substrate. The light emitting element is provided within a first cavity of the light emitting device. The method further includes covering continuously, with insulating material, at least side surfaces of the light emitting element. Light reflective resin is provided over the insulating material at a position surrounding the light emitting element to reflect light from the light emitting element.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: June 11, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Mototaka Inobe, Motokazu Yamada, Kazuhiro Kamada
  • Patent number: 10315178
    Abstract: The present invention relates to a composition, comprising at least one micelle in non-aqueous solution, wherein the micelle encapsules one or more nanoparticles. Furthermore, the present invention relates to the use of such a composition and to methods for providing such a composition.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: June 11, 2019
    Assignee: FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Theo Schotten, Katja Werner, Carsten Ott, Jan Steffen Niehaus, Marieke Dieckmann, Horst Weller, Johannes Ostermann, Christoph Hahn
  • Patent number: 10305063
    Abstract: An object of the present invention is to provide a transparent organic electroluminescence element in which durability is excellent, a transparent lead-out electrode of low resistance is provided, and there is no uncomfortable feeling in visibility of the entire element. The transparent organic electroluminescence element according to the present invention is a transparent organic electroluminescence element including: at least an organic electroluminescence element portion and a lead-out electrode portion, in which two-sided light emission is capable of being performed, wherein a total light transmittance (%) of the lead-out electrode portion in a visible light range is in a range of 90% to 110%, with respect to a total light transmittance (%) of the organic electroluminescence element portion in a visible light range at the time of non-light emission.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: May 28, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Takaaki Kuroki, Takatoshi Suematsu, Shigeru Kojima, Shusaku Kon
  • Patent number: 10297557
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 21, 2019
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroshi Shikauchi, Satoru Washiya, Youhei Ohno, Tomonori Hotate, Hiromichi Kumakura
  • Patent number: 10295872
    Abstract: A display substrate, display device and manufacturing method the same are provided. The display device includes an ordered porous thin film; a plurality of sub-pixel regions arranged in a matrix, a plurality of pore passages being disposed in each sub-pixel region, each pore passage having an opening on the surface of the ordered porous thin film; a plurality of quantum dots respectively arranged in at least part of the plurality of pore passages; and a first electrode layer and a second electrode layer respectively arranged on two sides of the ordered porous thin film, the second electrode layer including a plurality of sub-electrodes spaced apart from each other and respectively corresponding to the plurality of sub-pixel regions. The display substrate, display device and their manufacturing method have relatively high color gamut and quantum dots light-emitting efficiency.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: May 21, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Liangliang Jiang, Haifeng Wang, Lei Guo
  • Patent number: 10297460
    Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: May 21, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Wenhong Sun, Rakesh Jain, Michael Shur, Remigijus Gaska
  • Patent number: 10290784
    Abstract: An optoelectronic semiconductor component comprises an optoelectronic semiconductor chip (C1) having an electrically conductive substrate (T), an active part (AT) containing epitaxially grown layers, and an intermediate layer (ZS) which is arranged between the substrate (T) and the active part (AT) and contains a solder material. The optoelectronic semiconductor component further comprises an electrical connection point, which at least partially covers an underside of the substrate (T), wherein the electrical connection point comprises a first contact layer (KS1) on a side facing the substrate (T), and the first contact layer (KS1) contains aluminium or consists of aluminium.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: May 14, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Korbinian Perzlmaier, Stefanie Rammelsberger, Anna Kasprzak-Zablocka, Julian Ikonomov, Christian Leirer
  • Patent number: 10290768
    Abstract: Methods of forming an integrated InGaN/GaN or AlInGaP/InGaP LED on Si CMOS for RGB colors and the resulting devices are provided. Embodiments include forming trenches having a v-shaped bottom through an oxide layer and a portion of a substrate; forming AlN or GaAs in the v-shaped bottom; forming a n-GaN or n-InGaP pillar on the AlN or GaAs through and above the first oxide layer; forming an InGaN/GaN MQW or AlInGaP/InGaP MQW over the n-GaN or n-InGaP pillar; forming a p-GaN or p-InGaP layer over the n-GaN pillar and InGaN/GaN MQW or the n-InGaP pillar and AlInGaP/InGaP MQW down to the first oxide layer; forming a TCO layer over the first oxide layer and the p-GaN or p-InGaP layer; forming a second oxide layer over the TCO layer; and forming a metal pad on the TCO layer above each n-GaN or n-InGaP pillar.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: May 14, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Srinivasa Banna, Deepak Nayak
  • Patent number: 10290754
    Abstract: The invention disclosed concerns a simple ring-hub arrangement of interacting two-level systems using a theoretical quantum jump approach which mimics a biological light-harvesting antenna connected to a reaction center.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: May 14, 2019
    Assignee: Yissum Research Development Company of the Hebrew University of Jerusalem Ltd.
    Inventors: Yossef Paltiel, Shira Yochelis, Nir Keren, Ido Eisenberg
  • Patent number: 10287496
    Abstract: A method is provided for producing a pulverulent precursor material of the general formula M1xM2y(Si,Al)12(O,N)16 or M12-zM2zSi8Al4N16 having the method steps A) producing a pulverulent mixture of starting materials, B) calcining the mixture under a protective gas atmosphere and subsequent grinding, wherein in method step A) at least one nitride with a specific surface area of greater than 2 m2/g is selected as starting material. A pulverulent precursor material and the use thereof are additionally provided.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: May 14, 2019
    Assignees: OSRAM GMBH, OSRAM Opto Semiconductors GmbH
    Inventors: Bianca Pohl-Klein, Juliane Kechele, Simon Dallmeir
  • Patent number: 10290497
    Abstract: A method of growing a group III nitride crystal structure comprises: providing a silicon substrate (12); forming a first mask (10) on the substrate, the mask having a plurality of apertures (14) through it each exposing a respective area of the silicon substrate; etching the silicon exposed by each of the apertures to form a respective recess (16) having a plurality of facets (18, 20, 22, 24); depositing a second mask over some of the facets of each recess leaving at least one of the facets (22) of each recess exposed; and growing group III nitride on the exposed facets (22) and then over the substrate to form a continuous layer.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: May 14, 2019
    Assignee: SEREN PHOTONICS LIMITED
    Inventor: Tao Wang
  • Patent number: 10283669
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: May 7, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Patent number: 10283676
    Abstract: A light-emitting diode chip includes a semiconductor layer sequence based on InGaAlAsP and generates visible light or near-infrared radiation, a current spreading layer located directly on the semiconductor layer sequence and based on AlGaAs, an encapsulation layer applied directly to at least one of the current spreading layer and the semiconductor layer sequence and has an average thickness of 10 nm to 200 nm and a defect density of at most 10/mm2, at least one cover layer applied directly to the encapsulation layer at least in places, at least one non-metallic reflection layer located in places on a side of the current spreading layer facing away from the semiconductor layer sequence and covered in places by the encapsulation layer, and at least one of a mirror layer and an adhesion-promoting layer arranged in places on a side of the reflection layer facing away from the current spreading layers.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: May 7, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Johannes Baur
  • Patent number: 10283630
    Abstract: The invention relates to a semiconductor component comprising at least one field effect transistor, said transistor comprising at least a back barrier layer, a buried layer arranged on the back barrier layer, a channel layer arranged on the buried layer, a barrier layer arranged on the channel layer, and a gate layer arranged on the barrier layer, wherein the barrier layer comprises AlzGa1-zN and wherein the buried layer comprises AlxGa1-xN and at least one dopant causing a p-type conductivity, and wherein the gate layer comprises any of GaN and/or AluInvGa1-v-uN. A field effect transistor according to the disclosure may be configured to show a gate threshold voltage which is higher than approximately 0.5 V or higher than approximately 1.0 V.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: May 7, 2019
    Assignee: Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V.
    Inventor: Fouad Benkhelifa
  • Patent number: 10276745
    Abstract: A light emitting diode including: a structure for emitting light at a first wavelength ?1, comprising a p-n junction in which is arranged an active zone including a first emissive layer comprising InX1Ga1-X1N arranged between two first barriers; a conversion structure configured for converting the light emitted by the emission structure into a second wavelength different to the first, arranged on the emission structure and including a second InX2Ga1-X2N emissive layer, arranged between two second barriers each including several InX3Ga1-X3N absorption layers separated from each other by a GaN interlayer; in which the indium concentrations X1, X2 and X3 are such that 0<X1<X2 and Eg(InX2Ga1-X2N)<Eg(InX3Ga1-X3N)?h·c/?1.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: April 30, 2019
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, THALES
    Inventor: Ivan-Christophe Robin
  • Patent number: 10268289
    Abstract: An object of the present invention is to provide a conductive film including a polarizer in which performance deterioration of the polarizer is suppressed while suppressing cracking of the polarizer due to a change in moisture heat environment; and a display device provided with a touch panel including the conductive film. The conductive film of the present invention includes a polarizer; and a conductive layer which is disposed on the polarizer and includes fullerene functionalized carbon nanotubes.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: April 23, 2019
    Assignee: FUJIFILM Corporation
    Inventor: Hiroaki Sata
  • Patent number: 10270055
    Abstract: The present disclosure relates to a technical field of a display, especially a flexible display device including a substrate, an anode layer disposed on the substrate, and a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, an electron injection layer, a cathode layer and a package layer disposed on the anode layer from bottom to top, wherein the anode layer includes a third metal layer disposed the substrate, and a first metal layer and a second metal layer disposed on the third metal layer by stacking up and down, the first metal layer and the third metal layer have work functions greater than that of the second metal layer, and the work functions of the first metal layer and/or the third metal layer are not less than 4.5 eV.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: April 23, 2019
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventor: Biao Pan
  • Patent number: 10266965
    Abstract: A large Group III nitride crystal of high quality with few defects such as a distortion, a dislocation, and warping is produced by vapor phase epitaxy. A method for producing a Group III nitride crystal includes: a first Group III nitride crystal production process of producing a first Group III nitride crystal 1003 by liquid phase epitaxy; and a second Group III nitride crystal production process of producing a second Group III nitride crystal 1004 on the first crystal 1003 by vapor phase epitaxy. In the first Group III nitride crystal production process, the surfaces of seed crystals 1003a (preliminarily provided Group III nitride) are brought into contact with an alkali metal melt, a Group III element and nitrogen are cause to react with each other in a nitrogen-containing atmosphere in the alkali metal melt, and the Group III nitride crystals are bound together by growth of the Group III nitride crystals grown from the seed crystals 1003a to produce a first crystal 1003.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: April 23, 2019
    Assignees: Osaka University, Itochu Plastics Inc.
    Inventors: Yusuke Mori, Masashi Yoshimura, Mamoru Imade, Masashi Isemura, Akira Usui, Masatomo Shibata, Takehiro Yoshida
  • Patent number: 10263147
    Abstract: A light-emitting diode (LED) chip includes from bottom to up: a conductive substrate, a p-type nitride layer, an active layer, an n-type recovery layer, an n-type nitride layer and an n electrode, wherein, the n-type nitride layer has a nitride polarity crystal and a gallium polarity crystal, and the surfaces of the nitride polarity and the gallium polarity regions appear different in height, the n-type recovery layer surface approximate to the n-type nitride layer has consistent mixed polarity with the n-type nitride layer, and the surface far from the n-type nitride layer is a connected gallium polarity surface.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: April 16, 2019
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jie Zhang, Xueliang Zhu, Chengxiao Du, Jianming Liu, Chen-ke Hsu
  • Patent number: 10259997
    Abstract: There are provided a phosphor which is a divalent europium-activated oxynitride phosphor substantially represented by General formula (A): EuaSibAlcOdNe, a divalent europium-activated oxynitride phosphor substantially represented by General formula (B): MIfEugSihAlkOmNn or a divalent europium-activated nitride phosphor substantially represented by General formula (C): (MII1-pEup)MIIISiN3, having a reflectance of light emission in a longer wavelength region of visible light than a peak wavelength of 95% or larger, and a method of producing such phosphor; a nitride phosphor and an oxynitride phosphor which emit light efficiently and stably by the light having a wavelength ranging from 430 to 480 nm from a semiconductor light emitting device by means of a light emitting apparatus using such phosphor, and a producing method of such phosphor; and a light emitting apparatus having stable characteristics and realizing high efficiency.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: April 16, 2019
    Assignee: GE PHOSPHORS TECHNOLOGY, LLC
    Inventors: Masatsugu Masuda, Kenji Terashima
  • Patent number: 10263169
    Abstract: A PEDOT:PSS film having enhanced thermoelectric properties is doped with DMSO and a binary secondary dopant, such as PEO. The composition of such film causes the ratios of PEDOT in bipolaron states to be increased. As a result, the Seebeck coefficient, the electrical conductivities, and power factor of the film are increased, thereby increasing the efficiency of the film. Thus, a thermoelectric device that uses the film is able to achieve enhanced operating performance.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: April 16, 2019
    Assignee: The University of Akron
    Inventors: Xiong Gong, Chao Yi
  • Patent number: 10252080
    Abstract: A display device and a display system are disclosed. In one aspect, the display device includes a pixel unit including a first display area and a second display area, a controller configured to control the pixel unit to display a first image in the first display area and a second image in the second display area, a first polarization layer formed over the first display area and having a first polarization direction, and a second polarization layer formed over the second display area and having a second polarization direction different from the first polarization direction. The second image includes a light therapy image or an image adjusted for color blindness.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: April 9, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Changhoon Lee, Jongsung Bae, Jongin Baek, Yijoon Ahn
  • Patent number: 10247871
    Abstract: Disclosed are an optical member and a display device including the same. The optical member includes a light conversion layer including a plurality of light conversion particles; and a light diffusion layer including a plurality of light path conversion particles under the light conversion layer.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: April 2, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Sun Hwa Lee
  • Patent number: 10249802
    Abstract: A light emitting device includes a light emitting element having a first face, a second face opposing the first face, a plurality of side faces extending between the first face and the second face, a plurality of corners where the second face meets two of the plurality of side faces, and a pair of electrodes on a second face side of the light emitting element; a light transmissive member covering a portion of at least one of the side faces and a portion of an edge where said at least one side face meets the second face such that at least one of the plurality of corners is exposed from the light transmissive member; and a covering member covering the at least one exposed corner of the light emitting element and the exterior of the light transmissive member such that the pair of electrodes are exposed from the covering member.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 2, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Ikuko Baike, Ryo Suzuki
  • Patent number: 10244687
    Abstract: The LED grow light system includes an LED coupled to a circuit board, a phosphor layer generally positioned at least partially over the LED coupled to the circuit board, and a filter positioned in light receiving relation relative to the LED coupled to the circuit board and in light reflective relation relative to the phosphor layer. The filter includes a material at least partially reflective of at least a first light output wavelength emitted from the LED for redirection back into the phosphor layer where the reflected first light output wavelength converts to a second light output wavelength for recycled emission out from the LED grow light system as a composite light output component that includes a mixture of the first light output wavelength and the second light output wavelength.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: April 2, 2019
    Assignee: Spectrum King LLC
    Inventor: Rami Vardi
  • Patent number: 10236413
    Abstract: A light-emitting device including a substrate having a top surface, a side surface and a roughed surface between the top surface and the side surface, wherein the top surface includes a first portion and a second portion; a first semiconductor stack including a first upper surface and a first side wall, wherein the first semiconductor stack is on the second portion and exposes the first portion; a second semiconductor stack including a second side wall, wherein the second semiconductor stack is on the first upper surface and exposes an exposing portion of the first upper surface; wherein the first side wall and the first portion of the top surface form an acute angle ? between thereof, and the second side wall and the exposing portion of the first upper surface form an obtuse angle ? between thereof; and wherein the roughed surface is connected to the top surface.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: March 19, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Yen-Tai Chao, Sen-Jung Hsu, Tao-Chi Chang, Wei-Chih Wen, Ou Chen, Chun-Hsiang Tu
  • Patent number: 10236425
    Abstract: The present invention relates to a white light emitting device having high color rendering, and the white light emitting device is a white light emitting lamp comprising a blue LED chip having an excitation wavelength of 440-460 nm, and a phosphor layer covering a light emitting surface of the blue LED chip and excited by the excitation wavelength of the blue LED chip so as to emit light, wherein the phosphor layer comprises a first phosphor having an emission peak wavelength of 480-499 nm; a second phosphor having an emission peak wavelength of 500-560 nm; and a third phosphor having an emission peak wavelength of 600-650 nm. According to aspects of the present invention, a white LED chip having high color rendering can be provided, and particularly, the white light emitting device having high color rendering for specific colors such as R9 and R12 can be provided.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: March 19, 2019
    Assignee: GLBTECH CO., LTD.
    Inventor: Han Do Kim
  • Patent number: 10230035
    Abstract: Light emitting diode packages as disclosed herein include a monolithic chip including at least a first and a second light emitting diode (LED) that are electrically coupled in series, wherein the first and the second LEDs each include at least one electrical terminal configured to be electrically coupled to a power source. The monolithic chip is mounted onto a connection substrate having first and second landing pads formed from metallic material and electrically isolated from each other. The monolithic chip is mounted to the connection substrate such that the electrical terminal of the first LED is electrically connected to the first landing pad and the electrical terminal of the second LED is electrically connected to the second landing pad. In an example, the monolithic chip includes a third and a fourth LED electrically coupled to each other in series, and electrically coupled to the first and second LEDs in parallel.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: March 12, 2019
    Assignee: Bridgelux, Inc.
    Inventor: Vladimir A. Odnoblyudov
  • Patent number: 10229977
    Abstract: A nitrogen-containing semiconductor device including a substrate, a first AlGaN buffer layer, a second AlGaN buffer layer and a semiconductor stacking layer is provided. The first AlGaN buffer layer is disposed on the substrate, and the second AlGaN buffer layer is disposed on the first AlGaN buffer layer. A chemical formula of the first AlGaN buffer layer is AlxGa1-xN, wherein 0?x?1. The first AlGaN buffer layer is doped with at least one of oxygen having a concentration greater than 5×1017 cm?3 and carbon having a concentration greater than 5×1017 cm?3. A chemical formula of the second AlGaN buffer layer is AlyGa1-yN, wherein 0?y?1. The semiconductor stacking layer is disposed on the second AlGaN buffer layer.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: March 12, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Cheng-Hsueh Lu, Hsin-Chiao Fang, Chi-Hao Cheng, Chih-Feng Lu, Chi-Feng Huang
  • Patent number: 10224459
    Abstract: Provided herein are all-inorganic perovskite-based films, devices including all-inorganic perovskite-based films, and methods of forming all-inorganic perovskite-based films. The methods may include casting a precursor formulation that includes an all-inorganic perovskite, a liquid, and a polymer. The amount of polymer in the precursor formulation may be less than the amount of all-inorganic perovskite in the precursor formulation.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: March 5, 2019
    Assignee: Florida State University Research Foundation, Inc.
    Inventors: Hanwei Gao, Biwu Ma, Yichuan Ling
  • Patent number: 10217659
    Abstract: A method of making a dual isolation fin comprises applying a mask to a substrate and etching the exposed areas of the substrate to form a mandrel; forming a dielectric layer on the surface of the substrate and adjacent to the mandrel; forming a first epitaxially formed material on the exposed portions of the mandrel; forming a second epitaxially formed material on the first epitaxially formed material; forming a first isolation layer on the dielectric layer and adjacent to the second epitaxially formed material; removing the mask and mandrel after forming the first isolation layer; removing the first epitaxially formed material after removing the mask and mandrel; and forming a second isolation layer.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: February 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng-Wei Cheng, Sanghoon Lee, Effendi Leobandung
  • Patent number: 10217895
    Abstract: The present disclosure provides a method of forming a light-emitting device comprising: providing a growth substrate having a front side and a rear side; forming a sacrificial layer on the front side of the growth substrate; forming a protective structure on the sacrificial layer; forming a light-emitting structure on the protective structure, wherein the light-emitting structure emits a first peak wavelength; providing a carrier; joining the carrier and the light-emitting structure; and transforming the sacrificial layer by irradiating a laser beam from the rear side to separate the growth substrate from the light-emitting structure, wherein the laser beam emits a second peak wavelength, and wherein the protective structure reflects the second peak wavelength away from the light-emitting structure.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: February 26, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chih-hao Chen, Yi-Lun Chou, Wei-Chih Peng
  • Patent number: 10202547
    Abstract: Disclosed is an adjustment component that: includes a complex fluoride fluorophore represented by A2(M1-xMnx)F6 (in the formula: M is one or two or more of type of tetravalent element selected from Si, Ti, Zr, Hf, Ge, and Sn; A is one or two or more of type of alkali metal selected from Li, Na, K, Rb, and Cs and including at least Na and/or K; and x is from 0.001 to 0.3); and adjusts the chromaticity and/or color rendering index of illumination light by absorbing light having a wavelength of from 420 nm to 490 nm inclusive, and emitting light including a red wavelength component.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: February 12, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Toshihiro Tsumori, Takehisa Minowa, Masami Kaneyoshi, Kazuhiro Wataya
  • Patent number: 10204995
    Abstract: A heterostructure body with a buffer region, and a barrier region disposed on the buffer region is provided. A gate trench is formed in the barrier region. A layer of doped semiconductor material that fills the gate trench is formed. The doped semiconductor material in the gate trench locally depletes a subjacent section of the two-dimensional charge carrier gas channel at zero bias. A layer of electrically conductive material is formed on the doped semiconductor material. The layer of doped semiconductor material is structured to form a gate structure that includes a narrower portion of the doped semiconductor material that is disposed in the gate trench, a wider portion of the doped semiconductor material that is above the trench, and a gate electrode portion of the electrically conductive material that completely covers the wider portion of the doped semiconductor material.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: February 12, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Simone Lavanga, Marco Silvestri, Gilberto Curatola
  • Patent number: 10205052
    Abstract: A semiconductor stacking structure according to the present invention comprises: a monocrystalline substrate which is disparate from a nitride semiconductor; an inorganic thin film which is formed on a substrate to define a cavity between the inorganic thin film and the substrate, wherein at least a portion of the inorganic thin film is crystallized with a crystal structure that is the same as the substrate; and a nitride semiconductor layer which is grown from a crystallized inorganic thin film above the cavity. The method and apparatus for separating a nitride semiconductor layer according the present invention mechanically separate between the substrate and the nitride semiconductor layer. The mechanical separation can be performed by a method of separation of applying a vertical force to the substrate and the nitride semiconductor layer, a method of separation of applying a horizontal force, a method of separation of applying a force of a relative circular motion, and a combination thereof.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: February 12, 2019
    Assignee: Seoul National University R&DB Foundation
    Inventors: Eui-Joon Yoon, Dae-Young Moon, Jeong-Hwan Jang, Yongjo Park, Duk-Kyu Bae
  • Patent number: 10205061
    Abstract: A light-emitting diode includes from bottom to up: a substrate; a light-emitting epitaxial layer laminated by semiconductor material layers over the substrate; a current spreading layer doped with conductive metal nanomaterial groups over the light-emitting epitaxial layer; and metal nanomaterial groups with high visible light transmittance over the current spreading layer. The conductive metal nanomaterial groups dispersed inside the ITO current spreading layer can reduce horizontal resistance of the current spreading layer and improve horizontal spreading uniformity of current; and metal nanomaterial groups with high visible light transmittance are distributed over the upper surface of the current expansion layer for roughening and increasing light extract efficiency.
    Type: Grant
    Filed: November 19, 2017
    Date of Patent: February 12, 2019
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Huining Wang, Sheng-hsien Hsu, Kang-wei Peng, Su-hui Lin, Chen-ke Hsu
  • Patent number: 10205113
    Abstract: In an organic EL device, the light emission efficiency by a TADF mechanism is to be improved with an emissive layer structure that can be easily formed. An OLED has at least an emissive layer between an upper electrode and a lower electrode. The emissive layer includes: a host layer including a host material; an assistant dopant layer which is a layer adjacent to the host layer and where an assistant dopant made of a thermally activated delayed fluorescence material and the host material are intermingled within a plane; and a light-emitting dopant layer which is a layer adjacent to the assistant dopant layer and where a light-emitting dopant made of a fluorescent material emitting light by being excited by the assistant dopant and the host material are intermingled within a plane.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: February 12, 2019
    Assignee: Japan Display Inc.
    Inventors: Masaki Tanaka, Toshihiro Sato