With Particular Semiconductor Material Patents (Class 257/103)
  • Patent number: 10514132
    Abstract: A lighting apparatus includes a housing, an electroluminescent quantum dots (QD) unit as a light source, and an electrical component for providing electrical energy to the electroluminescent QD unit. The housing may be in the form of an incandescent bulb, a halogen bulb, a fluorescent tube or a panel. The electroluminescent QD unit includes a plurality of QDs printed on an insulating substrate. The substrate may be flexible so that the electroluminescent QD unit may be bent or curved to conform to the shape of an incandescent bulb, fluorescent tube or panel or a halogen filament so as to mimic these traditional light sources. Methods for retrofitting traditional or LED light fixtures with a lighting apparatus including an electroluminescent quantum dots (QD) unit as a light source are also described.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: December 24, 2019
    Assignee: SABIC Global Technologies B.V.
    Inventors: Yingjun Cheng, Andries Jakobus Petrus Van Zyl, Libo Wu
  • Patent number: 10509149
    Abstract: An organic light emitting diode device includes an organic light emitting display panel and a circular polarizing plate disposed on the organic light emitting display panel and including a polarizer and a compensation film, where a retardation of the compensation film in a first direction is determined based on a retardation of the organic light emitting display panel in the first direction.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: December 17, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tsuyoshi Ohyama, Kitae Park, Hyunseok Choi, Ju Hyun Kim
  • Patent number: 10505074
    Abstract: A nitride semiconductor light emitting element includes: an n-side layer; a p-side layer; an active layer including: a well layer containing Al, Ga, and N, and a barrier layer containing Al, Ga, and N, wherein an Al content of the barrier layer is higher than that of the well layer; and an electron blocking structure layer between the active layer and the p-side layer and including: a first electron blocking layer disposed between the p-side layer and the active layer and having a bandgap larger than that of the barrier layer, a second electron blocking layer disposed between the p-side layer and the first electron blocking layer and having a bandgap larger than that of the barrier layer, but smaller than the bandgap of the first electron blocking layer, and an intermediate layer disposed therebetween and having a bandgap smaller than that of the second electron blocking layer.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: December 10, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Koji Asada, Tokutaro Okabe
  • Patent number: 10505132
    Abstract: To provide a light-emitting element which uses a fluorescent material as a light-emitting substance and has higher luminous efficiency. To provide a light-emitting element which includes a mixture of a thermally activated delayed fluorescent substance and a fluorescent material. By making the emission spectrum of the thermally activated delayed fluorescent substance overlap with an absorption band on the longest wavelength side in absorption by the fluorescent material in an S1 level of the fluorescent material, energy at an S1 level of the thermally activated delayed fluorescent substance can be transferred to the S1 of the fluorescent material. Alternatively, it is also possible that the S1 of the thermally activated delayed fluorescent substance is generated from part of the energy of a T1 level of the thermally activated delayed fluorescent substance, and is transferred to the S1 of the fluorescent material.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: December 10, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Hiromi Seo, Tatsuyoshi Takahashi
  • Patent number: 10497827
    Abstract: A light emitting device package includes a first frame and a second frame disposed to be spaced apart from each other; a body disposed between the first and second frames and comprising a recess; a first adhesive on the recess; a light emitting device on the first adhesive; a second adhesive disposed between the first and second frames and the light emitting device; and a resin portion disposed to surround the second adhesive and a partial region of the light emitting device.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: December 3, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Tae Sung Lee, June O Song, Ki Seok Kim, Young Shin Kim, Chang Man Lim
  • Patent number: 10497828
    Abstract: A light-emitting device includes a light-emitting structure including a first-conductivity-type nitride semiconductor layer on a substrate, an active layer on the first-conductivity-type nitride semiconductor layer, and a second-conductivity-type nitride semiconductor layer on the active layer, and a buffer layer between the substrate and the light-emitting structure. The buffer layer includes a plurality of voids. The plurality of voids extend vertically into the buffer layer from a surface of the buffer layer. The surface of the buffer layer is proximate to the light-emitting structure. The plurality of voids have different horizontal sectional areas.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: December 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tan Sakong, Byoung-kyun Kim, Jin-young Lim, Jae-sung Hyun
  • Patent number: 10492267
    Abstract: Some forms relate to a stretchable computing display device. The stretchable computing display device includes a stretchable base; a patterned conductive section mounted on the stretchable base, wherein the patterned conductive section includes a first portion and a second portion that is electrically isolated from the first portion; an electroluminescent material mounted on the stretchable base such that the electroluminescent material is between the first portion and the second portion of the patterned conductive section; an encapsulant that covers at least a portion of the patterned conductive section; and a textile such that the stretchable base is mounted on the textile, wherein the textile is part of a garment.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 26, 2019
    Assignee: Intel Corporation
    Inventors: Adel Elsherbini, Sasha Oster, Nadine L. Dabby, Aleksandar Aleksov, Braxton Lathrop, Feras Eid
  • Patent number: 10490691
    Abstract: Light emitting diodes re described. In an embodiment, an LED includes a graded p-side spacer layer on a p-type confinement layer, and the graded p-side spacer layer graded from an initial band gap adjacent the p-type confinement layer to a lower band gap. For example, the graded band gap may be achieved by a graded Aluminum concentration.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: November 26, 2019
    Assignee: Apple Inc.
    Inventors: David P. Bour, Dmitry S. Sizov
  • Patent number: 10490698
    Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence and a carrier substrate, wherein the semiconductor layer sequence includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and an active layer arranged between the first semiconductor region and the second semiconductor region, wherein the first semiconductor region faces the carrier substrate, the semiconductor layer sequence includes first recesses formed in the first semiconductor region and that do not separate the active layer, the semiconductor layer sequence includes second recesses that at least partially separate the first semiconductor region and the active layer, and the second recesses adjoin a first recess or are arranged between two first recesses.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: November 26, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Christoph Klemp
  • Patent number: 10490762
    Abstract: In one aspect, light emitting devices are described herein. In some embodiments, a light emitting device described herein comprises an inorganic semiconductor substrate and a layer of quantum dots (QDs) covalently bonded to the inorganic semiconductor substrate. Such a device may further comprise an electrode and an overlayer positioned between the electrode and the layer of QDs. Moreover, the overlayer can be immediately adjacent to and in contact with the layer of QDs. Further, in some cases, the layer of QDs is a close-packed layer of QDs. Additionally, the light emitting device can be a green-emitting light emitting diode (LED) or an amber-emitting LED.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: November 26, 2019
    Assignee: University of North Carolina at Charlotte
    Inventors: Michael G. Walter, Marcus Jones, Edward Stokes
  • Patent number: 10490695
    Abstract: The invention relates to an optoelectronic semiconductor element (100) comprising a semiconductor layer sequence (1) with a first layer (10) of a first conductivity type, a second layer (12) of a second conductivity type, and an active layer (11) which is arranged between the first layer (10) and the second layer (12) and which absorbs or emits electromagnetic radiation when operated as intended. The semiconductor element (100) is equipped with a plurality of injection regions (2) which are arranged adjacently to one another in a lateral direction, wherein the semiconductor layer sequence (1) is doped within each injection region (2) such that the semiconductor layer sequence (1) has the same conductivity type as the first layer (10) within the entire injection region (2). Each injection region (2) passes at least partly through the active layer (11) starting from the first layer (10).
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: November 26, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Alvaro Gomez-Iglesias, Asako Hirai
  • Patent number: 10490700
    Abstract: A light-emitting diode includes a stack of semiconductor layers including a first face and a second face that are opposite one another relative to a thickness of the stack, a first electrode including a face in contact with the first face of the stack, and a second electrode in contact with the stack. Moreover, the light-emitting diode is such that a recess is formed in the second face of the stack which results in the stack including a thinned part, the face of the first electrode in contact with the first face is in contact only with the thinned part of the stack, and the second electrode is in contact with a zone of the stack separate from the thinned part of the stack.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: November 26, 2019
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventor: David Vaufrey
  • Patent number: 10483256
    Abstract: An optoelectronic semiconductor device and an apparatus with an optoelectronic semiconductor device are disclosed. In an embodiment the optoelectronic semiconductor component has an emission region including a semiconductor layer sequence having a first semiconductor layer, a second semiconductor layer, and an active region arranged between the first semiconductor layer and the second semiconductor layer for generating radiation, and a protection diode region. The semiconductor component has a contact for electrically contacting the semiconductor component externally. The contact has a first contact region that is connected to the emission region in an electrically conductive manner. The contact has further a second contact region that is spaced apart from the first contact region and connected to the protection diode region in an electrically conductive manner. The first contact region and the second contact region can be electrically contacted externally by a mutual end of a connecting line.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: November 19, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Juergen Moosburger, Andreas Ploessl
  • Patent number: 10483481
    Abstract: A vertical solid state lighting (SSL) device is disclosed. In one embodiment, the SSL device includes a light emitting structure formed on a growth substrate. Individual SSL devices can include a embedded contact formed on the light emitting structure and a metal substrate plated at a side at least proximate to the embedded contact. The plated substrate has a sufficient thickness to support the light emitting structure without bowing.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: November 19, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Vladimir Odnoblyudov, Scott D. Schellhammer
  • Patent number: 10472734
    Abstract: A composition of matter comprising a film on a graphitic substrate, said film having been grown epitaxially on said substrate, wherein said film comprises at least one group III-V compound or at least one group II-VI compound.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: November 12, 2019
    Assignee: NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY (NTNU)
    Inventors: Bjørn-Ove Fimland, Dheeraj L. Dasa, Helge Weman
  • Patent number: 10461235
    Abstract: A method of manufacturing a semiconductor device includes disposing a substrate metal film on an upper surface of a substrate made of a metal; disposing a first element metal film on a lower surface of a first element; disposing a second element metal film on a lower surface of a second element; bonding the first element and the second element to the substrate so that an upper surface of the substrate metal film is in contact with a lower surface of the first element metal film and a lower surface of the second element metal film; oxidizing at least a portion of a region of the upper surface of the substrate metal film other than regions in contact with the first element metal film and the second element metal film; and disposing a wiring electrically connecting the first element and the second element, across and above the region oxidized.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: October 29, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Yuta Oka, Masatsugu Ichikawa
  • Patent number: 10460952
    Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: October 29, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Wenhong Sun, Rakesh Jain, Michael Shur, Remigijus Gaska
  • Patent number: 10459285
    Abstract: A device for producing polarized light includes a plurality of photonic crystal grid structures on a substrate. The plurality of photonic crystal grid structures includes one or more structured regions for the transmission of polarized blue light, polarized green light, and polarized red light. A green quantum dot layer is substantially positioned on the one or more structured regions for the transmission of polarized green light and a red quantum dot layer is substantially positioned on the one or more structured regions for the transmission of polarized red light. A blue light emitting diode array is disposed on the polarized light device such that the emission from the blue light emitting diode array facilitates the emission of red and green light from the red and green quantum dot layers.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: October 29, 2019
    Assignee: Konica Minolta Laboratory U.S.A., Inc.
    Inventor: Jun Amano
  • Patent number: 10461217
    Abstract: A method for manufacturing a light emitting diode can include forming a GaN-based semiconductor structure with a thickness of less than 5 microns on a substrate, the GaN-based semiconductor structure having a p-type GaN-based semiconductor layer; an active layer on the p-type GaN-based semiconductor layer; and an n-type GaN-based semiconductor layer on the active layer; forming a p-type electrode having multiple metal layers on the GaN-based semiconductor structure; forming a metal support layer on the p-type electrode; removing the substrate from the GaN-based semiconductor structure to expose an upper surface of the GaN-based semiconductor structure; forming an n-type electrode on a flat portion produced by polishing the exposed upper surface of the GaN-based semiconductor structure, not only with overlapping at least a portion of the p-type electrode in a thickness direction of the GaN-based semiconductor structure but also with contacting the flat portion; and forming an insulating layer on the upper surf
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: October 29, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jong Lam Lee, In-Kwon Jeong, Myung Cheol Yoo
  • Patent number: 10461497
    Abstract: A light emitting device includes a substrate, a light emitting element, a shielding layer, and a collimator. The light emitting element is embedded in the substrate. The shielding layer is disposed on the substrate and has an opening exposing the light emitting element. The collimator is disposed on the shielding layer.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: October 29, 2019
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Hsien-Ying Chou, Chun-Ta Chen, Fu-Cheng Wei, Chih-Lin Liao
  • Patent number: 10458041
    Abstract: An alumina substrate on which an AlN layer is formed and that causes less warping, and a substrate material strong enough to withstand normal handling when an AlN crystal is grown upon it, and prevents cracking and fracturing of a grown crystal when stress is applied during growing or cooling. The substrate has a gap and a rare earth element-containing region inside the AlN layer or at the interface between the AlN layer and the alumina substrate. Warping of the AlN layer can be reduced by lattice-mismatch stress being concentrated at the region and releasing of stress by the gap. The region having a concentrating of stress, and the gap having a low mechanical strength, can induce crackings and fracturings. As a result, contamination of crackings and fracturings into the crystal grown on the substrate can be prevented. The region can ensure a level of mechanical strength sufficient for handling.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: October 29, 2019
    Assignee: TDK CORPORATION
    Inventors: Kazuhito Yamasawa, Atsushi Ohido, Katsumi Kawasaki
  • Patent number: 10453997
    Abstract: A nitride semiconductor light emitting element includes: an n-side layer; a p-side layer; an active layer including: a well layer containing Al, Ga, and N, and a barrier layer containing Al, Ga, and N, wherein an Al content of the barrier layer is higher than that of the well layer; and an electron blocking structure layer between the active layer and the p-side layer and including: a first electron blocking layer disposed between the p-side layer and the active layer and having a bandgap larger than that of the barrier layer, a second electron blocking layer disposed between the p-side layer and the first electron blocking layer and having a bandgap larger than that of the barrier layer, but smaller than the bandgap of the first electron blocking layer, and an intermediate layer disposed therebetween and having a bandgap smaller than that of the second electron blocking layer.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: October 22, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Koji Asada, Tokutaro Okabe
  • Patent number: 10453947
    Abstract: A semiconductor device includes a substrate, a flowable dielectric material and a GaN-based semiconductor layer. The substrate has a pit exposed from an upper surface of the substrate, the flowable dielectric material fully fills the pit, and the GaN-based semiconductor layer is disposed over the substrate and the flowable dielectric material.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: October 22, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yung-Fung Lin, Cheng-Wei Chou, Szu-Yao Chang, Cheng-Tao Chou, Hsiu-Ming Chen
  • Patent number: 10453993
    Abstract: A method of manufacturing a light emitting device can include forming an n-type GaN-based layer on a sapphire substrate; forming a GaN-based active layer on the n-type GaN-based layer; forming a p-type GaN-based layer on the GaN-based active layer; forming a p-type electrode on the p-type GaN-based layer; forming a metal substrate on the p-type electrode; removing the sapphire substrate; forming an n-type electrode on the n-type GaN-based layer; forming a passivation layer on a side surface of the p-type GaN-based layer, a side surface of the GaN-based active layer, a side surface of the n-type GaN-based layer, an upper surface of the n-type GaN-based layer, a side surface of the n-type electrode, and an upper surface of the n-type electrode after the forming the n-type electrode; and forming an open space to expose the n-type electrode by patterning the passivation layer.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: October 22, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jong Lam Lee, In-kwon Jeong, Myung Cheol Yoo
  • Patent number: 10439098
    Abstract: To provide a method for producing a Group III nitride semiconductor light-emitting device, which allows the formation of a high-temperature AlN buffer layer on an uneven substrate. This production method comprises forming an Al layer or Al droplets on the uneven shape of the uneven substrate, forming an AlN buffer layer while nitriding the Al layer; and forming a Group III nitride semiconductor layer on the AlN buffer layer. In the forming an Al layer, the internal pressure of a furnace is 1 kPa to 19 kPa, the temperature of the uneven substrate is 900° C. to 1,500° C., and an organic metal gas containing Al is supplied at a flow rate of 1.5×10?4 mol/min or more.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: October 8, 2019
    Assignee: TOYODA GOSEI CO., LTD.
    Inventor: Koji Okuno
  • Patent number: 10439106
    Abstract: A light emitting diode (LED) includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. A p-type confinement layer is provided on the p-type substrate. An emission layer is provided on the p-type confinement layer. An n-type confinement layer is provided on the emission layer. A transparent II-VI n-type contact layer is formed on the n-type confinement layer as a replacement for a current spreading layer, a III-V contact layer and an n-type ohmic contact.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 8, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith E. Fogel, Jeehwan Kim, Ning Li, Devendra K. Sadana
  • Patent number: 10438992
    Abstract: A light-emitting element includes a light-emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first contact electrode and a second contact electrode located on the light-emitting structure, and respectively making ohmic contact with the first conductive semiconductor layer and the second conductive semiconductor layer; an insulation layer for covering a part of the first contact electrode and the second contact electrode so as to insulate the first contact electrode and the second contact electrode; a first electrode pad and a second electrode pad electrically connected to each of the first contact electrode and the second contact electrode; and a radiation pad formed on the insulation layer, and radiating heat generated from the light-emitting structure.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: October 8, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Kyu Kim, So Ra Lee, Yeo Jin Yoon, Jae Kwon Kim, Joon Sup Lee, Min Woo Kang, Se Hee Oh, Hyun A Kim, Hyoung Jin Lim
  • Patent number: 10431712
    Abstract: An optical member for a multi-panel display device according to an embodiment includes a first optical member located on a first display device and including optical fibers, a second optical member located on a second display device neighboring the first display device and including optical fibers, and an optical fiber triangular bar located to overlap a region where the first and second optical members are adjacent to each other, and including optical fibers, wherein each of the first and second optical members includes a chamfer portion corresponding to the optical fiber triangular bar at the region where the first and second optical members are adjacent to each other.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: October 1, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Kyung-Kook Jang, Byung-Geol Kim, Dong-Young Kim, So-Mang Kim
  • Patent number: 10431713
    Abstract: A nitride underlayer structure includes a sputtered AlN buffer layer with open band-shaped holes, thus providing a stress release path before the nitride film is grown over the buffer layer. A light-emitting diode with such nitride underlayer structure has improved lattice quality of the nitride underlayer structure and the problem of surface cracks is resolved. A fabrication method of the nitride underlayer includes providing a substrate and forming a band-shaped material layer over the substrate; sputtering an AlN material layer over the band-shaped material layer and the substrate to form a flat film; scanning back and forth from the substrate end with a laser beam to decompose the band-shaped material layer to form a sputtered AlN buffer layer with flat surface and band-shaped holes inside; and forming an AlxIn1-x-yGayN layer (0?x?1, 0?y?1) over the sputtered AlN buffer layer.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: October 1, 2019
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wen-yu Lin, Shengchang Chen, Zhibai Zhong, Chen-ke Hsu
  • Patent number: 10424758
    Abstract: Disclosed is an organic light emitting display apparatus. An outer portion of an adhesive layer is set higher in degree of cure than a center portion of the adhesive layer, and thus, a driving defect is prevented from occurring because the adhesive layer stretches in a manufacturing process, and various defects are prevented from being caused by a jig, thereby enhancing reliability and productivity of the organic light emitting display apparatus.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: September 24, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Se Ung Kyoung
  • Patent number: 10418349
    Abstract: Solid-state transducer (“SST”) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: September 17, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Patent number: 10418514
    Abstract: Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the superlattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: September 17, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Kwang Joong Kim, Chang Suk Han, Kyung Hee Ye, Seung Kyu Choi, Ki Bum Nam, Nam Yoon Kim, Kyung Hae Kim, Ju Hyung Yoon
  • Patent number: 10418355
    Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a first semiconductor layer sequence having a plurality of microdiodes, and a second semiconductor layer sequence having an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: September 17, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Rainer Butendeich, Alexander Walter, Matthias Peter, Tobias Meyer, Tetsuya Taki, Hubert Maiwald
  • Patent number: 10418525
    Abstract: Provided is a semiconductor light-emitting element that emits ultraviolet light with a wavelength of not more than 355 nm, the semiconductor light-emitting element including an electrode portion to be electrically connected to electrodes of a component mounting the element, wherein the electrode portion is formed by laminating any one or more of a metal providing passivity against organic acids, a metal having a lower ionization tendency than hydrogen and a conductive oxide film, and does not include a layer formed of a material that does not provide passivity against organic acids, has higher ionization tendency than hydrogen and is not a conductive oxide film.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: September 17, 2019
    Assignee: NIKKISO CO., LTD.
    Inventor: Shuichiro Yamamoto
  • Patent number: 10411164
    Abstract: A light-emitting electrode having a ZnO transparent electrode and a method for manufacturing the same are provided. A light-emitting element according to an embodiment comprises: a light-emitting structure comprising a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; and a ZnO transparent electrode, which is positioned on the second conductive semiconductor layer, which makes an Ohmic contact with the second conductive semiconductor layer, and which comprises monocrystalline ZnO, wherein the diffraction angle of a peak of the ZnO transparent electrode, which results from X-ray diffraction (XRD) omega 2theta (?2?) scan, is in the range of ±1% with regard to the diffraction angle of a peak of the second conductive semiconductor layer, which results from XRD ?2? scan, and the FWHM of a main peak of the ZnO transparent electrode, which results from XRD omega (?) scan, is equal to or less than 900 arc sec.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: September 10, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jin Woong Lee, Chan Seob Shin, Keum Ju Lee, Seom Geun Lee, Myoung Hak Yang, Jacob J. Richardson, Evan C. O'Hara
  • Patent number: 10411155
    Abstract: A method of producing optoelectronic semiconductor chips includes growing a semiconductor layer sequence on a growth substrate; applying at least one metallization to a contact side of the semiconductor layer sequence, which contact side faces away from the growth substrate; attaching an intermediate carrier to the semiconductor layer sequence, wherein a sacrificial layer is attached between the intermediate carrier and the semiconductor layer sequence; removing the growth substrate from the semiconductor layer sequence; structuring the semiconductor layer sequence into individual chip regions; at least partially dissolving the sacrificial layer; and subsequently removing the intermediate carrier, wherein, in removing the intermediate carrier, part of the sacrificial layer is still present, removing the intermediate carrier includes mechanically breaking remaining regions of the sacrificial layer, and the sacrificial layer is completely removed after removing the intermediate carrier.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: September 10, 2019
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Lorenzo Zini, Alexander Frey, Joachim Hertkorn, Berthold Hahn
  • Patent number: 10403837
    Abstract: An organic photoelectronic device includes an anode and a cathode facing each other, a light-absorption layer between the anode and the cathode, and a first auxiliary layer between the cathode and the light-absorption layer, the first auxiliary layer having an energy bandgap of about 3.0 eV to about 4.5 eV, and a difference between a work function of the cathode and a highest occupied molecular orbital (HOMO) energy level of the first auxiliary layer is about 1.5 eV to about 2.0 eV.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: September 3, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Seok Leem, Sung Young Yun, Kwang Hee Lee, Seon-Jeong Lim, Yong Wan Jin
  • Patent number: 10403793
    Abstract: A method of forming semiconductor nanorods includes: placing, in a chamber, a masking material and a base comprising a semiconductor, wherein an etching rate of the masking material in a chemical reaction with a reactant gas during dry etching is lower than an etching rate of a semiconductor in a chemical reaction with the reactant gas during dry etching; and performing dry-etching to form a plurality of dot-masks, each having a form of a dot containing the masking material, on a surface of the semiconductor and to remove a portion of the semiconductor exposed from the dot-masks, wherein the dry-etching is performed under a pressure in the chamber in a predetermined range that allows the masking material scattered by the etching to be adhered to a surface of the semiconductor with a predetermined size of the dots and a predetermined density of the dots.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: September 3, 2019
    Assignee: NICHIA CORPORATION
    Inventor: Shingo Tanisaka
  • Patent number: 10388777
    Abstract: Crystalline heterostructures including an elevated crystalline structure extending from one or more trenches in a trench layer disposed over a crystalline substrate are described. In some embodiments, an interfacial layer is disposed over a silicon substrate surface. The interfacial layer facilitates growth of the elevated structure from a bottom of the trench at growth temperatures that may otherwise degrade the substrate surface and induce more defects in the elevated structure. The trench layer may be disposed over the interfacial layer with a trench bottom exposing a portion of the interfacial layer. Arbitrarily large merged crystal structures having low defect density surfaces may be overgrown from the trenches. Devices, such as III-N transistors, may be further formed on the raised crystalline structures while silicon-based devices (e.g., transistors) may be formed in other regions of the silicon substrate.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: August 20, 2019
    Assignee: Intel Corporation
    Inventors: Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung, Robert S. Chau
  • Patent number: 10388752
    Abstract: A semiconductor substrate structure and process for fabrication of the semiconductor substrate structure are described. The semiconductor substrate structure includes a silicon carbide (SiC) wafer substrate, an active gallium nitride (GaN) layer and a layer of microcrystalline diamond (MCD) layer disposed between the SiC wafer substrate and the GaN active layer. The MCD) layer is bonded to the SiC wafer substrate and to the GaN active layer.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: August 20, 2019
    Assignee: ELTA SYSTEMS LTD.
    Inventors: Joseph Kaplun, Bilha Houli Arbiv
  • Patent number: 10388750
    Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. The semiconductor structure includes: a substrate, at least a part of an upper surface of the substrate being a nonpolar surface or a semi-polar surface including nitride semiconductor crystals; an interface layer formed on the nonpolar surface or the semi-polar surface, and including at least one selected from a nitride and an oxynitride; and a metal layer formed on a surface of the interface layer away from the substrate.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: August 20, 2019
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Xian Wu, Lei Guo, Jing Wang
  • Patent number: 10388832
    Abstract: An ultraviolet light emitting diode is provided to comprise an n-type semiconductor layer disposed on a substrate; light emitting elements disposed on the n-type semiconductor layer, each comprising an active layer and a p-type semiconductor layer; an n-type ohmic contact layer contacting the n-type semiconductor layer around the micro light emitting elements; p-type ohmic contact layers contacting the p-type semiconductor layers, respectively; an n-bump electrically connecting to the n-type ohmic contact layer; and a p-bump electrically connected to the p-type ohmic contact layers, wherein each of the n-bump and the p-bump is disposed across over a plurality of micro light emitting elements. The micro light emitting elements may be arranged over a wide area of the substrate, and thus light output can be improved and a forward voltage may be lowered, in addition, the n-bump and the p-bump may be formed relatively widely.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: August 20, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Seong Kyu Jang, Ji Hyeon Jeong, Kyu Ho Lee, Joon Hee Lee
  • Patent number: 10381517
    Abstract: The present invention relates to a light emitting diode and a method for manufacturing same, and more specifically relates to growing a GaN layer of high quality on an upper part of an AlGaInP-based light emitting diode to improve the light extraction efficiency of the light emitting diode, wherein the GaN layer has a larger band gap and a smaller refractive index than AlGaInP-based material. The AlGaInP-based light emitting diode of the present invention is characterized by forming the GaN layer on the upper surface, and the GaN layer preferably has a surface of a fine uneven pattern. The GaN layer can be grown in the same system after forming the AlGaInP-based light emitting diode without an additional process.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: August 13, 2019
    Assignee: AUK CORP.
    Inventors: Hyung Joo Lee, Young Jin Kim, In Kyu Jang
  • Patent number: 10381510
    Abstract: A red light emitting device, a method of fabricating a light emitting device, a light emitting device package, and a lighting system are provided. The red light emitting device may include a first semiconductor layer having a first conductivity, an active layer provided on the first semiconductor layer and including a quantum well and a quantum barrier, a second semiconductor layer having a second conductivity and provided on the active layer, a third semiconductor layer having the second conductivity on the second semiconductor layer, a fourth semiconductor layer having the second conductivity on the third semiconductor layer, and a fifth semiconductor layer having the second conductivity on the fourth semiconductor layer. The third semiconductor layer and the fourth semiconductor layer may include an AlGaInP-based semiconductor layer, and an Al composition of the fourth semiconductor layer may be lower than an Al composition of the third semiconductor layer.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: August 13, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Eun Bin Ko, Yong Jun Kim, Ki Yong Hong, Byung Hak Jeong
  • Patent number: 10355168
    Abstract: A lighting device according to embodiments of the invention includes a substrate with a plurality of holes that extend from a surface of the substrate. A non-III-nitride material is disposed within the plurality of holes. The surface of the substrate is free of the non-III-nitride material. A semiconductor structure is grown on the surface of the substrate. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: July 16, 2019
    Assignee: LUMILEDS LLC
    Inventor: Toni Lopez
  • Patent number: 10355163
    Abstract: The present disclosure provides a flexible light emitting diode (LED) device and a method for manufacturing the same. The method includes providing a p-type silicon wafer as a base, and then performing an exposure and development process to form a patterned layer including a plurality of p-type silicon microcolumns on the base; filling a plurality of gaps among the p-type silicon microcolumns with a soft polymer resin to form a compound layer; sequentially forming an n-type doped metal oxide layer and a first metal electrode layer on the compound layer; and removing the base, forming a second metal electrode layer, and then entirely shifting a whole body including these layers onto a flexible substrate.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: July 16, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Bao Zha, Yi Zeng
  • Patent number: 10347609
    Abstract: Solid state transducer (“SST”) assemblies with remote converter material and improved light extraction efficiency and associated systems and methods are disclosed herein. In one embodiment, an SST assembly has a front side from which emissions exit the SST assembly and a back side opposite the front side. The SST assembly can include a support substrate having a forward-facing surface directed generally toward the front side of the SST assembly and an SST structure carried by the support substrate. The SST structure can be configured to generate SST emissions. The SST assembly can further include a converter material spaced apart from the SST structure. The forward-facing surface and the converter material can be configured such that at least a portion of the SST emissions that exit the SST assembly at the front side do not pass completely through the converter material.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: July 9, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Patent number: 10340252
    Abstract: A high-voltage transistor (HVT) structure adapts a low-voltage transistor (LUT) to high-voltage environments. The HVT structure includes a drain node, a source node, a control gate, and a field electrode. The drain node and the source node define a conductive channel, in which mobilized charges are regulated by the control gate. While being isolated from the control gate, the field electrode is configured to spread the mobilized charges in response to a field voltage. The field electrode is structured and routed to prevent charge sharing with any one of the drain node, source node, or control gate. Advantageously, the isolated field electrode minimizes the capacitance of the control gate as well as the drain and source nodes, such that the HVT can switch with less power loss and a more robust performance in a high-voltage environment.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: July 2, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Sandeep R. Bahl, Michael D. Seeman
  • Patent number: RE47711
    Abstract: A packaged optical device includes a substrate having a surface region with light emitting diode devices fabricated on a semipolar or nonpolar GaN substrate. The LEDs emit polarized light and are characterized by an overlapped electron wave function and a hole wave function. Phosphors within the package are excited by the polarized light and, in response, emit electromagnetic radiation of a second wavelength.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: November 5, 2019
    Assignee: SORAA, INC.
    Inventors: James W. Raring, Eric M. Hall, Mark P. D'Evelyn
  • Patent number: RE47767
    Abstract: A fabrication method produces a mechanically patterned layer of group III-nitride. The method includes providing a crystalline substrate and forming a first layer of a first group III-nitride on a planar surface of the substrate. The first layer has a single polarity and also has a pattern of holes or trenches that expose a portion of the substrate. The method includes then, epitaxially growing a second layer of a second group III-nitride over the first layer and the exposed portion of substrate. The first and second group III-nitrides have different alloy compositions. The method also includes subjecting the second layer to an aqueous solution of base to mechanically pattern the second layer.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: December 17, 2019
    Assignee: NOKIA OF AMERICA CORPORATION
    Inventors: Aref Chowdhury, Hock Ng, Richart Elliott Slusher