Abstract: In one example, a device includes a layered semiconductor material having material defects formed therein and an optoelectronic device formed in the layered semiconductor material. The optoelectronic device includes an active region comprising an aperture formed through the layered semiconductor material. The aperture is formed in a manner that avoids intersection with the material defects.

Abstract: A crystal growth apparatus comprises a reaction vessel holding a melt mixture containing an alkali metal and a group III metal, a gas supplying apparatus supplying a nitrogen source gas to a vessel space exposed to the melt mixture inside the reaction vessel, a heating unit heating the melt mixture to a crystal growth temperature, and a support unit supporting a seed crystal of a group III nitride crystal inside the melt mixture.

Abstract: A light-emitting device is provided. The light-emitting device comprises: a light-emitting stack having an active layer emitting first light having a peak wavelength ? nm; and an adjusting element stacked electrically connected to the active layer in series for tuning a forward voltage of the light-emitting device; wherein the forward voltage of the light-emitting device is between (1240/0.8?) volt and (1240/0.5?) volt.

Abstract: A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al1-xGaxN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0?x?1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.

Abstract: A display device is provided. The display device includes a first substrate; a first transistor and a second transistor disposed over the first substrate; a common electrode disposed over the first substrate; and a light-emitting diode chip (LED chip) disposed over the first substrate and disposed corresponding to the first transistor and the second transistor. The light-emitting diode chip includes a first light-emitting unit and a second light-emitting unit, wherein the first light-emitting unit is electrically connected to the first transistor and the common electrode, and the second light-emitting unit is electrically connected to the second transistor and the common electrode.

Abstract: This invention is related to LED Light Extraction for optoelectronic applications. More particularly the invention relates to (Al, Ga, In)N combined with optimized optics and phosphor layer for highly efficient (Al, Ga, In)N based light emitting diodes applications, and its fabrication method. A further extension is the general combination of a shaped high refractive index light extraction material combined with a shaped optical element.

Abstract: An optoelectronic device, comprising: a first semiconductor layer comprising four boundaries, a corner formed by two of the neighboring boundaries, a first surface, and a second surface opposite to the first surface; a second semiconductor layer formed on the first surface of the first semiconductor layer; a second conductive type electrode formed on the second semiconductor layer; and two first conductive type electrodes formed on the first surface, wherein the first conductive type electrodes are separated and formed a pattern.

Abstract: A light emitting device includes a metal support structure comprising Cu; an adhesion structure on the metal support structure and comprising Au; a reflective conductive contact on the adhesion structure; a GaN-based semiconductor structure on the reflective conductive contact, the GaN-based semiconductor structure comprising a first-type GaN layer, an active layer, and a second-type GaN layer; a top interface layer on the GaN-based semiconductor structure and comprising Ti; and a contact pad on the top interface layer and comprising Au, wherein the GaN-based semiconductor structure is less than 1/20 thick of a thickness of the metal support structure.

Abstract: Provided is a monolithic stacked integrated circuit (IC). The IC includes a first layer over a substrate and a second layer over the first layer. The first layer includes first circuit elements where a first portion of the first circuit elements has a defect. The second layer includes second circuit elements. The IC further includes interconnect elements coupling the first portion to a second portion of the second circuit elements for mitigating the defect.

Abstract: A component mounting apparatus crimps a component to a transparent substrate. The component is mounted on the transparent substrate through a photo-modifiable resin portion. The component mounting apparatus includes a receiving portion that receives a surface of the substrate by an upper surface of a transparent member, a pressing portion that presses the component against the substrate, an emission portion that emits light to the photo-modifiable resin portion through the transparent member, and a control portion that controls a timing when the pressing portion starts pressing of the component and a timing when the emission portion starts emission of the light so that the emission of the light is started a predetermined differential time earlier or later than the start of the pressing of the component.

Abstract: A GaN-based LED epitaxial structure comprises a non-doped GaN buffer layer, an undoped GaN layer, an N-type GaN layer, an InGaN/GaN superlattice quantum well structure, a multiple quantum well luminous layer structure, an AlGaN layer, a low-temperature P-type layer, a P-type electron blocking layer and a P-type GaN layer which are sequentially stacked, wherein the non-doped GaN buffer layer comprises a sandwich structure consisting of a GaN layer, an AlGaN layer and a GaN layer which are sequentially stacked. For the GaN-based LED epitaxial structure and the preparation method thereof, the non-doped GaN buffer layer with the sandwich structure consisting of the GaN layer, the AlGaN layer and the GaN layer is used as a buffer layer, the buffer layer changes light scattering directions by using materials with different refractive indexes and thus the luminous efficiency can be improved.

Abstract: The semiconductor device has a barrier layer formed on a channel layer, an n type diffusion preventing layer formed on the barrier layer and containing aluminum, and a source electrode and a drain electrode formed on the diffusion preventing layer. The semiconductor device further has a p type cap layer formed on the diffusion preventing layer sandwiched between the source electrode and the drain electrode and a gate electrode formed on the cap layer. The diffusion preventing layer has an aluminum composition ratio greater than the aluminum composition ratio of the barrier layer.

Abstract: A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) intervene

Abstract: A method for producing a Group III nitride semiconductor comprising forming mesas on a main surface of a substrate, and growing Group III nitride semiconductor in a c-axis direction thereof, wherein the plane most parallel to the side surfaces of the mesas or the dents among the low-index planes of growing Group III nitride semiconductor is a m-plane (1-100), and when a projected vector obtained by orthogonally projecting a normal vector of the processed side surface to the main surface is defined as a lateral vector, an angle between the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less.

Abstract: A method for producing hybrid substrates which can be incorporated into a semiconductor production line involves: forming an ion-injection region (3) by injecting ions from the surface of a silicon substrate (1); adhering the ion-injection surface of the silicon substrate and the surface of a sapphire substrate (4) to one another directly or with an insulating film (2) interposed therebetween; and then obtaining a hybrid substrate (8) having a silicon thin-film (semiconductor layer; 6) on the sapphire substrate (4), by detaching the silicon substrate (1) in the ion-injection region (3). This method is characterized in that the adhering to the silicon substrate (1) occurs after the sapphire substrate (4) is heat-treated in advance in a reducing atmosphere.

Abstract: The present invention provides a method for producing a Group III nitride crystal, capable of producing a Group III nitride crystal in a large size with few defects and high quality.

Abstract: A semiconductor light-emitting device includes a substrate having an upper surface and a plurality of bumps positioned on the upper surface in a periodic manner, a first conductive type semiconductor layer positioned on the substrate, a light-emitting structure positioned on the first conductive type semiconductor layer, and a second conductive type semiconductor layer positioned on the light-emitting structure. The first conductive type semiconductor layer includes a plurality of protrusions each facing a portion of the substrate between the bumps, the protrusions are positioned in a ring manner at a peripheral region of the first conductive type semiconductor layer, and the protrusions are spaced apart from the bumps.

Abstract: An article composed of sintered particles is produced by depositing ligand-containing particles on a substrate, then scanning the substrate with an electron beam that generates sufficient surface and subsurface heating to substantially eliminate the ligands and melt or sinter the particles into a cohesive film with superior charge carrier properties. The particles are sintered or melted together to form a polycrystalline layer that is substantially ligand-free to form, for example, a film such as a continuous polycrystalline film. The scanning operation is conducted so as to heat treat a controllably localized region at and below a surface of the particles by selecting a rate of deposited energy at the region to exceed a rate of conduction away from the substrate.

Abstract: One aspect of the present invention is a double sided hybrid crystal structure including a trigonal Sapphire wafer containing a (0001) C-plane and having front and rear sides. The Sapphire wafer is substantially transparent to light in the visible and infrared spectra, and also provides insulation with respect to electromagnetic radio frequency noise. A layer of crystalline Si material having a cubic diamond structure aligned with the cubic <111> direction on the (0001) C-plane and strained as rhombohedron to thereby enable continuous integration of a selected (SiGe) device onto the rear side of the Sapphire wafer. The double sided hybrid crystal structure further includes an integrated III-Nitride crystalline layer on the front side of the Sapphire wafer that enables continuous integration of a selected III-Nitride device on the front side of the Sapphire wafer.

Abstract: Provided is an LED element that ensures horizontal current spreading within an active layer, improving light-emission efficiency, without causing problems due to lattice mismatch in an n-type semiconductor layer adjacent to the active layer. This LED element is obtained by inducing c-axis growth of nitride semiconductor layers on a support substrate, and comprises a first semiconductor layer constituted of an n-type nitride semiconductor, a current-diffusion layer, an active layer constituted of a nitride semiconductor, and a second semiconductor layer constituted of a p-type nitride semiconductor. The current-diffusion has a hetero-structure having a third semiconductor layer constituted of InxGa1-xN (0<x?0.05) and a fourth semiconductor layer constituted of n-Aly1Gay2Iny3N (0<y1<1, 0<y2<1, 0?y3?0.05, y1+y2+y3=1), the third semiconductor layer having a thickness of 10 nm or more and 25 nm or less.

Abstract: A light-emitting device is provided, including: a substrate; a reflective layer disposed on the substrate; a patterned contact layer disposed on the reflective layer; a light-emitting unit disposed on the patterned contact layer; a first electrode disposed on a top surface of the light-emitting unit; and a second electrode disposed on a bottom surface of the light-emitting unit; wherein a projection of the first electrode on the substrate and a projection of the patterned contact layer on the substrate are complementary to each other.

Abstract: Disclosed are ultrathin layers of group II-VI semiconductors, group II-VI semiconductor superlattice structures, photovoltaic devices incorporating the layers and superlattice structures and related methods. The superlattice structures comprise an ultrathin layer of a first group II-VI semiconductor alternating with an ultrathin layer of at least one additional semiconductor, e.g., a second group II-VI semiconductor, or a group IV semiconductor, or a group III-V semiconductor.

Abstract: A method for producing an optoelectronic semiconductor chip comprises the following steps: providing a substrate, depositing a sacrificial layer, depositing a functional semiconductor layer sequence, laterally patterning the functional semiconductor layer sequence, and oxidizing the sacrificial layer in a wet thermal oxidation process.

Abstract: In an aspect, an organic light-emitting display apparatus and a method of manufacturing the same are provided. The organic light-emitting display apparatus may include a substrate; a display unit formed on the substrate; and a thin film encapsulating layer encapsulating the display unit. The thin film encapsulating layer may include a plurality of organic layers and inorganic layers that are laminated alternately. At least one of the plurality of the inorganic films may include a first layer formed of a first material, a second layer formed of a second material other than the first material, and an intermediate layer provided between the first and second layers.

Abstract: Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned distributed Bragg reflector (DBR) on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR and regions between patterns of the DBR.

Abstract: A method of fabricating an active matrix display is disclosed in which one or more oxide thin film transistors is monolithically integrated with an inorganic light emitting diode structure. The method comprises forming an array of inorganic light emitting diodes over a substrate defining a plurality of sub-pixels, depositing an insulating layer over the inorganic LED array, forming conductive vias through the insulating layer, one via for each LED in the LED array, and forming a metal oxide thin film transistor backplane, including an array of pixel driver circuits, over the dielectric layer and conductive vias, wherein one driver circuit electrically controls each sub-pixel through the dielectric layer.

Abstract: Disclosed herein is a light-emitting device including a plurality of first light-emitting elements mounted in a matrix form on a common wiring board. Each of the first light-emitting elements has a single crystal semiconductor multilayer structure and is a semiconductor element in the form of a chip that emits light in a given band of wavelengths. When attention is focused on the plurality of first light-emitting elements that belong in a given area of all the plurality of first light-emitting elements, the orientations of the common crystal axes of the first light-emitting elements adjacent to each other at least in one of the row and column directions differ.

Abstract: An organic electroluminescent element including at least three light-emitting units. The at least three light-emitting units include one or more short-wavelength light-emitting units having a weighted average emission wavelength ?S of 380 or more and less than 550 nm, and two or more long-wavelength light-emitting units having a weighted average emission wavelength ?S of 550 nm or more and 780 nm or less. The two or more long-wavelength light-emitting units are greater in number than the one or more short-wavelength light-emitting units.

Abstract: A semiconductor light emitting device includes a conductive substrate and a first metal layer disposed on the substrate. The first metal layer is formed so as to be electrically connected with the substrate, and the first metal layer includes an Au based material. A joining layer is formed on the first metal layer. The joining layer includes a second metal layer including Au and a third metal layer including Au. A metallic contact layer and an insulating layer are formed on the joining layer. A semiconductor layer is formed on the metallic contact layer and the insulating layer and includes a red-based light emitting layer. An electrode is formed on the semiconductor layer and is made of metal. The insulating layer includes a patterned aperture, and at least a part of the metallic contact layer is formed in the aperture.

Abstract: An ultraviolet light sensor and method of manufacturing thereof are disclosed. The ultraviolet light sensor includes Group-III Nitride layers adjacent to a silicon wafer with one of the layers at least partially exposed such that a surface thereof can receive UV light to be detected. The Group-III Nitride layers include a p-type layer and an n-type layer, with p/n junctions therebetween forming at least one diode. Conductive contacts are arranged to conduct electrical current through the sensor as a function of ultraviolet light received at the outer Group-III Nitride layer. The Group-III Nitride layers may be formed from, e.g., GaN, InGaN, AlGaN, or InAlN. The sensor may include a buffer layer between one of the Group-III Nitride layers and the silicon wafer. By utilizing silicon as the substrate on which the UV sensor diode is formed, a UV sensor can be produced that is small, efficient, cost-effective, and compatible with other semiconductor circuits and processes.

Abstract: A method for producing a plurality of semiconductor components and a semiconductor component is disclosed. In some embodiment, the method includes forming a semiconductor layer sequence, structuring the semiconductor layer sequence by forming trenches thereby structuring semiconductor bodies, applying an auxiliary substrate on the semiconductor layer sequence, so that the semiconductor layer sequence is arranged between the auxiliary substrate and the substrate and removing the substrate from the semiconductor layer sequence.

Abstract: A light emitting diode device has a bulk gallium and nitrogen containing substrate with an active region. The device has a lateral dimension and a thick vertical dimension such that the geometric aspect ratio forms a volumetric diode that delivers a nearly uniform current density across the range of the lateral dimension.

Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

Abstract: An optoelectronic semiconductor chip has a first semiconductor layer sequence which comprises a multiplicity of microdiodes, and a second semiconductor layer sequence which comprises an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

Abstract: Group III nitride substrate having a first side of nonpolar or semipolar plane and a second side has more than one stripe of metal buried, wherein the stripes are perpendicular to group III nitride's c-axis. More than 90% of stacking faults exist over metal stripes. Second side may expose a nonpolar or semipolar plane. Also disclosed is a group III nitride substrate having a first side of nonpolar or semipolar plane and a second side with exposed nonpolar or semipolar plane. The substrate contains bundles of stacking faults with spacing larger than 1 mm. The invention also provides methods of fabricating the group III nitride substrates above.

Abstract: The composition of matter comprising Ga(Sbx)N1?x where x=0.01 to 0.06 is characterized by a band gap between 2.4 and 1.7 eV. A semiconductor device includes a semiconductor layer of that composition. A photoelectric cell includes that semiconductor device.

Abstract: A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, a second electrode and a carbon nanotube structure. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on the substrate. The first semiconductor layer is a stepped structure and has a first surface and a second surface lower than the first surface. The first electrode is located on and electrically connected to the second semiconductor layer. The carbon nanotube structure is located on the second surface of the first semiconductor layer and electrically connected to the first semiconductor layer. The second electrode is located on and electrically connected to the carbon nanotube structure.

Abstract: The present invention provides a nitride semiconductor substrate having an initial nitride and a nitride semiconductor sequentially stacked on one principal plane of a base substrate, wherein the nitride semiconductor substrate comprises recesses depressed from an interface between the base substrate and the initial nitride toward the base substrate along one arbitrary cross section; the recesses each have a diameter of 6 nm or more and 60 nm or less and are formed at a density of 3×108 pieces/cm2 or more and 1×1011 pieces/cm2 or less; and the recess preferably has a depth of 3 nm or more and 45 nm or less from the interface between the base substrate and the initial nitride toward the base substrate.

Abstract: The present disclosure provides a lighting device comprising: a reflective element layer; an optical resin layer formed on the reflective element layer; a transparent electrode film layer formed on the optical resin layer; and a plurality of light-emitting units formed on the lower surface of the transparent electrode film layer. The lighting device allows the fundamental cause of the hot spot phenomenon to be eliminated, shows excellent luminous efficiency by efficiently performing the function of a surface light source, and enables the kinds of raw materials and the number of production processes to be reduced by eliminating the use of a PCB board and selectively applying second reflective patterns.

Abstract: An organic light emitting diode display includes a substrate, a transistor on the substrate, a reflecting electrode connected to the transistor, a color filter on the reflecting electrode, a first electrode on the color filter and electrically connected to the reflecting electrode, a pixel definition layer on the color filter and having an opening exposing the first electrode, a white emission layer in the opening and a second electrode on the white emission layer.

Abstract: An interface including roughness components for improving the propagation of radiation through the interface is provided. The interface includes a first profiled surface of a first layer comprising a set of large roughness components providing a first variation of the first profiled surface having a first characteristic scale and a second profiled surface of a second layer comprising a set of small roughness components providing a second variation of the second profiled surface having a second characteristic scale. The first characteristic scale is approximately an order of magnitude larger than the second characteristic scale. The surfaces can be bonded together using a bonding material, and a filler material also can be present in the interface.

Abstract: An optoelectronic element includes an optoelectronic unit, a first metal layer, a second metal layer, a conductive layer and a transparent structure. The optoelectronic unit has a central line in a top view, a top surface, and a bottom surface. The second metal layer is formed on the top surface, and has an extension portion crossing over the central line and extending to the first metal layer. The conductive layer covers the first metal layer and the extension portion. The transparent structure covers the bottom surface without covering the top surface.

Abstract: A method of manufacturing a semiconductor light-emitting device, comprises the steps of providing a first substrate; providing multiple epitaxial units on the first substrate, wherein the plurality of epitaxial units comprises: multiple first epitaxial units, wherein each of the first epitaxial units has a first geometric shape and a first area; and multiple second epitaxial units, wherein each of the second epitaxial units has a second geometric shape and a second area; providing a second substrate with a surface; transferring the multiple second epitaxial units to the surface of the second substrate; and dividing the first substrate to form multiple first semiconductor light-emitting devices, wherein each of the first semiconductor light-emitting devices has the first epitaxial unit; wherein the first geometric shape is different from the second geometric shape, or the first area is different from the second area.

Abstract: A chip-scale package for an edge-emitting semiconductor device and a semiconductor device assembly including such a chip-scale package are provided. The chip-scale package includes an edge-emitting semiconductor device chip, a top submount disposed on a top surface of the chip, and a bottom submount disposed on a bottom surface of the chip. The top-submount area and the bottom-submount area are each greater than the chip area and less than or equal to about 1.2 times the chip area.

Abstract: Contrary to conventional wisdom, which holds that light-emitting diodes (LEDs) should be cooled to increase efficiency, the LEDs disclosed herein are heated to increase efficiency. Heating an LED operating at low forward bias voltage (e.g., V<kBT/q) can be accomplished by injecting phonons generated by non-radiative recombination back into the LED's semiconductor lattice. This raises the temperature of the LED's active rejection, resulting in thermally assisted injection of holes and carriers into the LED's active region. This phonon recycling or thermo-electric pumping process can be promoted by heating the LED with an external source (e.g., exhaust gases or waste heat from other electrical components). It can also be achieved via internal heat generation, e.g., by thermally insulating the LED's diode structure to prevent (rather than promote) heat dissipation. In other words, trapping heat generated by the LED within the LED increases LED efficiency under certain bias conditions.

Abstract: A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.

Abstract: An LED package includes a substrate, a light-emitting structure provided on the substrate, an electrode structure provided on the light-emitting structure, and an external connection terminal provided on the electrode structure, the external connection terminal comprising a major axis and a minor axis. The major axis of the external connection terminal is perpendicular to a cleaving plane of the substrate.

Abstract: Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the super lattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer.

Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.

Abstract: An LED comprises a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked in that order and located on a surface of the first electrode. The second electrode is electrically connected with the second semiconductor layer. A number of first three-dimensional nano-structures are located on a surface of the second semiconductor layer away from the active layer. The first three-dimensional nano-structures are linear protruding structures, a cross-section of each linear protruding structure is an arc.