Avalanche Photodetection Structure Patents (Class 257/186)
  • Patent number: 11430702
    Abstract: A semiconductor structure and method for manufacturing thereof are provided. The semiconductor structure includes a silicon substrate having a first surface, a III-V layer on the first surface of the silicon substrate and over a first active region, and an isolation region in a portion of the III-V layer extended beyond the first active region. The first active region is in proximal to the first surface. The method includes the following operations. A silicon substrate having a first device region and a second device region is provided, a first active region is defined in the first device region, a III-V layer is formed on the silicon substrate, an isolation region is defined across a material interface in the III-V layer by an implantation operation, and an interconnect penetrating through the isolation region is formed.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: August 30, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Man-Ho Kwan, Fu-Wei Yao, Ru-Yi Su, Chun Lin Tsai, Alexander Kalnitsky
  • Patent number: 11411028
    Abstract: A photoelectric conversion apparatus includes a first diode which is an avalanche multiplication-type and a second diode which is an avalanche multiplication-type formed within a semiconductor substrate, a first transistor forming a first quench element, and a second transistor forming a second quench element. The first transistor and the second transistor are disposed between the first diode and the second diode in a planar view. The first transistor and the second transistor are disposed in a common semiconductor well region formed within the semiconductor substrate.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 9, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoya Sasago, Yukihiro Kuroda
  • Patent number: 11362127
    Abstract: A photodetecting device includes a semiconductor substrate, a plurality of avalanche photodiodes each including a light receiving region disposed at a first principal surface side of the semiconductor substrate, the avalanche photodiodes being arranged two-dimensionally at the semiconductor substrate, and a through-electrode electrically connected to a corresponding light receiving region. The through-electrode is provided in a through-hole penetrating through the semiconductor substrate in an area where the plurality of avalanche photodiodes are arranged two-dimensionally. At the first principal surface side of the semiconductor substrate, a groove surrounding the through-hole is formed between the through-hole and the light receiving region adjacent to the through-hole.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: June 14, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi Ishida, Noburo Hosokawa, Terumasa Nagano, Takashi Baba
  • Patent number: 11355653
    Abstract: The SPAD device comprises a single-photon avalanche diode and a further single-photon avalanche diode having breakdown voltages, the single-photon avalanche diodes being integrated in the same device. The breakdown voltages are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable to induce triggering or to have a dark count rate that is higher than the dark count rate of the further single-photon avalanche diode.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: June 7, 2022
    Assignee: AMS AG
    Inventors: Georg Röhrer, Robert Kappel, Nenad Lilic
  • Patent number: 11322639
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an avalanche photodiode and methods of manufacture. The structure includes: a substrate material having a trench with sidewalls and a bottom composed of the substrate material; a first semiconductor material lining the sidewalls and the bottom of the trench; a photosensitive semiconductor material provided on the first semiconductor material; and a third semiconductor material provided on the photosensitive semiconductor material.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: May 3, 2022
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Mark D. Levy, Siva P. Adusumilli, John J. Ellis-Monaghan, Vibhor Jain, Ramsey Hazbun, Pernell Dongmo, Cameron E. Luce, Steven M. Shank, Rajendran Krishnasamy
  • Patent number: 11289520
    Abstract: There are provided a light detection device and a photoelectric conversion system including the light detection device including an avalanche diode including a first semiconductor region of a first conductivity type disposed at a first depth, a second semiconductor region of a second conductivity type disposed at a second depth deeper than the first depth with respect to the first surface, a third semiconductor region that is disposed at a third depth deeper than the second depth with respect to the first surface and is in contact with the second semiconductor region, and first and second separation regions each extending from the first depth to the third depth. The second semiconductor region and the third semiconductor region each extend from the first separation region to the second separation region. The first semiconductor region, the second semiconductor region, and the third semiconductor region have portions overlapping one another in planar view.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: March 29, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Junji Iwata
  • Patent number: 11271130
    Abstract: A linear mode avalanche photodiode senses light and outputs electrical current by being configured to, generate a gain equal to or greater than 1000 times amplification while generating an excess noise factor of less than 3 times a thermal noise present at or above a non-cryogenic temperature due to the gain from the amplification. The linear mode avalanche photodiode detects one or more photons in the light by using a superlattice structure that is matched to suppress impact ionization for a first carrier in the linear mode avalanche photodiode while at least one of 1) increasing impact ionization, 2) substantially maintaining impact ionization, and 3) suppressing impact ionization to a lesser degree for a second carrier. The first carrier having its impact ionization suppressed is either i) an electron or ii) a hole; and then, the second carrier is the electron or the hole.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: March 8, 2022
    Assignee: SRI International
    Inventor: Winston K. Chan
  • Patent number: 11196948
    Abstract: A photo-detection device in one embodiment includes: a first semiconductor region that accumulates a signal charge based on an incident light; a second semiconductor region that is capable of accumulating a signal charge, the number of signal charges that can be accumulated in the second semiconductor region being less than the number of signal charges that can be accumulated in the first semiconductor region; a first gate that transfers the signal charge from the first semiconductor region to the second semiconductor region; and a charge multiplication unit that includes a third semiconductor region and avalanche-multiplies the signal charge transferred from the second semiconductor region to the third semiconductor region.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: December 7, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hajime Ikeda
  • Patent number: 11105974
    Abstract: A waveguide-coupled Silicon Germanium (SiGe) photodetector. A p-n silicon junction is formed in a silicon substrate by an n-doped silicon region and a p-doped silicon region, a polysilicon rib is formed on the silicon substrate to provide a waveguide core for an optical mode of radiation, and an SiGe pocket is formed in the silicon substrate along a length of the polysilicon rib and contiguous with the p-n silicon junction. An optical mode of radiation, when present, substantially overlaps with the SiGe pocket so as to generate photocarriers in the SiGe pocket. An electric field arising from the p-n silicon junction significantly facilitates a flow of the generated photocarriers through the SiGe pocket. In one example, such photodetectors have been fabricated using a standard CMOS semiconductor process technology without requiring changes to the process flow (i.e., “zero-change CMOS”).
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: August 31, 2021
    Assignee: Massachusetts Institute of Technology
    Inventors: Luca Alloatti, Rajeev Jagga Ram
  • Patent number: 11101399
    Abstract: A single-photon detector is provided. The detector has multiple avalanche layers. It has an avalanche photodiode (APD) structure using single photon. The APD is made of indium aluminum arsenide (InAlAs). At least two avalanche layers are designed. When the layer for avalanche is numbered only one and the gain is very big, the speed will be deteriorated very quickly. With the design of two avalanche layers in the present invention for the very big gain, the speed deterioration can be suppressed. After measuring, the present invention shows a faster speed as compared to prior arts. It proves that, by using more than two avalanche layers, the present invention effectively improves the feature of single-photon detector. Hence, the present invention is especially suitable for single-photon detection.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: August 24, 2021
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Yi-Shan Lee
  • Patent number: 10923614
    Abstract: A photodiode that multiplies a charge generated by photoelectric conversion in an avalanche region includes: a p? type semiconductor layer having interfaces; an n+ type semiconductor region located inside the p? type semiconductor layer and in contact with the interface; an n+ type semiconductor region located inside the p? type semiconductor layer and connected to the n+ type semiconductor region; and a p type semiconductor region located between the n+ type semiconductor region and the interface, wherein the n+ type semiconductor region, the n+ type semiconductor region, and the p type semiconductor region each have a higher impurity concentration than the p? type semiconductor layer, the avalanche region is a region between the n+ type semiconductor region and the p type semiconductor region inside the p? type semiconductor layer, and the n+ type semiconductor region has a smaller area than the n+ type semiconductor region in planar view.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: February 16, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yusuke Sakata, Manabu Usuda, Mitsuyoshi Mori, Yutaka Hirose, Yoshihisa Kato
  • Patent number: 10854768
    Abstract: A three-terminal avalanche photodiode provides a first controllable voltage drop across a light absorbing region and a second, independently controllable, voltage drop across a photocurrent amplifying region. The absorbing region may also have a different composition from the amplifying region, allowing further independent optimization of the two functional regions. An insulating layer blocks leakage paths, redirecting photocurrent toward the region(s) of highest avalanche gain. The resulting high-gain, low-bias avalanche photodiodes may be fabricated in integrated optical circuits using commercial CMOS processes, operated by power supplies common to mature computer architecture, and used for optical interconnects, light sensing, and other applications.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: December 1, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Xiaoge Zeng, Zhihong Huang, Di Liang
  • Patent number: 10631632
    Abstract: A method and system of selecting information from video sources to be displayed on at least a subset of a plurality of display screen presentation spaces, the method comprising the steps of providing at least first and second independent selectable control interfaces, each interface including a separately selectable control uniquely associated with each of the display screen presentation spaces, uniquely associating first and second video sources with the first and second control interfaces, for each control interface, receiving an indication each time one of the selectable controls is selected and, upon receiving an indication, providing the video source associated with the control interface used to make the selection to the display screen presentation space associated with the selected selectable control.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: April 28, 2020
    Assignee: STEELCASE INC.
    Inventor: Lewis Epstein
  • Patent number: 10553742
    Abstract: A substrate has a front surface and a back surface opposite from the front surface. An n-type layer, a multiplication layer, a p-type electric field control layer, a light absorption layer, and a window layer are layered in order on the front surface. A p-type region is provided in part of the window layer. An anode electrode is provided on the p-type region and connected to the p-type region. An anode pad and a cathode pad are provided on the back surface. First and second connecting holes penetrates the substrate. A third connecting hole penetrates from the window layer to the n-type layer. The cathode pad is electrically connected to the n-type layer via the first connecting hole. The anode pad is electrically connected to the anode electrode via the second and third connecting holes. A light-receiving region is provided on the back surface.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: February 4, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ryota Takemura, Nobuo Ohata, Yoshifumi Sasahata, Kazuki Yamaji
  • Patent number: 10481327
    Abstract: One example includes a photodetector system. The system includes a waveguide photodetector into which an input optical signal comprising a frequency band of interest is provided and from which the input optical signal is absorbed to generate an output signal that is indicative of an intensity of the input optical signal. The system also includes a reflector coupled to the waveguide photodetector and which is to reject frequencies outside of the frequency band of interest and to reflect the frequency band of interest back into the waveguide photodetector.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: November 19, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Di Liang, Zhihong Huang, Geza Kurczveil
  • Patent number: 10461202
    Abstract: Resonant-cavity infrared photodetector (RCID) devices that include a thin absorber layer contained entirely within the resonant cavity. In some embodiments, the absorber is a single type-II InAs—GaSb interface situated between an AlSb/InAs superlattice n-type region and a p-type AlSb/GaSb region. In other embodiments, the absorber region comprises quantum wells formed on an upper surface of the n-type region. In other embodiments, the absorber region comprises a “W”-structured quantum well situated between two barrier layers, the “W”-structured quantum well comprising a hole quantum well sandwiched between two electron quantum wells. In other embodiments, the RCID includes a thin absorber region and an nBn or pBp active core within a resonant cavity. In some embodiments, the RCID is configured to absorb incident light propagating in the direction of the epitaxial growth of the RCID structure, while in other embodiments, it absorbs light propagating in the epitaxial plane of the structure.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: October 29, 2019
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Jerry R. Meyer, Igor Vurgaftman, Chadwick Lawrence Canedy, William W. Bewley, Chul Soo Kim, Charles D. Merritt, Michael V. Warren, Mijin Kim
  • Patent number: 10446700
    Abstract: Microstructure enhanced photodiodes and avalanche photodiodes are monolithically integrated with CMOS/BiCMOS circuitry such as transimpedance amplifiers. Microstructures, such as holes, can improve quantum efficiency in silicon and III-V materials and can also reduce avalanche voltages for avalanche photodiodes. Applications include optical communications within and between datacenters, telecommunications, LIDAR, and free space data communication.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 15, 2019
    Assignee: W&Wsens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang, M. Saif Islam
  • Patent number: 10431720
    Abstract: A light emitting device includes: a light emitting element including: a semiconductor structure including an n-type semiconductor layer, an active layer, and a p-type semiconductor layer, each containing a nitride semiconductor, a p-electrode disposed on a portion of a surface of the p-type semiconductor layer on a side opposite to a surface provided with the active layer, and an n-electrode disposed on a surface of the n-type semiconductor layer on a side opposite to a surface provided with the active layer in a region other than a region facing the p-electrode; and a protective film continuously covering a surface of the n-electrode and a surface of the n-type semiconductor layer. The protective film includes a first metal oxide film and a second metal oxide film that are alternately layered, the first metal oxide film containing a first metal, and the second metal oxide film containing a second metal.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: October 1, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Takaaki Tada, Takayoshi Wakaki
  • Patent number: 10367111
    Abstract: An avalanche photodiode (APD) array with reduced cross talk comprises, in the illustrative embodiment, a 2D array of Geiger-mode APDs, wherein a via is formed partially through the backside (substrate) of each APD in the array, wherein the via is offset from the active region of each said APD.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: July 30, 2019
    Assignee: ARGO AI, LLC
    Inventors: Brian Piccione, Mark Allen Itzler
  • Patent number: 10297705
    Abstract: To obtain high linearity without sacrificing light-receiving sensitivity and a high speed, an avalanche photodiode includes an avalanche layer (103) formed on a first light absorption layer (102), an n-field control layer (104) formed on the avalanche layer (103), and a second light absorption layer (105) formed on the field control layer (104). If a reverse bias voltage is applied, a donor impurity in the field control layer (104) ionizes, and a high electric field is induced in the avalanche layer (103). The n-type doping amount in the field control layer (104) is set such that the impurity concentration in the second light absorption layer (105) sufficiently depletes at the time of reverse bias application.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: May 21, 2019
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Masahiro Nada, Yoshifumi Muramoto, Fumito Nakajima, Hideaki Matsuzaki
  • Patent number: 10224361
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: March 5, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 10192923
    Abstract: A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second contact electrode 4A is arranged at a position overlapping a first contact electrode 3A, so as to contact the first contact electrode. Further, a resistive layer 4B is continued to the second contact electrode 4A.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: January 29, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Patent number: 10134936
    Abstract: An avalanche photodiode (APD) array with reduced cross talk comprises, in the illustrative embodiment, a 2D array of Geiger-mode APDs, wherein a via is formed through the backside (substrate) of each APD in the array.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: November 20, 2018
    Assignee: ARGO AI, LLC
    Inventors: Brian Piccione, Mark Allen Itzler
  • Patent number: 10128303
    Abstract: A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: November 13, 2018
    Assignee: Artilux Inc.
    Inventors: Szu-Lin Cheng, Han-Din Liu, Shu-Lu Chen
  • Patent number: 10128397
    Abstract: A system, method, and apparatus for an avalanche photodiode with an enhanced multiplier layer are disclosed herein. In particular, the present disclosure teaches an avalanche photodiode having a multiplier with alternating layers of one or more quantum wells and one or more spacers. A method of making the avalanche photodiode includes growing the multiplier on a substrate.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: November 13, 2018
    Assignee: THE BOEING COMPANY
    Inventors: Xiaogang Bai, Ping Yuan, Rengarajan Sudharsanan
  • Patent number: 10109754
    Abstract: Disclosed is at least one embodiment of an infrared (IR) photovoltaic (PV) detector, comprising a IV-VI Lead (Pb)-salt layer disposed on a substrate and a charge-separation-junction (CSJ) structure associated with the IV-VI Pb-salt layer, wherein the CSJ structure comprises a plurality of element areas disposed upon or within the IV-VI Pb-salt layer, wherein the plurality of element areas are spaced apart from each other. Each element area may be connected to a first Ohmic contact thereby forming a plurality of interconnected first Ohmic contacts, and a second Ohmic contact may be disposed upon a portion of the IV-VI Pb-salt layer. In another non-limiting embodiment, a PV detector, comprising a heterojunction region that comprises at least one IV-VI Pb-salt material layer coupled to at least one non-Pb-salt layer, wherein the at least one IV-VI Pb-salt layer and the at least one non-Pb-salt layer form a p-n junction or Schottky junction with a type II band gap alignment.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: October 23, 2018
    Assignee: The Board of Regents of the University of Oklahoma
    Inventor: Zhisheng Shi
  • Patent number: 10050069
    Abstract: A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected being incident to the photodetector channels. The array comprises: a p?-type semiconductor layer on the n-type semiconductor layer of the substrate; resistors is provided to each of the photodetector channels and is connected to a signal conductor at one end thereof; and an n-type separating part between the plurality of photodetector channels. The p?-type semiconductor layer forms a pn junction at the interface between the substrate, and comprises a plurality of multiplication regions for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: August 14, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuhisa Yamamura, Kenichi Sato
  • Patent number: 10043936
    Abstract: The present disclosure relates to an avalanche photodiode comprising a substrate having an active area. A first dopant implant in the active area forms one of an anode and the cathode of the avalanche photodiode. A second dopant implant in the active area forming the other one of the anode and the cathode of the avalanche photodiode, wherein at least one of the first and second dopant implants defines a discontinuous formation having at least one interruption.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: August 7, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kevin Michael O'Neill, John Carlton Jackson, Liam Wall
  • Patent number: 9992477
    Abstract: An optical system for collecting distance information within a field is provided. The optical system may include lenses for collecting photons from a field and may include lenses for distributing photons to a field. The optical system may include lenses that collimate photons passed by an aperture, optical filters that reject normally incident light outside of the operating wavelength, and pixels that detect incident photons. The optical system may further include illumination sources that output photons at an operating wavelength.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: June 5, 2018
    Assignee: Ouster, Inc.
    Inventors: Angus Pacala, Mark Frichtl
  • Patent number: 9984917
    Abstract: A method for manufacturing a semiconductor device in accordance with various embodiments may include: forming an opening in a first region of a semiconductor substrate, the opening having at least one sidewall and a bottom; implanting dopant atoms into the at least one sidewall and the bottom of the opening; configuring at least a portion of a second region of the semiconductor substrate laterally adjacent to the first region as at least one of an amorphous or polycrystalline region; and forming an interconnect over at least one of the first and second regions of the semiconductor substrate.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: May 29, 2018
    Assignee: Infineon Technologies AG
    Inventors: Christian Kuehn, Martin Bartels, Henning Feick, Dirk Offenberg, Anton Steltenpohl, Hans Taddiken, Ines Uhlig
  • Patent number: 9847441
    Abstract: An epitaxial grown avalanche photodiode (APD), the avalanche photodiode comprising an anode, a cathode, an absorber, and a doped multiplier. The absorber and the doped multiplier are about between the cathode and the anode. The doped multiplier has a multiplier dopant concentration. The doped multiplier substantially depleted during operation of the epitaxial grown photodiode. The doped multiplier may comprise of a plurality of multiplication regions, each of the multiplication regions substantially depleted during operation of the avalanche photodiode.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: December 19, 2017
    Assignee: Voxtel, Inc.
    Inventor: Andrew Huntington
  • Patent number: 9818893
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as holes, effectively increase the absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more. Their thickness dimensions allow them to be conveniently integrated on the same Si chip with CMOS, BiCMOS, and other electronics, with resulting packaging benefits and reduced capacitance and thus higher speeds.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: November 14, 2017
    Assignee: W&WSENS DEVICES, INC.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Patent number: 9812608
    Abstract: A deep UV LED chip includes a light-emitting unit, an electrode unit, an electron blocking layer, and an optical layer. The electron blocking layer is disposed between a multiple quantum well layer and a p-type aluminum gallium nitride layer of the light-emitting unit. The optical layer is formed on the light-emitting unit and has a refractive index ranging from 1.0 to 2.3. Another deep UV LED chip further includes a light-transmitting substrate. The optical layer is formed on the light-transmitting substrate and has a refractive index ranging from 1.0 to a refractive index of the light-transmitting substrate. A package structure containing the deep UV LED chip is also disclosed.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: November 7, 2017
    Assignees: Lite-On Opto Technology (Changzhou) Co., Ltd., Lite-On Technology Corp.
    Inventors: Kuo-Ming Chiu, Meng-Sung Chou, Hao-Chung Kuo, Che-Yu Liu
  • Patent number: 9806112
    Abstract: The present application provides an electrostatic discharge guard structure for photonic platform based photodiode systems. In particular this application provides a photodiode assembly comprising: a photodiode (such as a Si or SiGe photodiode); a waveguide (such as a silicon waveguide); and a guard structure, wherein the guard structure comprises a diode, extends about all or substantially all of the periphery of the Si or SiGe photodiode and allows propagation of light from the silicon waveguide into the Si or SiGe photodiode.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: October 31, 2017
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Dritan Celo, Dominic John Goodwill, Eric Bernier
  • Patent number: 9748430
    Abstract: A staircase avalanche photodiode with a staircase multiplication region composed of an AlInAsSb alloy. The photodiode includes a buffer layer adjacent to a substrate and an avalanche multiplication region adjacent to the buffer layer, where the avalanche multiplication region includes a graded AlInAsSb alloy grown lattice-matched or psuedomorphically strained on either InAs or GaSb. The photodiode further includes a photoabsorption layer adjacent to the avalanche multiplication region, where the photoabsorption layer is utilized for absorbing photons. By utilizing AlInAsSb in the multiplication region, the photodiode exhibits a direct bandgap over a wide range of compositions as well as exhibits large conduction band offsets much larger than the smallest achievable bandgap and small valance band offsets. Furthermore, the photodiode is able to detect extremely weak light with a high signal-to-noise ratio.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: August 29, 2017
    Assignees: Board of Regents, The University of Texas System, University of Virginia Patent Foundation
    Inventors: Seth Bank, Scott Maddox, Wenlu Sun, Joe Campbell
  • Patent number: 9691934
    Abstract: The present invention is a photodiode or photodiode array having improved ruggedness for a shallow junction photodiode which is typically used in the detection of short wavelengths of light. In one embodiment, the photodiode has a relatively deep, lightly-doped P zone underneath a P+ layer. By moving the shallow junction to a deeper junction in a range of 2-5 ?m below the photodiode surface, the improved device has improved ruggedness, is less prone to degradation, and has an improved linear current.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: June 27, 2017
    Assignee: OSI Optoelectronics, Inc.
    Inventor: Peter Steven Bui
  • Patent number: 9640676
    Abstract: A method for manufacturing solar cells is disclosed. The method includes forming an insulating material in a printable suspension along the at least one side edge of a solar cell, the insulating material in a printable suspension further adapted to form a protective film which reduces cracking near at least one side edge of the solar cell and improve structural integrity against mechanical stress. The protective film has an elastic modulus of at least 3 GPa, an elongation break point of at least 13 percent and a glass transition temperature of at least 250 degrees Celsius which provides additional structural support along the side edges, increasing the overall structural integrity, providing electrical insulation along the edges and improve the flexure strength of the solar cell.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: May 2, 2017
    Assignee: SunPower Corporation
    Inventor: Charles Norman Stone
  • Patent number: 9640948
    Abstract: One embodiment is a wide stripe semiconductor waveguide, which is cleaved at a Talbot length thereof, the wide stripe semiconductor waveguide having facets with mirror coatings. A system provides for selective pumping the wide stripe semiconductor waveguide to create and support a Talbot mode. In embodiments according to the present method and apparatus the gain is patterned so that a single unique pattern actually has the highest gain and hence it is the distribution that oscillates.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: May 2, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Robert R. Rice, Elizabeth T. Kunkee
  • Patent number: 9584744
    Abstract: An image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode, a storage diode, and associated circuitry formed in a semiconductor substrate. Buried light shields may be formed on the substrate to prevent regions between two adjacent photodiodes from being exposed to incoming light. In one embodiment, a shallow trench isolation (STI) structure may be formed between the photodiode and the storage diode, and a conductive layer formed from optically absorptive material may be constructed at the bottom of the STI structure. A via may be formed through the STI structure to help bias the conductive layer using a ground or negative voltage. In another embodiment, an isolation ring structure may be formed at the base of the buried light shields. The isolation ring structure may be formed from optically absorptive material and can optionally be biased using a ground or negative voltage.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: February 28, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Victor Lenchenkov, Hamid Soleimani
  • Patent number: 9577007
    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: February 21, 2017
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, Bradley Steven Oraw
  • Patent number: 9559257
    Abstract: A light emitting device may include a first conductive type semiconductor layer, an active layer including a quantum well and a quantum wall on the first conductive type semiconductor layer, an undoped last barrier layer on the active layer; an AlxInyGa(1-x-y)N (0?x?1, 0?y?1)-based layer on the undoped last barrier layer; and a second conductive type semiconductor layer on the AlxInyGa(1-x-y)N-based layer. The undoped last barrier layer may be provided between the AlxInyGa(1-x-y)N (0?x?1, 0?y?1)-based layer and a last quantum well which is closest to the second conductive type semiconductor layer among the quantum well and may include a first Inp1Ga1-p1N (0<p1<1) layer, an Alq1Inq2Ga1-q1-q2N (0<q1, q2<1) layer on the first Inp1Ga1-p1N layer, and a second Inp2Ga1-p2N (0<p2<1) layer on the Alq1Inq2Ga1-q1-q2N layer.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: January 31, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Yong Tae Moon, Hyun Chul Lim
  • Patent number: 9553216
    Abstract: A method of operating an avalanche photodiode includes providing an avalanche photodiode having a multiplication region capable of amplifying an electric current when subject to an electric field. The multiplication region, in operation, has a first ionization rate for electrons and a second, different, ionization rate for holes. The method also includes applying the electric field to the multiplication region, receiving a current output from the multiplication region, and varying the electric field in time, whereby a portion of the current output is suppressed.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: January 24, 2017
    Assignee: Voxtel, Inc.
    Inventors: George Williams, Andrew S. Huntington
  • Patent number: 9553224
    Abstract: A semiconductor photodetector element includes a semiconductor substrate having a first conductivity type; a columnar structure formed on a first surface of the semiconductor substrate, the columnar structure being composed of a semiconductor of the first conductivity type; a light absorption layer formed so as to surround the columnar structure; and a semiconductor layer formed so as to surround the light absorption layer.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: January 24, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kenichi Kawaguchi, Nami Yasuoka, Hiroyasu Yamashita, Yoshiaki Nakata
  • Patent number: 9525084
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as holes, effectively increase the absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more. Their thickness dimensions allow them to be conveniently integrated on the same Si chip with CMOS, BiCMOS, and other electronics, with resulting packaging benefits and reduced capacitance and thus higher speeds.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: December 20, 2016
    Assignee: W&Wsens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Patent number: 9482578
    Abstract: A method for detecting photons includes subjecting a photodiode formed in a semi-conductive material, to a bias voltage such that an avalanche phenomenon can appear when a photon enters the photodiode in an avalanche layer extending into the semi-conductive material down to minimum and maximum depths so that it can be reached by photons having a wavelength between minimum and maximum wavelengths. The method also includes comparing the amplitude of a signal supplied by the photodiode with two threshold values, and deducing that the photodiode received a photon having a wavelength between two threshold wavelengths ranging between the minimum and maximum wavelengths, if the amplitude of the signal is between the two threshold values.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: November 1, 2016
    Assignee: Universite d'Aix-Marseille
    Inventor: Jean-Luc Gach
  • Patent number: 9324759
    Abstract: An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode and a second photodiode. The first photodiode include a first doped region, a first lightly doped region, and a first highly doped region disposed between the first doped region and the first lightly doped region. The second photodiode has a second full well capacity substantially equal to a first full well capacity of the first photodiode. The second photodiode includes a second doped region, a second lightly doped region, and a second highly doped region disposed between the second doped region and the second lightly doped region. The first photodiode can be used to for measuring low light and the second photodiode can be used for measuring bright light.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: April 26, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventors: Jeong-Ho Lyu, Sohei Manabe
  • Patent number: 9276162
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector comprises a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: March 1, 2016
    Assignees: FUJITSU LIMITED, SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Patent number: 9257588
    Abstract: The invention is directed to an avalanche photodiode containing a substrate and semiconductor layers with various electro-physical properties having common interfaces both between themselves and with the substrate. The avalanche photodiode may be characterized by the presence in the device of at least one matrix consisting of separate solid-state areas with enhanced conductivity surrounded by semiconductor material with the same type of conductivity. The solid-state areas are located between two additional semiconductor layers, which have higher conductivity in comparison to the semiconductor layers with which they have common interfaces. The solid-state areas are generally made of the same material as the semiconductor layers surrounding them but with conductivity type that is opposite with respect to them. The solid-state areas may be made of a semiconductor with a narrow forbidden zone with respect to the semiconductor layers with which they have common interfaces.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: February 9, 2016
    Assignee: Zecotek Imaging Systems Singapore Pte Ltd.
    Inventors: Ziraddin Yegub-Ogly Sadygov, Abdelmounaime Faouzi Zerrouk
  • Patent number: 9166091
    Abstract: A PIN structure semiconductor optical receiver includes first and second electrical contact layers and an intrinsic layer disposed between them. The intrinsic layer includes a stud having a stud axis and a stud cross-section. The first and second contact layers have dimensions in a plane perpendicular to the stud axis that are greater than the stud's cross-section. These layers are also elongated and have longitudinal axes offset angularly relative to each other to minimize facing areas of said electrical contact layers.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: October 20, 2015
    Assignee: COMMISSARIAT A L'ÉNERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Christophe Kopp, Jean-Marc Fedeli, Sylvie Menezo
  • Patent number: 9153726
    Abstract: A photodetector detects the absence or presence of light by detecting a change in the inductance of a coil. The magnetic field generated when a current flows through the coil passes through an electron-hole generation region. Charged particles in the electron-hole generation region come under the influence of the magnetic field, and generate eddy currents whose magnitudes depend on whether light is absent or present. The eddy currents generate a magnetic field that opposes the magnetic field generated by current flowing through the coil.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: October 6, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ann Gabrys, Peter Hopper, William French