Abstract: CMOS image sensor pixel sensor cells, methods for fabricating the pixel sensor cells and design structures for fabricating the pixel sensor cells are designed to allow for back side illumination in global shutter mode by providing light shielding from back side illumination of at least one transistor within the pixel sensor cells. In a first particular generalized embodiment, a light shielding layer is located and formed interposed between a first semiconductor layer that includes a photoactive region and a second semiconductor layer that includes the at least a second transistor, or a floating diffusion, that is shielded by the light blocking layer.

Abstract: The images sensor includes a readout circuit capacitatively coupled to a memory circuit. The readout circuit includes: (i) a photon detector to receive a plurality of photons and to provide a charge signal corresponding to the received photons, (ii) a resettable integrator that is reset multiple times over a single exposure time and provides an analog representation of the incident photons during the last integration cycle, and (iii) a comparator that monitors the integrator output and generates a reset pulse when the integrator reaches a built-in threshold value. The memory circuit includes: (i) a receiver circuit that detects the output of the digital driver in the front-end readout circuit via capacitive coupling and generates a digital voltage pulse for each received signal, and (ii) a digital counting memory to count the received pulses to provide a coarse digital representation of how many times the integrator is reset.

Abstract: A backside illumination semiconductor image sensor, wherein each photodetection cell includes a semiconductor body of a first conductivity type of a first doping level delimited by an insulation wall, electron-hole pairs being capable in said body after a backside illumination; on the front surface side of said body, a ring-shaped well of the second conductivity type, this well delimiting a substantially central region having its upper portion of the first conductivity type of a second doping level greater than the first doping level; and means for controlling the transfer of charge carriers from said body to said upper portion.

Abstract: A solid-state image pick-up device and a method of reading out a pixel signal thereof are provided, and the solid-state image pick-up device provides a large dynamic range without an increase in the area of a pixel. Plural pixels are arranged therein.

Abstract: A semiconductor substrate includes: a first semiconductor layer; an oxide layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the oxide layer; a first recess that is formed in the second semiconductor layer with extending from an upper face of the second semiconductor layer toward the first semiconductor layer, the first recess being formed at a position where an alignment mark for determining a forming position of an element which is to be built in the semiconductor substrate is to be formed; and an etching prevention layer that is inwardly formed from a position of an upper face of the first semiconductor layer, the position corresponding to the recess, the layer comprising a material that is prevented from being etched during etching of the first semiconductor layer.

Abstract: A backside imaging device includes a bump that is disposed overlapping with a sensor array region or a photodiode in a planar view. By this configuration, the bump becomes a support, and the semiconductor substrate is prevented from being damaged because of a bending applied to the semiconductor substrate.

Abstract: A vertical-type CMOS image sensor and a fabricating method thereof by which capacitance between an upper line and a dark shield layer can be effectively reduced. The vertical-type CMOS image sensor can include an inter-metal dielectric layer having a plurality of metal lines formed over a semiconductor substrate; a passivation oxide layer formed over the inter-metal dielectric layer, wherein the uppermost surface of the passivation oxide layer includes an inclined portion between a lower portion and an upper portion corresponding to a portion of the inter-metal dielectric layer having a plurality of the metal lines; a dark shield layer formed over the upper portion of the passivation oxide layer; and a nitride layer formed over the semiconductor substrate including the dark shield layer.

Abstract: Optical components are flip chip mounted onto a substrate for improved alignment. Each device is fabricated using “build-up” layers above a substrate. Each has an optical confinement region in which optical radiation travels in use, and a bonding surface. The overall depth of the layers above the optical confinement region is closely controlled during fabrication, for instance by the use a “spacer” layer, so that when the devices are subsequently flip chip mounted adjacent one another on a shared substrate by means of their bonding surfaces, they can be passively positioned so that their optical confinement regions abut and optical radiation can be coupled from one to the next in use.

Abstract: A single plate system color solid-state image pick-up device of a microlens loading type, the device comprising: a semiconductor substrate; a plurality of light receiving portions formed in a two-dimensional array in a surface portion of the semiconductor substrate; color filters each of which is for any of red, green and blue colors; and microlenses, wherein each of the color filters and each of the microlenses are laminated above on each of the light receiving portions, wherein first ones of the microlenses, corresponding to ones of the light receiving portions on which ones for the red color of the color filters are laminated, have smaller light receiving areas than those of second ones of the microlenses, corresponding to ones of the light receiving portions on which ones for the green color of the color filters are laminated.

Abstract: A wafer for backside illumination type solid imaging device has a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor at its front surface side and a light receiving surface at its back surface side, wherein said wafer is a SOI wafer obtained by forming a given active layer on a support substrate made of C-containing p-type semiconductor material through an insulating layer.

Abstract: A structure for implementation of back-illuminated CMOS or CCD imagers. An epitaxial silicon layer is connected with a passivation layer, acting as a junction anode. The epitaxial silicon layer converts light passing through the passivation layer and collected by the imaging structure to photoelectrons. A semiconductor well is also provided, located opposite the passivation layer with respect to the epitaxial silicon layer, acting as a junction cathode. Prior to detection, light does not pass through a dielectric separating interconnection metal layers.

Abstract: A wafer for backside illumination type solid imaging device has a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor at its front surface side and a light receiving surface at its back surface side, wherein said wafer is a SOI wafer obtained by forming a given active layer on a support substrate made of C-containing n-type or p-type semiconductor material through an insulating layer.

Abstract: Semiconductor detector includes semiconductor substrate (HK), source region (S), drain region (D), external gate region (G) and inner gate region (IG) for collecting free charge carriers generated in semiconductor substrate, wherein inner gate region is arranged in semiconductor substrate at least partially under external gate region to control conduction channel (K) from below as a function of the accumulated charge carriers, as well as with clear contact (CL) for the removal of the accumulated charge carriers from inner gate region, as well as with drain-clear region (DCG) that can be selectively controlled as an auxiliary clear contact or as a drain. Barrier contact (B) is arranged in a lateral direction between external gate region and drain-clear region to build up a controllable potential barrier between inner gate region and clear contact that prevents the charge carriers accumulated in inner gate region from being removed by suction from clear contact.

Abstract: A semiconductor substrate includes: a first semiconductor layer; an oxide layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the oxide layer; a first recess that is formed in the second semiconductor layer with extending from an upper face of the second semiconductor layer toward the first semiconductor layer, the first recess being formed at a position where an alignment mark for determining a forming position of an element which is to be built in the semiconductor substrate is to be formed; and an etching prevention layer that is inwardly formed from a position of an upper face of the first semiconductor layer, the position corresponding to the recess, the layer comprising a material that is prevented from being etched during etching of the first semiconductor layer.

Abstract: A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the halo implanted region, for obtaining a good junction profile and improving short channel effect. The implant comprises carbon, a hydrocarbon, or a derivative of the hydrocarbon, such as one selected from a group consisting of CO, CO2, CxHy+, and (CxHy)n+, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of to 1000.

Abstract: A back irradiating type solid state imaging device comprises: a first semiconductor substrate; a plurality of photoelectric converting devices that receives a light incident from a back side of the first semiconductor substrate and are formed in a two-dimensional array on a surface side of the first semiconductor substrate; a CCD type signal reading section that are formed on the surface side of the first semiconductor substrate and reads detection signals of the photoelectric converting devices; and a MOS type signal reading section that are formed on the surface side of the first semiconductor substrate and reads detection signals of the photoelectric converting devices.

Abstract: A structure and method for fabricating imagers that detect light from the backside of the wafer. The structure may have less complex focusing, reduced crosstalk, tighter pixel packing density, increased quantum efficiency, and wafer-level packaging. The fabrication of the imager includes forming an imaging device on a silicon wafer, adhering an interconnect wafer to the device wafer, forming interconnects on the interconnect wafer, etching away the substrate of the device wafer, and patterning additional layers such as nitrides, color filter arrays, and lenses on the backside of the device wafer.

Abstract: An array substrate for a display device includes an insulating substrate, a buffer layer which is disposed on the insulating substrate and is formed of silicon oxide with a refractive index equal to a refractive index of the insulating substrate, a first insulation layer which is disposed on the buffer layer and formed of silicon nitride, a second insulation layer which is disposed on the first insulation layer and formed of silicon oxide, a switching element including a semiconductor layer disposed on the second insulation layer, and a pixel electrode connected to the switching element.

Abstract: Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least one set of imaging elements is fabricated on an upper surface of a semiconductor substrate, and a base is affixed to a lower surface of the semiconductor substrate to generate substantially negligible mechanical stress between the semiconductor substrate and the base.

Abstract: An anti-blooming structure for a back-illuminated imager is disclosed. In one embodiment, the anti-blooming structure is formed in a substrate of a first conductivity type having a back side and a front side, comprising a channel region of a second conductivity type formed in the substrate; a barrier region of the first conductivity type positioned in the substrate substantially overlying the channel region and proximal to the front side of the substrate; and a drain region of the second conductivity type positioned substantially overlying the barrier region, wherein when light impinges on the back side of the substrate the light generates charge carriers that collect in the channel region, the charge carriers passing through the barrier region into the drain region when a potential corresponding to the collected charge carriers in the channel region is about equal to the potential corresponding to the barrier region.

Abstract: An image sensor including a substrate of a semiconductor material having first and second opposite surfaces; at least one photodiode formed in the substrate on the first surface side and intended to be lit through the second surface; a stacking of insulating layers covering the first surface; and conductive regions formed at the stacking level. The sensor further includes a transparent insulating layer at least partly covering the second surface; a transparent conductive layer at least partly covering the transparent insulating layer; and circuitry for biasing the conductive layer.

Abstract: A method and apparatus for improving the latchup tolerance of circuits embedded in an integrated circuit while avoiding the introduction of noise from such tolerance into the power rails.

Abstract: A backside illuminated sensor includes a semiconductor substrate having a front surface and a back surface and a plurality of pixels formed on the front surface of the semiconductor substrate. A dielectric layer is disposed above the front surface of the semiconductor substrate. The sensor further includes a plurality of array regions arranged according to the plurality of pixels. At least two of the array regions have a different radiation response characteristic from each other, such as the first array region having a greater junction depth than the second array region, or the first array region having a greater dopant concentration than the second array region.

Abstract: The present invention discloses the semiconductor device having the substrate that reflects the laser beam on a surface; that absorbs the laser beam therein; or that partially reflects the laser beam on the surface and partially absorbs the laser beam in the laser annealing. Moreover, the substrate has a poly-crystalline semiconductor film having a large grain size. The present invention suppresses the effect due to the reflected light from a rear surface of the substrate and therefore the uniform laser annealing can be performed.

Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of the light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.

Abstract: The CCD image sensor addresses the problem of noise, due to background charge generated by Compton scattering of gamma rays. In applications, in which an imager must operate in a high-radiation environment, such background noise reduces the video signal/noise. This imager reduces the amount of charge collected from Compton events, while giving up very little sensitivity to photons in the visible/near IR.

Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.

Abstract: In the present invention, a charge transfer unit is arranged on a first-plane side of a thinly-formed semiconductor base. Charge accumulating units are arranged on a second-plane side, the opposite side. A depletion prevention layer is arranged closer to the second-plane side than the charge accumulating units. The depletion prevention layer prevents a depletion region around the charge accumulating units from reaching the second plane of the semiconductor base. The depletion prevention layer can suppress surface dark current going into the charge accumulating units. Meanwhile, an energy ray incident from the second-plane side pass through the depletion prevention layer to generate signal charges in the charge accumulating units (depletion regions). The charge accumulating units collect, on a pixel-by-pixel basis, the signal charges which are to be transported to the charge transfer unit under voltage control or the like, and then are read to exterior as image signals.

Abstract: A programmable resistance memory element comprising an adhesion layer between the programmable resistance material and at least one of the electrodes. Preferably, the adhesion layer is a titanium rich titanium nitride composition.

Abstract: The present invention relates to an image sensor with a microlens and a method for fabricating the same with use of a bump formation process. A method for fabricating an image sensor includes the steps of: forming a passivation layer on a substrate structure provided with a photodiode and other various device elements; forming a microlens on a portion of the passivation layer; forming a microlens passivation layer for protecting the microlens from a subsequent bump formation process on the microlens; forming a pad open region by selectively etching the microlens passivation layer and the passivation layer; and forming a bump in the pad open region.

Abstract: A method of disordering a layer of an optoelectronic device including; growing a plurality of lower layers; introducing an isoelectronic surfactant; growing a layer; allowing the surfactant to desorb; and growing subsequent layers all performed at a low pressure of 25 torr.

Abstract: Soluble, photosensitive precursors of pentacene are synthesized by a one-step Diels-Alder reaction of pentacene with N-sulfinylamides. These precursors may include a photopolymerizable group, which renders the pentacene precursor as a negative tone resist. The pentacene precursor may also include an acid-sensitive protecting group, which in the presence of a photoacid generator and upon exposure to UV light, is removed and the product becomes base soluble. Patterned pentacene thin films may be obtained by exposure to UV light through a mask and/or heating, and used as an active channel material for an organic field effect transistor.

Abstract: A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side walls of the gate electrode, comprising silicon oxide; an interlayer insulating film having a planarized surface; a wiring trench and a contact via hole formed in the interlayer insulating film; a copper wiring pattern including an underlying barrier layer and an upper level copper region, and filled in the wiring trench; and a silicon carbide layer covering the copper wiring pattern. A semiconductor device has the transistor structure capable of suppressing NBTI deterioration.

Abstract: There is described a back thinned sensor in which a material is added on the front surface to extend the wavelength of the sensor into wavelengths it normally does not reach. In the preferred embodiment, the back-thinned layer comprises silicon and is the base for a CMOS device or a CCD. The photocathode in a night vision device comprises in the preferred unit GaAs.

Abstract: An active matrix type organic light emitting diode device and a thin film transistor thereof are disclosed in the present invention. The driving thin film transistor for an active matrix type organic light emitting diode (AMOLED) device having first and second electrodes spaced apart from each other and an organic light emitting layer disposed between the first and second electrodes includes a gate electrode on a substrate, a semiconductor layer over the gate electrode, and source and drain electrodes on the semiconductor layer, wherein the source and drain electrodes are spaced apart from each other and respectively overlap portions of the gate electrode, and an overlapping area between the gate electrode and the source electrode is larger than an overlapping area between the gate electrode and the drain electrode.

Abstract: In a p-type base layer of a trench IGBT comprising a p-type collector layer, an n-type base layer formed on the p-type collector layer, the p-type base layer formed on the n-type base layer, and an n-type emitter layer formed on the surface of the p-type base layer, the point of the highest impurity concentration is located closer to the n-type base layer than the junction with the emitter layer. In other words, the pinch-off of the channel is generated in the position closer to the n-type base layer than to the junction between the p-type base layer and the n-type emitter layer.

Abstract: A photodetector for use with relatively thin (i.e., sub-micron) silicon optical waveguides formed in a silicon-on-insulator (SOI) structure comprises a layer of poly-germanium disposed to couple at least a portion of the optical signal propagating along the silicon optical waveguide. Tight confinement of the optical signal within the waveguide structure allows for efficient evanescent coupling into the poly-germanium detector. The silicon optical waveguide may comprise any desired geometry, with the poly-germanium detector formed to either cover a portion of the waveguide, or be butt-coupled to an end portion of the waveguide. When covering a portion of the waveguide, poly-germanium detector may comprise a “wrap-around” geometry to cover the side and top surfaces of the optical waveguide, with electrical contacts formed at opposing ends of the detector.

Abstract: A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side walls of the gate electrode, comprising silicon oxide; an interlayer insulating film having a planarized surface; a wiring trench and a contact via hole formed in the interlayer insulating film; a copper wiring pattern including an underlying barrier layer and an upper level copper region, and filled in the wiring trench; and a silicon carbide layer covering the copper wiring pattern. A semiconductor device has the transistor structure capable of suppressing NBTI deterioration.

Abstract: A method is disclosed for forming an image sensor. In a semiconductor wafer containing a p-type region an n-type connection region is formed within the p-type region. An n-type photodiode region is formed in the p-type region connected to the connection region. A field oxide isolation region is formed, having a part that is over portions of the n-type connection region and the n-type photodiode region. This part of the field oxide region covers the area where these regions are connected and extends into these regions. The edges of this part of the field oxide region fall within these regions, while leaving a distance between these edges and pn junctions formed by the connection region and the p-type region and the n-type photodiode region and p-type region. A gate oxide is formed over regions not covered by field oxide.

Abstract: A CCD unit is provided on the surface side of a thin shape section that is formed on a first substrate. In the CCD unit, first cells are provided and disposed in the form of an array in a direction in which the thin shape section extends. An InGaAs photodiode unit is provided at a second substrate in the InGaAs photodiode unit, second cells are provided and disposed in an array in the same direction as the first cells while having equal pitches to the first cells. The first substrate and second substrate are stacked over each other in such a manner that the surface of the first substrate and a second incidence plane of the second substrate oppose each other to ensure that part of a first photoelectric conversion region of the CCD unit correspondingly overlap part of a second photoelectric conversion region of the InGaAs photodiode unit when seen in plan view.

Abstract: In an optoelectronic component assembly and a method for the production thereof, the optoelectronic component assembly includes an optoelectronic component arranged on a support element, which is surrounded by a closed dam. An encapsulation is arranged in an inner area of the dam, which encapsulates the optoelectronic component and includes two sealing materials. The inner area of the dam may be filled with a first sealing material up to the top edge of the optoelectronic component. The inner area of the dam located above the optoelectronic component is filled with a second transparent sealing material at least in one area of the window.

Abstract: A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed below of the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that alter the magnetic flux of the inductor. The signals can then be detected by detecting the change in magnetic flux of the inductor.

Abstract: A method and apparatus for high density nanostructures is provided. The method and apparatus include Nano-compact optical disks, such as nano-compact disks (Nano-CDS). In one embodiment a 400 Gbit/in2 topographical bit density nano-CD with nearly three orders of magnitude higher than commercial CDS has been fabricated using nanoimprint lithography. The reading and wearing of such Nano-CDS have been studied using scanning proximal probe methods. Using a tapping mode, a Nano-CD was read 1000 times without any detectable degradation of the disk or the silicon probe tip. In accelerated wear tests with a contact mode, the damage threshold was found to be 19 &mgr;N. This indicates that in a tapping mode, both the Nano-CD and silicon probe tip should have a lifetime that is at least four orders of magnitude longer than that at the damage threshold.

Abstract: A Group III nitride compound semiconductor light-emitting element (flip chip type light-emitting element) provided with a p-side electrode and an n-side electrode formed on one surface side, wherein the p-side electrode includes: a first metal layer containing Ag and formed on a p-type semiconductor layer; a protective film with which the first metal layer except a part region is covered; and a second metal layer not containing Ag and formed on the protective film.

Abstract: In a semiconductor light-emitting element, a first DBR and a second DBR, with a specified spacing left between them, form a resonator, and a single quantum well active layer is positioned at the loop of a standing wave within this resonator. The single quantum well active layer is composed of a Ga0.5In0.5P well layer and a pair of (Al0.5Ga0.5)0.5In0.5P barrier layers, which sandwiches the Ga0.5In0.5P well layer therebetween. The impurity concentration of the (Al0.5Ga0.5)0.5In0.5P barrier layers is higher than that of the Ga0.5In0.5P well layer. For example, the impurity concentration of the Ga0.5In0.5P well layer is set to 2×1016 cm−3, while the impurity concentration of the (Al0.5Ga0.5)0.5In0.5P barrier layers is set to 2×1018 cm−3.

Abstract: Nonvolatile memory devices and methods for fabricating the same are provided. The device includes first and second base patterns disposed under floating and selection gates, respectively, at an active region. A channel region is formed in the active region between the first and second base patterns, and source and drain regions are formed in the active region adjacent to the first and second base patterns, respectively. The method includes forming first and second base patterns on a semiconductor substrate to be separated from each other by a predetermined space. A channel region is formed in the semiconductor substrate between the first and second base patterns. Source and drain regions are formed in the semiconductor substrate adjacent to the reverse side of the channel region on the basis of the first and second base patterns, respectively. A tunnel oxide layer is formed on a predetermined region of the channel region. A memory gate is formed to cover the first base pattern and the tunnel oxide layer.

Abstract: A double-side display structure for an organic light emitting diode (OLED) and a method of manufacturing the same includes: plating an organic layer on an OLED element by vaporization; plating an organic protection layer on the organic layer to protect various organic layers from being damaged by electron bombardment during the OLED element subject to ITO sputtering in the later processing; plating an electron injecting layer and a thin metal film of a mating energy level on the organic protection layer; and plating a transparent conductive film on the electron injecting layer and the thin metal film to increase conductivity and protect the thin metal film from corrosion.

Abstract: In accordance with an embodiment of the present invention, a MOSFET includes a first semiconductor region of a first conductivity type, a gate trench which extends into the first semiconductor region, and a source trench which extends into the first semiconductor region. The source trench is laterally spaced from the gate trench.

Abstract: The invention relates to a back-illuminated type light-receiving device. The light-receiving device can be used for a wide frequency range. The device has a structure in which a p-type semiconductor layer and an n-type semiconductor layer are successively stacked on the front side of the semiconductor substrate. A light-receiving portion is provided on the back side of the substrate. A dopant diffusion suppressing layer may be provided between the substrate and the p-type layer.

Abstract: An optical ready substrate made at least in part of a first semiconductor material and having a front side and a backside, the front side having a top surface that is of sufficient quality to permit microelectronic circuitry to be fabricated thereon using semiconductor fabrication processing techniques. The optical ready substrate includes an optical signal distribution circuit fabricated on the front side of the substrate in a first layer region beneath the top surface of the substrate. The optical signal distribution circuit is made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuitry to be fabricated thereon.