Light Responsive, Back Illuminated Patents (Class 257/228)
  • Patent number: 10321073
    Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: June 11, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Patent number: 10283539
    Abstract: Some embodiments of the present disclosure are directed to an image sensor pixel that is configured for gateless reset of a floating diffusion. Some embodiments are directed to an image sensor comprising a plurality of pixels, at least one pixel comprising a floating diffusion formed in a semiconductor substrate; a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion; and a reset drain formed in the semiconductor substrate and spaced away from the floating diffusion by an intervening semiconductor region having a dopant type opposite to the dopant type of the reset drain and the floating diffusion, wherein the reset drain is configured to selectively reset the electrostatic potential of the floating diffusion in response to a voltage pulse applied to the reset drain.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: May 7, 2019
    Assignee: DARTMOUTH COLLEGE
    Inventors: Eric R. Fossum, Jiaju Ma
  • Patent number: 10283551
    Abstract: A back-illuminated solid-state imaging element includes a semiconductor substrate which has a front surface and a back surface provided with a recess, and in which a thinned section, which is a bottom section of the recess, is an imaging area, a signal read-out circuit formed on the front surface of the semiconductor substrate, a boron layer formed on at least the back surface of the semiconductor substrate and a lateral surface of the recess, a metal layer formed on the boron layer, and provided with an opening opposing a bottom surface of the recess, and an anti-reflection layer formed on the bottom surface of the recess.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: May 7, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Masaharu Muramatsu, Hisanori Suzuki, Yasuhito Yoneta, Shinya Otsuka, Hirotaka Takahashi
  • Patent number: 10269988
    Abstract: A semiconductor device includes a substrate, a counter-doping region, and a Schottky barrier diode (SBD) in which a breakdown voltage is improved by using counter doping, and a manufacturing method thereof. A breakdown voltage may be improved by lowering a concentration of impurity on the region and enhancing the characteristics of the semiconductor device including the SBD.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: April 23, 2019
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Yong Won Lee, Jin Woo Han, Dae Won Hwang, Kyung Wook Kim
  • Patent number: 10211247
    Abstract: A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: February 19, 2019
    Assignee: Sony Corporation
    Inventor: Takayuki Enomoto
  • Patent number: 10204955
    Abstract: Provided is a back illuminated photo detector enabling easy determination of whether or not the radius of a beam spot on a light absorption layer is an appropriate size. The back illuminated photo detector includes: a semiconductor substrate having a first surface for receiving light; a semiconductor layer that is laminated on a second surface and includes a light absorption layer; a passivation film so as to expose a contact portion that is part of an upper surface of the semiconductor layer; and an electrode that is in contact with the semiconductor layer in the contact portion, and has a reflectance lower than that of the passivation film. The contact portion includes a center portion located on an optical axis, and an area of the center portion is smaller than a design cross-sectional area of a beam spot.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: February 12, 2019
    Assignee: Oclaro Japan, Inc.
    Inventors: Hiroshi Hamada, Takashi Toyonaka
  • Patent number: 10153312
    Abstract: A back-side illuminated pixel including a semiconductor substrate of a first conductivity type coated, on the front side of the pixel, with a three-layer assembly successively including a first layer of the second conductivity type, an insulating layer, and a second semiconductor layer. The three-layer assembly is interrupted in a central portion of the pixel by a transfer region of the first conductivity type laterally delimited by an insulated conductive wall extending from the front surface, Transistors are formed in the second semiconductor layer.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: December 11, 2018
    Assignee: STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Fran├žois Roy, Helene Wehbe-Alause, Olivier Noblanc
  • Patent number: 10079325
    Abstract: A semiconductor radiation detector device includes a semiconductor substrate. On one surface of the substrate are a MIG layer (241) of semiconductor of second conductivity type, a barrier layer (251) of semiconductor of first conductivity type, and pixel dopings of semiconductor of the second conductivity type. The pixel dopings are adapted to be coupled to at least one pixel voltage in order to create a source and a drain of a pixel-specific transistor. The device further includes a first conductivity type first contact, so that the pixel voltage is a potential difference between one of the pixel dopings and the first conductivity type first contact. The location of a main gate (983) corresponds at least partly to the location of a channel between the source and the drain. The device includes at least one extra gate (981, 982) horizontally displaced from the main gate (983).
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: September 18, 2018
    Inventor: Artto Aurola
  • Patent number: 10044918
    Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic apparatus capable of improving sensitivity while suppressing degradation of color mixture. The solid-state imaging device includes an anti-reflection portion having a moth-eye structure provided on a boundary surface on a light-receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-blocking portion provided below the boundary surface of the anti-reflection portion to block incident light. In addition, the photoelectric conversion region is a semiconductor region, and the inter-pixel light-blocking portion has a trench structure obtained by digging the semiconductor region in a depth direction at a pixel boundary. The techniques according to the present disclosure can be applied to, for example, a solid-state imaging device of a rear surface irradiation type.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: August 7, 2018
    Assignee: Sony Corporation
    Inventors: Yoshiaki Masuda, Yuki Miyanami, Hideshi Abe, Tomoyuki Hirano, Masanari Yamaguchi, Yoshiki Ebiko, Kazufumi Watanabe, Tomoharu Ogita
  • Patent number: 10032815
    Abstract: A method of manufacturing a solid-state image sensor, including a first transistor for transferring charges from a charge accumulation region to a first charge holding region and a second transistor for transferring charges from the first charge holding region to a second charge holding region, the method comprising forming, on the semiconductor substrate, a resist pattern having a opening on the first charge holding region, and injecting a impurity via the opening so as to make the first charge holding region be a buried type, wherein the impurity is injected such that an impurity region, which makes the first charge holding region be a buried type, is formed at a position away from an end of the gate electrode of the second transistor.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: July 24, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takafumi Miki, Masahiro Kobayashi, Yusuke Onuki
  • Patent number: 9997553
    Abstract: A semiconductor device including a light receiving portion provided in a semiconductor layer of a first conductor type, the light receiving portion being of a second conductor type that is different from the first conductor type; a buffer layer provided at a light incidence side of the light receiving portion, the buffer layer being of the first conductor type; and a low refractive index layer provided at a light incidence side of the buffer layer, the low refractive index layer having a lower refractive index than refractive indices of the semiconductor layer and the buffer layer.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: June 12, 2018
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroshi Shibata
  • Patent number: 9933552
    Abstract: An optical element includes a conductive fixed reflection film, a movable reflection film that faces the fixed reflection film, a transmissive second insulating film which is provided on a side of the fixed reflection film opposite to the movable reflection film, and a light receiving unit which is provided on a side of the second insulating film opposite to the fixed reflection film and within a light receiving region where the fixed reflection film, the movable reflection film, and the second insulating film overlap each other in an element plan view when seen from film thickness directions of the fixed reflection film and the movable reflection film, and which receives light emitted from the fixed reflection film.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 3, 2018
    Assignee: Seiko Epson Corporation
    Inventor: Ryohei Kuri
  • Patent number: 9929200
    Abstract: Provided is an image pickup device, including: a first trench provided between a plurality of pixels in a light-receiving region of a semiconductor substrate, the semiconductor substrate including the light-receiving region and a peripheral region, the light-receiving region being provided with the plurality of pixels each including a photoelectric conversion section; and a second trench provided in the peripheral region of the semiconductor substrate, wherein the semiconductor substrate has a variation in thickness between a portion where the first trench is provided and a portion where the second trench is provided.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: March 27, 2018
    Assignee: Sony Corporation
    Inventor: Shinya Sato
  • Patent number: 9917128
    Abstract: A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 13, 2018
    Assignee: Sony Corporation
    Inventors: Hiroshi Takahashi, Taku Umebayashi
  • Patent number: 9825076
    Abstract: A back-side illuminated pixel including a semiconductor substrate of a first conductivity type coated, on the front side of the pixel, with a three-layer assembly successively including a first layer of the second conductivity type, an insulating layer, and a second semiconductor layer. The three-layer assembly is interrupted in a central portion of the pixel by a transfer region of the first conductivity type laterally delimited by an insulated conductive wall extending from the front surface, Transistors are formed in the second semiconductor layer.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: November 21, 2017
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Fran├žois Roy, Helene Wehbe-Alause, Olivier Noblanc
  • Patent number: 9691862
    Abstract: A semiconductor device includes a field effect transistor in a semiconductor substrate having a first surface. The field effect transistor includes a first field plate structure and a second field plate structure, each extending in a first direction parallel to the first surface, and gate electrode structures disposed over the first surface and extending in a second direction parallel to the first surface, the gate electrode structures being disposed between the first and the second field plate structures.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: June 27, 2017
    Assignee: Infineon Technologies Austria AG
    Inventor: Martin Poelzl
  • Patent number: 9679932
    Abstract: Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function. The solid-state imaging device includes a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: June 13, 2017
    Assignee: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano
  • Patent number: 9651421
    Abstract: A device includes a substrate is substantially transparent and includes a contact surface and an interface surface. The interface surface includes a plurality of electrical contacts. The device further includes a semiconductor die, which includes a plurality of connections, a first photo detector and a second photo detector. Each of the plurality of connections includes a connection bump formed thereon to couple to the plurality of electrical contacts of the interface surface of the substrate. The plurality of connections positioned relative to the first and second photo detectors to alter a directional response of at least one photo detector of the plurality of photo detectors.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 16, 2017
    Assignee: Silicon Laboratories, Inc.
    Inventors: Miroslav Svajda, Steve Gerber, Wayne T. Holcombe
  • Patent number: 9653509
    Abstract: There is provided an image sensor including pixels each configured to include a transfer transistor configured as an embedded channel type MOS transistor and to output a pixel signal based on a charge transferred to a floating diffusion from a photodiode by the transfer transistor in an on state, and a determination unit configured to convert the output pixel signal to a digital value, then compare the converted digital value to a threshold value, and thereby make a binary determination on presence or absence of incidence of a photon on the pixel that has generated the pixel signal.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: May 16, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshiyuki Nishihara, Hirofumi Sumi
  • Patent number: 9634055
    Abstract: Radiation detectors and methods of fabricating radiation detectors are provided. One method includes mechanically polishing at least a first surface of a semiconductor wafer using a polishing sequence including a plurality of polishing steps. The method also includes growing a passivation oxide layer on a top of the polished first surface and depositing patterned metal contacts on a top of the passivation oxide layer. The method further includes applying a protecting layer on the patterned deposited metal contacts, etching a second surface of the semiconductor and applying a monolithic cathode electrode on the etched second surface of the semiconductor. The method additionally includes removing the protecting layer from the patterned metal contacts on the first surface, wherein the patterned metal contacts are formed from one of (i) reactive metals and (ii) stiff-rigid metals for producing inter-band energy-levels in the passivation oxide layer.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: April 25, 2017
    Assignee: General Elecrtric Company
    Inventors: Peter Rusian, Arie Shahar
  • Patent number: 9595560
    Abstract: The present invention relates to a pumped pixel that includes a first photo-diode accumulating charge in response to impinging photons, a second photo-diode, and a floating diffusion positioned on a substrate. The pixel also includes a charge barrier positioned on the substrate between the first photo-diode and the second photo-diode, where the charge harrier temporarily blocks charge transfer between the first photo-diode and the second photo-diode. A pump gate may also be formed on the substrate adjacent to the charge barrier. The pump gate pumps the accumulated charge from the first photo-diode to the second photo-diode through the charge barrier. Also included is a transfer gate positioned on the substrate between the second photo-diode and the floating diffusion. The transfer gate serves to transfer the pumped charge from, the second photo-diode to the floating diffusion.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: March 14, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chung Chun Wan, Xiangli Li
  • Patent number: 9576998
    Abstract: A back-illuminated type solid-state image pickup unit in which a pad wiring line is provided on a light reception surface and which is capable of improving light reception characteristics in a photoelectric conversion section by having a thinner insulating film in a pixel region. The solid-state image pickup unit includes a sensor substrate having a pixel region in which photoelectric conversion sections are formed in an array, and a drive circuit is provided on a surface opposed to a light reception surface for the photoelectric conversion sections of the sensor substrate. A through hole via reaching the drive circuit from the light reception surface of the sensor substrate is provided in a peripheral region located outside the pixel region. A pad wiring line directly laminated on the through hole via is provided on the light reception surface in the peripheral region.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 21, 2017
    Assignee: Sony Corporation
    Inventor: Kentaro Akiyama
  • Patent number: 9570497
    Abstract: Provided is a method of fabricating an image sensor device. An exemplary includes forming a plurality of radiation-sensing regions in a substrate. The substrate has a front surface, a back surface, and a sidewall that extends from the front surface to the back surface. The exemplary method further includes forming an interconnect structure over the front surface of the substrate, removing a portion of the substrate to expose a metal interconnect layer of the interconnect structure, and forming a bonding pad on the interconnect structure in a manner so that the bonding pad is electrically coupled to the exposed metal interconnect layer and separated from the sidewall of the substrate.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: February 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Hsiao-Hui Tseng
  • Patent number: 9515116
    Abstract: A back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A semiconductor column extends vertically from a photodetector, towards a back-end-of-line (BEOL) stack. A floating diffusion region (FDR) is vertically spaced from the photodetector by the semiconductor column. The FDR comprises a sidewall surface laterally offset from a neighboring sidewall surface of the semiconductor column to define a lateral recess between the FDR and the photodetector. A gate dielectric layer lines the sidewall surface of the semiconductor column and is arranged in the lateral recess. A gate is arranged laterally adjacent to the gate dielectric layer and filling the lateral recess. Further, a method for manufacturing the vertical transfer gate structure is provided.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: December 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jhy-Jyi Sze, Alexander Kalnitsky, Yimin Huang
  • Patent number: 9507180
    Abstract: A metal-oxide-semiconductor (MOS) type semiconductor device, comprising a silicon substrate, a first cathode electrode and a second cathode electrode coupled to the silicon substrate and located on distal ends of the silicon substrate, a poly-silicon (Poly-Si) gate proximally located above the silicon substrate and between the first cathode electrode and the second cathode electrode, wherein the Poly-Si gate comprises a first post extending orthogonally relative to the silicon substrate comprising a first doped silicon slab, a second post extending orthogonally relative to the silicon substrate comprising a second doped silicon slab, wherein the second post is positioned so as to create a width between the first post and the second post, an anode electrode coupled to the first post and the second post and extending laterally from the first post to the second post, and a dielectric layer disposed between the first silicon substrate and the second silicon substrate.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: November 29, 2016
    Assignee: Futurewei Technologies, Inc.
    Inventors: Qianfan Xu, Xiao Shen, Hongmin Chen
  • Patent number: 9496303
    Abstract: The present technique aims to provide a solid-state imaging device that reduces shading and color mixing between pixels. The present invention also provides a method of manufacturing the solid-state imaging device. The present technique further relates to a solid-state imaging device that enables provision of an electronic apparatus that uses the solid-state imaging device, a method of manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes a substrate, pixels each including a photoelectric conversion unit formed in the substrate, and a color filter layer formed on the light incidence surface side of the substrate. The solid-state imaging device also includes a device isolating portion that is formed to divide the color filter layer and the substrate for the respective pixels, and has a lower refractive index than the refractive indexes of the color filter layer and the substrate.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: November 15, 2016
    Assignee: Sony Corporation
    Inventor: Ryoji Suzuki
  • Patent number: 9431554
    Abstract: Buried structures for silicon devices which alter light paths and thereby form light traps. The lights traps couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: August 30, 2016
    Assignee: Infineon Technologies Dresden GmbH
    Inventor: Thoralf Kautzsch
  • Patent number: 9368531
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of light-blocking structures is disposed over the second side of the substrate. A passivation layer is coated on top surfaces and sidewalls of each of the light-blocking structures. A plurality of spacers is disposed on portions of the passivation layer coated on the sidewalls of the light-blocking structures.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: June 14, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yun-Wei Cheng, Chiu-Jung Chen, Volume Chien, Kuo-Cheng Lee, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9356061
    Abstract: A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: May 31, 2016
    Assignee: Apple Inc.
    Inventors: Xiaofeng Fan, Philip H. Li, Chung Chun Wan, Anup K. Sharma, Xiangli Li
  • Patent number: 9343466
    Abstract: Methods for fabricating memory cells, methods for fabricating integrated circuits having memory cells, and integrated circuits having memory cells are provided. In one example, a method for fabricating a memory cell includes depositing a first tunnel dielectric layer over a semiconductor substrate. The method includes depositing a floating gate material over the first tunnel dielectric layer. The method forms two control gate stacks over the floating gate material, defines a source line area between the two control gate stacks, and defines select gate areas adjacent the two control gate stacks. The method includes depositing a second tunnel dielectric layer over the select gate areas of the semiconductor substrate. Further, the method includes forming select gates over the second tunnel dielectric layer over the select gate areas of the semiconductor substrate. The second tunnel dielectric layer forms a gate dielectric layer for each select gate.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: May 17, 2016
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Zufa Zhang, Khee Yong Lim
  • Patent number: 9287214
    Abstract: A semiconductor device and a method of forming the same are disclosed, which forms a low-dielectric-constant oxide film only at a peripheral part of a bit line conductive material, resulting in reduction in parasitic capacitance of the bit line. The semiconductor device includes a bit line formed over a semiconductor substrate, a first spacer formed over sidewalls of the bit line, and a second spacer formed over sidewalls of the first spacer, configured to have a dielectric constant lower than that of the first spacer.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: March 15, 2016
    Assignee: SK HYNIX INC.
    Inventor: Dae Sik Park
  • Patent number: 9263406
    Abstract: A semiconductor device according to the present invention includes a semiconductor chip having a front surface and a rear surface, a sealing resin layer stacked on the front surface of the semiconductor chip, a post passing through the sealing resin layer in the thickness direction and having a side surface flush with a side surface of the sealing resin layer and a forward end surface flush with a front surface of the sealing resin layer, and an external connecting terminal provided on the forward end surface of the post.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: February 16, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Hiroshi Okumura
  • Patent number: 9240432
    Abstract: A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: January 19, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 9209216
    Abstract: A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: December 8, 2015
    Assignee: GLOBALFOUNDRIES INC
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 9165971
    Abstract: High-quality surface coatings, and techniques combining the atomic precision of molecular beam epitaxy and atomic layer deposition, to fabricate such high-quality surface coatings are provided. The coatings made in accordance with the techniques set forth by the invention are shown to be capable of forming silicon CCD detectors that demonstrate world record detector quantum efficiency (>50%) in the near and far ultraviolet (155 nm-300 nm). The surface engineering approaches used demonstrate the robustness of detector performance that is obtained by achieving atomic level precision at all steps in the coating fabrication process. As proof of concept, the characterization, materials, and exemplary devices produced are presented along with a comparison to other approaches.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: October 20, 2015
    Assignee: California Institute of Technology
    Inventors: Frank Greer, Todd J. Jones, Shouleh Nikzad, Michael E. Hoenk
  • Patent number: 9029183
    Abstract: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Tzu-Jui Wang, Dun-Nian Yaung, Jen-Cheng Liu
  • Publication number: 20150097213
    Abstract: Embodiments of an apparatus comprising a pixel array including a plurality of pixels formed in a substrate having a front surface and a back surface, each pixel including a photosensitive region formed at or near the front surface and extending into the substrate a selected depth from the front surface. A filter array is coupled to the pixel array, the filter array including a plurality of individual filters each optically coupled to a corresponding photosensitive region, and a vertical overflow drain (VOD) is positioned in the substrate between the back surface and the photosensitive region of at least one pixel in the array.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 9, 2015
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Gang Chen, Duli Mao, Dyson H. Tai
  • Patent number: 9000492
    Abstract: In a back-illuminated solid-state image pickup device including a semiconductor substrate 4 having a light incident surface at a back surface side and a charge transfer electrode 2 disposed at a light detection surface at an opposite side of the semiconductor substrate 4 with respect to the light incident surface, the light detection surface has an uneven surface. By the light detection surface having the uneven surface, etaloning is suppressed because lights reflected by the uneven surface have scattered phase differences with respect to a phase of incident light and resulting interfering lights offset each other. A high quality image can thus be acquired by the back-illuminated solid-state image pickup device.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: April 7, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hisanori Suzuki, Yasuhito Yoneta, Yasuhito Miyazaki, Masaharu Muramatsu, Koei Yamamoto
  • Publication number: 20150069471
    Abstract: A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections.
    Type: Application
    Filed: July 15, 2014
    Publication date: March 12, 2015
    Applicant: SONY CORPORATION
    Inventor: Takahiro Kawamura
  • Patent number: 8975668
    Abstract: A structure and method of manufacture is disclosed for a backside thinned imager that incorporates a conformal, Al2O3, low thermal budget, surface passivation. This passivation approach facilitates fabrication of backside thinned, backside illuminated, silicon image sensors with thick silicon absorber layer patterned with vertical trenches that are formed by etching the exposed back surface of a backside-thinned image sensor to control photo-carrier diffusion and optical crosstalk. A method of manufacture employing conformal, Al2O3, surface passivation approach is shown to provide high quantum efficiency and low dark current while meeting the thermal budget constraints of a finished standard foundry-produced CMOS imager.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 10, 2015
    Assignee: Intevac, Inc.
    Inventors: Kenneth A. Costello, Edward Yin, Michael Wayne Pelczynski, Verle W. Aebi
  • Publication number: 20150060951
    Abstract: An image sensor operable in global shutter mode ma include small pixels with high charge storage capacity, low dark current, and no image lag. Storage capacity of a photodiode and a charge storage diode may be increased by placing a p+ type doped layer under the photodiode and the charge storage diode. The p+ type doped layer ma include an opening for allowing photo-generated charge carriers to flow from the silicon bulk to the charge storage well located near the surface of the photodiode. A compensating n? type doped implant may be formed in the opening. Image lag is prevented by placing a p? type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. The p+ type doped layer may extend under the entire pixel array.
    Type: Application
    Filed: August 25, 2014
    Publication date: March 5, 2015
    Inventor: Jaroslav Hynecek
  • Patent number: 8964081
    Abstract: A solid-state image sensor includes a semiconductor substrate having a photoelectric conversion element converting incident light into a charge and a charge retaining section temporarily retaining the charge photoelectrically converted by the photoelectric conversion element and a light shielding section having an embedded section extending in at least a region between the photoelectric conversion element and the charge retaining section of the semiconductor substrate.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: February 24, 2015
    Assignee: Sony Corporation
    Inventors: Tomohiro Ohkubo, Suzunori Endo
  • Patent number: 8895349
    Abstract: An approach is provided for forming a backside illuminated image sensor that includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: November 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Wen-De Wang
  • Patent number: 8896137
    Abstract: A solid-state image pickup device includes: a silicon layer; a pixel portion formed in the silicon layer for processing and outputting signal charges obtained by carrying out photoelectric conversion for incident lights; an alignment mark formed in a periphery of the pixel portion and in the silicon layer; and a contact portion through which a first electrode within a wiring layer formed on a first surface of the silicon layer, and a second electrode formed on a second surface opposite to the first surface of the silicon layer through an insulating film are connected, wherein the alignment mark and the contact portion are formed from conductive layers made of the same conductive material and formed within respective holes each extending completely through the silicon layer through respective insulating layers made of the same material.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventors: Keiichi Nakazawa, Takayuki Enomoto
  • Publication number: 20140339606
    Abstract: A back surface illuminated image sensor is provided. The back surface illuminated image sensor includes: a first passivation layer disposed on the photodiode array; an oxide grid disposed on the first passivation layer and forming a plurality of holes exposing the first passivation layer; a color filter array including a plurality of color filters filled into the holes, wherein the oxide grid has a refractive index smaller than that of plurality of color filters; and a metal grid aligned to the oxide grid, wherein the metal grid has an extinction coefficient greater than zero.
    Type: Application
    Filed: December 4, 2013
    Publication date: November 20, 2014
    Applicant: VisEra Technologies Company Limited
    Inventors: Chi-Han LIN, Zong-Ru TU, Yu-Kun HSIAO, Chih-Kung CHANG
  • Patent number: 8885080
    Abstract: The present invention is applied to an image pickup device with a CMOS solid-state image pickup element, in which an analog-to-digital conversion circuit is disposed in a surface on an opposite side from an image pickup surface in a semiconductor chip 2.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventor: Seiji Kobayashi
  • Publication number: 20140327051
    Abstract: An image sensor and a method of manufacturing the image sensor are provided. The image sensor may include a photo detecting device and a charge storage device. The image sensor may further include a trench and a shield which blocks light from being absorbed by the charge storage device. The charge storage device may temporarily store accumulated charges by the photo detecting device.
    Type: Application
    Filed: January 30, 2014
    Publication date: November 6, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-chak AHN, Yi-tae KIM, Eun-sub SHIM, Kyung-ho LEE
  • Patent number: 8847286
    Abstract: An image sensor includes a substrate having opposite first and second sides, a multilayer structure on the first side of the substrate, and a photo-sensitive element on the second side of the substrate. The photo-sensitive element is configured to receive light that is incident upon the first side and transmitted through the multilayer structure and the substrate. The multilayer structure includes first and second light transmitting layers. The first light transmitting layer is sandwiched between the substrate and the second light transmitting layer. The first light transmitting layer has a refractive index that is from 60% to 90% of a refractive index of the substrate. The second light transmitting layer has a refractive index that is lower than the refractive index of the first light transmitting layer and is from 40% to 70% of the refractive index of the substrate.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: September 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko Jangjian, Kei-Wei Chen, Szu-An Wu, Ying-Lang Wang
  • Patent number: 8785984
    Abstract: A method of making a backside illuminated sensor is provided. A substrate is provided and a high energy ion implantation is performed over the substrate to implant a first doped region. A layer is formed over the substrate and a self-align high energy ion implantation is performed over the substrate to implant a second doped region over the first doped region. The combined thickness of the first and second doped region is greater than 50 percent of thickness of the substrate and the distance between back surface of the substrate and the first and second doped regions is less than 50 percent of thickness of the substrate. In this way, an enlarged light sensing region is formed through which electrons generated from back surface of the surface may easily reach the pixel.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: July 22, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung
  • Patent number: 8778778
    Abstract: According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazumasa Tanida, Masahiro Sekiguchi, Masayuki Dohi, Tsuyoshi Matsumura, Hideo Numata, Mari Otsuka, Naoko Yamaguchi, Takashi Shirono, Satoshi Hongo