Abstract: There is provided a solid-state imaging device suitable for miniaturization.

Abstract: A CCD linear image sensor comprises an array of linearly arranged photosensor cells, and a pair of CCD shift registers respectively arranged on both sides of the array of linearly arranged photosensor cells. The CCD shift registers are coupled in parallel to the linearly arranged photosensor cell array so as to read out signal charges from predetermined photosensor cells of the linearly arranged photosensor cell array and to transfer the read-out signal charge serially in the CCD shifter register. An output end of each CCD shift register is branched into a pair of CCD shift register transfer paths. An output circuit is connected to an output terminal of each of the branched CCD shift register transfer paths.

Abstract: A charge transfer device includes a first input stage converting a first input signal into first signal charge, a first shift register transferring the first signal charge with a first delay amount, a second input stage converting a second input signal into second signal charge and having a first switch for selectively inputting the second signal charge to a second shift register, a third input stage converting a third input signal into third signal charge and having a second switch for selectively inputting the third signal charge to a third shift register, and an adding section for selectively adding one of the second and third signal charge to the first signal charge. The second shift register transfers the second signal charge with a second delay amount and the third shift register transfers the third signal charge with a third delay amount.

Abstract: A charge coupled device includes shift registers, a common transfer electrode, and a floating and diffusion layer. Clock pulses are applied to the common transfer electrode. In response to the clock pulses, the common transfer electrode outputs signal charges to the floating and diffusion layer at a time when the shift registers are not being driven. Therefore, there is no output voltage level difference between the different shift registers.

Abstract: In a solid state imaging device, a horizontal transfer unit has first and second transfer paths which are disposed in parallel and in which the transfer direction of image signals is changed according to the mode of a driving signal applied to the paths. One end of the first transfer paths is connected to one end of the second transfer path through a third transfer path. When a driving signal of a first mode is applied, the first path transfers image signals from the one end to the other end to output normal image signals. When a driving signal of a second mode is applied, the first path transfers image signals from the other end to the one end to transfer the image signals to the second transfer path via the third transfer path, and the second transfer path transfers image signals from the one end to the other end to output mirror image signals.

Abstract: An exploiting or readout circuit for a linear or matrix type photodetector array is of the multiplex type, such as a charge-coupled device (CCD). The exploiting circuit has a number of input stages corresponding to the number of photodetectors or similar photosites, and the gains of the input stages are established as a function of the fields of view of their associated photodetectors. In one embodiment the input stages each comprise a storage device formed of a first and a second storage electrode separated by a dividing electrode, the storage electrodes having respective surface areas selected in a relation that varies as a function of solid angle field of view of the respective photodetector. In another embodiment the input stage can include an OpAmp with a negative feedback capacitor whose value is selected as a function of the viewing solid angle of the respective photodetector.

Abstract: A transversal filter comprises an acoustic charge transport device comprising an input contact for introducing a signal into a buried channel through which the signal is transported by a high frequency acoustic wave and a plurality of non-destructive sense electrodes overlying the channel for successively sampling the signal. A memory device is provided for storing a plurality of tap weight signals, with each tap weight signal for being associated with one of the electrodes. A multiplier system is operably connected with each of the electrodes and with the storage device for generating the product of the signal sampled at each electrode and the associated tap weight signal. A summer is operably associated with the multiplier for summing the products and thereby generating an output signal.

Abstract: A solid-state imaging device of the invention is provided with a CCD-structured branching unit which selects one signal charge sensor having characteristics suitable for the conditions of use from among a plurality of signal charge sensors each having different characteristics and forms a signal charge transmission path leading from the horizontal CCD to the selected signal charge sensor. As a result, there is no need to switch over the external circuit of the solid-state imaging device according to the conditions of use, which makes it possible to hold down the cost and reduce the size of the external size.

Abstract: An array of linear CCD image sensors comprises first, second and third CCD image sensors arranged in spaced parallel relation on a body of a semiconductor material. Each CCD image sensor comprises a row of photodetectors, a CCD shift register extending along the row of photodetectors and an output circuit at one end of the CCD shift register. All of the output circuits are at a common end of their respective CCD shift registers. Each CCD shift register includes first and second sets of gate electrodes alternating along the CCD shift register. A first bus line connects the first gate electrodes of each CCD shift register and a second bus line electrically connects the second gate electrodes of each CCD shift register. One of the bus lines of the second CCD shift register is electrically connected to a bus line of the first CCD shift register, and the other bus line of the second CCD shift register is electrically connected to a bus line of the third CCD shift register.

Abstract: A charge transfer device has a plurality of registers which run parallel to each other and across which electrical charges are transferred. For efficient charge transfer across the registers, the transfer elecrtrode of one register and the transfer electrode of an adjacent register are arrayed in contiguity to each other and driven by different driving pulses and a deeper potential is provided in the signal charge receiving side than in the signal charge forwarding side. The registers are arrayed parallel to a sensor row constituted by a linear array of different color sensors and each handle signal charges of the respective colors. In this manner, the outputs from the registers are in the form of the separate color signals to prevent color mixing.

Abstract: A charge coupled device includes a second conductivity type first horizontal channel in a first conductivity type semiconductor substrate, a second conductivity type second horizontal channel in the substrate at a predetermined distance from the first horizontal channel, and a second conductivity type transfer channel connecting the first horizontal channel with the second horizontal channel to enable transfer of charges from the first horizontal channel to the second horizontal channel. The pinning potential of the transfer channel is larger in absolute value than the pinning potential of the first and second horizontal channels, and the gate voltage pinning the transfer channel is smaller in absolute value than the gate voltage pinning the first and second horizontal channels.

Abstract: A symmetric pipelined charge-mode analog to digital converter including a signal-reference CCD channel having a plurality of charge storage stages that are arranged in a serial configuration to carry the signal and reference charges, and a CCD digital channel. A set of two step comparators coupled to the signal-reference channel first senses and stores the signal charge and then senses and compares the reference charge to the signal charge. In the first stage, an initial reference charge is used, and in subsequeant stages, an increment of one half the previous stage increment is added to the reference. In addition, at each stage, a charge increment equal to the previous reference increment is conditionally added to the signal charge and a corresponding bit in the digital channel is conditionally set responsive to the comparator.

Abstract: Described is a new high performance CCD image sensor technology which can be used to build a versatile image sensor family with the sensors that have high resolution and high pixel density. The described sensor architectures are based on a new charge super sweep concept which was developed to overcome such common problems as blooming and the image smear. The charge super sweep takes place in very narrow vertical channels located between the photosites similar to the Interline Transfer CCD devices. The difference here is that the charge is never stored in these regions for any significant length of time and is swept out using a new resistive gate traveling wave sweeping technique. The charge super sweep approach also allows the fast charge transfer of several lines of data from the photosites located anywhere in the array into the buffer storage during a single horizontal blanking interval.

Abstract: In CCD arrangements, such as bidimensional image sensors, it is usual to provide the output register in the form of two (or more) horizontal registers. Via transverse connections between the horizontal registers, charge packets are transported from one horizontal register to the other horizontal register. In order to avoid delays during this transverse transport due to narrow channel effects, the clock electrodes of the first horizontal register adjoining the transverse connections are widened at the expense of adjacent clock electrodes. These widened electrodes may be in the trapezoidal form, as a result of which additional drift fields are induced below these electrodes.