With Additional Electrode To Control Conductive State Of Josephson Junction Patents (Class 257/36)
  • Patent number: 5408108
    Abstract: A superconducting device comprises a substrate having a principal surface and a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, which has a projection at its center portion. A superconducting source region and a superconducting drain region formed of an .alpha.-axis oriented oxide superconductor thin film are positioned at the both sides of the projection of the non-superconducting oxide layer separated from each other and an extremely thin superconducting channel formed of a c-axis oriented oxide superconductor thin film is positioned on the projection of the non-superconducting oxide layer. The superconducting channel electrically connects the superconducting source region to the superconducting drain region, so that superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: April 18, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Michitomo Iiyama, Hiroshi Inada
  • Patent number: 5382565
    Abstract: This field-effect transistor comprises a conductive substrate (2) serving as the gate electrode, an insulating barrier layer (3), and a superconducting channel layer (1) on top of the barrier layer (3). The superconductor layer (1) carries a pair of mutually spaced electrodes (4, 5) forming source and drain, respectively. The substrate is provided with an appropriate gate contact (6).The substrate (2) consists of a material belonging to the same crystallographic family as the barrier layer (3). In a preferred embodiment, the substrate (2) is niobium-doped strontium titanate, the barrier layer (3) is undoped strontium titanate, and the superconductor (1) is a thin film of a material having a lattice constant at least approximately similar to the one of the materials of the substrate (2) and barrier (3) layers. A preferred material of this type is YBa.sub.2 Cu.sub.3 O.sub.7-.delta., where 0.ltoreq..delta..ltoreq.0.5.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: January 17, 1995
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Bednorz, Jochen D. Mannhart, Carl A. Mueller
  • Patent number: 5380704
    Abstract: Disclosed herein is a superconducting field effect transistor (FET) which has at least an active region formed from a film of oxide normal conductor, a plurality of electrodes formed from a film of oxide superconductor, and a means to control the current which flows between the electrodes through the active region. Having a much greater electrode distance than the conventional superconducting device, it can be produced easily by lithography without resorting to special techniques.
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: January 10, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinobu Tarutani, Tokuumi Fukazawa, Uki Kabasawa, Kazumasa Takagi, Akira Tsukamoto, Masahiko Hiratani, Toshikazu Nishino
  • Patent number: 5358928
    Abstract: A process for formulating non-hysteretic and hysteretic Josephson junctions using HTS materials which results in junctions having the ability to operate at high temperatures while maintaining high uniformity and quality. The non-hysteretic Josephson junction is formed by step-etching a LaAlO.sub.3 crystal substrate and then depositing a thin film of TlCaBaCuO on the substrate, covering the step, and forming a grain boundary at the step and a subsequent Josephson junction. Once the non-hysteretic junction is formed the next step to form the hysteretic Josephson junction is to add capacitance to the system. In the current embodiment, this is accomplished by adding a thin dielectric layer, LaA1O.sub.3, followed by a cap layer of a normal metal where the cap layer is formed by first depositing a thin layer of titanium (Ti) followed by a layer of gold (Au). The dielectric layer and the normal metal cap are patterned to the desired geometry.
    Type: Grant
    Filed: September 22, 1992
    Date of Patent: October 25, 1994
    Assignee: Sandia Corporation
    Inventors: David S. Ginley, Vincent M. Hietala, Gert K. G. Hohenwarter, Jon S. Martens, Thomas A. Plut, Chris P. Tigges, Gregory A. Vawter, Thomas E. Zipperian
  • Patent number: 5352917
    Abstract: An electronic device provided with a metal fluoride film which can be formed at a low temperature with a high processing accuracy, characterized in that the metal fluoride film is used in at least part of an insulting film.
    Type: Grant
    Filed: January 4, 1993
    Date of Patent: October 4, 1994
    Inventor: Tadahiro Ohmi
  • Patent number: 5347143
    Abstract: A superconducting tunnel element, having a plurality of super conductors separated by barriers, the superconductors each comprising two physically separate but electrically connected superconducting layers and one insulated control layer. As a result, summation of the detection capacity or of the transmitting intensity becomes possible. Also, the simultaneous detection or transmission is permitted on arbitrary different frequencies or a summation of the signal intensity is possible in the case of SQUID-systems.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: September 13, 1994
    Assignee: Dornier Luftfahrt GmbH
    Inventor: Hehrwart Schroder
  • Patent number: 5338943
    Abstract: A magnetic flux-enhanced control line for a superconducting flux flow transistor (SFFT). The SFFT includes a pair of superconducting electrodes which provide a voltage output, a region of weakened superconductor connecting the electrodes and a control line. The region of weakened superconductor carries a current I.sub.body and the control line carries a current I.sub.Control. The control line further has a portion thereof proximate the weakened region for providing a localized magnetic field through the weakened region as a function of I.sub.Control. The magnetic flux through the weakened region induces vortices therein which have a resistance r.sub.o. The proximate portion of the control line forms a tortuous current path whereby the magnetic flux through the weakened region is increased for increasing r.sub.o so that the output voltage of the transistor is increased without increasing I.sub.Control.
    Type: Grant
    Filed: September 1, 1993
    Date of Patent: August 16, 1994
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: William Wilber, Roland Cadotte, Jr., Adam Rachlin, Michael Cummings
  • Patent number: 5326986
    Abstract: A physical configuration for a parallel multi-junction superconducting quantum interference device that can be used for a variety of applications involving the detection of magnetic flux, including applications where it is desired to measure the absolute magnitude of the flux. The device of this invention features a novel geometry for a multi-junction interference device which significantly enhances the flux-to-voltage transfer function, thereby yielding a significant improvement in the device sensitivity in its use in a magnetometer, gradiometer, or other applications.
    Type: Grant
    Filed: August 20, 1992
    Date of Patent: July 5, 1994
    Assignee: University of Houston - University Park
    Inventors: John H. Miller, Jr., Terry D. Golding, Jaiming Huang
  • Patent number: 5318952
    Abstract: A superconducting transistor is provided with a base layer made of a normal conductor metal, an emitter layer made of a superconductor for injecting hot electrons to the base layer, a collector layer made of a superconductor for trapping electrons from the base layer, a first tunnel barrier layer made of an insulator and provided between the base layer and the emitter layer, and a second tunnel barrier layer made of an insulator and provided between the base layer and the collector layer.
    Type: Grant
    Filed: August 27, 1993
    Date of Patent: June 7, 1994
    Assignee: Fujitsu Limited
    Inventor: Tsunehiro Hato
  • Patent number: 5317168
    Abstract: A superconducting field effect transistor which is very small in size and high in dimensional accuracy, has a first layer of material forming a control electrode and a second layer of another material is disposed on said first layer. A width of said first layer in a direction toward a superconducting source electrode and a superconducting drain electrode is narrower than a width of the second layer in the same direction. Polycrystalline silicon may be used as the control electrode while the second layer can be made of silicon nitride. Furthermore, a side surface of the control electrode may be coated with an insulator film. Accordingly, the above transistor has a fine structure gate electrode part that can be fabricated easily and accurately.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: May 31, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Ushio Kawabe, Fumio Murai, Tokuo Kure, Mutsuko Hatano, Haruhiro Hasegawa
  • Patent number: 5311037
    Abstract: Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current flows between the superconducting electrode across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: May 10, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Harada, Shinichiro Yano, Mutsuko Miyake, Ushio Kawabe, Toshikazu Nishino
  • Patent number: 5306927
    Abstract: A high current amplifier, three terminal device, comprising a Josephson tunnel junction and a Schottky diode is configured so that the Josephson junction and Schottky diode share a common base electrode which is made very thin. Electrons which cross the Schottky barrier are supplied to the Josephson junction to obtain the amplified output current.
    Type: Grant
    Filed: August 15, 1991
    Date of Patent: April 26, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Bruce J. Dalrymple, Arnold H. Silver, Randy W. Simon
  • Patent number: 5272358
    Abstract: In a superconducting device wherein the value of a superconducting current to flow between two superconducting electrodes provided in contact with a semiconductor is controlled by a control electrode provided between the superconducting electrodes, high impurity concentration regions are formed within the semiconductor so as to lie in contact with the superconducting electrodes and to extend to under ends of the control electrode.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: December 21, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Ushio Kawabe, Mutsuko Hatano
  • Patent number: 5260264
    Abstract: One or more superconducting memory cells capable of storing binary values as the presence or absence of a persisting loop current in their superconducting memory loops are connected in series by a circuit current line. This arrangement is provided with a set gate which switches to the voltage state and outputs circuit current from its output terminal to one end of the circuit current line when write command current is supplied to its control terminal and is further provided with a sense gate whose control terminal is series coupled though a capacitance element with the same one end of the circuit current line and whose ground side terminal is connected with the other end of the circuit control line thereby forming through the sense gate a read-out loop for receiving as differential current persisting loop current selectively discharged from the memory loop. The differential current causes the sense gate to switch itself to the voltage state and output a sense current.
    Type: Grant
    Filed: March 4, 1991
    Date of Patent: November 9, 1993
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Itaru Kurosawa, Hiroshi Nakagawa, Masahiro Aoyagi
  • Patent number: 5256897
    Abstract: An oxide superconducting device has a junction structure composed of at least one oxide superconductor and at least one insulator in which carriers have been generated. As the insulator in which carriers have been generated, there can be used, for example, SrTiO.sub.3 doped with Nb. With such a device, rectifying characteristics can be attained in the junction.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: October 26, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiro Hasegawa, Toshiyuki Aida, Toshikazu Nishino, Mutsuko Hatano, Hideaki Nakane, Tokuumi Fukazawa
  • Patent number: 5250817
    Type: Grant
    Filed: August 12, 1992
    Date of Patent: October 5, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Richard L. Fink
  • Patent number: 5247189
    Abstract: A tunnel junction type superconducting device includes a pair of superconductor electrodes formed of compound oxide superconductor material, and a metal layer of a high electric conductivity formed between the pair of superconductor electrodes so as to maintain the pair of superconductor electrodes separate from each other. The pair of superconductor electrodes is separated from each other by a distance within a range of 3 nm to 70 nm by action of the metal layer.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: September 21, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Hideo Itozaki, Shuji Yazu
  • Patent number: 5239187
    Abstract: Disclosed is a transistor or diode type Josephson effect device, at least two electrodes of which are made of superconductive material. If the Josephson effect is to be exerted in a semiconductor layer between the access electrodes, the distance between them should be smaller than the length of coherence, namely 10 to 1000 angstroms. According to the disclosure, the control channel between access electrodes is replaced by two channels perpendicular to the semiconductor layer, located between the two access electrodes and a layer of superconductive material placed between the substrate and the semiconductor layer. The disclosure can be applied to transistors, phototransistors and diodes with high switching speed.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: August 24, 1993
    Assignee: Thomson-CSF
    Inventors: Alain Schuhl, Stephane Tyc, Alain Friederich
  • Patent number: 5231295
    Abstract: A field-effect transistor comprises, on a substrate, a layer of semiconductor material incorporating natural or artificial inclusions of superconducting material. The source, drain and gate electrodes are made on this layer. Applications: field-effect transistors with low gate control voltage. FIG. 3.
    Type: Grant
    Filed: August 16, 1991
    Date of Patent: July 27, 1993
    Assignee: Thomson-CSF
    Inventors: Stephane Tyc, Alain Schuhl
  • Patent number: 5227645
    Abstract: In a dc SQUID element having two quasi-planar-type Josephson junction portions, as obtained by laminating a plurality of superconducting thin films on a substrate, a SQUID ring and a counter electrode on either of which quasi-planar-type Josephson junction portions are to be formed, are respectively formed at the lowermost layer and the uppermost layer, or at the uppermost layer and the lowermost layer, so that the value of critical current can be adjusted. The arrangement above-mentioned assures good flatness and film quality of a barrier layer interposed between the lower and upper electrodes of the quasi-planar-type Josephson junction portions.
    Type: Grant
    Filed: September 17, 1991
    Date of Patent: July 13, 1993
    Assignee: Shimadzu Corporation
    Inventor: Kei Shinada
  • Patent number: 5160983
    Abstract: Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current which flows between the superconducting electrodes across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
    Type: Grant
    Filed: November 21, 1989
    Date of Patent: November 3, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Harada, Shinichiro Yano, Mutsuko Miyake, Ushio Kawabe, Toshikazu Nishino