Abstract: The present disclosure discloses a thin film transistor array substrate including an active layer disposed on a base substrate, wherein the active layer includes a first active region and a second active region located in a same structural layer, the first active region has a material comprising poly-silicon, and includes a first channel region, and a first source region and a first drain region that are located at both sides of the first channel region, respectively, the first source region having a first contact layer disposed thereon, the first drain region having a second contact layer disposed thereon, and materials of both the first and second contact layers being boron-doped poly-silicon; and the second active region has a material comprising metal oxide semiconductor, and includes a second channel region and a second source region and a second drain region that are located at both sides of the second channel region, respectively.

Abstract: To provide a thin touch panel, a touch panel with high visibility, a lightweight touch panel, or a touch panel with low power consumption. A pair of conductive layers included in a capacitive touch sensor have a mesh shape including a plurality of openings. Furthermore, a material blocking visible light is provided to overlap with a region between two display elements in a plan view; thus, a light-blocking layer can be obtained. Furthermore, the pair of conductive layers included in the touch sensor are provided between a pair of substrates included in the touch panel, and a conductive layer capable of supplying a constant potential is provided between a circuit which drives a display element and the pair of conductive layers.

Abstract: A semiconductor device in which a transistor has the characteristic of low off-state current is provided. The transistor comprises an oxide semiconductor layer having a channel region whose channel width is smaller than 70 nm. A temporal change in off-state current of the transistor over time can be represented by Formula (a2). In Formula (a2), IOFF represents the off-state current, t represents time during which the transistor is off, ? and ? are constants, ? is a constant that satisfies 0<??1, and CS is a constant that represents load capacitance of a source or a drain.

Abstract: According to one embodiment, a nonvolatile memory device includes a first conductive portion, an insulating film surrounding a side surface of the first conductive portion, an intermediate layer provided on the first conductive portion and the insulating film, a first film including a first portion provided on the intermediate layer and at least one second portion provided in the intermediate layer and outside an upper edge of the first conductive portion, the first film including, above the first conductive portion, a resistance change portion that has a first resistance state and a second resistance state having resistance higher than resistance in the first resistance state, and a second conductive portion provided at least on the resistance change portion.

Abstract: An electroluminescent display device includes a substrate on which first and second pixel regions are defined, a passivation layer over the substrate, a first electrode in each of the first and second pixel regions on the passivation layer, a bank layer exposing the first electrode, a light emitting layer on the first electrode exposed by the bank layer, and a second electrode on the light emitting layer, further the bank layer includes first and second openings exposing the first electrodes corresponding to the first and second pixel regions, respectively, and also a depth of the second opening is larger than a depth of the first opening, and a height of the bank layer of the second pixel region is larger than a height of the bank layer of the first pixel region.

Abstract: Techniques are disclosed for forming semiconductor integrated circuits including a channel region, a gate dielectric between the gate electrode and the channel region, a first layer between the gate dielectric and the gate electrode, the first layer comprising temperature compensation material. In addition, the integrate circuit includes a source region adjacent to the channel region, a source metal contact on the source region, a drain region adjacent to the channel region, and a drain metal contact on the drain region. The temperature compensation material has a temperature dependent band structure, work-function, or polarization that dynamically adjusts the threshold voltage of the transistor in response to increased operating temperature to maintain the off-state current Ioff stable or otherwise within an acceptable tolerance. The temperature compensation material may be used in conjunction with a work function material to help provide desired performance at lower or non-elevated temperatures.

Abstract: Disclosed are a thin film transistor, a method of manufacturing the same, and an organic light emitting display device including the same, in which a driving stability of a driving transistor is enhanced even without connecting a source electrode to a bottom gate electrode of the driving transistor. The film transistor includes a N-type semiconductor layer, a P-type semiconductor layer on the N-type semiconductor layer, a first gate electrode on the P-type semiconductor layer, a gate insulation layer between the first gate electrode and the P-type semiconductor layer, a first source electrode connected to a first side of the P-type semiconductor layer, and a first drain electrode connected to a second side of the P-type semiconductor layer.

Abstract: A method for fabricating a thin film transistor includes providing a substrate (100); forming a semiconductor layer (105) over the substrate (100); forming a source-drain metal layer (106) over the semiconductor layer (105); applying one patterning process to the semiconductor layer (105) and the source-drain metal layer (106) to form an active layer (1), a source electrode (2), and a drain electrode (3); forming a gate insulating layer (101) and an interlayer insulating layer (102) that cover the active layer (1), the source electrode (2), and the drain electrode (3); applying a patterning process to the interlayer insulating layer (102) to form a first window (10) in the interlayer insulating layer (102) to expose a portion of the gate insulating layer (101); and forming a gate electrode (4) in the first window (10). An orthogonal projection of the gate electrode (4) on the substrate (100) is in an orthogonal projection of the active layer (1) on the substrate (100).

Abstract: A transistor includes a gate electrode, a semiconductor layer overlapping the gate electrode, the semiconductor layer including an oxide semiconductor, and a source electrode and a drain electrode spaced apart from the source electrode, wherein the source and drain electrodes are connected to the semiconductor layer. The semiconductor layer includes a plurality of layers, wherein a crystallinity of a layer of the plurality of layers of the semiconductor layer is a ratio of a crystalline oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer, to an amorphous oxide semiconductor, included in the layer of the plurality of layers of the semiconductor layer. A first layer of the plurality of layers of the semiconductor layer has a different crystallinity with respect to a second layer of the plurality of layers of the semiconductor layer.

Abstract: A thin film transistor array substrate and a display panel are provided. The thin film transistor array substrate includes a substrate, a thin film transistor, a scan line, a data line and a pixel electrode. The thin film transistor includes a semiconductor member, a gate electrode, a source electrode and a drain electrode. The source electrode and the drain electrode include a first extension portion and a second extension portion, respectively. The first extension portion and the second extension portion are configured to block light that is emitted toward an electron migration channel of the thin film transistor. Thus, external light emitting toward the electron migration channel can be prevented.

Abstract: A metal oxide film includes indium, , ( is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.

Abstract: A device for converting the wavelength of electromagnetic radiation is disclosed. In an embodiment the device includes a carrier, a conversion layer configured to at least partly convert a wavelength of the electromagnetic radiation and an intermediate layer, wherein the conversion layer is connected to the carrier via the intermediate layer, and wherein the intermediate layer, at least in partial regions, includes a solid layer and a connection layer.

Abstract: A semiconductor device in which parasitic capacitance is reduced is provided. A first insulating layer is deposited over a substrate. A first oxide insulating layer and an oxide semiconductor layer are deposited over the first insulating layer. A second oxide insulating layer is deposited over the oxide semiconductor layer and the first insulating layer. A second insulating layer and a first conductive layer are deposited over the second oxide insulating layer. A gate electrode layer, a gate insulating layer, and a third oxide insulating layer are formed by etching. A sidewall insulating layer including a region in contact with a side surface of the gate electrode layer is formed. A second conductive layer is deposited over the gate electrode layer, the sidewall insulating layer, the oxide semiconductor layer, and the first insulating layer. A third conductive layer is deposited over the second conductive layer. A low-resistance region is formed in the oxide semiconductor layer by performing heat treatment.

Abstract: A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the first region contains at least indium, an element M (the element M is one or more of Al, Ga, Y, and Sn), and zinc, and the plurality of second regions contain indium and zinc. Since the plurality of second regions have a higher concentration of indium than the first region, the plurality of second regions have a higher conductivity than the first region. An end portion of one of the plurality of second regions overlaps with an end portion of another one of the plurality of second regions. The plurality of second regions are three-dimensionally surrounded with the first region.

Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.

Abstract: Provided are a display device and a method of manufacturing the same. A display device includes: a lower substrate, a first over-coat layer on the lower substrate, the first over-coat layer including a first contact hole, a thin film transistor between the lower substrate and the first over-coat layer, the thin film transistor including a drain electrode including an end portion overlapping the first contact hole, the end portion of the drain electrode including an under-cut region, a lower passivation layer between the thin film transistor and the first over-coat layer, the lower passivation layer partially exposing a side surface of the end portion of the drain electrode, and a light-emitting structure on the first over-coat layer, the light-emitting structure being electrically connected to the thin film transistor through the first contact hole.

Abstract: A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer.

Abstract: A thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The thin film transistor comprises a gate electrode, an active layer, a source electrode and a drain electrode. The source electrode and the drain electrode include a first conductive layer provided on the active layer, and an etching rate of a material of the first conductive layer is greater than an etching rate of a material of the active layer in an etching liquid. The problem that the active layer of the thin film transistor is easily corroded in a back channel etch process is avoided, a number of patterning processes is reduced, and fabrication cost is reduced.

Abstract: An operator is a momentary operator. An electronic control unit is configured to when the operator does not pass through any one of traveling operation positions while the operator is operated from an initial position to an neutral operation position and then returned to the initial position, and when the operator is continuously held at the neutral operation position for a first predetermined time or longer, change a shift range of an automatic transmission to the neutral range, and when the operator passes through at least one of the traveling operation positions while the operator is operated from the initial position to the neutral operation position and then returned to the initial position, prohibit a change of the shift range to the neutral range even when the operator is continuously held at the neutral operation position for the first predetermined time or longer.

Abstract: An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.

Abstract: A method for fabricating a thin film transistor includes providing a substrate (100); forming a semiconductor layer (105) over the substrate (100); forming a source-drain metal layer (106) over the semiconductor layer (105); applying one patterning process to the semiconductor layer (105) and the source-drain metal layer (106) to form an active layer (1), a source electrode (2), and a drain electrode (3); forming a gate insulating layer (101) and an interlayer insulating layer (102) that cover the active layer (1), the source electrode (2), and the drain electrode (3); applying a patterning process to the interlayer insulating layer (102) to form a first window (10) in the interlayer insulating layer (102) to expose a portion of the gate insulating layer (101); and forming a gate electrode (4) in the first window (10). An orthogonal projection of the gate electrode (4) on the substrate (100) is in an orthogonal projection of the active layer (1) on the substrate (100).

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: In a transistor including an oxide semiconductor film, field-effect mobility and reliability are improved. A semiconductor device includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film is formed using In oxide or In—Zn oxide. The second oxide semiconductor film is formed using In-M-Zn oxide (M is Al, Ga, or Y) and includes a region where the number of In atoms is 40% or more and 50% or less and the number of M atoms is 5% or more and 30% or less of the total number of In, M, and Zn atoms.

Abstract: An array substrate structure is provided, which includes a substrate with a first surface and a second surface opposite to the first surface. A first TFT is on the first surface of the substrate, and a second TFT is on the second surface of the substrate. A through via passes through the substrate, and the first TFT is electrically connected to the second TFT through the through via.

Abstract: A semiconductor device having favorable reliability which is capable of retaining data for a long time is provided. The semiconductor device includes a first gate electrode, a first gate insulator over the first gate electrode, a first oxide over the first gate insulator, a second oxide and a third oxide over the first oxide, a first conductor over the second oxide, a second conductor over the third oxide, a fourth oxide over the first oxide, the first conductor, and the second conductor, a second gate insulator over the fourth oxide, and a second gate electrode over the second gate insulator. The first conductor is in contact with a top surface of the second oxide, a side surface of the second oxide that faces the third oxide, and part of a top surface of the first oxide. The second conductor is in contact with a top surface of the third oxide, a side surface of the third oxide that faces the second oxide, and part of the top surface of the first oxide.

Abstract: The number of lithography processes is reduced and a high-definition display device is provided. The display device includes a pixel portion and a driver circuit for driving the pixel portion. The pixel portion includes a first transistor and a pixel electrode electrically connected to the first transistor. The driver circuit includes a second transistor and a connection portion. The second transistor includes a metal oxide film, first and second gate electrodes that face each other with the metal oxide film positioned therebetween, source and drain electrodes over and in contact with the metal oxide film, and a first wiring connecting the first and second gate electrodes. The connection portion includes a second wiring on the same surface as the first gate electrode, a third wiring on the same surface as the source electrode and the drain electrode, and a fourth wiring connecting the second wiring and the third wiring.

Abstract: A process of forming a high electron mobility transistor (HEMT) with a reverse arrangement for the barrier layer and the channel layer thereof is disclosed. The process includes steps of epitaxially growing an oxide layer containing zinc (Zn) on a substrate where the oxide layer shows an O-polar surface; epitaxially growing a semiconductor stack made of nitride semiconductor materials on the oxide layer where the semiconductor stack includes a nitride semiconductor layer, a barrier layer and a channel layer on the oxide layer in this order; attaching a temporal substrate to the semiconductor stack; removing the substrate and the oxide layer from the semiconductor stack; attaching a support substrate to the nitride semiconductor layer; and removing the temporal substrate from the semiconductor stack.

Abstract: A method for manufacturing a thin film transistor is disclosed. The method includes: manufacturing a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode on a substrate. The active layer is formed from a zirconium indium oxide semiconductor material by a solution process. A thin film transistor, an array substrate, a method for manufacturing an array substrate, a display panel and a display device are also disclosed.

Abstract: A change in electrical characteristics can be inhibited and reliability can be improved in a semiconductor device including an oxide semiconductor. The semiconductor device including an oxide semiconductor film includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film over the oxide semiconductor film, and a third insulating film over the second insulating film. The second insulating film includes oxygen and silicon, the third insulating film includes nitrogen and silicon, and indium is included in a vicinity of an interface between the second insulating film and the third insulating film.

Abstract: A mobile terminal including a housing defining an accommodating space and including a cover window configured to transmit light and disposed on one surface of the housing; a display unit provided under the cover window; a hole penetrating the display unit to a lower surface of the cover window; and a sensing unit provided under the display unit in correspondence with the hole and configured to sense the light transmitted by the cover window through the hole.

Abstract: A thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of a TFT includes: forming an active layer, a gate electrode, a source electrode and a drain electrode respectively electrically connected with the active layer, and a gate insulating layer disposed between the gate electrode and the active layer, so that the gate electrode, the source electrode and the drain electrode are formed in the same patterning process. The method can reduce the number of masks used in the manufacturing process of the TFT or an array substrate, reduce the technology process, improve the productivity, and reduce the production cost.

Abstract: The semiconductor device includes a transistor including an oxide semiconductor film having a channel formation region, a gate insulating film, and a gate electrode layer. In the transistor, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the thickness of the gate insulating film is large (equivalent oxide thickness which is obtained by converting into a thickness of silicon oxide containing nitrogen is 5 nm or more and 50 nm or less, preferably 10 nm or more and 40 nm or less). Alternatively, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the resistivity of the source region and the drain region is 1.9×10?5 ?·m or more and 4.8×10?3 ?·m or less.

Abstract: A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.

Abstract: An array substrate according to the present invention is a TFT substrate including a pixel TFT and a drive TFT on a substrate, where the pixel TFT includes a first source electrode, a first drain electrode, and an amorphous silicon layer, and the drive TFT includes a third oxide semiconductor layer provided on a gate insulating film while overlapping a second gate electrode in plan view, and a second source electrode and a second drain electrode overlapping the third oxide semiconductor layer in plan view, with a third separation portion separating the second source electrode and the second drain electrode from each other.

Abstract: A sputtering target includes an indium cerium zinc oxide represented by In2CexZnO4+2x, wherein x=0.5˜2. A relative density of the sputtering target is larger than or equal to 90%. A bulk resistance of the sputtering target in a range from about 10?2 ?cm to about 10 ?cm. A weight percentage of crystalline In2CexZnO4+2x in the sputtering target is larger than 80%.

Abstract: An oxide semiconductor film with a low density of defect states is formed. In addition, an oxide semiconductor film with a low impurity concentration is formed. Electrical characteristics of a semiconductor device or the like using an oxide semiconductor film is improved. A semiconductor device including a capacitor, a resistor, or a transistor having a metal oxide film that includes a region; with a transmission electron diffraction measurement apparatus, a diffraction pattern with luminescent spots indicating alignment is observed in 70% or more and less than 100% of the region when an observation area is changed one-dimensionally within a range of 300 nm.

Abstract: A method for producing a plurality of semiconductor components and a semiconductor component are disclosed. In an embodiment the component includes a light transmissive carrier, a semiconductor body disposed on the light transmissive carrier, the semiconductor body including a first semiconductor layer, a second semiconductor layer and an active region being arranged between the first semiconductor layer and the second semiconductor layer, wherein the semiconductor body includes a first patterned main surface facing the light transmissive carrier and a second main surface facing away from the carrier and a contact structure including a first contact area and a second contact area arranged on the second main surface, wherein the second contact area is electrically connected to the second semiconductor layer, and wherein the contact structure comprises a via extending from the second main surface throughout the second semiconductor layer and the active region into the first semiconductor layer.

Abstract: A transistor structure includes a first oxide semiconductor layer, a source structure and a drain structure, and a second oxide semiconductor layer. The first oxide semiconductor layer is doped with sulfur. The source structure and the drain structure are disposed on the first oxide semiconductor layer, and a region of the first oxide semiconductor layer between the source structure and the drain structure forms a channel region. The second oxide semiconductor layer doped with sulfur is at least formed on the channel region of the first oxide semiconductor layer.

Abstract: A semiconductor device capable of retaining data for a long time is provided. A first transistor and a second transistor having different electrical characteristics from those of the first transistor are provided over the same layer without an increase in the number of manufacturing steps.

Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.

Abstract: A display device according to the present invention includes a substrate, and a plurality of pixels arranged in the substrate, wherein each of the plurality of pixels includes a light emitting element, a first transistor, a second transistor, a first insulation layer and a second insulation layer, the first transistor includes a first semiconductor layer, the second transistor includes a second semiconductor layer, the first insulation layer is arranged across the plurality of pixels between the first semiconductor layer and the second semiconductor layer, the second insulation layer is arranged between the first insulation layer and the second semiconductor layer, the first semiconductor layer is arranged on the substrate side sandwiching the first insulation layer with respect to the second semiconductor layer, the first insulation layer includes a silicon oxide layer; and the second insulation layer includes an aluminum oxide layer.

Abstract: There is provided an oxide sintered body including indium, tungsten and zinc, wherein the oxide sintered body includes a bixbite type crystal phase as a main component and has an apparent density of higher than 6.6 g/cm3 and equal to or lower than 7.5 g/cm3, a content rate of tungsten to a total of indium, tungsten and zinc in the oxide sintered body is higher than 0.5 atomic % and equal to or lower than 5.0 atomic %, a content rate of zinc to the total of indium, tungsten and zinc in the oxide sintered body is equal to or higher than 1.2 atomic % and equal to or lower than 19 atomic %, and an atomic ratio of zinc to tungsten is higher than 1.0 and lower than 60. There are also provided a sputtering target including this oxide sintered body, and a semiconductor device.

Abstract: A display device, and method for manufacture, having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. A material of the first active layer is different than a material of the second active layer, and a hydrogen concentration of the second gate insulator is different from a hydrogen concentration of the first gate insulator.

Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

Abstract: A detector that includes an all-oxide, Schottky-type heterojunction. The “metal” side of the heterojunction is formed, for example, from a dysprosium (“Dy”) doped cadmium oxide (“CdO”) (i.e., CdO:Dy). The semiconductor side of the heterojunction is formed, for example, from cadmium magnesium oxide (“CdMgO”). On the metal side of the junction, “hot” electrons are created through the excitation of surface plasmon polaritons by infrared radiation. The hot electrons are able to cross the Schottky-type barrier of the heterojunction into the conduction band of the semiconductor where they can be detected. The working wavelength of infrared radiation that is being detected can be adjusted or tuned by modifying the Dy content of Dy-doped CdO. The height of the Schottky-type barrier can also be adjusted by modifying the composition of CdMgO, which allows for the optimization of the Schottky-type barrier height for a given working wavelength.

Abstract: A method for manufacturing an array substrate, an array substrate and a display panel are provided. The method includes forming patterns of a gate metal layer and a gate insulating layer successively on a base plate, forming a pattern of a semiconductor layer, where the pattern of the semiconductor layer comprises a pattern of an active region and a pattern of a pixel electrode region, the semiconductor layer comprises an insulative oxide layer and a semiconductive oxide layer stacked on the insulative oxide layer, and the insulative oxide layer is located between the gate insulating layer and the semiconductive oxide layer, forming a pattern of a source and drain metal layer, and subjecting the semiconductive oxide layer in the pixel electrode region to plasma treatment, to convert the semiconductive oxide layer in the pixel electrode region into a conductor.

Abstract: A novel oxide semiconductor, a novel oxynitride semiconductor, a transistor including them, or a novel sputtering target is provided. A composite target includes a first region and a second region. The first region includes an insulating material and the second region includes a conductive material. The first region and the second region each include a microcrystal whose diameter is greater than or equal to 0.5 nm and less than or equal to 3 nm or a value in the neighborhood thereof. A semiconductor film is formed using the composite target.

Abstract: According to an aspect of a present inventive subject matter, a crystalline film includes a crystalline metal oxide as a major component, the crystalline film includes a corundum structure, a surface area that is 9 ?m2 or more, and a dislocation density that is less than 5×106 cm?2.

Abstract: A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain regions are selectively reduced. Oxygen-defect-inducing factors are introduced into the oxide semiconductor layer, whereby oxygen defects serving as donors can be effectively formed in the oxide semiconductor layer. The introduced oxygen-defect-inducing factors are one or more selected from titanium, tungsten, and molybdenum, and are introduced by an ion implantation method.