Abstract: A soda-lime-silica glass-ceramic article having an amorphous matrix phase and a crystalline phase is disclosed along with a method of manufacturing a soda-lime-silica glass-ceramic article from a parent glass composition comprising 47-63 mol % SiO2, 15-22 mol % Na2O, and 18-36 mol % CaO. The crystalline phase of the glass-ceramic article has a higher concentration of sodium (Na) than that of the amorphous matrix phase.

Abstract: A highly flexible display device and a method for manufacturing the display device are provided. A transistor including a light-transmitting semiconductor film, a capacitor including a first electrode, a second electrode, and a dielectric film between the first electrode and the second electrode, and a first insulating film covering the semiconductor film are formed over a flexible substrate. The capacitor includes a region where the first electrode and the dielectric film are in contact with each other, and the first insulating film does not cover the region.

Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.

Abstract: A display panel and a display device are provided. The display panel is an LTPO display panel including at least one LTPS thin film transistor and at least one Oxide thin film transistor. The LTPS thin film transistor and the Oxide thin film transistor are both formed on the side of the buffer layer facing away from the substrate. A groove structure or a hollow structure is provided on the buffer layer at a position corresponding to the Oxide thin film transistor, and the Oxide thin film transistor is fabricated in the groove structure or the hollow structure, to avoid the case that the great height by which the Oxide thin film transistor protrudes from the substrate causes a great thickness of the LTPO display panel.

Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.

Abstract: A transistor is provided that comprises a source region overlying a base structure, a drain region overlying the base structure, and a block of semiconducting material overlying the base structure and being disposed between the source region and the drain region. The block of semiconducting material comprises a gate controlled region adjacent the source region, and a drain access region disposed between the gate controlled region and the drain region. The drain access region is formed of a plurality of semiconducting material ridges spaced apart from one another by non-channel trench openings, wherein at least a portion of the non-channel trench openings being filled with a doped material to provide a depletion region to improve breakdown voltage of the transistor.

Abstract: A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.

Abstract: An array substrate includes an electrostatic shielding layer disposed on a substrate, an isolating layer covering the electrostatic shielding layer, gate lines, data lines, and thin film transistors. The gate lines, the data lines, and the thin film transistors are disposed on the isolating layer. An orthographic projection of a pattern of the electrostatic shielding layer on the substrate covers an orthographic projection of at least one of a pattern of the gate lines, a pattern of the data lines, and a pattern of the thin film transistors on the substrate.

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a first insulator; a first conductor over the first insulator; a second insulator over the first conductor; a first oxide over the second insulator; second and third conductors over the first oxide; a third insulator over the second and third conductors; a second oxide over the first oxide and between the second and third conductors; a fourth insulator over the second oxide; a fourth conductor over the fourth insulator; a fifth insulator in contact with the third insulator and the second oxide; a sixth insulator in contact with the first, second, third, and fifth insulators, and the second oxide; and a seventh insulator in contact with the fourth and sixth insulators, the second oxide, and the fourth conductor. The first, sixth, and seventh insulators each contain a silicon nitride. The fifth insulator contains an aluminum oxide.

Abstract: An active matrix substrate of an embodiment includes a plurality of TFTs provided in a peripheral circuit region. The plurality of TFTs includes a TFT (10A) in which, when viewed in a direction perpendicular to a substrate (11A), a length in the channel width direction of a source electrode region (15AR) and a length in the channel width direction of a drain electrode region (16AR), WAs and WAd, are each smaller than a length in the channel width direction of the oxide semiconductor layer (14A), WAos, the length in the channel width direction of the oxide semiconductor layer (14A), WAos, is smaller than a length in the channel width direction of a gate electrode (12A), WAg, and a region in which at least one of the source electrode region (15AR) and the drain electrode region (16AR) is in contact with the oxide semiconductor layer(14A) entirely overlaps the gate electrode (12A).

Abstract: An active device substrate includes a substrate, first to third scan lines, a first data line, a second data line, a first active device, and a first pixel electrode. The first scan line, the second scan line, and the third scan line are extending along a first direction. The first data line and the second data line are extending along a second direction. The first active device includes a first gate, a second gate, a first semiconductor pattern layer, a first source, and a first drain. The first gate is electrically connected to the first scan line. The second gate is electrically connected to the second scan line. The first scan line and the second scan line transmit different driving signals. The first source is electrically connected to the first data line. The first pixel electrode is electrically connected to the first drain of the first active device.

Abstract: The present disclosure relates to a liquid crystal display (LCD) having a substrate and at least one scanning controller. the substrate is configured with a plurality of thin film transistors (TFTs). Each of the TFTs includes a gate, a drain and a pixel electrode, and the gate of each of the TFTs electrically connecting to the scanning controller along a first direction in sequence. One end of the drain connects to the pixel electrode, and the other end of the drain is stacked on the gate along a third direction perpendicular to the substrate. The drain is insulated from the gate, and a dimension of a projection area of the drain on the gate along the third direction increases when a distance between the TFT and the scanning controller in the first direction increases.

Abstract: An oxide semiconductor device has an improved withstand voltage when an inverse voltage is applied, while suppressing diffusion of different types of materials to a Schottky interface. The oxide semiconductor device includes an n-type gallium oxide epitaxial layer, p-type oxide semiconductor layers of an oxide that is a different material from the material for the gallium oxide epitaxial layer, a dielectric layer formed to cover at least part of a side surface of the oxide semiconductor layer, an anode electrode, and a cathode electrode. Hetero pn junctions are formed between the lower surfaces of the oxide semiconductor layers and a gallium oxide substrate or between the lower surfaces of the oxide semiconductor layers and the gallium oxide epitaxial layer.

Abstract: A method for manufacturing a ceramic electronic component in which a plated electrode can be formed in a region of the surface of a ceramic base body formed of a titanium-containing metal oxide. The method includes preparing a ceramic base body containing a titanium-containing metal oxide, forming a low-resistance section by modifying the metal oxide through irradiation of part of a surface layer portion of the ceramic base body with a pulse laser with a peak power density of 1×106 W/cm2 to 1×109 W/cm2 and a frequency of 500 kHz or less, and forming an electrode on the low-resistance section by electroplating. The laser irradiation generates an O defect in a titanium-containing metal oxide, such as BaTiO3 to form an n-type semiconductor. Since this semiconductor section has a lower resistance value than the metal oxide, plating metal can be selectively deposited by electroplating.

Abstract: An organic light emitting diode display is discussed. The organic light emitting diode display can include a substrate including a thin film transistor region in which a thin film transistor and an organic light emitting diode connected to the thin film transistor are disposed, and an auxiliary electrode region in which an auxiliary electrode is disposed, a barrier disposed on the auxiliary electrode, a cathode included in the organic light emitting diode, divided by the barrier, and exposing at least a portion of the auxiliary electrode, an end of the cathode being in direct contact with the auxiliary electrode, and a cover layer disposed on the cathode, the cover layer having continuity to cover the barrier and the auxiliary electrode.

Abstract: A method of driving a pixel including: during a first period of a first frame, applying a first scan signal having a turn-on level to the first scan line, applying a data voltage to a data line, and applying a second scan signal having the turn-on level to the second scan line; and during a second period of a second frame, applying the first scan signal having the turn-on level to the first scan line, applying a bias voltage to the data line, and applying the second scan signal having a turn-off level to the second scan line, the second frame is a frame subsequent to the first frame, the second period is longer than the first period, and a light-emitting diode emits light at luminance based on the data voltage during at least a portion of the first frame and at least a portion of the second frame.

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.

Abstract: The number of lithography processes is reduced and a high-definition display device is provided. The display device includes a pixel portion and a driver circuit for driving the pixel portion. The pixel portion includes a first transistor and a pixel electrode electrically connected to the first transistor. The driver circuit includes a second transistor and a connection portion. The second transistor includes a metal oxide film, first and second gate electrodes that face each other with the metal oxide film positioned therebetween, source and drain electrodes over and in contact with the metal oxide film, and a first wiring connecting the first and second gate electrodes. The connection portion includes a second wiring on the same surface as the first gate electrode, a third wiring on the same surface as the source electrode and the drain electrode, and a fourth wiring connecting the second wiring and the third wiring.

Abstract: A display substrate includes: a switching element including a pixel connection electrode composed of a first conductive film; a pixel electrode composed of a third conductive film and including a portion overlapping the pixel connection electrode; a pixel contact hole drilled through first, second, and third insulating films at a position overlapping the pixel connection electrode and the pixel electrode; a wiring composed of a second conductive film; a wiring connection portion including a portion overlapping the wiring; a first wiring contact hole drilled through the third insulating film at a position overlapping the wiring and the wiring connection portion; a lead-out wiring including a portion overlapping a section of the wiring connection portion not overlapping the wiring; and a second wiring contact hole drilled through the first to the third insulating films at a position overlapping the wiring connection portion and the lead-out wiring.

Abstract: Ink formulations based on nanoparticles. The present invention relates to ink formulations based on (semi)conducting nanoparticles. In particular, the present invention relates to ink compositions based on zinc oxide and aluminium (semiconducting nanoparticles suitable for different printing methods.

Abstract: A scanning antenna provided with an array of a plurality of antenna units includes a TFT substrate, a slot substrate, and a liquid crystal layer disposed between the TFT substrate and the slot substrate. The slot substrate includes a second dielectric substrate, a slot electrode supported on a first main surface of the second dielectric substrate, and a first dielectric layer disposed between the second dielectric substrate and the slot electrode. The slot electrode has tensile stress. The first dielectric layer has compressive stress.

Abstract: An array substrate includes a gate line including a first metal film being arranged on an upper layer side through a first insulating film with respect to a semiconductor film, a source line including a second metal film arranged on a lower layer side through a second insulating film with respect to the semiconductor film and intersecting the gate line, a gate electrode including the first metal film, a channel region including a part of the semiconductor film and superimposing the gate electrode, a source region and a drain region formed by reducing a resistance of a part of the semiconductor film, and a source superimposing line formed by reducing a resistance of a part of the semiconductor film, continued to the source region and having at least one part superimposed with the source line, the source superimposing line being connected to the source line through contact holes opened and formed at a plurality of positions sandwiching the gate line of the second insulating film.

Abstract: A foldable display device including: a display panel; a cover window disposed on the display panel; and a base film attached below the display panel, wherein the base film includes a first metal sheet and a second metal sheet bonded to the first metal sheet, and the first metal sheet includes a first flat portion, a second flat portion, and an inclined portion bent from the first flat portion and the second flat portion.

Abstract: Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin. A gate dielectric layer is over the top of the fin and laterally adjacent the sidewalls of the fin. A gate electrode is over the gate dielectric layer over the top of the fin and laterally adjacent the sidewalls of the fin. First and second semiconductor source or drain regions are adjacent the first and second sides of the gate electrode, respectively. First and second trench contact structures are over the first and second semiconductor source or drain regions, respectively, the first and second trench contact structures both comprising a U-shaped metal layer and a T-shaped metal layer on and over the entirety of the U-shaped metal layer.

Abstract: A substrate of the present invention sequentially includes an insulating substrate, a lower layer, a first insulating film, a second insulating film, and an upper layer. The substrate is provided with a hole reaching at least one of the lower layer or the insulating substrate through at least the first insulating film and the second insulating film. The first insulating film includes in a region with the hole a protrusion that protrudes from an end portion in contact with the first insulating film of the second insulating film. The substrate includes a stepwise structure including the protrusion and the end portion. The upper layer coats the stepwise structure. An upper surface portion of the first insulating film in a region with the protrusion and an upper surface portion of the first insulating film in a region below the end portion of the second insulating film are coplanar.

Abstract: A liquid crystal display device having a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. Each of the scan line and the signal line is electrically connected to the transistor. Each of the scan line and the signal line includes a metal layer. The transistor is electrically connected to the pixel electrode. The transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. The visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

Abstract: A novel metal oxide is provided. The metal oxide has a plurality of energy gaps, and includes a first region having a high energy level of a conduction band minimum and a second region having an energy level of a conduction band minimum lower than that of the first region. The second region comprises more carriers than the first region. A difference between the energy level of the conduction band minimum of the first region and the energy level of the conduction band minimum of the second region is 0.2 eV or more. The energy gap of the first region is greater than or equal to 3.3 eV and less than or equal to 4.0 eV and the energy gap of the second region is greater than or equal to 2.2 eV and less than or equal to 2.9 eV.

Abstract: The disclosure provides a display panel and a manufacturing method thereof. The display panel display panel comprises a first substrate and a second substrate which are assembled, the second substrate is provided with an organic electroluminescent device thereon, an anode layer of the organic electroluminescent device is away from the first substrate and a cathode layer thereof is closer to the first substrate than the anode layer; the cathode layer of the organic electroluminescent device is electrically connected to an auxiliary electrode on a light entering surface of the first substrate through multiple conductive spacers, the cathode layer is a transparent electrode layer; the auxiliary electrode has a resistance smaller than that of the cathode layer of the organic electroluminescent device; the auxiliary electrode is a grid-shaped auxiliary electrode and is provided in a non-display region, the auxiliary electrode is opaque and acts as a black matrix.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer and a first layer. The semiconductor layer includes a first portion including a first element and oxygen. The first element includes at least one selected from the group consisting of In, Ga, Zn, Al, Sn, Ti, Si, Ge, Cu, As, and W. The first layer includes a second element including at least one selected from the group consisting of W, Ti, Ta, Mo, Cu, Al, Ag, Hf, Au, Pt, Pd, Ru, Y, V, Cr, Ni, Nb, In, Ga, Zn, and Sn. The first portion includes a first region and a second region. The second region is provided between the first region and the first layer. The first region includes a bond of the first element and oxygen. The second region includes a bond of the first element and a metallic element.

Abstract: A semiconductor device includes a semiconductor, a first conductor, a second conductor, a third conductor, a fourth conductor, a first insulator, a second insulator, a third insulator, and a fourth insulator. The first conductor and the semiconductor partly overlap with each other with the first insulator positioned therebetween. The second conductor and the third conductor have regions in contact with the semiconductor. The semiconductor has a region in contact with the second insulator. The fourth insulator has a first region and a second region. The first region is thicker than the second region. The first region has a region in contact with the second insulator. The second region has a region in contact with the third insulator. The fourth conductor and the second insulator partly overlap with each other with the fourth insulator positioned therebetween.

Abstract: A novel composite oxide semiconductor which can be used in a transistor including an oxide semiconductor film is provided. In the composite oxide semiconductor, a first region and a second region are mixed. The first region includes a plurality of first clusters containing In and oxygen as main components. The second region includes a plurality of second clusters containing Zn and oxygen as main components. The plurality of first clusters have portions connected to each other. The plurality of second clusters have portions connected to each other.

Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region located in a region other than the transmission and/or reception region. Each of the plurality of antenna unit regions includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a source metal layer including: a source electrode of the TFT, the drain electrode, and a source bus line; a gate metal layer formed on the source metal layer and including a gate electrode of the TFT, a gate bus line, and a patch electrode; a gate insulating layer formed between the source metal layer and the gate metal layer; and a conductive layer formed on the gate metal layer, and the TFT substrate does not include an insulating layer between the gate metal layer and the conductive layer.

Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing bi-layer semiconducting oxides in a source/drain for low access and contact resistance of thin film transistors.

Abstract: An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

Abstract: Stages of a gate driver may each receive a clock signal, an inverted clock signal, a previous carry signal and a subsequent carry signal, and may each include an output part, a node controlling part and a holding part. In a mode transition period, clock signal and the inverted clock signal may both be temporarily applied with on voltages. The holding parts of the stages receive the clock signal and the inverted clock signal each having the on voltage, and in response, discharge the control nodes, the gate output nodes and the carry output nodes, thereby preventing faulty operation.

Abstract: In a first aspect of a present inventive subject matter, a layered structure includes a first semiconductor layer including an ?-phase crystalline oxide semiconductor with a first composition, and a second semiconductor layer including an ?-phase crystalline oxide semiconductor with a second composition that is different from the first composition of the first semiconductor layer, and the second semiconductor layer is layered on the first semiconductor layer.

Abstract: An electroluminescence display device is disclosed, which may use a polysilicon thin film transistor and an oxide thin film transistor together by using a dual line with respect to a plurality of switching transistors arranged on the same line. The electroluminescence display device includes a first active layer; a first gate line arranged on the first active layer and intersecting the first active layer; a second active layer forming a channel different from that of the first active layer, arranged on the first gate line; and a second gate line arranged on the second active layer and intersecting the second active layer. The first gate line and the second gate line are overlapped with each other, and the first gate line and the second gate line supply the same gate signal.

Abstract: In a semiconductor device, a semiconductor element is formed in a semiconductor, an interlayer insulating film having a contact hole and containing at least one of phosphorus and boron is disposed above the semiconductor, a metal electrode is disposed above the interlayer insulating film and is connected to the semiconductor element through the contact hole, and the interlayer insulating film is filled with hydrogen.

Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.

Abstract: An array substrate and an OLED display device are provided. A trace system of the array substrate is designed in a structure with three layers of metal. By providing one layer of inorganic insulation film and one layer of organic insulation film between two layers of metal, a coupling effect between two layers of trace can be reduced. By exposing all or part of an organic insulation film in a region, which will form a second electrode plate of a storage capacitor, a storage capacitor with larger capacitance can be formed. By forming a third metal layer as a mesh structure, it is possible to reduce IR drop without increasing mask and improve display uniformity of the display device.

Abstract: Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.

Abstract: Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.

Abstract: In an oxide semiconductor device including an active layer region constituted by an oxide semiconductor, stability when a stress is applied is improved. The oxide semiconductor device includes an active layer region constituted by an oxide semiconductor of indium (In), gallium (Ga), and zinc (Zn), wherein the active layer region contains an element selected from titanium (Ti), zirconium (Zr), and hafnium (Hf) that are Group 4 elements, or carbon (C), silicon (Si), germanium (Ge), and tin (Sn) that are Group 14 elements at a number density in a range of 1×1016 to 1×1020 cm?3.

Abstract: Disclosed herein is a transparent glass system that includes an optical grade silicon substrate, a transparent substrate layer; a titanium dioxide transparent layer, the transparent layer having an index of refraction of 2.35 or greater; and a polycrystalline diamond layer, wherein the transparent layer is between the substrate layer and the polycrystalline diamond layer.

Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.

Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. A semiconductor layer of a transistor is formed using a composite oxide semiconductor in which a first region and a second region are mixed. The first region includes a plurality of first clusters containing one or more of indium, zinc, and oxygen as a main component. The second region includes a plurality of second clusters containing one or more of indium, an element M (M represents Al, Ga, Y, or Sn), zinc, and oxygen. The first region includes a portion in which the plurality of first clusters are connected to each other. The second region includes a portion in which the plurality of second clusters are connected to each other.

Abstract: A display device includes a substrate including a display area and a non-display area. The display device further includes a plurality of pixels in the display area of the substrate. The display device additionally includes a plurality of gate lines and a plurality of data lines respectively connected to the plurality of pixels. The display device further includes a plurality of insulative step portions disposed in the non-display area of the substrate and arranged in a first direction parallel to sides of the display area. The display device further includes a crack detection line in the non-display area and extending primarily in the first direction. The crack detection line includes a first portion which does not overlap the plurality of insulative step portions, and a second portion overlapping each of the insulative step portions.

Abstract: A highly reliable semiconductor device includes a first insulator, a second insulator, a first conductor, a third insulator, an oxide semiconductor, second and third conductors, a fourth insulator, a fourth conductor overlapping with a region between the second and third conductors, a fifth insulator, and a sixth insulator in this order. The fourth insulator is in contact with top and side surfaces of the oxide semiconductor, and a top surface of the third insulator. The fifth insulator is in contact with the side surface of the oxide semiconductor and the top surface of the third insulator so as to cover the oxide semiconductor, the second to fourth conductors, and the fourth insulator. The first, second, fifth, and sixth insulators have low permeability for hydrogen, water, and oxygen. The first and sixth insulators have a thinner thickness than the second and sixth insulators, respectively.

Abstract: A touch display substrate and a touch detection method thereof. The touch display substrate includes: a base substrate, and a photo-sensitive touch element and an Organic Light-Emitting Diode (“OLED”) device that are arranged on the base substrate sequentially. The photo-sensitive touch element includes a touch electrode layer, a photo-sensitive material layer, an insulating layer and an ITO layer that are arranged sequentially, wherein an orthographic projection of a touch sensing area of the touch electrode layer completely covers an orthographic projection of a pattern of the photo-sensitive material layer, and is within an orthographic projection of the ITO layer. The arrangement of the photo-sensitive touch element neither changes the sequence of manufacturing the layers of the display substrate, nor affects the illumination of the touch display substrate and is suitable for manufacturing a large-size touch screen.