With Particular Layer Thickness (e.g., Layer Less Than Light Absorption Depth) Patents (Class 257/464)
  • Patent number: 11862648
    Abstract: An optoelectronic device is disclosed, comprising: a photodiode array including a plurality of first photodiodes, each first photodiode including a respective n+ region and a respective n-well region; a guide array disposed over the photodiode array, the guide array including a plurality of guide members separated from one another by a layer of light-blocking material, the guide members being aligned with the n+ regions of the first photodiodes, such that each guide member is disposed over a different respective n+ region, and the layer of light-blocking material being aligned with the n-well regions of the first photodiodes; and a filter array disposed over the guide array, the filter array including a plurality of bandpass filters, each bandpass filter being aligned with a different one of the plurality of guide members, each bandpass filter having a different transmission band.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: January 2, 2024
    Assignee: VISHAY INTERTECHNOLOGY, INC.
    Inventors: Koon-Wing Tsang, Yuh-Min Lin
  • Patent number: 11342469
    Abstract: Vertical etch heterolithic integrated circuit devices are described. A method of manufacturing NIP diodes is described in one example. A P-type substrate is provided, and an intrinsic layer is formed on the P-type substrate. An oxide layer is formed on the intrinsic layer, and one or more openings are formed in the oxide layer. One or more N-type regions are implanted in the intrinsic layer through the openings in the oxide layer. The N-type regions form cathodes of the NIP diodes. A dielectric layer deposited over the oxide layer is selectively etched away with the oxide layer to expose certain ranges of the intrinsic layer to define a geometry of the NIP diodes. The intrinsic layer and the P-type substrate are vertically etched away within the ranges to expose sidewalls of the intrinsic layer and the P-type substrate. The P-type substrate forms the anodes of the NIP diodes.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: May 24, 2022
    Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
    Inventors: Timothy Edward Boles, James J Brogle, Margaret Mary Barter, David Hoag, Michael G Abbott
  • Patent number: 9029973
    Abstract: An image sensor includes first impurity regions formed in a substrate, second impurity regions formed in the first impurity regions, wherein the second impurity regions has a junction with the first impurity regions, recess patterns formed over the first impurity regions in contact with the second impurity regions, and transfer gates filling the recess patterns.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: May 12, 2015
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung-Won Lim, Jin-Woong Kim, Hyo-Seok Lee
  • Patent number: 8912619
    Abstract: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed in the first conductivity type substrate and adjacent to the light incident surface. The first conductivity type high density region is disposed under the second conductivity type region. The present invention also provides another ultra-violet light sensing device, which further includes a first conductivity type high density shallow region which is sandwiched between the light incident surface and the second conductivity type region. Manufacturing methods for these ultra-violet light sensing devices are also disclosed in the present invention.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: December 16, 2014
    Assignee: Pixart Imaging Incorporation
    Inventors: Han-Chi Liu, Huan-Kun Pan, Eiichi Okamoto
  • Patent number: 8890219
    Abstract: An image sensor device is provided, including at least one transistor lying on a semiconductor-on-insulator substrate that includes a semi-conducting layer, in which a channel area of the transistor is disposed in a portion thereof, and an insulating layer separating the semi-conducting layer from a semi-conducting support layer, wherein the semi-conducting layer and the insulating layer extend beyond the channel area, and extend under at least a portion of source/drain regions of the transistor, wherein the semi-conducting support layer includes at least one photosensitive area including at least one P-doped region and at least one N-doped region forming a junction, the photosensitive area being disposed facing the transistor on a side of the channel area thereof and opposite a side of a gate electrode thereof, and wherein the insulating layer is configured to provide a capacitive coupling between the photosensitive area and the semi-conducting layer.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: November 18, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Laurent Grenouillet, Maud Vinet
  • Patent number: 8890128
    Abstract: The present invention provides an organic display device, comprising: an organic solar module for obtaining solar energy and converting the obtained solar energy into electric power, and an ultraviolet organic light emitting module driven to emit ultraviolet light by the electric power obtained from the organic solar module. The present invention can fully use solar energy and carry out ultraviolet display by combining the ultraviolet organic light emitting module with the organic solar module.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: November 18, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Yawei Liu, Yuan-Chun Wu
  • Patent number: 8859310
    Abstract: Methods of fabricating optoelectronic devices, such as photovoltaic cells and light-emitting devices. In one embodiment, such a method includes providing a substrate, applying a monolayer of semiconductor particles to the substrate, and encasing the monolayer with one or more coatings so as to form an encased-particle layer. At some point during the method, the substrate is removed so as to expose the reverse side of the encased-particle layer and further processing is performed on the reverse side. When a device made using such a method has been completed and installed into an electrical circuit the semiconductor particles actively participate in the photoelectric effect or generation of light, depending on the type of device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 14, 2014
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 8853813
    Abstract: Embodiments relate to photo cell devices. In an embodiment, a photo cell device includes an array of transmission layers having different optical thicknesses and with photo diodes underneath. The transmission layers can include two different materials, such as a nitride and an oxide, that cover each diode with a different proportional area density in a damascene-like manner. Embodiments provide advantages over conventional devices, including that they can be integrated into a standard CMOS process and therefore simpler and less expensive to produce.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: October 7, 2014
    Assignee: Infineon Technologies AG
    Inventor: Thoralf Kautzsch
  • Patent number: 8816465
    Abstract: An energy conversion and storage device includes an energy storage component (530, 601) including a first electrode (611) having a first plurality of channels (612) formed in a first region (615) of a first material (617), a second electrode (621) adjacent to but electrically isolated from the first electrode and having a second plurality of channels (622) formed in a first region (625) of a second material (627), and an electrolyte (650) within the first and second pluralities of channels. The first electrode forms a first interface (619) with the electrolyte and the second electrode forms a second interface (629) with the electrolyte. The energy conversion and storage device further includes a photovoltaic component (520, 602) formed in a second region of the first material.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: August 26, 2014
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Cary L. Pint
  • Patent number: 8786044
    Abstract: A photoelectric conversion device includes a film that covers the photoelectric conversion part and a transfer gate electrode, wherein a first region having a refractive index lower than refractive indices of the film and the photoelectric conversion part, is provided between the film and the photoelectric conversion part, and a second region having a refractive index lower than the refractive indices of the transfer gate electrode and the film, is provided between the film and the top surface of the transfer gate electrode, and wherein T1<T2<?/2?T1 is satisfied, where an optical thickness of the first region is T1, an optical thickness of the second region is T2, and a wavelength of a light incident on the photoelectric conversion part is ?.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: July 22, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Hideaki Ishino, Kenji Togo, Masatsugu Itahashi, Takehito Okabe
  • Patent number: 8628995
    Abstract: A tandem thin-film silicon solar cell comprises a transparent substrate, a first unit cell positioned on the transparent substrate, the first unit cell comprising a p-type window layer, an i-type absorber layer and an n-type layer, an intermediate reflection layer positioned on the first unit cell, the intermediate reflection layer including a hydrogenated n-type microcrystalline silicon oxide of which the oxygen concentration is profiled to be gradually increased and a second unit cell positioned on the intermediate reflection layer, the second unit cell comprising a p-type window layer, an i-type absorber layer and an n-type layer.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: January 14, 2014
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Patent number: 8558335
    Abstract: A solid-state imaging device includes a photoelectric conversion unit that is formed on a semiconductor substrate, a reading unit that reads signal charges of the photoelectric conversion unit, a gate insulating film and an electrode disposed thereon that constitute the reading unit, a light shielding film that covers the electrode, and an antireflection film that is formed on the photoelectric conversion unit and is constituted by films of four or more layers. The film of the lower layer of the antireflection film is also used as a stopper film during patterning, and a gap between the end of the light shielding film and the semiconductor substrate which is defined by interposing a plurality of films of the lower layer of the antireflection film is set so as to be smaller than the thickness of the gate insulating film.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: October 15, 2013
    Assignee: Sony Corporation
    Inventor: Mitsuhiro Nagano
  • Patent number: 8558341
    Abstract: An object is to provide a photoelectric conversion element with high conversion efficiency. In a photoelectric conversion element with a fine periodic structure on a light-receiving surface side, focus is given to the traveling direction of light that is reflected off another surface. The photoelectric conversion element may be given a structure in which a textured structure that reflects light to the other surface is provided, and light that travels from the light-receiving surface side to the other surface side is reflected so that a component that travels along the photoelectric conversion layer increases. By the distance traveled by the reflected light inside the photoelectric conversion layer increasing, the light that enters the photoelectric conversion element is more easily absorbed by the photoelectric conversion layer and less easily released from the light-receiving surface side, and a photoelectric conversion element with high conversion efficiency can be provided.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: October 15, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Fumito Isaka, Jiro Nishida
  • Patent number: 8426831
    Abstract: In one an embodiment, there is provided an assembly comprising at least one detector. Each of the at least one detector includes a substrate having a doped region of a first conduction type, a layer of dopant material of a second conduction type located on the substrate, a diffusion layer formed within the substrate and in contact with the layer of dopant material and the doped region of the substrate, wherein a doping profile, which is representative of a doping material concentration of the diffusion layer, increases from the doped region of the substrate to the layer of dopant material, a first electrode connected to the layer of dopant material, and a second electrode connected to the substrate. The diffusion layer is arranged to form a radiation sensitive surface.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: April 23, 2013
    Assignee: ASML Netherlands B.V.
    Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Scholtes
  • Patent number: 8404513
    Abstract: A method for generating electric power including the steps of: (a) preparing a solar cell having a condensing lens and a solar cell element, wherein the solar cell element includes an n-type GaAs layer, a p-type GaAs layer, a quantum tunneling layer, an n-type InGaP layer, a p-type InGaP layer, a p-type window layer, an n-side electrode, and a p-side electrode, and satisfies the following equation (I): d2<d1, d3<d1, nanometer?d2?4 nanometers, 1 nanometer?d3?4 nanometers, d5<d4, d6<d4, 1 nanometer?d5?5 nanometers, 1 nanometer?d6?5 nanometers, 100 nanometers?w2, 100 nanometers?w3, 100 nanometers?w4, and 100 nanometers?w5. . . (I); and (b) irradiating a region S which is included in the surface of the p-type window layer through the condensing lens with light to satisfy the following equation (II) in order to generate a potential difference between the n-side electrode and the p-side electrode: w6?w1. . . (II).
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: March 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Akio Matsushita, Akihiro Itoh, Tohru Nakagawa, Hidetoshi Ishida
  • Patent number: 8399950
    Abstract: A photodiode includes a photosensitive element formed in a silicon semiconductor layer on an insulation layer. The photosensitive element includes a low concentration diffusion layer, a P-type high concentration diffusion layer, and an N-type high concentration diffusion layer. A method of producing the photodiode includes the steps of: forming an insulation material layer on the silicon semiconductor layer after the P-type impurity and the N-type impurity are implanted into the low concentration diffusion layer, the P-type high concentration diffusion layer, and the N-type high concentration diffusion layer; forming an opening portion in the insulation material layer in an area for forming the low concentration diffusion layer; and etching the silicon semiconductor layer in the area for forming the low concentration diffusion layer so that a thickness of the silicon semiconductor layer is reduced to a specific level.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: March 19, 2013
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Noriyuki Miura
  • Patent number: 8390090
    Abstract: Provided is a semiconductor device with a high breakdown voltage yield of a bipolar transistor and a high bandwidth and quantum efficiency of a light receiving element. An optical semiconductor device includes monolithically integrated transistor and light receiving element. The light receiving element includes a p-type semiconductor layer, an n-type epitaxial layer formed on the p-type semiconductor layer, and an n-type diffusion layer formed on the n-type epitaxial layer. An n-type impurity concentration of the n-type diffusion layer is 3×1018 cm?3 or less at a depth of 0.12 ?m or more below a surface of the n-type diffusion layer, 1×1016 cm?3 or more at a depth of 0.4 ?m or less below the surface, and 1×1016 cm?3 or less at a depth of 0.8 ?m or more below the surface, and an interface between the p-type semiconductor layer and the n-type epitaxial layer is located at a depth of 0.9 ?m to 1.5 ?m below the surface.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: March 5, 2013
    Assignee: NEC Corporation
    Inventor: Takao Morimoto
  • Patent number: 8362460
    Abstract: A multi junction solar cell having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The solar cell includes an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the solar cell and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: January 29, 2013
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Patent number: 8324598
    Abstract: In one an embodiment, there is provided an assembly comprising at least one detector. Each of the at least one detector includes a substrate having a doped region of a first conduction type, a layer of dopant material of a second conduction type located on the substrate, a diffusion layer formed within the substrate and in contact with the layer of dopant material and the doped region of the substrate, wherein a doping profile, which is representative of a doping material concentration of the diffusion layer, increases from the doped region of the substrate to the layer of dopant material, a first electrode connected to the layer of dopant material, and a second electrode connected to the substrate. The diffusion layer is arranged to form a radiation sensitive surface.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: December 4, 2012
    Assignee: ASML Netherlands B.V.
    Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Scholtes
  • Patent number: 8314469
    Abstract: An image sensor structure and a method for making the image sensor structure, for avoiding or mitigating lens shading effect. The image sensor structure includes a substrate, a sensor array disposed at the surface of the substrate, a dielectric layer covering the sensor array, wherein the dielectric layer includes a top surface having a dishing structure, an under layer filled into the dishing structure and having a refraction index greater than that of the dielectric layer, a filter array disposed on the under layer corresponding to the sensor array, and a microlens array disposed above the filter array. A top layer may be additionally disposed to cover the filter array and the microlens array is disposed on the top layer.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: November 20, 2012
    Assignee: United Microelectronics Corp.
    Inventor: Cheng-Hung Yu
  • Publication number: 20120074297
    Abstract: A photosensor array includes plural photosensor pixels. Each of the photosensor pixels includes a lower electrode, an amorphous silicon film, an n-type amorphous silicon film, and an upper electrode. The photosensor array includes plural scanning lines connected to the upper electrodes, plural read lines connected to the lower electrodes, a scanning circuit that is connected to the plural scanning lines, and sequentially supplies a selection scanning signal of a first voltage to the respective scanning lines, a first unit that inputs a second voltage higher than the first voltage to the plural read lines in a blanking period of one horizontal scanning period, and thereafter puts the plural read lines into the floating state, and a second unit that outputs a voltage change in each of the read lines within one horizontal scanning period as the sensor output voltage of the photosensor pixel.
    Type: Application
    Filed: September 22, 2011
    Publication date: March 29, 2012
    Inventors: Takeshi YONEKURA, Toshio Miyazawa, Atsushi Hasegawa, Terunori Saitou, Kozo Yasuda
  • Patent number: 8138485
    Abstract: A radiation detector, a method of manufacturing a radiation detector, and a lithographic apparatus comprising a radiation detector. The radiation detector has a radiation sensitive surface. The radiation sensitive surface is sensitive to radiation wavelengths between 10-200 nm and charged particles. The radiation detector has a silicon substrate, a dopant layer, a first electrode, and a second electrode. The silicon substrate is provided in a surface area at a first surface side with doping profile of a certain conduction type. The dopant layer is provided on the first surface side of the silicon substrate. The dopant layer has a first layer of dopant material and a second layer. The second layer is a diffusion layer in contact with the surface area at the first surface side of the silicon substrate. The first electrode is connected to dopant layer. The second electrode is connected to the silicon substrate.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 20, 2012
    Assignee: ASML Netherlands B.V.
    Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Joseph Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Scholtes
  • Patent number: 8084838
    Abstract: The invention provides a design of PIN diode having a low capacitance and a large area of effective collection of photo-generated charge. The low capacitance is obtained by replacing a continuous collector layer in the diode by a sparse array of collector disks interconnected by narrow metallic runners at a different structural level separated from the collector discs by an interlevel dielectric.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: December 27, 2011
    Assignee: Research Foundation of State University of New York
    Inventor: Serge Luryi
  • Patent number: 8063461
    Abstract: To provide a back-illuminated type solid-state imaging device capable of color separation of pixels without using a color filter, and a camera module and an electronic equipment module which incorporate the solid-state imaging device. A solid-state imaging device including: a photoelectric conversion element PD formed in a semiconductor substrate 22; a reading-out part which reads out signal charges from the photoelectric conversion element PD formed on one surface side of the semiconductor substrate 22; the other surface of the semiconductor substrate 22 made to a light incidence surface; and a pixel which exclusively makes light of a specific wavelength or longer photoelectrically converted, by adjusting pn junction depths h2 [h2 r, h2 g, h2 b] between the photoelectric conversion element PD and an accumulation layer 28 on the light incidence surface side. A camera module and an electronic equipment module which incorporate the solid-state imaging device.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: November 22, 2011
    Assignee: Sony Corporation
    Inventor: Takayuki Ezaki
  • Patent number: 8053853
    Abstract: An image sensor device includes a semiconductor substrate having a light-sensing region, and a first and second electrode embedded within the substrate. The first and second electrode forms an array of slits, the array of slits is configured to allow a wavelength of light to pass through to the light-sensing region. A method for making an image sensor device includes providing a semiconductor substrate, forming a plurality of pixels on the semiconductor substrate, and forming a plurality of slits embedded within each of the plurality of pixels. The plurality of slits is configured to allow a wavelength of light to pass through to each of the plurality of pixels.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: November 8, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiunn-Yih Chyan, Gwo-Yuh Shiau, Chia-Shiung Tsai
  • Patent number: 8039917
    Abstract: A photodiode includes a first silicon semiconductor layer formed over an insulating layer, a second silicon semiconductor layer formed over the insulating layer, having a thickness ranging from greater than or equal to 3 nm to less than or equal to 36 nm, a low-concentration diffusion layer which is formed in the second silicon semiconductor layer and in which an impurity of either one of a P type and an N type is diffused in a low concentration, a P-type high-concentration diffusion layer which is formed in the first silicon semiconductor layer and in which the P-type impurity is diffused in a high concentration, and an N-type high-concentration diffusion layer which is opposite to the P-type high-concentration diffusion layer with the low-concentration diffusion layer interposed therebetween and in which the N-type impurity is diffused in a high concentration.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: October 18, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Noriyuki Miura
  • Patent number: 8026540
    Abstract: A system is provided for determining a color using a CMOS image sensor. The system includes an input port for receiving a user command. The system further includes an image sensor, an optical device that forms an image on the image sensor, and a processor. The image sensor includes an n-type substrate and a p-type epitaxy layer overlying the n-type substrate. The image sensor includes a control circuit that applies a first voltage on the n-type substrate to obtain a first output. The control circuit applies a second voltage on the n-type substrate to obtain a second output. The control circuit also applies a third voltage on the n-type substrate to obtain a third output. The p-type epitaxy layer includes a silicon germanium material. The image sensor additionally includes an epitaxy layer interposed between the n-type substrate and the p-type epitaxy layer.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: September 27, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Hong Zhu, Jim Yang
  • Patent number: 7960646
    Abstract: In order to improve photoelectric conversion properties of a silicon-based thin-film photoelectric converter to which a conductive SiOx layer is inserted to obtain an optical confinement effect, the silicon-based thin-film photoelectric converter according to the present invention includes an i-type photoelectric conversion layer of hydrogenated amorphous silicon or an alloy thereof, an i-type buffer layer made of hydrogenated amorphous silicon, and an n-type Si1-xOx layer (x is 0.25-0.6) stacked successively, wherein the buffer layer has a higher hydrogen concentration at its interface with and as compared with the photoelectric conversion layer and has a thickness of at least 5 nm and at most 50 nm. Accordingly, generation of silicon crystal phase parts and reduction of resistivity are promoted in the n-type Si1-xOx layer, contact resistance at the interface is reduced, and FF of the photoelectric converter is improved, so that the photoelectric converter achieves improved properties.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: June 14, 2011
    Assignee: Kaneka Corporation
    Inventors: Toshiaki Sasaki, Kenji Yamamoto
  • Patent number: 7898010
    Abstract: A pinned photodiode with improved short wavelength light response. In exemplary embodiments of the invention, a gate oxide is formed over a doped, buried region in a semiconductor substrate. A conductor is formed on top of the gate oxide. The gate conductor is transparent, and in one embodiment is a layer of indium-tin oxide. The transparent conductor can be biased to reduce the need for a surface dopant in creating a pinned photodiode region. The biasing of the transparent conductor produces a hole-rich accumulation region near the surface of the substrate. The gate conductor material permits a greater amount of charges from short wavelength light to be captured in the photo-sensing region in the substrate, and thereby increases the quantum efficiency of the photosensor.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: March 1, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard E. Rhodes
  • Patent number: 7888765
    Abstract: An optical semiconductor device includes a phototransistor for receiving incident light. The phototransistor includes a collector layer of a first conductivity type formed on a semiconductor substrate, a base layer of a second conductivity type formed on the collector layer, and an emitter layer of a first conductivity type formed on the base layer. A thickness of the emitter layer is equal to or less than an absorption length of the incident light in the semiconductor substrate.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: February 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Masaki Taniguchi, Hisatada Yasukawa, Takaki Iwai
  • Patent number: 7884439
    Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: February 8, 2011
    Assignee: President and Fellows of Harvard College
    Inventors: Eric Mazur, James E. Carey, III
  • Patent number: 7868367
    Abstract: A system and method for sensing image on CMOS. According to an embodiment, the present invention provide a CMOS image sensing pixel. The pixel includes an n-type substrate, which includes a first width and a first thickness. The pixel also includes a p-type epitaxy layer overlying the n-type substrate. The p-type epitaxy layer includes a second width and a second thickness. The second width is associated with one or more characteristics of a colored light. The pixel additionally includes an n-type layer overlying the p-type epitaxy layer. The n-type layer is associated with a third width and a third thickness. Additionally, the pixel includes an pn junction formed between the p-type epitaxy layer and the n-type layer. Moreover, the pixel includes a control circuit being coupled to the CMOS image sensing pixel.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: January 11, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Zhu Hong, Jim Yang
  • Patent number: 7859072
    Abstract: An image sensor and a fabricating method thereof are provided. The image sensor includes a plurality of pixels disposed in an active region and dummy pixels disposed in a peripheral region. An interlayer dielectric layer has a first thickness in the active region and a second thickness thinner than the first thickness in the peripheral region. Color filters are disposed in the active region, and a light blocking member is disposed in the peripheral region. There is substantially no step difference between the color filters and the light blocking member.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: December 28, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Chang Hun Han
  • Publication number: 20100276776
    Abstract: A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: Jong-Jan Lee, Steven R. Droes, John W. Hartzell, Jer-Shen Maa
  • Patent number: 7821093
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 26, 2010
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7816755
    Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 19, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsunobu Kochi
  • Patent number: 7709920
    Abstract: A photodiode that can separately detect the intensities of the three wavelength ranges of ultraviolet light of 400 nm or below includes an insulating layer; and a plurality of silicon semiconductor layers having different thicknesses formed on the insulating layer, wherein each of the plurality of silicon semiconductor layers has a low-concentration diffusion layer formed by diffusing one of a P-type impurity or an N-type impurity therein with a low concentration; a P-type high-concentration diffusion layer formed by diffusing a P-type impurity therein with a high concentration; and an N-type high-concentration diffusion layer formed by diffusing an N-type impurity therein with a high concentration, and wherein the P-type high-concentration diffusion layer and the N-type high-concentration diffusion layer formed in a respective one of the plurality of silicon semiconductor layers are arranged to face each other with the low-concentration diffusion layer interposed there between.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: May 4, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Noriyuki Miura
  • Patent number: 7705235
    Abstract: The present invention is related to a photovoltaic device, the device comprising a first layer of a first semiconductor material of a first conductivity type, a second layer of a second semiconductor material of the opposite conductivity type of the first layer, and a third layer of a third porous semiconductor material situated between the first layer and the second layer. The present invention also provides a method for producing the photovoltaic device.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: April 27, 2010
    Assignees: IMEC, FernUniversitat Hagen
    Inventors: Renat Bilyalov, Alexander Ulyashin, Jef Poortmans, Wolfgang Fahrner
  • Patent number: 7687874
    Abstract: In a mesa type PIN-PD formed using a heavily doped semiconductor material, a high frequency response is degraded as slow carriers occur in a heavily doped layer when light incident into a light receiving section transmits through an absorbing layer and reaches the heavily doped layer on a side near the substrate. In a p-i-n multilayer structure, a portion corresponding to a light receiving section of a heavily doped layer on a side near a substrate is previously made thinner than the periphery of the light receiving section by an etching or selective growth technique, over which an absorbing layer and another heavily doped layer are grown to form the light receiving section of mesa structure. This makes it possible to form a good ohmic contact and to realize a PIN-PD with excellent high frequency response characteristics.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: March 30, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Kazuhiro Komatsu, Yasushi Sakuma, Daisuke Nakai, Kaoru Okamoto, Ryu Washino
  • Patent number: 7679662
    Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: March 16, 2010
    Assignee: Sony Corporation
    Inventors: Sadamu Suizu, Masaaki Takayama
  • Patent number: 7679159
    Abstract: Each of three light receiving sections has a P-type well having a P+-type layer and an N-type layer formed therein. The P+-type layer is diffused from substrate surface to depth d1. A PN junction forming portion of the N-type layer is diffused from depth d1 to depth d2 which is greater than depth d1 so as to form, with the P-type well, a PN junction of a photodiode at depth d2. Depths d1 as well as depths d2 of the three light receiving sections are different from each other. The N-type layer has a charge output portion which is diffused from the PN junction to the substrate surface, and which is coupled by circuit coupling to a MOS transistor for reading out charge. This allows each light receiving section to have spectral characteristics, thereby providing a solid state imaging element and a solid state imaging device without using color filters.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: March 16, 2010
    Assignee: Funal Electric Co., Ltd.
    Inventors: Hiromichi Tanaka, Hideto Yoshimura, Sumio Terakawa, Masafumi Kimata
  • Patent number: 7678668
    Abstract: It is object to provide a manufacturing method of an SOI substrate provided with a single-crystal semiconductor layer, even in the case where a substrate having a low allowable temperature limit, such as a glass substrate, is used and to manufacture a high-performance semiconductor device using such an SOI substrate. Light irradiation is performed on a semiconductor layer which is separated from a semiconductor substrate and bonded to a support substrate having an insulating surface, using light having a wavelength of 365 nm or more and 700 nm or less, and a film thickness d (nm) of the semiconductor layer which is irradiated with the light is made to satisfy d=?/2n×m±? (nm), when a light wavelength is ? (nm), a refractive index of the semiconductor layer is n, m is a natural number greater than or equal to 1 (m=1, 2, 3, 4, . . . ), and 0???10 is satisfied.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: March 16, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Hideto Ohnuma, Tetsuya Kakehata, Kenichiro Makino
  • Patent number: 7671437
    Abstract: A photogate structure having increased quantum efficiency, especially for low wavelength light such as blue light. The photogate is formed of a thin conductive layer, such as a layer of doped polysilicon. A nitride insulating cap is formed over the conductive layer. The nitride layer reduces the reflections at the conductor/insulator interface. A pixel cell incorporating the photogate structure also has a buried accumulation region beneath the photogate. A method of fabricating the photogate structure is also disclosed.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: March 2, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Howard E. Rhodes
  • Patent number: 7667178
    Abstract: An image sensor includes a photoelectric conversion section in a semiconductor substrate, the photoelectric conversion section having a capping layer of a first conductivity type and a photodiode of a second conductivity type below the capping layer, the photodiode having an upper surface deeper than about 1 ?m, as measured from an upper surface of the semiconductor substrate, a charge detection section receiving charges stored in the photoelectric conversion through a charge transfer section and converting the received charges into respective electrical signals, a voltage application section adapted to apply voltage to the capping layer and to a lower portion of the semiconductor substrate to control a width of a depletion layer on the photodiode, and a signal operation section adapted to generate red, green, and blue, signals according to signals from the charge detection section.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: February 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-hoon Bae, Tae-seok Oh, Ki-hong Kim, Hyoun-min Baek, Won-je Park, Jung-ho Park
  • Publication number: 20100032788
    Abstract: A thermopile sensor for detection of infrared radiation in a measurement wavelength range having a sensor substrate in which a cavity is formed, a diaphragm formed on the sensor substrate above the cavity, at least one thermopile structure formed in, on, or below the diaphragm, having at least one thermopile pair of mutually contacted thermopile legs, where the two thermopile legs are made of doped semiconductor materials having different Seebeck coefficients, and at least one insulating intermediate layer formed between the thermopile legs. A layer system having at least the two thermopile legs and at least the insulating intermediate layer is formed above the lower cavity and has multibeam interference for IR radiation in the measurement wavelength range, absorbing a portion of the IR radiation and at least partially reducing the reflection.
    Type: Application
    Filed: August 10, 2009
    Publication date: February 11, 2010
    Inventor: Nicolaus Ulbrich
  • Patent number: 7649236
    Abstract: A semiconductor photodetector 10 has a first semiconductor substrate 1 that is of a first conductive type and a low resistivity and has a (111) front surface, and a second semiconductor substrate 2 that is of the first conductive type and a high resistivity, has a (100) front surface, and is adhered onto first semiconductor substrate 1. A semiconductor region 3 of a second conductive type is formed on the front surface side of second semiconductor substrate 2. A region of a periphery of semiconductor region 3 is etched until first semiconductor substrate 1 is exposed. A first electrode 1e and a second electrode 2e are electrically connected to the exposed front surface of first semiconductor substrate 1 and to semiconductor region 3, respectively.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: January 19, 2010
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Yoshimaro Fujii, Kouji Okamoto, Akira Sakamoto
  • Patent number: 7638853
    Abstract: A solid state imaging device includes: an imaging region formed in an upper part of a substrate made of silicon to have a photoelectric conversion portion, a charge accumulation region of the photoelectric conversion portion being of a first conductivity type; a device isolation region formed in at least a part of the substrate to surround the photoelectric conversion portion; and a MOS transistor formed on a part of the imaging region electrically isolated from the photoelectric conversion region by the device isolation region. The width of the device isolation region is smaller in its lower part than in its upper part, and the solid state imaging device further includes a dark current suppression region surrounding the device isolation region and being of a second conductivity type opposite to the first conductivity type.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: December 29, 2009
    Assignee: Panasonic Corporation
    Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Toru Okino
  • Patent number: 7638351
    Abstract: A photodiode and a method of fabricating a photodiode for reducing modal dispersion and increasing travel distance. The central region of the photodiode is made less responsive to incident light than a peripheral region of the photodiode. The less responsive central region discriminates the lower order modes such that only the higher order modes are incident on the more responsive peripheral region. Because the lower order modes are subtracted, the range of propagation constants is reduced and modal dispersion is also reduced.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: December 29, 2009
    Assignee: Finisar Corporation
    Inventor: Jimmy A. Tatum
  • Patent number: 7635906
    Abstract: The ultraviolet sensor has a ZnO layer composed of an oxide semiconductor including ZnO; a (Ni,Zn)O layer which is provided in contact with the ZnO layer and which is composed of an oxide semiconductor including NiO and ZnO solid-solved therein; a first terminal electrode electrically connected to the ZnO layer, and a second terminal electrode electrically connected to the (Ni,Zn)O layer. The ZnO layer is disposed at an ultraviolet ray receiving side. The (Ni,Zn)O layer is preferably formed of a sintered body.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: December 22, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazutaka Nakamura, Yoshihiro Ito
  • Patent number: 7626241
    Abstract: A thin film structure for an optical sensor to achieve a wavelength window with nearly ripple free reflection and transmission has different areas of thin film with two or more different thicknesses.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: December 1, 2009
    Assignee: Texas Advanced Optoelectronic Solutions, Inc.
    Inventor: Eugene G. Dierschke