Pn Junction Adapted As Temperature Sensor Patents (Class 257/470)
  • Publication number: 20120217609
    Abstract: A semiconductor device includes a stacked body with a recessed gas passage formed therein, a heater disposed in the stacked body, the heater being exposed on a bottom surface of the gas passage, and a plurality of thermal sensors disposed in the stacked body in such a manner that the plurality of thermal sensors sandwich the heater therebetween in an extending direction of the gas passage, the plurality of thermal sensors being exposed on the bottom surface of the gas passage. An acceleration sensor having a high affinity to the ordinary semiconductor manufacturing process can be provided.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 30, 2012
    Inventor: Akira TANABE
  • Publication number: 20120175687
    Abstract: An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.
    Type: Application
    Filed: March 21, 2012
    Publication date: July 12, 2012
    Applicant: Infineon Technologies AG
    Inventors: Donald Dibra, Christoph Kadow, Markus Zundel
  • Patent number: 8183658
    Abstract: A Field-Effect Transistor (FET) is provided that includes a first portion and a second portion separated from the first portion by a gap. The FET further includes at least one diode embedded within the gap between the first and second portions. A plurality of FETs also may be provided with adjacent FETs electrically isolated.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: May 22, 2012
    Assignee: Cobham Electronic Systems Corporation
    Inventors: Ronald C. Meadows, Thomas A. Winslow
  • Patent number: 8169045
    Abstract: An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: May 1, 2012
    Assignee: Infineon Technologies AG
    Inventors: Donald Dibra, Christoph Kadow, Markus Zundel
  • Publication number: 20120068178
    Abstract: Embodiments of the present invention include a method of manufacturing a trench transistor. The method includes forming a substrate of a first conductivity type and implanting a dopant of a second conductivity type, forming a body region of the substrate. The method further includes forming a trench in the body region and depositing an insulating layer in the trench and over the body region wherein the insulating layer lines the trench. The method further includes filling the trench with polysilicon forming a top surface of the trench and forming a diode in the body region wherein a portion of the diode is lower than the top surface of the trench.
    Type: Application
    Filed: November 30, 2011
    Publication date: March 22, 2012
    Applicant: Vishay-Siliconix
    Inventors: Qufei Chen, Robert Xu, Kyle Terrill, Deva Pattanayak
  • Publication number: 20120061791
    Abstract: According to one embodiment, an infrared detection device includes a detection element. The detection element includes a semiconductor substrate, a signal interconnect section, a detection cell and a support section. The semiconductor substrate is provided with a cavity on a surface of the semiconductor substrate. The signal interconnect section is provided in a region surrounding the cavity of the semiconductor substrate. The detection cell spaced from the semiconductor substrate above the cavity includes a thermoelectric conversion layer, and an absorption layer. The absorption layer is laminated with the thermoelectric conversion layer, and provided with a plurality of holes each having a shape whose upper portion is widened. The support section holds the detection cell above the cavity and connects the signal interconnect section and the detection cell.
    Type: Application
    Filed: March 23, 2011
    Publication date: March 15, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaki Atsuta, Hideyuki Funaki, Keita Sasaki
  • Patent number: 8120135
    Abstract: A transistor has a cell array with two or more transistor cells, a temperature sensor, which is integrated in the cell array or is adjacent to the cell array, and an isolation structure. The isolation structure isolates the temperature sensor from the cell array, and has an isolation trench, which is arranged between the cell array and the temperature sensor. The distance between the temperature sensor and the active transistor cell that is closest to the temperature sensor corresponds approximately to the pitch between active transistor cells within the cell array.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: February 21, 2012
    Assignee: Infineon Technologies AG
    Inventors: Norbert Krischke, Nicola Vannucci, Sven Lanzerstorfer, Thomas Ostermann, Mathias Racki, Markus Zundel
  • Patent number: 8120134
    Abstract: A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: February 21, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Bhaskar Srinivasan
  • Publication number: 20120018835
    Abstract: A pressing member is prevented from being damaged by heat, heat dissipation through the pressing member on the higher-temperature side and reduction in thermoelectric conversion efficiency due to it are suppressed, and good electrical conduction is achieved even if thermoelectric conversion elements and electrodes are not cemented through a binder. A lower-temperature side electrode 6 is projecting toward a higher-temperature side substrate 8 and the lower-temperature side electrode 6 is formed with slope faces 6a, 6b, and an angle ? of each of the slope face to a surface of a lower-temperature side substrate 7 is an acute angle.
    Type: Application
    Filed: March 3, 2010
    Publication date: January 26, 2012
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Yoshinari Sawabe, Yuichi Hiroyama
  • Patent number: 8092083
    Abstract: A system comprises a temperature sensor generate multiple base-emitter voltage signals by sequentially providing various currents to a transistor, and a system controller to determine a differential voltage signal according to the multiple base-emitter voltage signals, the differential voltage signal proportional to an environmental temperature associated with the transistor.
    Type: Grant
    Filed: October 1, 2007
    Date of Patent: January 10, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Garthik Venkataraman, Harold Kutz, Monte Mar
  • Patent number: 8089134
    Abstract: A semiconductor device equipped with a primary semiconductor element and a temperature detecting element for detecting a temperature of the primary semiconductor element. The device includes a first semiconductor layer of a first conductivity type that forms the primary semiconductor element. A second semiconductor region of a second conductivity type is provided in the first semiconductor layer. A third semiconductor region of the first conductivity type is provided in the second semiconductor region. The temperature detecting element is provided in the third semiconductor region and is separated from the first semiconductor layer by a PN junction.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: January 3, 2012
    Assignee: Fuji Electric Sytems Co., Ltd.
    Inventors: Koh Yoshikawa, Tomoyuki Yamazaki, Yuichi Onozawa
  • Publication number: 20110248374
    Abstract: This disclosure discusses various methods for manufacturing uncooled infrared detectors by using foundry-defined silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) wafers, each of which may include a substrate layer, an insulation layer having a pixel region and a wall region surrounding the pixel region, a pixel structure formed on the pixel region of the insulation layer, a wall structure formed adjacent to the pixel structure and on the wall region of the insulation layer, a dielectric layer covering the pixel structure and the wall structure, a pixel mask formed within the dielectric layer and for protecting the pixel structure during a dry etching process, and a wall mask formed within the dielectric layer and for protecting the wall structure during the dry etching process, thereby releasing a space defined between the wall structure and the pixel structure after the dry etching process.
    Type: Application
    Filed: April 12, 2011
    Publication date: October 13, 2011
    Inventors: Tayfun Akin, Selim Eminoglu
  • Publication number: 20110241155
    Abstract: Conventional “on-chip” or monolithically integrated thermocouples are very mechanically sensitive and are expensive to manufacture. Here, however, thermocouples are provided that employ different thicknesses of thermal insulators to help create thermal differentials within an integrated circuit. By using these thermal insulators, standard manufacturing processes can be used to lower cost, and the mechanical sensitivity of the thermocouple is greatly decreased. Additionally, other features (which can be included through the use of standard manufacturing processes) to help trap and dissipate heat appropriately.
    Type: Application
    Filed: March 30, 2010
    Publication date: October 6, 2011
    Applicant: Texas Instruments Incorporated
    Inventor: Dimitar V. Trifonov
  • Patent number: 8018019
    Abstract: A semiconductor having a an n-type material and a p-type material, wherein the n-type material and p-type material are joined to form a space-charge-free p-n junction. The energy of the Fermi-level of the n-type material is equal to the energy of the Fermi-level of the p-type material. This allows for the pre-alignment of the Fermi-levels of the n-type and the p-type materials. The semiconductor has minimal or no g-r noise. The semiconductor can be operated at TBLIP in the range of about 220° to about 240° K.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: September 13, 2011
    Assignee: University of Rochester
    Inventor: Gary Wicks
  • Publication number: 20110210416
    Abstract: Exemplary embodiments of the invention include a thermoelectric material having an aligned polarization field along a central axis of the material. Along the axis are a first atomic plane and a second atomic plane of substantially similar area. The planes define a first volume and form a single anisotropic crystal. The first volume has a first outer surface and a second outer surface opposite the first outer surface, with the outer surfaces defining the central axis passing through a bulk. The bulk polarization field is formed from a first electrical sheet charge and a second opposing electrical sheet charge, one on each atomic plane. The opposing sheet charges define a bulk polarization field aligned with the central axis, and the bulk polarization field causes asymmetric thermal and electrical conductivity through the first volume along the central axis.
    Type: Application
    Filed: October 30, 2009
    Publication date: September 1, 2011
    Applicant: CARRIER CORPORATION
    Inventor: Joseph V. Mantese
  • Patent number: 7988354
    Abstract: Temperature detection for a semiconductor component is disclosed. One embodiment includes a circuit arrangement for measuring a junction temperature of a semiconductor component that has a gate electrode and a control terminal being connected to the gate electrode and receiving a control signal for charging and discharging the gate electrode, where the gate electrode is internally connected to the control terminal via an internal gate resistor. The circuit arrangement includes: a measuring bridge circuit including the internal gate resistor and providing a measuring voltage which is dependent on the temperature dependent resistance of the internal gate resistor; an evaluation circuit receiving the measuring voltage and providing an output signal dependent on the junction temperature; a pulse generator providing a pulse signal including pulses for partially charging or discharging the gate electrode via the internal gate resistor.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: August 2, 2011
    Assignee: Infineon Technologies AG
    Inventor: Uwe Jansen
  • Publication number: 20110175145
    Abstract: The infrared sensor (1) includes a base (10), and an infrared detection element (3) formed over a surface of the base (10). The infrared detection element (3) includes an infrared absorption member (33) in the form of a thin film configured to absorb infrared, a temperature detection member (30) configured to measure a temperature difference between the infrared absorption member (33) and the base (10), and a safeguard film (39). The infrared element (3) is spaced from the surface of the base (10) for thermal insulation. The temperature detection member (30) includes a p-type polysilicon layer (35) formed over the infrared absorption member (33) and the base (10), an n-type polysilicon layer (34) formed over the infrared absorption member (33) and the base (10) without contact with the p-type polysilicon layer (35), and a connection layer (36) configured to electrically connect the p-type polysilicon layer (35) to the n-type polysilicon layer (34).
    Type: Application
    Filed: September 24, 2009
    Publication date: July 21, 2011
    Inventors: Koji Tsuji, Yosuke Hagihara, Naoki Ushiyama
  • Patent number: 7982278
    Abstract: A thermoelectric module has a first substrate, a second substrate spaced from the first substrate, a plurality of P type thermoelectric elements and N type thermoelectric elements arranged in the space between the first and second substrates, and a plurality of electrodes which connect the P type and N type thermoelectric elements in series. Each electrode is connected to a respective one of the plurality of P type thermoelectric elements at a first connection and a respective one of the plurality of N type thermoelectric elements in the space, and a sealant is located at an edge portion of the space. Each one of a series of first or outer electrodes closest to the edge portion of the space has a concave portion that is concaved in a direction departing from the edge portion of the space and is at a position between the first connection and the second connection.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: July 19, 2011
    Assignee: Kyocera Corporation
    Inventors: Kouji Tokunaga, Kenichi Tajima
  • Publication number: 20110110396
    Abstract: An integrated circuit chip is defined by a stack of several interconnected layers. The integrated circuit chip includes at least two layers of dissimilar metal patterned to define an array of integrated bimetallic thermocouples.
    Type: Application
    Filed: September 20, 2010
    Publication date: May 12, 2011
    Inventors: Matthew A. Grayson, Seda Memik, Jieyi Long, Chuanle Zhou, Andrea Grace Klock
  • Publication number: 20110062545
    Abstract: A semiconductor device in accordance with the present invention includes a diode 7 that is formed on a semiconductor substrate and serves as a temperature detection element to detect abnormal heat generation, and a thermal conduction layer 102 that is formed between the diode 7 and the semiconductor substrate and has a thermal conductivity higher than that of the semiconductor substrate. In this way, heat generated in a heat generating portion can be swiftly and uniformly conducted over the entire temperature detection element composed of the diode 7 with efficiency. In this way, a semiconductor device capable of detecting temperature with excellent response by the temperature detection element and its manufacturing method can be provided.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 17, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Kouji NAKAJIMA
  • Publication number: 20110000224
    Abstract: In various embodiments of the present invention, a thermoelectric device is provided. The thermoelectric device includes one or more thermoelements provided for transferring heat across the ends of the thermoelectric device. A method for making the thermoelectric device includes forming a metal substrate, and depositing one or more thermoelectric films on the metal substrate. Thereafter, one or more bumps are provided on one of the one or more thermoelectric films. Deposition of the one or more thermoelectric films on the metal substrate and the provision of the one or more bumps on the thermoelectric film result in the formation of a thermoelement.
    Type: Application
    Filed: March 11, 2009
    Publication date: January 6, 2011
    Inventors: Uttam Ghoshal, Ayan Guha
  • Patent number: 7862233
    Abstract: A structure, apparatus and method for deterring the temperature of an active region in semiconductor, particularly a FET is provided. A pair FETs are arranged on a silicon island a prescribed distance from one another where the silicon island is surrounded by a thermal insulator. One FET is heated by a current driven therethrough. The other FET functions as a temperature sensor by having a change in an electrical characteristic versus temperature monitored. By arranging multiple pairs of FETs separated by different known distances, the temperature of the active region of one of the FETs may be determined during operation at various driving currents.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: January 4, 2011
    Assignee: International Business Machines Corporation
    Inventors: Paul A. Hyde, Edward J. Nowak
  • Patent number: 7816747
    Abstract: A detector for detecting electromagnetic waves, the detector having an antenna for receiving the electromagnetic waves, a semiconductor element, wherein a termination section of the semiconductor element establishes a termination resistor of the antenna, wherein the termination section is provided for heating a temperature-sensitive part of the semiconductor element, wherein the semiconductor element comprises a temperature-dependent characteristic that is dependent from the temperature of the temperature sensitive part and a measurement unit for measuring the temperature-dependent characteristic of the semiconductor element.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: October 19, 2010
    Assignee: International Business Machines Corporation
    Inventors: Thomas E. Morf, Martin Leo Schmatz, Jonas R. Weiss
  • Patent number: 7808067
    Abstract: A temperature sensor structure for a semiconductor device. One embodiment provides a semiconductor substrate including the semiconductor device. A dissipation region of the semiconductor device is adjacent to a main surface of the semiconductor substrate. A first layer arrangement is disposed on the main surface of the semiconductor substrate adjacent to the dissipation region of the semiconductor device. A second layer arrangement is disposed on the first layer arrangement with an insulation layer for galvanic separation therebetween. The first and second layer arrangements and the insulation layer form a layer structure on the main surface above the dissipation region. A circuit element is disposed in the second layer arrangement, the circuit element having a temperature-dependent characteristic and being coupled thermally to the dissipation region.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 5, 2010
    Assignee: Infineon Technologies AG
    Inventors: Matthias Stecher, Joachim Weyers
  • Patent number: 7800195
    Abstract: A semiconductor apparatus is provided. The semiconductor apparatus includes a semiconductor substrate and a temperature sensing diode that is disposed on a surface part of the semiconductor substrate. A relation between a forward current flowing through the temperature sensing diode and a corresponding voltage drop across the temperature sensing diode varies with temperature. The semiconductor apparatus further includes a capacitor that is coupled with the temperature sensing diode, configured to reduce noise to act on the temperature sensing diode, and disposed such that the capacitor and the temperature sensing diode have a layered structure in a thickness direction of the semiconductor substrate.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: September 21, 2010
    Assignee: DENSO CORPORATION
    Inventors: Shoji Ozoe, Shoji Mizuno, Takaaki Aoki, Tomofusa Shiga
  • Patent number: 7759758
    Abstract: An integrated circuit having a resistance temperature sensor composed of a first resistance structure formed within a trench, and a second resistance structure formed within a mesa region is disclosed. This embodiment makes it possible to suppress or reduce manufacturing-technological fluctuations of the width of the trenches to a resistance value of the resistance temperature sensor.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: July 20, 2010
    Assignee: Infineon Technologies AG
    Inventor: Markus Zundel
  • Patent number: 7737521
    Abstract: A power transistor is disclosed. In one embodiment, the power transistor has a cell array including a semiconductor body having a plurality of transistor cells with gate electrodes and with body and source electrode regions and at least one temperature sensing device integrated in the semiconductor body. The temperature sensing device is formed in a selected sense zone within the cell array, and the transistor cells lying in at least one zone of the cell array that is directly adjacent to the sense zone have an increased W/L ratio of their channel width (W) to their channel length (L) compared with the other transistor cells of the cell array.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: June 15, 2010
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Norbert Krischke
  • Patent number: 7622782
    Abstract: A pressure sensor includes a base substrate silicon fusion bonded to a cap substrate with a chamber disposed between the base substrate and the cap substrate. Each of the base substrate and the cap substrate include silicon. The base substrate includes walls defining a cavity and a diaphragm portion positioned over the cavity, wherein the cavity is open to an environment to be sensed. The chamber is hermetically sealed from the environment.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: November 24, 2009
    Assignee: General Electric Company
    Inventors: Stanley Chu, Sisira Kankanam Gamage, Hyon-Jin Kwon
  • Patent number: 7598584
    Abstract: An infrared solid-state image pickup apparatus includes an SOI substrate having a silicon oxide film layer and an SOI layer on a silicon substrate, a detecting portion which is provided with a PN junction diode formed on the SOI substrate and converts a temperature change generated by an incident infrared ray to an electric signal, and a support that holds the detecting portion with a space from the silicon substrate of the SOI substrate. An impurity in a semiconductor layer constituting the PN junction diode is distributed such that carriers flowing in the semiconductor layer are distributed in such an uneven manner as being much in a central portion of the semiconductor layer than in a peripheral portion thereof.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: October 6, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuaki Ohta, Masashi Ueno
  • Publication number: 20090230500
    Abstract: A semiconductor device equipped with a primary semiconductor element and a temperature detecting element for detecting a temperature of the primary semiconductor element. The device includes a first semiconductor layer of a first conductivity type that forms the primary semiconductor element. A second semiconductor region of a second conductivity type is provided in the first semiconductor layer. A third semiconductor region of the first conductivity type is provided in the second semiconductor region. The temperature detecting element is provided in the third semiconductor region and is separated from the first semiconductor layer by a PN junction.
    Type: Application
    Filed: January 30, 2009
    Publication date: September 17, 2009
    Applicant: Fuji Electric Device Technology Co., Ltd
    Inventors: Koh Yoshikawa, Tomoyuki Yamazaki, Yuichi Onozawa
  • Publication number: 20090218601
    Abstract: By incorporating germanium material into thermal sensing diode structures, the sensitivity thereof may be significantly increased. In some illustrative embodiments, the process for incorporating the germanium material may be performed with high compatibility with a process flow for incorporating a silicon/germanium material into P-channel transistors of sophisticated semiconductor devices. Hence, temperature control efficiency may be increased with reduced die area consumption.
    Type: Application
    Filed: September 4, 2008
    Publication date: September 3, 2009
    Inventors: Rolf Stephan, Markus Forsberg, Gert Burbach, Anthony Mowry
  • Publication number: 20090212386
    Abstract: A MEMS device includes a P-N device formed on a silicon pin, which is connected to a silicon sub-assembly, and where the P-N device is formed on a silicon substrate that is used to make the silicon pin before it is embedded into a first glass wafer. In one embodiment, forming the P-N device includes selectively diffusing an impurity into the silicon pin and configuring the P-N device to operate as a temperature sensor.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 27, 2009
    Applicant: Honeywell International Inc.
    Inventors: Jeff A. Ridley, Robert Higashi, James F. Detry
  • Publication number: 20090206438
    Abstract: A semiconductor component and a method for manufacturing such a semiconductor component which has a resistance behavior which depends heavily on the temperature. This resistance behavior is obtained by a special multi-layer structure of the semiconductor component, one layer being designed in such a way that, for example, multiple p-doped regions are present in an n-doped region, said regions being short-circuited on one side via a metal-plated layer. For example, the semiconductor component may be used for reducing current peaks, by being integrated into a conductor. In the cold state, the semiconductor component has a high resistance which becomes significantly lower when the semiconductor component is heated as a result of the flowing current.
    Type: Application
    Filed: September 12, 2005
    Publication date: August 20, 2009
    Inventors: Peter Flohrs, Alfred Goerlach, Peter Urbach, Wolfgang Feiler, Ning Qu, Klaus Heyers
  • Patent number: 7569763
    Abstract: A solid-state energy converter with a semiconductor or semiconductor-metal implementation is provided for conversion of thermal energy to electric energy, or electric energy to refrigeration. In n-type heat-to-electricity embodiments, a highly doped n* emitter region made of a metal or semiconductor injects carriers into an n-type gap region. A p-type layer is positioned between the emitter region and gap region, allowing for discontinuity of corresponding Fermi-levels and forming a potential barrier to sort electrons by energy. Additional p-type layers can optionally be formed on the collector side of the converter. One type of these layers with higher carrier concentration (p*) serves as a blocking layer at the cold side of the converter, and another layer (p**) with carrier concentration close to the gap reduces a thermoelectric back flow component. Ohmic contacts on both sides of the device close the electrical circuit through an external load to convert heat to electricity.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: August 4, 2009
    Assignee: Micropower Global Limited
    Inventors: Yan R. Kucherov, Peter L. Hagelstein
  • Publication number: 20090166794
    Abstract: By forming thermocouples in a contact structure of a semiconductor device, respective extension lines of the thermocouples may be routed to any desired location within the die, without consuming valuable semiconductor area in the device layer. Thus, an appropriate network of measurement points of interest may be provided, while at the same time allowing the application of well-established process techniques and materials. Hence, temperature-dependent signals may be obtained from hot spots substantially without being affected by design constraints in the device layer.
    Type: Application
    Filed: July 8, 2008
    Publication date: July 2, 2009
    Inventors: Anthony Mowry, Casey Scott, Roman Boschke
  • Publication number: 20090152666
    Abstract: A thermoelectric semiconductor device includes a plurality of alternating P-type and N-type semiconductor elements disposed between first and second ceramic layers, first conductor elements attached to the first ceramic layer and interconnecting cold junctions of the P-type and N-type semiconductor elements, and second conductor elements attached to the second ceramic layer and interconnecting hot junctions of the P-type and N-type semiconductor elements.
    Type: Application
    Filed: January 23, 2009
    Publication date: June 18, 2009
    Inventor: Chin-Kuang Luo
  • Patent number: 7545017
    Abstract: A wafer level package for a surface acoustic wave (SAW) device and a fabrication method thereof. The SAW device wafer level package includes a SAW device in which a SAW element is formed on a top surface of a device wafer, a cap wafer which is bonded with a top surface of the SAW device and has a viahole penetrating the cap wafer, and a conductive member to fill a part of the viahole. The viahole has a first via portion and a second via portion, the first via portion has a gradually smaller diameter from a bottom surface of the cap wafer until a certain depth, and the second via portion has a gradually greater diameter from the first via portion until a top surface of the cap wafer.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-chul Lee, Jun-sik Hwang, Ji-hyuk Lim, Woon-bae Kim
  • Patent number: 7534034
    Abstract: A device for detecting and/or transmitting at least one environmental influence, and a method for producing the same. The device comprises at least one receiver element and an evaluation circuit that is substantially composed of organic functional material.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: May 19, 2009
    Assignee: PolyIC GmbH & Co. KG
    Inventors: Wolfgang Clemens, Herbert Schewe
  • Patent number: 7462922
    Abstract: A semiconductor device provided with a temperature detection function having a high temperature detection accuracy for improving the ESD resistance of a temperature detection diode. The semiconductor device has a semiconductor element. A temperature detection diode is used to detect the temperature of the semiconductor element and an ambient temperature of the semiconductor element. A protection diode is connected between a cathode of the temperature detection diode and a ground side of the semiconductor element when the semiconductor element is activated.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: December 9, 2008
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Shogo Mori, Kenji Ono
  • Publication number: 20080283955
    Abstract: The present invention relates to an integrated device, comprising a semiconductor device formed on a semiconductor substrate, a temperature sensing element formed within a semi-conductive layer formed on the semiconductor substrate, an electrically insulating layer formed over the semi-conductive layer, a metal layer formed over the insulation layer and forming an electrical contact of the semiconductor device, and a thermal contact extending from the metal layer through the electrically insulating layer to a first region of the semi-conductive layer, wherein the first region of the semi-conductive layer is electrically isolated from the temperature sensing element. The present invention also relates to a method of forming a temperature sensing element for integration with a semiconductor device.
    Type: Application
    Filed: July 10, 2006
    Publication date: November 20, 2008
    Inventors: Jean-Michel Reynes, Eric Marty, Alain Deram, Jean-Baptiste Sauveplane
  • Publication number: 20080237772
    Abstract: A temperature sensor structure for a semiconductor device. One embodiment provides a semiconductor substrate including the semiconductor device. A dissipation region of the semiconductor device is adjacent to a main surface of the semiconductor substrate. A first layer arrangement is disposed on the main surface of the semiconductor substrate adjacent to the dissipation region of the semiconductor device. A second layer arrangement is disposed on the first layer arrangement with an insulation layer for galvanic separation therebetween. The first and second layer arrangements and the insulation layer form a layer structure on the main surface above the dissipation region. A circuit element is disposed in the second layer arrangement, the circuit element having a temperature-dependent characteristic and being coupled thermally to the dissipation region.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Matthias Stecher, Joachim Weyers
  • Publication number: 20080203389
    Abstract: A semiconductor apparatus is provided. The semiconductor apparatus includes a semiconductor substrate and a temperature sensing diode that is disposed on a surface part of the semiconductor substrate. A relation between a forward current flowing through the temperature sensing diode and a corresponding voltage drop across the temperature sensing diode varies with temperature. The semiconductor apparatus further includes a capacitor that is coupled with the temperature sensing diode, configured to reduce noise to act on the temperature sensing diode, and disposed such that the capacitor and the temperature sensing diode have a layered structure in a thickness direction of the semiconductor substrate.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 28, 2008
    Applicant: DENSO CORPRORATION
    Inventors: Shoji Ozoe, Shoji Mizuno, Takaaki Aoki, Tomofusa Shiga
  • Publication number: 20080079109
    Abstract: A thermoelectric device includes: a first insulator substrate; a plurality of first pads of copper foil attached to the first insulator substrate; a second insulator substrate; a plurality of second pads of copper foil attached to the second insulator substrate; and a plurality of alternately disposed p-type and n-type semiconductor elements disposed between the first and second insulator substrates. Each of the p-type and n-type semiconductor elements has two opposite ends that are respectively bonded to a respective one of the first pads of copper foil and a respective one of the second pads of copper foil through a copper brazing material.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventor: Chin-Kuang Luo
  • Patent number: 7352045
    Abstract: A SiC die with Os and/or W/WC/TiC contacts and metal conductors is encapsulated either alone or on a ceramic substrate using a borosilicate (BSG) glass that is formed at a temperature well below upper device operating temperature limits but serves as a stable protective layer above the operating temperature (over 1000° C., preferably >1200° C.). The glass is preferably 30-50% B2O3/70-50% SiO2, formed by reacting a mixed powder, slurry or paste of the components at 460°-1000° C. preferably about 700° C. The die can be mounted on the ceramic substrate using the BSG as an adhesive. Metal conductors on the ceramic substrate are also protected by the BSG. The preferred ceramic substrate is AIN but SiC/AIN or Al2 03 can be used.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: April 1, 2008
    Assignee: Microsemi Corporation
    Inventors: James D. Parsons, B. Leo Kwak
  • Patent number: 7342169
    Abstract: A thermoelectric structure and device including at least first and second material systems having different lattice constants and interposed in contact with each other, and a physical interface at which the at least first and second material systems are joined with a lattice mismatch and at which structural integrity of the first and second material systems is substantially maintained. The at least first and second material systems have a charge carrier transport direction normal to the physical interface and preferably periodically arranged in a superlattice structure.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: March 11, 2008
    Assignee: Nextreme Thermal Solutions
    Inventors: Rama Venkatasubramanian, Edward Siivola, Thomas Colpitts, Brooks O'Quinn
  • Patent number: 7239002
    Abstract: In a temperature sensor section of a semiconductor integrated circuit device, first vias of tungsten are formed at the topmost layer of a multi-layer wiring layer and pads of titanium are provided on regions of the multi-layer wiring layer which covers the vias. An insulating layer is provided in such a way as to cover the multi-layer wiring layer and the pads, second vias are so formed as to reach the pads. Vanadium oxide is buried in the second vias by reactive sputtering, and a temperature monitor part of vanadium oxide is provided in such a way as to connect the second vias each other. Accordingly, the temperature monitor part is connected between the two wires.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: July 3, 2007
    Assignees: NEC Electronics Corporation, NEC Corporation
    Inventors: Hiroaki Ohkubo, Kuniko Kikuta, Yasutaka Nakashiba, Naoyoshi Kawahara, Hiroshi Murase, Naoki Oda, Tokuhito Sasaki, Nobukazu Ito
  • Patent number: 7187053
    Abstract: The present invention provides an integrated circuit. The integrated circuit has a plurality of chip areas. The integrated circuit also has a plurality of temperature sensors, at least one per chip area. The temperature sensors generate a voltage proportional to the measured temperature. A voltage comparator compares the voltage output of the plurality of temperature sensors. The voltage comparator is further employable to generate a signal if the difference between the voltages generated by the plurality of temperature sensors exceeds a threshold.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: March 6, 2007
    Assignee: International Business Machines Corporation
    Inventors: David William Boerstler, Munehiro Yoshida
  • Patent number: 7166796
    Abstract: In devices used for the direct conversion of heat into electricity, or vice versa, known in the art as thermoelectric power generators, thermoelectric refrigerators and thermoelectric heat pumps, the efficiency of energy conversion and/or coefficient of performance have been considerably lower than those of conventional reciprocating or rotary, heat engines and/or vapor-compression systems, employing certain refrigerants. The energy conversion efficiency of power generating devices, for example, aside from the hot and cold junction temperatures, also depends on a parameter known in the art as the thermoelectric figure of merit Z=S2?/k, where S is the thermoelectric power, ? is the electrical conductivity and k is the thermal conductivity, of the material that constitutes the p-type, and/or n-type, thermoelements, or branches, of the said devices. In order to achieve a considerable increase in the energy conversion efficiency, a thermoelectric figure of merit of the order of 10?2 K?1, or more, is needed.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: January 23, 2007
    Inventor: Michael C. Nicoloau
  • Patent number: 7129557
    Abstract: A thermal monitor diode is provided that comprises a silicon thin film on an insulator mounted on a silicon substrate. An opening extends through the silicon thin film and through the insulator and partially into the silicon substrate and terminates at an end wall. A conductive material is disposed in the opening and extends to the end wall. The substrate has a P/N junction formed therein adjacent the end wall, and an insulating spacer material surrounds the conductive material and is sufficiently thin to allow temperature excursions in the silicon thin film to pass therethrough. The invention also contemplates a method of forming the diode.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: Zachary E. Berndlmaier, Edward W. Kiewra, Carl J. Radens, William R. Tonti
  • Patent number: RE41801
    Abstract: A termoelectric thermoelectric device and method for manufacturing the thermoelectric device.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: October 5, 2010
    Assignee: Nextreme Thermal Solutions, Inc.
    Inventor: Rama Venkatasubramanian