Abstract: A semiconductor display device which comprises the polycrystalline silicon TFTs is constructed by a pixel region and a peripheral circuit and TFT characteristics required for each circuit are different. For example, an LDD structure TFT having a large off-current suppressing effect is suitable for the pixel region. Also, a GOLD structure TFT having a large hot carrier resistance is suitable for the peripheral circuit. When the performance of the semiconductor display device is improved, it is suitable that difference TFT structures are used for each circuit. In the case where the GOLD structure TFT having both Lov regions and Loff regions is formed, ion implantation into the Lov regions is independently performed using a negative resist pattern formed in a self alignment by a rear surface exposure method as a mask, and thus impurity concentrations of the Lov regions and the Loff regions can be independently controlled.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.

Abstract: In those thin-film transistors (TFTs) employing as its active layer a silicon film crystallized using a metal element, the objective is to eliminate bad affection of such metal element to the TFT characteristics. To this end, in a TFT having as its active layer a crystalline silicon film that was crystallized using nickel (Ni), those regions corresponding to the source/drain thereof are doped with phosphorus; thereafter, thermal processing is performed. During this process, nickel residing in a channel formation region is “gettered” into previously phosphorus-doped regions. With such an arrangement, it becomes possible to reduce the Ni concentration in certain regions in which lightly-doped impurity regions will be formed later, which in turn enables suppression of affection to TFT characteristics.

Abstract: A thin film transistor (TFT) which may be used as a pixel drive element in an active matrix LCD display includes a pair of side wall spacers adjacent to the opposing side walls of its gate electrode. The side wall spacers provide the gate electrode with a substantially rectangular cross section, such that the gate electrode has a substantially constant thermal conductivity over its area. The TFT has a uniform device characteristic.

Abstract: On the polycrystal semiconductor film 3 formed on the insulating substrate 1, the source 6 and drain 7 in LDD structure having a low concentration region 4 and a high concentration region 5 are formed. The region 4 has a low impurity concentration, and the region 5 has a high impurity concentration. The length of the low concentration region 4 measured from the edge of gate insulating film 9 is not smaller than the average grain size of the polycrystal semiconductor film 3. The LCD device employing the TFT thus constructed is free from white spots (micro brighter spots) in a high temperature atmosphere.

Abstract: A non-single-crystalline semiconductor material and a device utilizing the material, the material being of an intrinsic or substantially intrinsic conductivity type and including silicon and containing a dangling bond neutralizer consisting of hydrogen and/or a halogven wherein the concentration of carbon contained in the semiconductor material is less than 4×1018 and the concentration of boron contained in the semiconductor material is not higher than 2×1017 atoms/cm3.

Abstract: To provide a thin film transistor having a low OFF characteristic and to provide P-channel type and N-channel type thin film transistors where a difference in characteristics of the P-channel type and the N-channel type thin film transistors is corrected, a region 145 having a P-type behavior more potential than that of a drain region 146 is arranged between a channel forming region 134 and the drain region 146 in the P-channel type thin film transistor whereby the P-channel type thin film transistor having the low OFF characteristic can be provided and a low concentration impurity region 136 is arranged between a channel forming region 137 and a drain region 127 in the N-channel type thin film transistor whereby the N-channel type thin film transistor having the low OFF characteristic and where deterioration is restrained can be provided.

Abstract: A method of manufacturing a semiconductor includes the steps of: forming a first semiconductor film on a substrate having an insulating surface; applying an energy to the first semiconductor film to crystallize the first semiconductor film; patterning the first semiconductor film to form a region that forms a seed crystal; etching the seed crystal to selectively leave a predetermined crystal face in the seed crystal; covering the seed crystal to form a second semiconductor film; and applying an energy to the second semiconductor film to conduct a crystal growth from the seed crystal in the second semiconductor film.

Abstract: The present invention is a method for improving transistor channel hot carrier reliability by incorporating a solid deuterium source into the transistor structure. This is accomplished by using a deuterium containing source gas for formation of components of the transistor structure. A deuterium sinter, shown to improve channel hot carrier lifetime, is made a more viable process step by using deuterium as a source gas for formation of components made of silicon nitride. Additionally, time and/or temperature of the sinter may reduced. Incorporation of deuterium containing components which allow sufficient outdiffusion of deuterium may eliminate the need for a final deuterium sinter.

Abstract: An electrostatic discharge protection device for protecting a mixed voltage integrated circuit against damage is provided which includes at least on pair of NMOS transistors connected in a cascode configuration. Each NMOS transistor pair includes a first transistor, having a drain region coupled to and I/O stage of the mixed voltage integrated circuit, and a gate region coupled to the mixed voltage integrated circuit's low power supply. The second NMOS transistor of the pair is merged into the same active area as the first transistor and has a gate region and a source region coupled to the ground plane of the mixed voltage integrated circuit. The source region of the first transistor and the drain region of the second transistor are constructed of a shared NMOS diffusion region.

Abstract: A silicon semiconductor integrated circuit includes an insulative field oxidation layer which substantially does not encroach under active circuit elements of the integrated circuit. The field oxidation layer is formed of oxidized amorphous silicon created by bombardment of a silicon substrate with noble gas ions. The amorphous silicon oxidizes at a rate much faster than crystalline silicon so that when the field oxidation layer is formed crystalline silicon foundations for the active circuit elements are left substantially intact. The crystalline silicon foundations are formed by using appropriate shield elements during the noble gas ion bombardment. This noble gas ion bombardment also has the advantage of eliminating dislocation defects which may be present in the field oxidation area so that these defects do not propagate into the crystal lattice of the silicon during subsequent heating and cooling cycles.

Abstract: A method of fabricating a thin film transistor includes the steps of forming an active layer on an insulating substrate; forming an insulating layer and a first metal layer on the active layer; forming a photoresist pattern for forming a gate electrode on the metal layer; etching the metal layer and the insulating layer by using the photoresist pattern as a mask, and respectively forming a gate electrode and a gate insulating layer to expose a part of the active layer; forming an amorphous silicon layer on the resultant whole surface of the substrate; forming a second metal layer on the amorphous silicon layer; patterning the second metal layer and the amorphous silicon layer by a photolithographic process to form an offset layer and a source/drain electrode; and carrying out a lift-off process to remove the photoresist pattern, and exposing the surface on the gate electrode.

Abstract: Non-single-crystalline semiconductor material or device containing carbon impurity in a concentration less than 4.times.10.sup.18 atoms/cm.sup.3.

Abstract: A thin-film switching device includes an active region including noncrystalline silicon, e.g., hydrogenated amorphous silicon, which includes chlorine distributed in a manner which produces a predetermined photoconductivity and a predetermined field-effect mobility in the active region. Preferably, the active region includes a plurality of hydrogenated amorphous silicon layers, at least one of which includes chlorine. In one embodiment, the plurality of hydrogenated amorphous silicon layers includes a hydrogenated amorphous silicon layer including between 0.1 ppm and 106 ppm chlorine. In another embodiment, the plurality of hydrogenated amorphous silicon layers includes a first hydrogenated amorphous silicon layer having a first chlorine concentration and a second hydrogenated amorphous silicon layer having a second chlorine concentration less than the first chlorine concentration.

Abstract: Regions 106 which can be regarded as being monocrystalline are formed locally by irradiating with laser light, and at least the channel-forming region 112 is constructed using these regions. With thin-film transistors which have such a construction it is possible to obtain characteristics which are similar to those which employ monocrystals. Further, by connecting in parallel a plurality of such thin-film transistors it is possible to obtain characteristics which are effectively equivalent to those of a monocrystalline thin-film transistor in which the channel width has been increased.

Abstract: A sensor device includes a sensing element and a thin film transistor (TFT), and the TFT's channel leads include semiconductor channel leads formed in a layer of microcrystalline silicon (.mu.c-Si). The sensing element is formed in a semiconductor layer that includes silicon-based material and is over the .mu.c-Si layer. Each of the semiconductor channel leads has a structure that prevents formation of bubbles at the lower and upper sides of the .mu.c-Si layer during production of the sensing element. The TFT's channel can be formed in a layer of intrinsic silicon-based material under the .mu.c-Si layer and the .mu.c-Si layer can be a deposited doped layer; or the TFT's channel can be formed in an intrinsic .mu.c-Si layer in which the leads are formed by implanting a dopant. The .mu.

Abstract: High quality, stable photovoltaic and electronic amorphous silicon devices which effectively resist light-induced degradation and current-induced degradation, are produced by a special plasma deposition process. Powerful, efficient single and multi-junction solar cells with high open circuit voltages and fill factors and with wider bandgaps, can be economically fabricated by the special plasma deposition process. The preferred process includes relatively low temperature, high pressure, glow discharge of silane in the presence of a high concentration of hydrogen gas.

Abstract: A device having a switch comprises a chromium layer and an adjacent semiconductor layer. The fraction of voids in the chromium layer is less than 10%, preferably less than 2%. The chromium layer in the device comprises traces of neon with a concentration of less than 0.1 at. %. Chromium layers are deposited on a substrate by means of a sputter deposition process. By using neon as the working gas at pressures of less than 1 Pa, preferably in the range from 0.2 Pa to 0.5 Pa, the sputter-deposited chromium layers are substantially free of internal stress and have a density which is approximately equal to that of bulk chromium.

Abstract: A semiconductor window which is transparent to light in the infrared range and which has good electrical conductivity is formed of a prefabricated semiconductor sheet bonded to a substrate material by optical contact. The sheet is a substantially uniformly doped wafer sufficiently thin that inherent absorption bands do not affect transmission. The sheet is contact bonded to the surface of an undoped transparent substrate without diffusion, growth or deposition on the surface. Windows having particular optical band pass characteristics are formed utilizing a zinc selenide substrate and a gallium arsenide sheet.

Abstract: A thin film transistor for a liquid crystal display includes a substrate; an active layer having source and drain regions over the substrate; a first insulating layer adjacent to the active layer and having first and second surfaces, the first surface being on an opposite side to the second surface, and the active layer being adjacent to the second surface of the first insulating layer; a gate electrode adjacent to the first surface of the first insulating layer; a first electrode in contact with the source region; a second electrode in contact with the drain region; a second insulating layer on the second electrode; and a third insulating layer over a resultant structure of the substrate.

Abstract: A polycrystalline semiconductor thin film formed in a stripe shape on an insulating substrate wherein crystal particles are arranged in a line-texture form in a longitudinal direction of a stripe; an electric field effect mobility .nu..sub.L in a longitudinal direction of a stripe is different from an electric field effect mobility .nu..sub.S in a width direction of the stripe, and .nu..sub.L .gtoreq.1.5.multidot..nu..sub.S is satisfied.

Abstract: A device having a switch comprises a chromium layer and an adjacent semiconductor layer. The fraction of voids in the chromium layer is less than 10%, preferably less than 2%. The chromium layer in the device comprises traces of neon with a concentration of less than 0.1 at. %.Chromium layers are deposited on a substrate by means of a sputter deposition process. By using neon as the working gas at pressures of less than 1 Pa, preferably in the range from 0.2 Pa to 0.5 Pa, the sputter-deposited chromium layers are substantially free of internal stress and have a density which is approximately equal to that of bulk chromium.

Abstract: Regions 106 which can be regarded as being monocrystalline are formed locally by irradiating with laser light, and at least the channel-forming region 112 is constructed using these regions. With thin-film transistors which have such a construction it is possible to obtain characteristics which are similar to those which employ monocrystals. Further, by connecting in parallel a plurality of such thin-film transistors it is possible to obtain characteristics which are effectively equivalent to those of a monocrystalline thin-film transistor in which the channel width has been increased.

Abstract: A structure for a complementary field effect transistor includes a semiconductor body having a first body region of a first conductivity type and an adjoining second body region of an opposite second conductivity type. A buried dielectric region is located in the semiconductor body beneath the upper semiconductor surface and extends into the first and second body regions. A first drain region of the second conductivity type is located in the semiconductor body and adjoins the first body region, the dielectric region and the upper semiconductor surface. A second drain region of the first conductivity type is located in the semiconductor body and adjoins the second body region, the dielectric region and the upper semiconductor surface. The two drain regions are adjacent to one another.

Abstract: Thin film detector of ultraviolet radiation with high spectral selectivity option, and a structure placed between two electrodes, formed by the superposition of semiconductor thin films such as hydrogenated amorphous silicon and its alloys with carbon. The device is able to absorb a large quantity of UV radiation and to convert it into electric current being transparent to photons of longer wavelengths. Its deposition technique allows fabrication on substrates of glass, plastic, metal, ceramic types of materials (also opaque, also flexible), on which a conductor material film has been predeposited. It can be fabricated on substrates of any size.

Abstract: A photovoltaic element comprising a substrate and a multi-layered semiconductor active layer having a pin junction structure disposed on said substrate, said multi-layered semiconductor layer comprising a non-single crystal semiconductor layer of n- or p-type, a non-single crystal i-type semiconductor layer and a non-single crystal semiconductor layer of p- or n-type being stacked in this order from the substrate side, characterized in that said i-type semiconductor layer comprises a three-layered structure comprising a non-single crystal layer (b) formed by means of a microwave plasma CVD process interposed between a pair of non-single crystal layers (a) and (c) each formed by means of a RF plasma CVD process, and said i-type layer (b) is a non-single crystal i-type layer formed by means of the microwave plasma process from a mixture of a silane series gas not containing chlorine atom(s), a chlorine-containing raw material gas in an amount of 10% or less of the total amount of the chlorine-free silane series

Abstract: The longitudinal edges of the overlying channel layer of a thin-film transistor are substantially aligned with the longitudinal edges of the underlying polysilicon gate layer. As a result of this line-on-line arrangement of the channel and gate layers, integration area is minimized so that optimum integration density is achieved. Source-to-drain on current is increased as the result of the increased channel width gained from the sidewall section of the polysilicon gate, which may occur as a result of the permissible lateral extension of the body (channel) layer over one longitudinal edge of the channel gate layer due to a misalignment in lithography or processing delta.

Abstract: A process for forming a silicon-containing amorphous film on a substrate which comprises (a) step of depositing a silicon-containing amorphous film on said substrate and (b) step of irradiating plasma of inert gas to said silicon-containing amorphous film on deposited on the substrate in said step (a), wherein said step (a) and said step (b) are alternately repeated.

Abstract: A display device with over voltage protection circuits having zener diode characteristics. The protection circuits have pairs of TFTs connected to resistive dividers. Each resistive divider provide the voltage set levels for one direction of overvoltage application.

Abstract: In a thin film semiconductor device having a substrate (1), an active layer (3, 6, 9), a gate insulation layer (4), and a gate electrode (5), the active layer is produced through the steps of producing an amorphous silicon layer on said substrate through a CVD process by using polysilane Si.sub.n H.sub.2(n+1), n is an integer, with added chlorine gas, and effecting solid phase growth on to said amorphous silicon layer. The addition of chlorine in producing the amorphous silicon layer makes it possible to produce the amorphous silicon layer at a lower temperature and at a rapid growth rate. A thin film semiconductor device thus produced has the advantages of high mobility and low threshold voltage.

Abstract: An object of the present invention is to provide a photoelectrical conversion device in which recombination of carriers excited by light is prevented and the open voltage and the carrier range of positive holes are improved and to provide a generating system using the photoelectrical conversion device. The photoelectrical conversion device includes a p-layer, an i-layer, and an n-layer, wherein the photoelectrical conversion device being formed by stacking the p-layer, the i-layer and the n-layer each of which is made of non-single-crystal silicon semiconductor, the i-layer contains germanium atoms, the band gap of the i-layer is smoothly changed in a direction of the thickness of the i-layer, the minimum value of the band gap is positioned adjacent to the p-layer from the central position of the i-layer and both of a valence control agent to serve as a donor and another valence control agent to serve as an acceptor are doped into the i-layer.

Abstract: A photoelectric conversion device including a photoelectric conversion element comprising a substrate, a photoelectric conversion layer with at least a pair of electrodes disposed on said substrate, a transparent resin layer comprising a fluorine-containing polymer resin, and a transparent surface layer, said transparent resin layer being disposed between said photoelectric conversion element and said transparent surface layer, characterized in that said fluorine-containing polymer resin has a fluorine content of 20 wt. % to 40 wt. % and is crosslinked with a peroxide.

Abstract: A semiconductor device including a conductive substrate or a first conductive layer formed on the substrate, a non-single-crystal semiconductor layer member is disposed on the conductive substrate or the conductive layer, the non-single-crystal semiconductor layer member having at least one intrinsic, non-single-crystal semiconductor layer, and a second conductive layer disposed on the non-single-crystal semiconductor layer. The intrinsic non-single-crystal semiconductor layer contains sodium and oxygen in very low concentrations where each concentration is 5.times.10.sup.18 atoms/cm.sup.3 or less.

Abstract: The polysilicon thin film of the present invention is formed on a glass substrate or the like having a particulate product of SiO.sub.x (0<x.ltoreq.2) of size not more than 100 .ANG., for example, dispersed into not more than 100 pieces in an area of 0.1 .mu.m square. Furthermore, in the production method of a polysilicon thin film of the present invention, a particulate product of SiO.sub.x (0<x.ltoreq.2) of size not more than 100 .ANG., for example, dispersed into not more than 100 pieces in an area of 0.1 .mu.m square, is formed on a substrate, and thereafter a polysilicon thin film is grown using this particulate product as a nucleus.

Abstract: An electro-optical device is disclosed. The electro-optical device comprises pixels arranged in rows and columns. Each pixel comprises at least one complementary TFT (thin film transistor) pair. Each complementary TFT pair consists of an n-channel TFT and a p-channel TFT. The gates of the complementary TFTs of each pixel are all connected to a signal line extending in the Y-direction. The input terminals of the TFTs of each pixel are connected to a pair of signal lines extending in the X-direction. Each pixel has at least one pixel electrode connected to the outputs of the TFTs thereof. In the operation of the electro-optical device, an electric signal is applied to the pair of signal lines extending in the X-direction and an electric signal is applied to the signal line extending in the Y-direction for the duration of the electric signal applied to the pair of signal lines extending in the X-direction.

Abstract: A thin-film transistor (3, 5a, 5b and 5c) is covered with a first silicon nitride film (9) formed by an LPCVD method. A first silicon oxide film (6) is formed on the first silicon nitride film (9). A second silicon nitride film (7), i.e., passivation film which is formed by a plasma CVD method is provided on the first silicon oxide film (6). In addition, the thin-film transistor includes a semiconductor layer covering a gate electrode. The semiconductor layer includes source, drain and active regions. The active region preferably includes a smaller amount of fluorine than the gate electrode.

Abstract: A photoelectric converting device with PIN structure includes an amorphous I-type semiconductor layer and charge injection blocking layers positioned to sandwich the I-type layer. At least one of the charge injection blocking layers comprises an amorphous P- or N-semiconductor layer in contact with the I-type layer and an amorphous P- or N-semiconductor layer containing microcrystalline structure.

Abstract: A non-single crystalline semiconductor containing at least one kind of atoms selected from the group consisting of silicon atoms (Si) and germanium atoms (Ge) as a matrix, and at least one kind of atoms selected from the group consisting of hydrogen atoms (H) and halogen atoms (X), wherein said non-single crystalline semiconductor has an average radius of 3.5 .ANG. or less and a density of 1.times.10.sup.19 (cm.sup.-3) or less as for microvoids contained therein. The non-single crystalline semiconductor excels in semiconductor characteristics and adhesion with other materials and are effectively usable as a constituent element of various semiconductor devices.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.

Abstract: An amorphous semiconductor material which does not age under the action of light is particularly suitable for red-sensitive photovoltaic components and is highly photosensitive. The amorphous semiconductor material is germanium based, particularly a silicon-germanium alloy. To this end, the semiconductor material has a compact, void-free structure, is manufactured in a glow discharge reactor by appropriate variation of the precipitation parameters, and contains one element from Group VI A of the periodic system.

Abstract: Alloys of amorphous silicon with Group VIa elements are disclosed that form high-quality materials for photovoltaic cells that are resistant to Staebler-Wronski photodegradation. Also disclosed are methods for manufacturing the alloys. The alloys can be formed as films on solid-state substrates by reacting silane gas and at least one alloying gas (H.sub.2 M, wherein M is an element from Group VIa of the periodic table), preferably with hydrogen dilution, by a glow-discharge method such as plasma-enhanced chemical vapor deposition. The alloys can have an optical bandgap energy from about 1.0 eV to about 2.3 eV, as determined by selecting one or more different Group VIa elements for alloying or by changing the concentration(s) of the alloying element(s) in the alloy. The alloys exhibit excellent light-to-dark conductivity ratios, excellent structural quality, and resistance to Staebler-Wronski degradation. They can be used as "i" type or doped for use as "p" or "n" type materials.

Abstract: A method of producing a p-type CdS wherein oxygen is doped into a CdS layer at a concentration in a range between 10.sup.16 and 10.sup.19 atomic/cm.sup.3.

Abstract: An SOI wafer is formed having a silicon-germanium layer between the epitaxial layer of the device and the insulative layer. The process includes bonding a second substrate to a silicon-germanium layer on a first substrate by an intermediate insulative layer. The first substrate is removed down to the silicon-germanium layer and the silicon layer is epitaxially formed on the silicon-germanium layer.

Abstract: A process is disclosed for producing microporous crystalline silicon which has a band-gap substantially increased relative to that of normal crystalline silicon. This process involves the preparation of quantum wires of silicon by means of a chemical attack method carried out on silicon that has been doped such that it conducts electricity substantially via the effective transport of electric charge by means of so-called holes. The microporous crystalline silicon thus produced is in the form of a discrete mass having a bulk-like, interconnected crystalline silicon structure of quantum wires whose band-gap is greater than normal crystalline silicon. Because of this increased band-gap this microporous crystalline silicon may be used as an active element in applications such as tandem solar cells.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickness direction of the I-type layer.

Abstract: A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a second semi-conductor region formed primarily of semi-amorphous semiconductor. The second semi-conductor region has a higher degree of conductivity than the first semiconductor region so that a semi-conductor element may be formed.