In Array Having Structure For Use As Imager Or Display, Or With Transparent Electrode Patents (Class 257/59)
  • Patent number: 11075304
    Abstract: A thin film transistor is disclosed. The thin-film transistor includes an active layer (3); a source electrode (1); and a drain electrode (2). The active layer includes an active pattern region (4), the active pattern region including a main body portion (5) and a plurality of protrusion portions (6) on both sides of the main body portion. The protrusion portions are connected to the main body portion.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: July 27, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Jun Wang, Zhonghao Huang, Yongliang Zhao, Seungmoo Rim
  • Patent number: 11073729
    Abstract: The liquid crystal display device includes an island-shaped first semiconductor film 102 which is formed over a base insulating film 101 and in which a source 102d, a channel forming region 102a, and a drain 102b are formed; a first electrode 102c which is formed of a material same as the first semiconductor film 102 to be the source 102d or the drain 102b and formed over the base insulating film 101; a second electrode 108 which is formed over the first electrode 102c and includes a first opening pattern 112; and a liquid crystal 110 which is provided over the second electrode 108.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: July 27, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11067865
    Abstract: A display apparatus includes a first substrate, a second substrate, a display medium, a pixel structure, a read-out transistor, a first insulating layer, a light-sensing structure, and a color filter pattern. The display medium is disposed between the first substrate and the second substrate. The pixel structure is disposed between the display medium and the first substrate. The read-out transistor has a semiconductor pattern and a control terminal. The light-sensing structure is disposed between the second substrate and the display medium, and is electrically connected to the read-out transistor. The first insulating layer is disposed between the semiconductor pattern and the control terminal of the read-out transistor. The color filter pattern is disposed between the second substrate and the display medium. The first insulating layer has an opening located outside the light-sensing structure, and the color filter pattern fills the opening of the first insulating layer.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: July 20, 2021
    Assignee: Au Optronics Corporation
    Inventors: Chih-Chung Su, Shin-Shueh Chen, Yi-Wei Chen
  • Patent number: 11067836
    Abstract: A multi-stack graphene structure includes a graphene stack that includes graphene layers including amorphous graphene and thin film dielectric layers. The graphene layers include amorphous graphene. The graphene layers and the thin dielectric layers are alternately stacked on one another. The multi-stack graphene structure also includes an electric field former configured to apply an electric field to the graphene layers.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: July 20, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., THE BOARD OF TRUSTEES OF THE LELAND STANFORD JR. UNIVERSITY
    Inventors: Wonjae Joo, Juhyung Kang, Soojin Kim, Mark L. Brongersma, Shanhui Fan
  • Patent number: 11069796
    Abstract: A semiconductor layer containing a metal oxide is formed, a gate insulating layer containing an oxide is formed over the semiconductor layer, and a metal oxide layer is formed over the gate insulating layer. Heat treatment is performed after the metal oxide layer is formed, and the metal oxide layer is removed after the heat treatment is performed. After the metal oxide layer is removed, a gate electrode overlapping with part of the semiconductor layer is formed over the gate insulating layer. Then, a first element is supplied through the gate insulating layer to a region of the semiconductor layer that does not overlap with the gate electrode. Examples of the first element include phosphorus, boron, magnesium, aluminum, and silicon. The steps performed after the metal oxide layer is removed are each preferably performed at a temperature lower than or equal to the temperature of the heat treatment.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: July 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Kenichi Okazaki, Masataka Nakada, Yasuharu Hosaka
  • Patent number: 11063095
    Abstract: The present application discloses an array substrate having a subpixel region and an inter-subpixel region. The array substrate includes a base substrate; a thin film transistor on the base substrate and including a drain electrode; a passivation layer on a side of the thin film transistor distal to the base substrate; a pixel electrode layer on a side of the passivation layer distal to the base substrate; a pixel definition layer in the inter-subpixel region; and an organic light emitting layer in the subpixel region on a side of the pixel electrode layer distal to the passivation layer. The array substrate includes a via extending through the passivation layer. The pixel electrode layer is electrically connected to the drain electrode of the thin film transistor through the via. The via is in the subpixel region.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: July 13, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Chunjing Hu
  • Patent number: 11063154
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: July 13, 2021
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Kazufumi Watabe, Tomoyuki Ariyoshi, Osamu Karikome, Ryohei Takaya
  • Patent number: 11063193
    Abstract: A colour micro-LED display apparatus comprises an array of reflective optical elements and an array of micro-LED pixels with a uniform emission colour across the array arranged between the array of reflective optical elements and an output substrate. Light from the micro-LEDs is directed into the reflective optical elements and is incident on scattering regions in the apparatus. Colour converted scattered light is transmitted by the output substrate. A thin and efficient display apparatus may be provided with high spatial and angular colour uniformity and long lifetime.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: July 13, 2021
    Assignee: RealD Spark, LLC
    Inventors: Graham J. Woodgate, Jonathan Harrold, Michael G. Robinson
  • Patent number: 11063066
    Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: July 13, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Yasutaka Nakazawa, Yukinori Shima, Masami Jintyou, Masayuki Sakakura, Motoki Nakashima
  • Patent number: 11049998
    Abstract: An electroluminescent display panel and a display device are provided. In the embodiments of the disclosure, a photosensitive device is arranged in the photosensitive device arranging region. The extending line of at least one line is arranged in the photosensitive device arranging region so that the orthographic projection of the extending line on the light-emitting surface of the electroluminescent display panel overlaps with the first pixels in the first and second specific pixel groups in the photosensitive device arranging area; the first and second specific pixel groups include respective first pixels located in first straight lines of the second pixels correspondingly connected to two adjacent signal lines, the first and second specific pixel groups are adjacent in the second direction, and the first straight lines extend in the first direction.
    Type: Grant
    Filed: December 28, 2019
    Date of Patent: June 29, 2021
    Assignee: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Yangzhao Ma, Yuejun Tang, Ruiyuan Zhou
  • Patent number: 11049917
    Abstract: This disclosure relates to the field of display technologies, and discloses an OLED display panel, a method for fabricating the same, and a display device, and the OLED display device includes: a first substrate; a pixel definition layer located on the first substrate, and including a plurality of hollow light-emitting areas, and first recessed sections located between adjacent light-emitting areas; a cathode layer located on a side of the pixel definition layer away from the first substrate, and comprising corresponding second recessed sections corresponding in position to the first recessed sections; and electrically conductive sections located on a side of the cathode layer away from the pixel definition layer, and located in the second recessed sections.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: June 29, 2021
    Assignees: Hefei BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Na Zhao, Liyun Deng, Bin Zhou
  • Patent number: 11049886
    Abstract: A thin film transistor array substrate includes: a substrate on which a thin film transistor and a storage capacitor are formed. The storage capacitor includes a first electrode plate formed on the substrate, a gate isolation layer or an etching stopper layer formed on the first electrode plate, and a second electrode plate formed on the gate isolation layer or the etching stopper layer. The etching stopper layer may be formed on the gate isolation layer, of which one is partially etched and removed such that there is only one of the gate isolation layer and the etching stopper layer existing between the two electrode plates of the storage capacitor so as to reduce the overall thickness of the isolation layer of the storage capacitor. Thus, the capacitor occupies a smaller area and a higher aperture ratio may be achieved.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: June 29, 2021
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xiaowen Lv
  • Patent number: 11048350
    Abstract: A display device includes: a substrate including a display region having pixels and a non-display region disposed along at least part of the periphery of the display region; first lines in the non-display region of the substrate; a first insulating layer disposed on the first lines; second lines disposed on the first insulating layer in the non-display region; a second insulating layer disposed on the second lines; a third line disposed on the second insulating layer, the third line overlapping portions of the first and second lines in the non-display region; a third insulating layer disposed on the third line, the third insulating layer exposing a portion of the third line in a first region that overlaps with the first and second lines; and a fourth line on the third insulating layer, the fourth line overlapping the third line and in direct contact with the third line in the first region.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: June 29, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae Ho Choi, Jae Yong Lee, Chang Won Jeong
  • Patent number: 11049921
    Abstract: A display device includes a scan line that extends in a first direction on a substrate and that transmits a scan signal; a data line that extends in a second direction that intersects the first direction and that transmits a data signal; a driving voltage line that extends in the second direction and that transmits a driving voltage; a transistor that includes a second transistor connected to the scan line and the data line and a first transistor connected to the second transistor; a light emitting device connected to the transistor; and a conductive pattern disposed between the substrate and the first transistor, where each of the first and second transistors includes an active pattern with a stacked first semiconductor layer and a second semiconductor layer, which have different crystalline states.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: June 29, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jun Hee Lee, In Jun Bae, Kohei Ebisuno
  • Patent number: 11049887
    Abstract: Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: June 29, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Xiangxin Rui, Soo Young Choi, Shinichi Kurita, Yujia Zhai, Lai Zhao
  • Patent number: 11043162
    Abstract: A organic light-emitting diode (OLED) on Silicon product includes a circuit board, a central control board and an OLED on Silicon display panel located on the circuit board. A core control module and a timing control module are integrated in the central control board. The OLED on Silicon display panel has a display region, a gate row driving region, a source signal driving region, and a bonding region. OLED display pixels are provided in the display region. A gate row driving circuit is integrated in the gate row driving region. A source signal driving circuit is integrated in the source signal driving region. The bonding region is a region where the OLED on Silicon display panel is bound to the central control board. The OLED on Silicon product simplifies the processing process, reduces the cost and overall size of the product, and increases the area proportion of the display region.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: June 22, 2021
    Assignee: SEEYA OPTRONICS CO., LTD.
    Inventors: Dong Qian, Tieer Gu, Wenhui Zou, Tong Wu, Qi Li
  • Patent number: 11043791
    Abstract: An edge emitting semiconductor laser and a method for operating an edge emitting semiconductor laser are disclosed.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: June 22, 2021
    Assignee: OSRAM OLED GMBH
    Inventor: Peter Fuchs
  • Patent number: 11037995
    Abstract: The present disclosure provides an organic light-emitting display panel and a display apparatus for improving the touch performance. The display panel includes a driving device film layer, a light-emitting device film layer, an encapsulation film layer and a touch film layer. The touch film layer includes a first touch metal layer, a touch insulation layer and a second touch metal layer that are sequentially stacked. The display panel has a display area and a non-display area. The non-display area includes a touch bonding region and a display bonding region that are located on two opposite sides of the display area. A touch connection pin is provided in the touch bonding region and located in the first touch metal layer or the second touch metal layer, and a display connection pin is provided in the display bonding region and located in the driving device film layer.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: June 15, 2021
    Assignee: WuHan TianMa Micro-Electronics Co., Ltd.
    Inventors: Dan Huang, Linshan Guo
  • Patent number: 11036095
    Abstract: A display panel includes a base substrate. A semiconductor layer is disposed on the base substrate. A source electrode and a drain electrode are disposed on the semiconductor layer. A first insulating layer is disposed on both the source electrode and the drain electrode. A data line is disposed on the first insulating layer. The data line is electrically connected to the source electrode via a contact hole penetrating through the first insulating layer.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: June 15, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwang Ho Lee, Yeo Geon Yoon, Joong Gun Chong, Yong Hwan Shin
  • Patent number: 11037958
    Abstract: The present invention provides an array substrate and manufacturing method thereof. The array substrate includes a thin film transistor including a gate, an active layer, a gate insulation layer, a source, and a drain. The active layer includes a first active layer and a second active layer laminated with one another, and material of the first active layer and the second active layer are different, to increase the on-state current of the thin film transistor. The present invention increases the on-state current by reducing a contact barrier with the gate insulation layer or reducing a depletion area of the active layer.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: June 15, 2021
    Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chuanbao Luo
  • Patent number: 11031436
    Abstract: A display device includes a substrate, a pixel area, and a plurality of data lines. The substrate includes display and non-display areas. The pixel area is in the display area and includes a first pixel column and a second pixel column. The pixels in the first and second columns emit light of different colors. The data lines are respectively coupled to the first pixel column and the second pixel column. In the non-display area, a data line is coupled to one of the first or second pixel columns corresponding to a color on which influence of a resistance is greater than on another color. The data lines has a line or contact structure with a resistance less than a resistance of a line or contact structure of a remaining data line coupled to a remaining pixel column.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: June 8, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun Ja Kwon, Won Kyu Kwak, Hwan Soo Jang, Seung Yeon Cho, Hyun Ae Park
  • Patent number: 11022851
    Abstract: A display device is provided and includes substrate; first and second common electrodes arranged on the substrate; pixel electrodes arranged over first and second common electrodes; insulating layer arranged between pixel, first common, and second common electrodes; first line having first and second terminals, first terminal connected to first common electrode; second line having first and second terminals, first terminal connected to second common electrode; first transistor connected to second terminal of first line; and second transistor connected to second terminal of the second line, wherein first and second common and pixel electrodes are arranged in display area, first and second transistor are arranged outside display area, second line is longer than first line, and channel width of first transistor is smaller than channel width of second transistor.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: June 1, 2021
    Assignee: Japan Display Inc.
    Inventor: Gen Koide
  • Patent number: 11024655
    Abstract: Provided is a method to manufacture a liquid crystal display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: June 1, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kaoru Hatano
  • Patent number: 11024817
    Abstract: The preset disclosure provide a display panel and a manufacturing method thereof and a display device. The display panel includes a display area and a peripheral area located in a periphery of the display area; wherein a stress absorption structure is provided in the peripheral area of the display panel.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: June 1, 2021
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuanqi Zhang, Ge Wang, Jianpeng Wu
  • Patent number: 11018075
    Abstract: An example relates to an integrated circuit including a semiconductor substrate, and a wiring layer stack located on the semiconductor substrate. The integrated circuit further includes a transistor embedded in the wiring layer stack. The transistor includes an embedded layer. The embedded layer has a thickness of less than 10 nm. The embedded layer includes at least one two-dimensional crystalline layer including more than 10% metal atoms. Further examples relate to methods for forming integrated circuits.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: May 25, 2021
    Assignee: Intel Corporation
    Inventors: Carl Naylor, Ashish Agrawal, Kevin Lin, Abhishek Sharma, Mauro Kobrinsky, Christopher Jezewski, Urusa Alaan
  • Patent number: 11018318
    Abstract: The present application provides a display panel comprising a substrate, a light-emitting device disposed on the substrate, a first inorganic layer and a second inorganic layer sequentially covering the light-emitting device; wherein the density of the second inorganic layer is larger than that of the first inorganic layer, so as to improve the barrier properties against water and oxygen of the display panel. The present application further provides a manufacturing method of a display panel. The encapsulation for the display panel can be improved in the present application.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: May 25, 2021
    Assignees: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jing Huang, Hsiang Lun Hsu
  • Patent number: 11018178
    Abstract: Disclosed is a light receiving element including an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer. The semiconductor layer includes a photodiode, a first transfer transistor that transfers electric charge generated in the photodiode to a first charge storage portion, a second transfer transistor that transfers electric charge generated in the photodiode to a second charge storage portion, and an interpixel separation portion that separates the semiconductor layers of adjacent pixels from each other, for at least part of the semiconductor layer in the depth direction. The wiring layer has at least one layer including a light blocking member. The light blocking member is disposed to overlap with the photodiode in a plan view.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: May 25, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yoshiki Ebiko, Koji Neya, Takuya Sano
  • Patent number: 11018263
    Abstract: A display device includes a semiconductor member, a first gate electrode, a pixel electrode, and a common electrode. The semiconductor member includes a source area, a drain area, and a channel area between the source area and the drain area. The first gate electrode includes a first gate barrier layer, a second gate barrier layer, and a gate metal layer. The first gate barrier layer overlaps the channel area. An oxide material of the first gate barrier layer is identical to an oxide material of the semiconductor member. The second gate barrier layer includes a metal oxide alloy and is positioned between the first gate barrier layer and the gate metal layer. The pixel electrode is electrically connected to the drain area. The common electrode overlaps the pixel electrode.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: May 25, 2021
    Inventors: Sangwoo Sohn, Sangwon Shin
  • Patent number: 11009980
    Abstract: A fingerprint-sensing array on a substrate includes the substrate, scan lines, data lines, readout lines, sub-pixels, and multiple fingerprint recognition units. Areas between adjacent scan lines and adjacent data lines define one sub-pixel with pixel electrode and a first transistor. Of the first transistor, drain electrode connects to the pixel electrode, source electrode connects to one data line and gate electrode connects to one scan line. Thus some of the sub-pixels contain fingerprint recognition units, these being a photodiode electrically connected to one readout line. The readout line passes signals generated by the photodiode to achieve fingerprint recognition function. A display panel using the array on the substrate and a display device using the display panel are also provided.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: May 18, 2021
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chien-Wen Lin, Yu-Fu Weng, Chia-Lin Liu
  • Patent number: 11011431
    Abstract: A semiconductor structure includes a substrate including a first surface, a second surface opposite to the first surface, a sidewall substantially orthogonal to the first surface and the second surface; and a metallic layer surrounding and connected with the sidewall of the substrate, wherein the metallic layer includes an exposed surface substantially level with the first or second surface of the substrate. Further, a method of manufacturing the semiconductor structure is also disclosed.
    Type: Grant
    Filed: September 12, 2020
    Date of Patent: May 18, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chi-Yang Yu, Chien-Kuo Chang, Chih-Hao Lin, Jung Tsung Cheng, Kuan-Lin Ho
  • Patent number: 11005064
    Abstract: A transparent display substrate and a driving method thereof, and a transparent display device are provided. The transparent display substrate includes a base substrate and pixel units which are located above the base substrate and arranged in an array, each of the pixel units comprises a display region and a transparent region; a first light emitting layer is provided in the transparent region, and a first electrode is provided at a side of the first light emitting layer proximal to the base substrate and a second electrode is provided at a side of the first light emitting layer distal to the base substrate; a brightness of light emitted by the first light emitting layer is adjusted according to change in a difference between a first voltage and a second voltage loaded on the first electrode and the second electrode, respectively.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: May 11, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Meng Li
  • Patent number: 10998353
    Abstract: Disclosed is an array substrate and a display device. The array substrate includes: a plurality of gate lines and a plurality of data lines formed on a base substrate, and a plurality of pixel units defined by the plurality of gate lines and the plurality of data lines intersecting each other, wherein each pixel unit includes a thin film transistor and a pixel electrode connected with the thin film transistor, the pixel electrode, the data line, as well as an active layer, a source and a drain of the thin film transistor are disposed in a same layer and are formed through a single patterning process.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: May 4, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Seongyeol Yoo, Seungjin Choi, Heecheol Kim, Youngsuk Song
  • Patent number: 10998513
    Abstract: A display device is disclosed. In one aspect, the display device includes a flexible substrate capable of being bent in a first direction and an insulating layer including a first opening pattern positioned on the flexible substrate and extending in a second direction crossing the first direction.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: May 4, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae Woong Kim, Hyun Woo Koo, Young Gug Seol
  • Patent number: 10991728
    Abstract: A display panel includes a first substrate, a second substrate, a sealant, a signal line, and a turning line. The signal line includes first to nth signal lines substantially extending along a first direction. The turning line includes first to mth turning lines substantially extending along a second direction. A common boundary between the turning line and the signal line is parallel with a third direction. A first auxiliary region is defined by the first direction, a fourth direction perpendicular to the first direction, and the third direction. One side of the first auxiliary region overlaps the common boundary. Two vertices of the first auxiliary region overlap the first signal line and the other vertex overlaps the nth signal line. A vertical projection area of the signal line in the first auxiliary region is A1, an area of the first auxiliary region is B1, and 60%?A1/B1?100%.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: April 27, 2021
    Assignee: Au Optronics Corporation
    Inventors: Shin-Wei Huang, Chia-Ching Lu, Min-Hsiang Hung, Chen-Shun Tsai
  • Patent number: 10991305
    Abstract: An organic light emitting (OLE) display device includes pixels connected to scan lines (SLs), data lines (DLs), and a first control line (FCL) commonly connected to the pixels. Each pixel includes: an OLE diode connected between a first power source (PS) and a second PS; a first transistor (TFT1) connected between the first PS and the OLE diode, a gate electrode (GE) of the TFT1 being connected to a first node (N1); a second transistor (TFT2) connected between the N1 and a second node (N2), a GE of the TFT2 being connected to a SL; a third transistor (TFT3) connected between the N2 and a third node (N3), the N3 being connected between the TFT1 and the OLED, a GE of the TFT3 being connected to the FCL; a first capacitor connected between the first PS and the N1; and a second capacitor connected between the N2 and a DL.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: April 27, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jun Hyun Park, Cheol Gon Lee, Yang Hwa Choi
  • Patent number: 10985143
    Abstract: The disclosed technology provides micro-assembled micro-LED displays and lighting elements using arrays of micro-LEDs that are too small (e.g., micro-LEDs with a width or diameter of 10 ?m to 50 ?m), numerous, or fragile to assemble by conventional means. The disclosed technology provides for micro-LED displays and lighting elements assembled using micro-transfer printing technology. The micro-LEDs can be prepared on a native substrate and printed to a display substrate (e.g., plastic, metal, glass, or other materials), thereby obviating the manufacture of the micro-LEDs on the display substrate. In certain embodiments, the display substrate is transparent and/or flexible.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: April 20, 2021
    Assignee: X Display Company Technology Limited
    Inventors: Christopher Bower, Matthew Meitl, David Gomez, Salvatore Bonafede, David Kneeburg, Alin Fecioru, Carl Prevatte
  • Patent number: 10985187
    Abstract: A display panel and fabrication method, and a display device are provided. The display panel includes a substrate, an array layer disposed on the substrate, and a light-emitting device disposed on a side of the array layer facing away from the substrate. The array layer includes a thin film transistor, and the thin film transistor includes a ring-shaped active layer, a ring-shaped gate electrode isolatedly overlapped with a channel region of the ring-shaped active layer, and a ring-shaped first end corresponding to and connected to the ring-shaped active layer. The ring-shaped first end is one of a source electrode and a drain electrode of the thin film transistor. The light-emitting device includes a first electrode, and the first electrode is connected to the ring-shaped first end, and the first electrode is a ring-shaped electrode.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: April 20, 2021
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventor: Yang Nan
  • Patent number: 10984695
    Abstract: A display driving device is disclosed. The display driving device includes: a data signal end for providing a data signal, a source line, and a switching circuit. The source line can transmit the data signal to a first pixel circuit and a second pixel circuit. Along a direction of the source line, a distance between the second pixel circuit and the data signal end is larger than a distance between the first pixel circuit and the data signal end. The switching circuit is between the data signal end and the source line, and can be turned on in response to a first control signal, and can be turned on in response to a second control signal. A turned-on time period of the switching circuit in response to the second control signal is longer than a turned-on time period of the switching circuit in response to the first control signal.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 20, 2021
    Assignees: Hefei BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yulong Xiong, Liugang Zhou, Tao Li, Yizhan Han, Jianwei Sun, Liu He
  • Patent number: 10985190
    Abstract: An active device substrate including a substrate and an active device is provided. The active device includes a protrusion, a gate disposed on the protrusion, a semiconductor layer, a gate insulation layer disposed between the gate and the semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer. The protrusion has a first upper surface, a second upper surface, an inner surface and an outer surface. The inner surface and the first upper surface define a concave portion. The inner surface, the second upper surface and the outer surface define a convex portion. The semiconductor layer is disposed on the first upper surface, the inner surface, the second upper surface and the outer surface. The first electrode is disposed on at least one portion of the outer surface. The second electrode is disposed in the concave portion of the protrusion.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: April 20, 2021
    Assignee: Au Optronics Corporation
    Inventor: Chi-Ho Chang
  • Patent number: 10978499
    Abstract: A display apparatus includes a substrate; a pixel driving circuit on the substrate; and a display unit connected with the pixel driving circuit, wherein the pixel driving circuit includes a first thin film transistor and a second thin film transistor, wherein the first thin film transistor includes, a first gate electrode on the substrate, a first active layer spaced apart from the first gate electrode and overlapping at least a part of the first gate electrode, a first source electrode connected with the first active layer; and a first drain electrode spaced apart from the first source electrode and connected with the first active layer, and wherein the second thin film transistor includes, a second active layer on the substrate, and a second gate electrode spaced apart from the second active layer and partially overlapping at least a part of the second active layer, wherein the first gate electrode is disposed between the substrate and the first active layer, the second active layer is disposed between the
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: April 13, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jaeman Jang, SeHee Park, DaeHwan Kim, PilSang Yun
  • Patent number: 10978533
    Abstract: An array substrate structure is provided, which includes a substrate with a first surface and a second surface opposite to the first surface. A first TFT is on the first surface of the substrate, and a second TFT is on the second surface of the substrate. A through via passes through the substrate, and the first TFT is electrically connected to the second TFT through the through via.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: April 13, 2021
    Assignee: INNOLUX CORPORATION
    Inventor: Kuan-Feng Lee
  • Patent number: 10976853
    Abstract: A display device is disclosed. In one aspect, the display device includes a substrate including a display area and a non-display area adjacent to the display area and a display member formed over the substrate in the display area. The display device also includes an encapsulation layer formed over the display member and encapsulating the display member together with the substrate and a plurality of first touch lines formed over the encapsulation layer in the display area. The first touch lines extend in a first direction. The display device further includes a plurality of second touch lines formed on the same layer as the first touch lines in the display area. The second touch lines extend in the first direction and are spaced apart from the first touch lines.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: April 13, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Hwan Park, Jong Seok Kim, Chi Wook An, Seong Jun Lee, Sang Hyun Jun
  • Patent number: 10971523
    Abstract: The present disclosure provides a pixel array and a fabrication method thereof. The pixel array includes a plurality of gate lines and a plurality of data lines which are arranged intersected and insulated and a pixel unit disposed at a position where each of the plurality of gate lines and each of the plurality of data lines are intersected. The pixel unit includes a thin film transistor (TFT). The width-to-length ratios of channels of the TFTs are sequentially increased in such a manner that the width-to-length ratios of the channels of the TFTs in the pixel units positioned in a same row (and/or a same column) are sequentially increased along a scanning direction of the gate line coupled to gate electrodes of the TFTs in the same row (and/or along a data writing direction of the data line coupled to the source electrodes of the TFTs in the same column).
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: April 6, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tongshang Su, Dongfang Wang, Jun Cheng, Jun Liu, Qinghe Wang, Guangyao Li, Liangchen Yan
  • Patent number: 10964753
    Abstract: Disclosed is an optoelectronic device including a first electrode and a second electrode facing each other; a metal layer pattern disposed between the first electrode and the second electrode; a buffer layer covering the metal layer pattern; and a photoelectric conversion layer on the buffer layer. The metal layer pattern includes a metal having a negative dielectric constant and the buffer layer includes a compound selected from silicon nitride (SiNx, 0<x<1), silicon oxynitride (SiOyNz, 0<y<0.5, 0<z?1), P-doped silicon oxynitride (SiOyNz:P, 0<y<0.5, 0<z?1), and a combination thereof.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 30, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Heo, Takkyun Ro, Kyung Bae Park, Gyeongsu Park, Joo Ho Lee
  • Patent number: 10962815
    Abstract: A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: March 30, 2021
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Hideo Tanabe, Masaru Takabatake, Toshiki Kaneko, Atsushi Hasegawa, Hiroko Sehata
  • Patent number: 10957801
    Abstract: A semiconductor device which has favorable electrical characteristics is provided. A method for manufacturing a semiconductor device with high productivity is provided. A method for manufacturing a semiconductor device with a high yield is provided.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: March 23, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Patent number: 10950636
    Abstract: A method for fabricating an array substrate is provided. A gate insulation layer, first and second gates and a first interlayered insulation layer are formed on first and second active layers in order. A photolithography and etching process is performed by using a photo mask to form first to fourth contact holes in the gate insulation layer and the first interlayered insulation layer. First and second sources and first and second drains which are respectively connected to the first and second active layers through the first to fourth contact holes are formed. A second interlayered insulation layer is formed.
    Type: Grant
    Filed: February 16, 2020
    Date of Patent: March 16, 2021
    Assignee: Au Optronics Corporation
    Inventors: Shu-Hao Huang, Chin-Chuan Liu, Sung-Yu Su
  • Patent number: 10948792
    Abstract: A liquid crystal display device including a liquid crystal display panel, a back light and a light control panel set between the liquid crystal panel and the back light comprising: the light control panel comprises a first substrate, a second substrate and a liquid crystal layer between the first substrate and the second substrate, wherein a plurality of first signal wirings 11, an insulating film, and a first electrode of plenary shape are formed in this order on the first substrate, the signal wiring 11 is made of a first transparent conductive film, the first electrode is made of a second transparent conductive film, the second electrode is made of a third transparent conductive film, a dummy wiring 50 made of a same material as the first transparent conductive film is formed on a layer that the signal wirings 11 are formed.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: March 16, 2021
    Assignee: JAPAN DISPLAY INC.
    Inventors: Shunichi Kimura, Toshiharu Matsushima
  • Patent number: 10943963
    Abstract: A display device may include a substrate, a plurality of pixel electrodes, a pixel defining layer, a first intermediate layer, and a first opposite electrode. The plurality of pixel electrodes may overlap the substrate and may include a first pixel electrode. The pixel defining layer may include a concave surface. The concave surface may partially overlap the first pixel electrode. A part of the concave surface may be positioned between the first intermediate layer and the first pixel electrode. The first intermediate layers may be positioned between the first opposite electrode and the part of the concave surface.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: March 9, 2021
    Inventor: Takayuki Fukasawa
  • Patent number: 10937646
    Abstract: A method of forming an electrically insulating barrier between a source contact and a drain contact of a transistor device including an electrically insulating layer disposed atop a semi-conductive layer, and an electrically conductive layer disposed atop the electrically insulating layer, the source contact and the drain contact extending from the electrically conductive layer through the electrically insulating layer to the semi-conductive layer, the method including disposing a hardmask layer atop the electrically conductive layer, disposing a photoresist layer atop the hardmask layer, performing a photolithography process to form a trench in the hardmask layer to expose an underlying portion of the electrically conductive layer spanning between the source contact and the drain contact, and performing an ion implantation process, wherein an ion beam formed of ionized oxygen atoms is directed into the trench to oxidize the exposed portion of the electrically conductive layer.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: March 2, 2021
    Assignee: Applied Materials, Inc.
    Inventor: Aseem K. Srivastava