In Array Having Structure For Use As Imager Or Display, Or With Transparent Electrode Patents (Class 257/59)
  • Patent number: 10353257
    Abstract: A display panel is provided and includes: a substrate; multiple data lines arranged along a first direction of the substrate; multiple scan lines arranged along a second direction of the substrate; and multiple pixel units. Each pixel unit includes a first pixel and a second pixel. The first pixel and the second pixel are coupled to a same one of the data lines, and further are respectively coupled to adjacent two of the scan lines. A driving timing of the first pixel is ahead of that of the second pixel. The first pixel includes a first capacitor, the second pixel includes a second capacitor, and the first capacitor is smaller than the second capacitor.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: July 16, 2019
    Assignees: HKC CORPORATION LIMITED, CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Zeyao Li
  • Patent number: 10354606
    Abstract: A display panel has a display area and a non-display area surrounding the display area, and the display panel includes scan lines, data lines, pixel structures, at least one driving device, capacitor electrode lines, and compensation capacitors. Each pixel structure includes an active device, a pixel electrode, and a storage capacitor. The driving device is located in the non-display area and is electrically connected to the pixel structures. The capacitor electrode lines extend to the display area from the non-display area and are electrically connected to the storage capacitors of the pixel structures. The compensation capacitors are located in the non-display area and between the pixel structures and the driving device. Two ends of each of the compensation capacitor are electrically connected to one of the scan lines and one of the capacitor electrode lines, respectively.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: July 16, 2019
    Assignee: Au Optronics Corporation
    Inventors: Yueh-Hung Chung, Ya-Ling Hsu, Han-Ming Chen, Chen-Hsien Liao
  • Patent number: 10355029
    Abstract: A switching element, a manufacturing method thereof, an array substrate and a display device are provided. The switching element includes: a base substrate; a first thin-film transistor (TFT), disposed on the base substrate; and a second TFT, disposed on the first TFT, wherein the first TFT includes a first electrode and a second electrode, and the first TFT and the second TFT share the first electrode and the second electrode.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: July 16, 2019
    Assignees: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Co., Ltd.
    Inventors: Liqing Liao, Hongmin Li, Ying Wang, Dong Wang
  • Patent number: 10355064
    Abstract: The present disclosure provides an active-matrix organic light emitting diode display substrate, a method for fabricating the display substrate and a display device. The active-matrix organic light emitting diode display substrate includes two storage capacitors connected in parallel, an active layer of TFT and an electrode of the new added storage capacitor are formed through a single patterning process, and the electrode is made of conductor material.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: July 16, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Cuili Gai, Yicheng Lin
  • Patent number: 10355138
    Abstract: A low temperature polysilicon (LTPS) thin film transistor (TFT) substrate and a method for manufacturing the same are provided. The method includes: sequentially forming a plurality of light-shielding portions, a buffer layer, and a plurality of island-shaped polysilicon portions on a substrate; performing light ion doping over two sides of the island-shaped polysilicon portions to form doped regions and channel regions; sequentially forming a gate insulating layer and a plurality of gate electrodes; performing heavy ion doping over the doped region that are not covered by the gate electrodes to form N-type heavily doped regions and N-type lightly doped regions; and forming an interlayer insulating layer as well as a source electrode and a drain electrode which are electrically connected to the N-type heavily doped regions on the gate electrodes.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: July 16, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Tao Wang
  • Patent number: 10355028
    Abstract: A semiconductor device includes an insulating substrate, a polysilicon layer on the substrate, a first-gate-insulating layer on the polysilicon layer, a first metal layer and an oxide-semiconductor layer both on the first-gate-insulating layer, a second-gate-insulating layer on the oxide-semiconductor layer, a second metal layer on the second-gate-insulating layer, a first top gate planar thin film transistor in which the polysilicon layer forms a channel with a source, drain and gate, and a second top gate thin film transistor in which the oxide-semiconductor layer forms a channel with a source, drain and gate. The source and drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are in the second metal layer. The source or the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are electrically interconnected.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: July 16, 2019
    Assignee: TIANMA JAPAN, LTD.
    Inventor: Kazushige Takechi
  • Patent number: 10347208
    Abstract: A display device with space for accommodating elements of a gate driver in a display area of the display device, the display device including first and second adjacent pixel electrodes, and third and fourth adjacent pixel electrodes; a gate line extending between the first pixel electrode and the second pixel electrode and between the third pixel electrode and the fourth pixel electrode; a gate driver having a plurality of elements and configured to drive the gate line; and a light blocking layer overlapping the gate line, wherein the light blocking layer comprises a first light blocking portion and a second light blocking portion, the first light blocking portion is adjacent to the first pixel electrode and the second pixel electrode, the second light blocking portion is adjacent to the third pixel electrode and the fourth pixel electrode, the second light blocking portion having a larger size than a size of the first light blocking portion, and at least one of the plurality of elements of the gate driver ov
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: July 9, 2019
    Assignee: Samsung Dispiay Co., Ltd.
    Inventors: Noboru Takeuchi, Jonghwan Lee, Kangnam Kim, Beomjun Kim, Hongwoo Lee, Youmee Hyun
  • Patent number: 10347869
    Abstract: A method of manufacturing an organic light-emitting display device is provided. The method includes forming a pixel electrode, forming a hydrophobic material layer on the pixel electrode, wherein the hydrophobic material layer includes a hydrophobic material, forming a pixel-defining layer by patterning the hydrophobic material layer, so as to expose at least a portion of the pixel electrode, and removing the hydrophobic material on the exposed portion of the pixel electrode using surface treatment.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: July 9, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki-Wan Ahn, Jae-Hyuck Jang
  • Patent number: 10347706
    Abstract: An organic light-emitting display apparatus including a shield layer and a method of manufacturing the same are provided. The organic light-emitting display apparatus includes a substrate having a display area and a peripheral area surrounding the display area. A plurality of first thin film transistors (TFTs) are disposed in the display area of the substrate and a plurality of second TFTs disposed in the peripheral area of the substrate. A shield layer is positioned above the second TFTs and extended to an edge portion of the substrate. The shield layer includes a plurality of through holes in a portion that does not overlap with the second TFTs.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: July 9, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventor: Yang-Wan Kim
  • Patent number: 10339885
    Abstract: An array substrate, a display device and a driving method thereof are provided. The array substrate includes a base substrate, a driver provided on the base substrate, a plurality of gate lines and a plurality of gate line overlap parts, each of the gate line overlap parts has a portion which overlaps a corresponding gate line of the gate lines in a direction perpendicular to the base substrate; the driver is connected with the plurality of the gate line overlap parts and is configured to, at one or both of a time when a potential of the gate line is changed from a turn-on potential to a turn-off potential and a time from the turn-off potential to the turn-on potential, make the gate line overlap part in a floating state, or make the potential of the gate line overlap part equal to the changed potential.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: July 2, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yoon Sung Um, Yun Sik Im
  • Patent number: 10338440
    Abstract: The invention provides a TFT substrate and manufacturing method thereof. The TFT substrate comprises: base substrate, TFT layer, passivation layer and pixel electrode, stacked in above order; wherein the pixel electrode comprising: main electrode, and connection electrode connected to main electrode; the connection electrode connected to TFT layer through pixel electrode via; main electrode having a cross-like slit structure with branch electrode on four trunks of cross, and the connection electrode comprising a plurality of parallel stripe-shaped first branch electrodes, and a second branch electrode connected to the first branch electrodes; by disposing the first branch electrodes, the connection electrode having a shape similar to main electrode to make the main and connection electrodes having similar single slit diffraction when exposed to reduce or eliminate the photo-resist thickness difference in pixel electrode area in the 3M process to avoid display defect and improve yield rate.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: July 2, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Mian Zeng, Xiaodi Liu
  • Patent number: 10338446
    Abstract: A semiconductor device has a top-gate structure resistant to creation of parasitic capacitance between a low-resistance region formed in a semiconductor layer and a gate electrode. A TFT (100) has a low-resistance region, a portion of which has a first length (L1) ranging from a first position (P1) corresponding to an end of a gate insulating film to a region below a gate electrode (40), and the first length is substantially equal to a second length (L2) ranging from the first position (P1) to a second position (P2) corresponding to an end of the gate electrode (40). Thus, the overlap between the gate electrode (40) and either a source region (20 s) or a drain region (20 d) can be reduced, resulting in diminished parasitic capacitance.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: July 2, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Hiroshi Matsukizono
  • Patent number: 10338447
    Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: July 2, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara, Hajime Kimura
  • Patent number: 10333004
    Abstract: A semiconductor device including a highly reliable transistor is provided. A semiconductor device includes a transistor. The transistor includes first and second gate electrodes, first and second gate insulators, a source electrode, a drain electrode, first to sixth oxides, first and second layers, and first and second gate insulators. The third oxide is under the source electrode. The fourth oxide is under the drain electrode. The sixth oxide is under the second gate electrode. The third and fourth oxides each have a function of supplying oxygen to the second oxide. The sixth oxide has a function of supplying oxygen to the second gate insulator.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: June 25, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Shunpei Yamazaki
  • Patent number: 10332925
    Abstract: An image sensor includes a substrate including a plurality of pixel regions and one or more pairs of dummy pixel regions; a pixel separation structure between two adjacent pixel regions among the plurality of pixel regions and including a first conductive layer; a dummy pixel separation structure between the one or more pairs of dummy pixel regions, electrically connected to the pixel separation structure, and including a second conductive layer; and a pixel separation contact disposed on the dummy pixel separation structure.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: June 25, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-sun Oh, Hee-sang Kwon
  • Patent number: 10332950
    Abstract: An organic light emitting display device includes a folding part configured to be folded, and a flat part adjacent to the folding part. The folding part includes a first pixel. The flat part includes a second pixel. The first pixel includes a first organic light emitting diode, a first driving transistor and a first control transistor. The first driving transistor includes a first semiconductor pattern. The first control transistor includes a second semiconductor pattern. The second pixel includes a second organic light emitting diode, a second driving transistor and second control transistor. The second driving transistor includes a third semiconductor pattern. The second control transistor includes a fourth semiconductor pattern. At least one of the first or second semiconductor patterns includes an oxide semiconductor or a polycrystalline silicon, and each of the third and fourth semiconductor patterns includes the other of the oxide semiconductor and the polycrystalline silicon.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: June 25, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Changyong Jeong, Heejun Kwak, Taewook Kang, Mugyeom Kim, Jaeseob Lee, Jonghan Jeong
  • Patent number: 10330990
    Abstract: A liquid crystal display device includes a first substrate, a pixel electrode which is disposed on the first substrate and comprises a first sub-pixel electrode and a second sub-pixel electrode adjacent to the first sub-pixel electrode along a first direction, and a shielding electrode which is disposed on the same layer as the pixel electrode and comprises a first area having a first width and a second area having a second width which is smaller than the first width along a second direction which crosses the first direction, and the first sub-pixel electrode may be adjacent to the first area along the second direction, and the second sub-pixel electrode may be adjacent to the second area along the second direction.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: June 25, 2019
    Assignee: SAMSUNG DISPLAY CO. LTD.
    Inventors: Ho Kil Oh, Hoon Kim, Ki Chul Shin
  • Patent number: 10332988
    Abstract: The invention provides a BCE TFT substrate and manufacturing method thereof. The method uses low deposition power and low oxygen content to deposit first silicon oxide thin film; then increases deposition power with low oxygen content to deposit second silicon oxide thin film. The first and second silicon oxide thin films form a passivation layer; the second silicon oxide film is implanted with oxygen to form a superficial layer so that the Si:O atomic ratio in the superficial layer is close to or same as Si:O atomic ratio of SiO2, to ensure the passivation layer in contact with the air side is strongly hydrophobic to prevent outside water vapor into the back-channel, while ensuring the side of passivation layer contacting IGZO active layer has a lower oxygen content to reduce the probability of forming unbalanced O-ions at the interface between passivation layer and IGZO active layer.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: June 25, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Chunsheng Jiang
  • Patent number: 10332968
    Abstract: A semiconductor device (100) is provided with a thin film transistor including an oxide semiconductor layer (5), a gate electrode (3), a gate insulating layer (4), and a source electrode (7s) and a drain electrode (7d) that are in contact with the oxide semiconductor layer, at least one electrode of the source electrode (7s), the drain electrode (7d), and the gate electrode (3) has a multilayer structure that includes a first layer (3A, 7A) containing copper and a second layer (3B, 7B) containing titanium or molybdenum, the thickness of the first layer (3A, 7A) is more than the thickness of the second layer (3B, 7B), when the source electrode (7s) or the drain electrode (7d) has the multilayer structure, the second layer is arranged on the oxide semiconductor layer side of the first layer so as to be in contact with the surface of the oxide semiconductor layer (5), when the gate electrode (3) has the multilayer structure, the second layer is arranged on the substrate (1) side of the first layer, and the thick
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: June 25, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Fujita, Hajime Imai, Hisao Ochi, Tetsuo Kikuchi, Hideki Kitagawa, Masahiko Suzuki, Shingo Kawashima, Tohru Daitoh
  • Patent number: 10325939
    Abstract: A method is provided for manufacturing a thin film transistor array substrate, which includes: a substrate on which a thin film transistor and a storage capacitor are formed on the substrate. The storage capacitor includes a first electrode plate formed on the substrate, a gate isolation layer or an etching stopper layer formed on the first electrode plate, and a second electrode plate formed on the gate isolation layer or the etching stopper layer. The etching stopper layer may be formed on the gate isolation layer, of which one is partially etched and removed such that there is only one of the gate isolation layer and the etching stopper layer existing between the two electrode plates of the storage capacitor so as to reduce the overall thickness of the isolation layer of the storage capacitor. Thus, the capacitor occupies a smaller area and a higher aperture ratio may be achieved.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: June 18, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xiaowen Lv
  • Patent number: 10317758
    Abstract: An array substrate and a display device having the array substrate are provided. The array substrate comprises a display region and a non-display region disposed at the periphery of the display region. The non-display region comprises a gate driver region (GOA region), which comprises a first patterned metal layer formed on a base substrate, a first insulating layer formed on the first patterned metal layer, a second patterned metal layer formed on the first insulating layer, a second insulating layer covering the second patterned metal layer, and a third patterned metal layer formed at a side of the second insulating layer away from the base substrate. The third patterned metal layer comprises a plurality of metal wires insulated from each other and connected to the first patterned metal layer and the second patterned metal layer respectively by through holes and used as connecting lines between elements of the gate driver.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: June 11, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Xing Yao
  • Patent number: 10312411
    Abstract: In a light-emitting element (1), a light-emitting layer (4), a second conductivity type semiconductor layer (5), a transparent electrode layer (6), a reflecting electrode layer (7) and an insulating layer (8) are stacked in this order on a first conductivity type semiconductor layer (3), while a first electrode layer (10) and a second electrode layer (12) are stacked on the insulating layer (8) in an isolated state.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: June 4, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Nobuaki Matsui, Hirotaka Obuchi
  • Patent number: 10310347
    Abstract: There are provided a display apparatus and a method of manufacturing the display apparatus. The display apparatus includes a pixel having a first thin film transistor and a drive circuit having a second thin film transistor and driving the pixel, wherein a first channel region of the first thin film transistor and a second channel region of the second thin film transistor are configured to have different electrical characteristics (for example, electron mobility, thereby enabling the first thin film transistor and the second thin film transistor to function suitably for the each role thereof).
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: June 4, 2019
    Assignee: Sakai Display Products Corporation
    Inventors: Shigeru Ishida, Nobutake Nodera, Ryouhei Takakura, Yoshiaki Matsushima, Takao Matsumoto, Kazuki Kobayashi, Taimi Oketani
  • Patent number: 10312273
    Abstract: A method for manufacturing a LTPS TFT substrate is provided. Buffer layers are respectively provided in a drive TFT area and a display TFT area and have different thicknesses, such that the thickness of the buffer layer in the drive TFT area is larger than the thickness of the buffer layer in the display TFT area so that different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. A poly-silicon layer that is formed in the drive TFT area in the crystallization process has a large lattice dimension to increase electron mobility thereof. Fractured crystals can be formed in a poly-silicon layer of the display TFT area in the crystallization process for ensuring the uniformity of the grain boundary and increasing the uniformity of electrical current. Accordingly, the electrical property demands for different TFTs can be satisfied.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: June 4, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xiaoxing Zhang
  • Patent number: 10311276
    Abstract: A system and method for an electronic device for imaging a biometric object having structural features of interest is disclosed. The electronic device includes a display including rows of pixel elements, the rows of pixel elements being parallel a first primary direction along a first axis and an optical sensor mounted underneath the display, the optical sensor being parallel to a second primary direction along a second axis. The second axis is rotated at an angle relative the first axis to adjust a moiré pattern outside of a frequency range of the features of interest.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 4, 2019
    Assignee: Synaptics Incorporated
    Inventors: Bob Lee Mackey, Robert John Gove
  • Patent number: 10303029
    Abstract: A liquid crystal display includes a lower substrate and an upper substrate facing each other, a liquid crystal layer disposed between the lower substrate and the upper substrate, a color conversion layer disposed on the liquid crystal layer, a first polarizing layer and a first phase difference layer disposed between the liquid crystal layer and the color conversion layer, and a second polarizing layer and a second phase difference layer disposed between a light source and the lower substrate, wherein the first phase difference layer has a refractive index satisfying Inequality 1 and the second phase difference layer has refractive indexes satisfying Inequality 2. nx1?ny1?nz1??[Inequality 1] nx2>nz2>ny2??[Inequality 2] In Inequalities 1 and 2, nx1, nx2, ny1, ny2, nz1, and nz2 are the same in the detailed description.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Beom Seok Kim, Sangah Gam, Ju Hyun Kim, Hyun-Seok Choi
  • Patent number: 10304995
    Abstract: A flexible electric device includes a first electrode on a flexible member, at least one semiconductor element on the first electrode, at least one filling region adjacent to the semiconductor element and a second electrode on the semiconductor element.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: May 28, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-hee Choi, Yun-seong Lee
  • Patent number: 10290684
    Abstract: The present application discloses an array substrate having a subpixel region and an inter-subpixel region, a display panel and a display apparatus having the same, and a fabricating method thereof. The array substrate includes a plasmonic color filter layer including a plurality of color filter blocks in the subpixel region on a base substrate. Each of the plurality of color filter blocks includes a plurality of plasmonic nanostructures made of a semiconductor material. A first color filter block corresponding to a subpixel of a first color has an arrangement of nanostructures different from that of a second color filter block corresponding to a subpixel of a second color; the second color being different from the first color.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: May 14, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Zhang, Zhen Liu, Jing Liu
  • Patent number: 10283533
    Abstract: A transistor array panel includes a transistor disposed on a substrate. The transistor includes a gate electrode, a source electrode, a drain electrode, a semiconductor, and a top electrode. The top electrode is disposed on and overlaps the semiconductor, and is electrically connected to the source electrode.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang Kyung Lee, Sang-Ho Moon
  • Patent number: 10283645
    Abstract: A semiconductor device includes a TFT (101), the TFT including a gate electrode (12), a gate insulating layer (14) covering the gate electrode, a metal oxide layer (16A) including a channel region (16c), a source contact region (16s) and a drain contact region (16d), a first electrode (18A) in contact with the source contact region, an insulating layer (22) formed on the metal oxide layer and the first electrode, the insulating layer having a first opening (22p) therein through which a portion of the metal oxide layer is exposed, and a light-transmissive second electrode (24) formed on the insulating layer and in a contact hole including the first opening, wherein the second electrode (24) is in contact with the drain contact region (16d) in the contact hole, the drain contact region (16d) is a portion of a region (17) of the metal oxide layer (16A) that is exposed through the contact hole, and as seen from a direction normal to a substrate (11), the second electrode (24) does not overlap the channel region (
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: May 7, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Fumiki Nakano, Sumio Katoh
  • Patent number: 10276107
    Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a controller, a register, and an image processing portion. The image processing portion has a function of processing image data using a parameter. The image processing portion takes the image data from a frame memory and takes the parameter from the register. The frame memory has a function of retaining the image data while power supply is stopped. The register has a function of retaining the parameter while power supply is stopped. The controller has a function of controlling power supply to the register, the frame memory, and the image processing portion.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: April 30, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 10276400
    Abstract: The invention relates to a method for fabricating an array substrate, an array substrate and a display device. The method for fabricating an array substrate may comprise: forming a pattern including a source electrode, a drain electrode and a data line; forming a non-crystalline semiconductor thin film layer; and performing annealing, so as to convert only the non-crystalline semiconductor thin film layer on the source electrode, drain electrode and data line to a metal semiconductor compound. By converting only the non-crystalline semiconductor thin film layer on the source electrode, drain electrode and data line into a metal semiconductor compound, the resulting metal semiconductor compound may prevent oxidative-corrosion of the metal thin film layer, such as a low-resistance metal (e.g., Cu or Ti) layer, in the subsequent procedures, which is favorable for the fabrication of a metal oxide thin film transistor using Cu or Ti.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: April 30, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Seongyeol Yoo, Seungjin Choi, Youngsuk Song
  • Patent number: 10269837
    Abstract: A sensor, a manufacturing method thereof and an electronic device. The sensor includes: a base substrate; a thin-film transistor (TFT) disposed on the base substrate and including a source electrode; a first insulation layer disposed on the TFT and provided with a first through hole running through the first insulation layer; a conductive layer disposed in the first through hole and on part of the first insulation layer and electrically connected with the source electrode via the first through hole; a bias electrode disposed on the first insulation layer and separate from the conductive layer; a sensing active layer respectively connected with the conductive layer and the bias electrode; and an auxiliary conductive layer disposed on the conductive layer. The sensor and the manufacturing method thereof improve the conductivity and ensure normal transmission of signals by arranging the auxiliary conductive layer on the conductive layer without addition of processes.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: April 23, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., KA IMAGING INC.
    Inventor: Chia Chiang Lin
  • Patent number: 10269314
    Abstract: To reduce the area of a portion where a plurality of transistors are provided in a region around a display region and to reduce the area of the region around the display region, a display device includes a first transistor and a second transistor each as a transistor, and the transistor includes a connection wiring that electrically connects a semiconductor film and a source-drain electrode to each other via an opening portion provided in an insulating film. The first transistor and the second transistor are adjacent to each other, and there is a clearance between an end portion, on the side of the second transistor, of the connection wiring in the first transistor and an end portion, on the side of the second transistor, of the opening portion in the first transistor.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: April 23, 2019
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Toshiaki Fukushima
  • Patent number: 10264142
    Abstract: A display apparatus and a control method thereof are provided. The method includes receiving image data, processing the image data, and dividing a display panel into a plurality of regions, synchronizing a scanning timing of the image data at which the processed image data is scanned in a first region among the plurality of regions with a backlight-on timing of the display panel, and outputting the processed image data in the display panel. The outputting the processed image data includes compensating and outputting the processed image data according to a relation between a scanning timing of the image data for each region of the plurality of regions of the display panel and the synchronized backlight-on timing.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: April 16, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-seok Song, Shin-haeng Kim, Yoo-sun Jung
  • Patent number: 10261310
    Abstract: A display device includes a first support plate and a pixel region over the first support plate. A thin film transistor (TFT) structure is disposed over the first support plate and associated with the pixel region. The TFT structure includes a first metal layer over the first support plate. The first metal layer includes a gate. A silicon layer is disposed over the gate. A second metal layer is disposed over the silicon layer. The second metal layer includes a source and a drain covering a first portion of the silicon layer. An amorphous silicon layer is disposed over at least a portion of the second metal layer and a second portion of the silicon layer.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: April 16, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Toru Sakai, Abhishek Kumar
  • Patent number: 10261373
    Abstract: According to one embodiment, a display device includes a semiconductor layer, a metal portion, and a pixel electrode, the metal portion being in contact with the semiconductor layer through a first contact hole, the pixel electrode being in contact with the metal portion through a second contact hole, the metal portion being a stacked layer body including at least a first conductive layer and a second conductive layer, an edge of the first contact hole being located inside the second contact hole without crossing an edge of the second contact hole, in planar view, the pixel electrode being in contact with the first conductive layer.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: April 16, 2019
    Assignee: Japan Display Inc.
    Inventors: Tetsuya Tomioka, Yoshitada Kometani
  • Patent number: 10263061
    Abstract: There are provided a display unit and an electronic apparatus that are capable of preventing color mixture in adjacent color pixels, and improving color reproducibility and chromaticity viewing angle. The display unit includes: a drive substrate having a plurality of pixels with a partition therebetween; and a first light shielding film provided on the partition.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: April 16, 2019
    Assignee: Sony Corporation
    Inventors: Eisuke Negishi, Shinichi Teraguchi, Shuji Kudo
  • Patent number: 10262583
    Abstract: An organic light-emitting diode (OLED) display is disclosed.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: April 16, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mi-Hae Kim, Ki-Myeong Eom
  • Patent number: 10256261
    Abstract: The invention provides a forming method of a via hole, including: sequentially stacking a patterned first conductive layer, a first insulating layer, a patterned second conductive layer, and a second insulating layer on a substrate. The second conductive layer and the first conductive layer overlap in a normal direction of the substrate, such that the second insulating layer has a protrusion portion protruding away from the substrate. A photosensitive material layer covers the second insulating layer. The photosensitive material layer is exposed, wherein a depth of exposure is equal to a vertical distance from a top surface of the protrusion portion to a surface of the photosensitive material layer. The exposed photosensitive material layer is removed by development to form a first via hole exposing the second insulating layer. The exposed second insulating layer is etched to form a second via hole to expose the second conductive layer, and then the photosensitive material layer is removed.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: April 9, 2019
    Assignee: Chunghwa Picture Tubes, LTD.
    Inventors: Chin-Tzu Kao, Chien-Pang Tai, Pei-Nong Lu
  • Patent number: 10256425
    Abstract: The present disclosure provides a display substrate, comprising: a bending resistant region; the region comprises a base and a metal wire layer, wherein the metal wire layer is directly formed on the base, or the region further comprises an organic buffer layer located between the base and the metal wire layer, and the metal wire layer is directly formed on the organic buffer layer. The present disclosure provides a method for manufacturing the display substrate above-described. The present disclosure further provides a display device, comprising the display substrate above-described. The present disclosure further provides a method for manufacturing the display device, comprising the method for manufacturing the display substrate above-described. The present disclosure forms a bending resistant structure in a predetermined bending resistant region on the bezel portions of the display substrate, which can enhance the bend resistance thereof and improve the quality of the flexible display.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: April 9, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Peng Cai
  • Patent number: 10249600
    Abstract: A light emitting apparatus including: one or a plurality of light emitting devices each having a plurality of electrodes and each emitting light from the upper surface of the light emitting device; a plurality of terminal electrodes provided on the lower side of the light emitting devices in a positional relation with the light emitting devices and electrically connected to the electrodes of the light emitting devices; a first metal line brought into contact with the upper surfaces of the light emitting devices and one of the terminal electrodes, provided at a location separated away from side surfaces of the light emitting devices and created in a film creation process; and an insulator in which the light emitting devices and the first metal line are embedded.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: April 2, 2019
    Assignee: SONY CORPORATION
    Inventors: Naoki Hirao, Katsuhiro Tomoda
  • Patent number: 10247948
    Abstract: The display device includes the first light-emitting element, a second light-emitting element, a first color filter through which light from the first light-emitting element passes, and a second color filter through which the light from the second light-emitting element passes. The relative positional relationship between the center of the first light-emitting element and the center of the first color filter is different from the relative positional relationship between the center of the second light-emitting element and the center of the second color filter.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: April 2, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Takeshi Koshihara, Hitoshi Ota
  • Patent number: 10249647
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: April 2, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Patent number: 10249695
    Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels, that include hybrid thin-film transistor structures formed using semiconducting-oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. A drive transistor in the display pixel may be a top-gate semiconducting-oxide thin-film transistor and a switching transistor in the display pixel may be a top-gate silicon thin-film transistor. A storage capacitor in the display may include a conductive semiconducting-oxide electrode.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: April 2, 2019
    Assignee: Apple Inc.
    Inventors: Shinya Ono, Chin-Wei Lin, Ching-Sang Chuang, Jiun-Jye Chang, Keisuke Omoto, Shang-Chih Lin, Ting-Kuo Chang, Takahide Ishii
  • Patent number: 10249843
    Abstract: A display device includes a substrate including a first area displaying an image and a second area adjacent to the first area, the second area transmitting external light, a first electrode and a second electrode disposed in the first area and overlapping each other, an emission layer disposed between the first electrode and the second electrode in the first area, a first semiconductor layer disposed in the first area, and a second semiconductor layer disposed in the second area.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: April 2, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hui-Won Yang, Hyeon Sik Kim, Hye Hyang Park, Eun Young Lee, Joo Hee Jeon
  • Patent number: 10242886
    Abstract: A method for fabricating an array substrate is disclosed. The method comprises: forming a first oxide semiconductor active layer of a first TFT in a GOA area of a substrate; performing a first annealing process on the first oxide semiconductor active layer at a first temperature; forming a first insulating layer which covers the first oxide semiconductor active layer; performing a second annealing process on the first oxide semiconductor active layer at a second temperature, wherein the second temperature is lower than the first temperature. This improves a forward bias stability of the first TFT and increases the device lifetime.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: March 26, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ce Ning, Wei Yang
  • Patent number: 10243169
    Abstract: An organic light emitting diode display device includes a first substrate, a thin film transistor over the first substrate, a protection layer over the thin film transistor, a light emitting diode over the protection layer, a passivation layer over the light emitting diode, a second substrate over the passivation layer, and a plurality of polymeric nanoparticles disposed within at least one of the protection layer or the passivation layer, wherein a refractive index of the plurality of polymeric nanoparticles is different than both a refractive index of the protection layer and a refractive index of the passivation layer.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: March 26, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Young-Mu Oh, Seung-Han Paek, Hyo-Dae Bae, Jeong-Won Lee, Heon-Il Song, Jong-Hoon Yeo
  • Patent number: 10243081
    Abstract: A highly reliable semiconductor device including a transistor using an oxide semiconductor is provided. In a semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a first insulating layer is formed in contact with the oxide semiconductor layer, and an oxygen doping treatment is performed thereon, whereby the first insulating layer is made to contain oxygen in excess of the stoichiometric composition. The formation of the second insulating layer over the first insulating layer enables excess oxygen included in the first insulating layer to be supplied efficiently to the oxide semiconductor layer. Accordingly, the highly reliable semiconductor device with stable electric characteristics can be provided.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: March 26, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Terumasa Ikeyama, Katsuaki Tochibayashi
  • Patent number: 10235930
    Abstract: A field-effect transistor including: a gate electrode, which is configured to apply gate voltage; a source electrode and a drain electrode, which are configured to take electric current out; a semiconductor layer, which is disposed to be adjacent to the source electrode and the drain electrode; and a gate insulating layer, which is disposed between the gate electrode and the semiconductor layer, wherein the gate insulating layer includes a first gate insulating layer containing a first oxide containing Si and an alkaline earth metal and a second gate insulating layer disposed to be in contact with the first gate insulating layer and containing a paraelectric amorphous oxide containing a Group A element which is an alkaline earth metal and a Group B element which is at least one selected from the group consisting of Ga, Sc, Y, and lanthanoid.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: March 19, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Ryoichi Saotome, Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Sadanori Arae, Minehide Kusayanagi